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BANGLADESH UNIVERSITY OF ENGINEERING AND TECHNOLOGY

GROUP NO. 4 COURSE NO. EEE428

EXPERIMENT NO. 10 NAME OF THE EXPERIMENT:

PHASE ANGLE MEASUREMENT WITH POLARIZED LOGIC CIRCUITS.

GROUP MEMBERS: 0606073 0606086 0606136 Compilation 0606145 Data Tabulation 0606147 PSPICE Simulation

December 4, 2011

OBJECTIVE:
The objective of this experiment is to measure the phase angle between two ac quantities.

THEORY:
The two signals are XNOR-ed using polarized logic circuits. The output of the XNOR circuit is processed through an absolute value amplifier and then through a low pass filter. The final output is a dc voltage and is related to phase angle by, = 180 x [1 / Where Vout = average value of the output voltage in volts Vpeak = OPAMP output peak voltage at saturation = Phase angle between two voltages in degree ]

BLOCK DIAGRAM:

Figure 1: Block diagram of phase angle measurement

APPARATUS:
Name Bread board Resistors Capacitors Op Amps DC supply Multimeter Connecting wires 1 k, 10 k, 50 k, 100 k 0.1 F, 0.22 F, 1 F, 10 F LM741 9 V Model/Rating

EXPERIMENTAL DIAGRAM:

Figure 2: Experimental Circuit Diagram

EXPERIMENTAL DATA: C1 (F)


10 1 0.1

Vpeak (volt) (Experimental)


7 7 7

Vout (volt) (Experimental)


4.14 5.36 5.69

Phase Angle, (degree)


73.54 42.17 33.69

PSPICE SIMULATION:
A. Netlist:
* Schematics Netlist *

R_R1 R_R3 E_ABS1 X_U7 R_R2 C_C1 V_V1 V_V2 R_R4 R_R5 R_R6 R_R7 C_C2 R_R8 X_U5 X_U6 V_V3

$N_0002 $N_0001 1k $N_0004 $N_0003 1k $N_0006 0 VALUE {ABS(V($N_0005))} 0 $N_0007 $N_0008 $N_0009 $N_0005 uA741 $N_0002 $N_0004 10k $N_0004 0 .22u $N_0008 0 9V 0 $N_0009 9V $N_0012 $N_0007 100k $N_0013 $N_0007 100k $N_0007 $N_0005 50k $N_0006 $N_0014 1k $N_0014 0 10u $N_0014 0 10k 0 $N_0001 $N_0008 $N_0009 $N_0012 uA741 0 $N_0003 $N_0008 $N_0009 $N_0013 uA741 $N_0002 0 DC 0 AC 0

+SIN 0 2 500 0 0 0

B. Plots:

Figure 3: Input 1, Input 2 and XNOR : XNOR-ed output

Figure 4: Output of the zero : zero-crossing detectors and XNOR-ed output

C=10u

Figure 5: Input to ABS block and output of RC filter (for C = 10F) :

C=1u

Figure 6: Input to ABS block and output of RC filter (for C = 1F)

C=.1u

Figure 7: Input to ABS block and output of RC filter (for C = 0.1F)

C=.22u

Figure 8: Input to ABS block an output of RC filter (for C = 0.22F) and

DISCUSSION:
1. By increasing the value of the phase shift capacitor, the phase shift between the signals can be increased. 2. As the phase difference increases between inputs, the output of the RC filter decreases. 3. If the two signals are in phase, the output of the summing inverter will be a smooth constant dc value. 4. If the phase difference is 180, we will get no signal from the summing inverter. 5. If the phase difference is in between 0 and 180, we will get output from the summing inverter.