:8 A bus is a collection oI wires on which electrical signals pass between components in the system.

These busses vary Irom processor to processor. The 8086 has three major busses: the address bus, the
data bus, and the control bus.
O $ize oI 8086 data bus is 16
O $ize oI 8086 data bus is 20

The Data :8 The 8086 processors use the data bus to shuIIle data between the various components in a
computer system. The size oI this bus is 16 bit.

The Addre88 :8 The data bus on an 80x86 Iamily processor transIers inIormation between a particular
memory location or I/O device and the CPU. The only question is, 'c memory locaton or I/O
devce? The address bus answers that question.
To diIIerentiate memory locations and I/O devices, the system designer assigns a unique memory
address to each memory element and I/O device. When the soItware wants to access some particular
memory location or I/O device, it places the corresponding address on the address bus. The size oI this
bus is 20 bit.

The Control :8 The control bus is an eclectic collection oI signals that control how the processor
communicates with the rest oI the system. Consider Ior a moment the data bus. The CPU sends data to
memory and receives data Irom memory on the data bus. There are two lines on the control bus, read and
wrte, which speciIy the direction oI data Ilow. Other signals include system clocks, interrupt lines, status
lines, and so on.

General P:rpo8e Regi8ter8 There are eight 16 bit general purpose registers on the 8086: ax, bx,
cx, dx, si, di, bp, and sp.
O The ax register (ccumulator) is where most arithmetic and logical computations take place.
Although you can do most arithmetic and logical operations in other registers, it is oIten more
eIIicient to use the ax register Ior such computations.
O The bx register (ase) has some special purposes as well. It is commonly used to hold indirect
addresses, much like the bx register on the 8086 processors.
O The cx register (ount), as its name implies, counts things. You oIten use it to count oII the
number oI iterations in a loop or speciIy the number oI characters in a string.
O The dx register (ata) has two special purposes: it holds the overIlow Irom certain arithmetic
operations, and it holds I/O addresses when accessing data on the 8086 I/O bus.
O The si and di registers ($ource Index and estnaton Index ) have some special purposes as well.
You may use these registers as pointers (much like the bx register) to indirectly access memory.
You`ll also use these registers with the 8086 string instructions when processing character strings.
O The bp register (ase Ponter) is similar to the bx register. You`ll generally use this register to
access parameters and local variables in a procedure.
O The sp register ($tack Ponter) has a very special purpose it maintains the program stack.
Normally, you would not use this register Ior arithmetic computations. The proper operation oI
most programs depends upon the careIul use oI this register.

esides the eight 16 bit registers, the 8086 CPUs also have eight 8 bit registers. Intel calls these registers
al, ah, bl, bh, cl, ch, dl, and dh. You`ve probably noticed a similarity between these names and the names
oI some 16 bit registers (ax, bx, cx, and dx, to be exact).
The eight bit registers are not independent. Al stands Ior 'ax`s L.O. byte. ah stands Ior 'ax`s
H.O. byte. The names oI the other eight bit registers mean the same thing with respect to bx, cx, and dx.
Figure shows the general purpose register set.

Note that the eight bit registers do not Iorm an independent register set. ModiIying al will change the
value oI ax; so will modiIying ah. The value oI al exactly corresponds to bits zero through seven oI ax.

The value oI ah corresponds to bits eight through IiIteen oI ax. ThereIore any modiIication to al
or ah will modiIy the value oI ax. Likewise, modiIying ax will change bot al and ah. The si, di, bp, and
sp registers are only 16 bits. There is no way to directly access the individual bytes oI these registers as
you can the low and high order bytes oI ax, bx, cx, and dx.

Segment Regi8ter8 The 8086 has Iour special segment regsters: cs, ds, es, and ss. These stand Ior
ode $egment, ata $egment, Extra $egment, and $tack $egment, respectively. These registers are all 16
bits wide. They deal with selecting blocks (segments) oI main memory. A segment register (e.g., cs)
points at the beginning oI a segment in memory. $egments oI memory on the 8086 can be no larger than
65,536 bytes long.
O The cs register points at the segment containing the currently executing machine instructions.
Note that, despite the 64K segment limitation, 8086 programs can be longer than 64K. You
simply need multiple code segments in memory. $ince you can change the value oI the cs
register, you can switch to a new code segment when you want to execute the code located there.
O The data segment register, ds, generally points at global variables Ior the program. Again, you`re
limited to 65,536 bytes oI data in the data segment; but you can always change the value oI the ds
register to access additional data in other segments.
O The extra segment register, es, is exactly that an extra segment register. 8086 programs oIten
use this segment register to gain access to segments when it is diIIicult or impossible to modiIy
the other segment registers.
O The ss register points at the segment containing the 8086 stack. The stack is where the 8086
stores important machine state inIormation, subroutine return addresses, procedure parameters,
and local variables. In general, you do not modiIy the stack segment register because too many
things in the system depend upon it.

Special P:rpo8e Regi8ter8 There are two special purpose registers on the 8086 CPU: the
instruction pointer (ip) and the Ilags register. You do not access these registers the same way you access
the other 8086 registers. Instead, the CPU generally manipulates these registers directly.
O The ip register is the equivalent oI the ip register on the x86 processors it contains the address
oI the currently executing instruction. This is a 16 bit register which provides a pointer into the
current code segment.
O The Ilags register is unlike the other registers on the 8086. The other registers hold eight or 16 bit
values. The Ilags register is simply an eclectic collection oI one bit values which help determine
the current state oI the processor.
Although the Ilags register is 16 bits wide, the 8086 uses only nine oI those bits. OI these
Ilags, Iour Ilags you use all the time: zero, carry, sign, and overIlow. These Ilags are the 8086
condton codes. The Ilags register appears in Iigure.

4 ;erflow Flag (F) $et iI the result is too large positive number, or is too small
negative number to Iit into destination operand.
4 Direction Flag (DF) II set then string manipulation instructions will auto-decrement
index registers. II cleared then the index registers will be auto-incremented.
4 nterr:pt-enable Flag (F) $etting this bit enables maskable interrupts.
4 Single-8tep Flag (TF) II set then single-step interrupt will occur aIter the next
4 Sign Flag (SF) $et iI the most signiIicant bit oI the result is set.
4 ero Flag (F) $et iI the result is zero.
4 A:iliary carry Flag (AF) $et iI there was a carry Irom or borrow to bits 0-3 in the AL
4 Parity Flag (PF) $et iI parity (the number oI "1" bits) in the low-order byte oI the result
is even.
4 Carry Flag (CF) $et iI there was a carry Irom or borrow to the most signiIicant bit
during last result calculation.
Memory Addre88ing Mode8
O The Di8placement nly Addre88ing Mode The most common addressing mode, and the one
that`s easiest to understand, is the dsplacement-only (or drect) addressing mode. The
displacement-only addressing mode consists oI a 16 bit constant that speciIies the address oI the
target location. The instruction mov al,ds:|8088h| loads the al register with a copy oI the byte at
memory location 8088h7. Likewise, the instruction mov ds:|1234h|,dl stores the value in the dl
register to memory location 1234h

O The Regi8ter ndirect Addre88ing Mode8 The 8086 CPUs let you access memory indirectly
through a register using the register indirect addressing modes. There are Iour Iorms oI this
addressing mode on the 8086, best demonstrated by the Iollowing instructions:
mov al, |bx|
mov al, |bp|
mov al, |si|
mov al, |di|
As with the x86 |bx| addressing mode, these Iour addressing modes reIerence the byte at the
oIIset Iound in the bx, bp, si, or di register, respectively. The |bx|, |si|, and |di| modes use the ds
segment by deIault. The |bp| addressing mode uses the stack segment (ss) by deIault.
You can use the segment override preIix symbols iI you wish to access data in diIIerent
segments. The Iollowing instructions demonstrate the use oI these overrides:
mov al, cs:|bx|
mov al, ds:|bp|
mov al, ss:|si|
mov al, es:|di

O ndeed Addre88ing Mode8 The indexed addressing modes use the Iollowing syntax:
mov al, disp|bx|
mov al, disp|bp|
mov al, disp|si|
mov al, disp|di|
II bx contains 1000h, then the instruction mov cl,20h|bx| will load cl Irom memory location
ds:1020h. Likewise, iI bp contains 2020h, mov dh,1000h|bp| will load dh Irom location ss:3020.
The oIIsets generated by these addressing modes are the sum oI the constant and the
speciIied register. The addressing modes involving bx, si, and di all use the data segment, the
disp|bp| addressing mode uses the stack segment by deIault. As with the register indirect
addressing modes, you can use the segment override preIixes to speciIy a diIIerent segment:
mov al, ss:disp|bx|
mov al, es:disp|bp|
mov al, cs:disp|si|
mov al, ss:disp|di|
You may substitute si or di in Figure 4.12 to obtain the |si¹disp| and |di¹disp| addressing

O a8ed ndeed Addre88ing Mode8 The based indexed addressing modes are simply
combinations oI the register indirect addressing modes. These addressing modes Iorm the oIIset
by adding together a base register (bx or bp) and an index register (si or di). The allowable Iorms
Ior these addressing modes are
mov al, |bx||si|
mov al, |bx||di|
mov al, |bp||si|
mov al, |bp||di|
$uppose that bx contains 1000h and si contains 880h. Then the instruction
mov al,|bx||si|
would load al Irom location D$:1880h. Likewise, iI bp contains 1598h and di contains 1004, mov
ax,|bp¹di| will load the 16 bits in ax Irom locations $$:259C and $$:259D.
The addressing modes that do not involve bp use the data segment by deIault. Those that
have bp as an operand use the stack segment by deIault.
O a8ed ndeed Pl:8 Di8placement Addre88ing Mode These addressing modes are a slight
modiIication oI the base/indexed addressing modes with the addition oI an eight bit or sixteen bit
constant. The Iollowing are some examples oI these addressing modes
mov al, disp|bx||si|
mov al, disp|bx¹di|
mov al, |bp¹si¹disp|
mov al, |bp||di||disp|
You may substitute di in Iigure to produce the |bx¹di¹disp| addressing mode. You may substitute
di in Iigure to produce the |bp¹di¹disp| addressing mode.

Instruction set oI Intel 8086 processor consists oI the Iollowing instructions:
O Data moving instructions.
O Arithmetic - add, subtract, increment, decrement, convert byte/word and compare.
O Logic - AND, OR, exclusive OR, shiIt/rotate and test.
O $tring manipulation - load, store, move, compare and scan Ior byte/word.
O Control transIer - conditional, unconditional, call subroutine and return Irom subroutine.
O Input/Output instructions.
O Other - setting/clearing Ilag bits, stack operations, soItware interrupts, etc.

Data tran8fer in8tr:ction8 of microproce88or
copy byLe or word from speclfled source Lo speclfled desLlnaLlon

copy speclfled word Lo Lop of sLackŦ

copy word form Lop of sLack Lo speclfled locaLlon

copy all reglsLers Lo sLack

copy words from sLack Lo all reglsLersŦ

Lxchange byLes or exchange words

LranslaLe a byLe ln AL uslng a Lable ln memoryŦ

1hese are I]C port transfer |nstruct|ons

copy a byLe or word from speclflc porL Lo accumulaLor

copy a byLe or word from accumulaLor Lo speclflc porL

Spec|a| address transfer Instruct|ons

load effecLlve address of operand lnLo speclfled reglsLer

load uS reglsLer and oLher speclfled reglsLer from memory

load LS reglsLer and oLher speclfled reglsLer from memory

I|ag transfer |nstruct|ons

load AP wlLh Lhe low byLe of flag reglsLer

sLore AP reglsLer Lo low byLe of flag reglsLer

copy flag reglsLer Lo Lop of sLack

copy word Lo Lop of sLack Lo flag reglsLer

ADDRegister, Immediate Number
Register, Register
Register, Memory Location
Memory Location, Registe
peration pcode Code Eample Meaning Flag8 Affected
Addition ADD ADD AX, 5 AX ÷ AX 5 * * * * * *
S:btraction $U $U CL, AH CL ÷ CL AH * * * * * *
ncrement INC INC X X ÷ X 1 * * * * *
Decrement DEC DEC X X ÷ X 1 * * * * *

n8tr:ction Set S:mmary
Data Tran8fer n8tr:ction8
MOV Move byte or word to register or memory
IN, OUT Input byte or word Irom port, output word to port
LEA Load eIIective address
LD$, LE$ Load pointer using data segment, extra segment
PU$H, POP Push word onto stack, pop word oII stack
XCHG Exchange byte or word
XLAT Translate byte using look-up table
Logical n8tr:ction8
NOT Logical NOT oI byte or word (one's complement)
AND Logical AND oI byte or word
OR Logical OR oI byte or word
XOR Logical exclusive-OR oI byte or word
TE$T Test byte or word (AND without storing)

Shift and Rotate n8tr:ction8
$HL, $HR Logical shiIt leIt, right byte or word? by 1 or CL
$AL, $AR Arithmetic shiIt leIt, right byte or word? by 1 or CL
ROL, ROR Rotate leIt, right byte or word? by 1 or CL
RCL, RCR Rotate leIt, right through carry byte or word? by 1 or CL
Arithmetic n8tr:ction8
ADD, $U Add, subtract byte or word
ADC, $ Add, subtract byte or word and carry (borrow)
INC, DEC Increment, decrement byte or word
NEG Negate byte or word (two's complement)
CMP Compare byte or word (subtract without storing)
MUL, DIV Multiply, divide byte or word (unsigned)
IMUL, IDIV Integer multiply, divide byte or word (signed)
CW, CWD Convert byte to word, word to double word (useIul beIore multiply/divide)
dfustments after artmetc operatons.
1 oI 3 9/4/01 5:04 PM
8086 Instruction $et $ummary Iile:///D,/notes/8086inst.html
A$CII adjust Ior addition, subtraction, multiplication, division (A$CII
codes 30-39)
DAA, DA$ Decimal adjust Ior addition, subtraction (binary coded decimal numbers)
Tran8fer n8tr:ction8
MP Unconditional jump (sort ?127/8, near ?32K, far between segments)
ondtonal fumps.
A (NE) ump iI above (not below or equal)? ¹127, -128 range only
AE (N) ump iI above or equal(not below)? ¹127, -128 range only
(NAE) ump iI below (not above or equal)? ¹127, -128 range only
E (NA) ump iI below or equal (not above)? ¹127, -128 range only
E () ump iI equal (zero)? ¹127, -128 range only
G (NLE) ump iI greater (not less or equal)? ¹127, -128 range only
GE (NL) ump iI greater or equal (not less)? ¹127, -128 range only
L (NGE) ump iI less (not greater nor equal)? ¹127, -128 range only
LE (NG) ump iI less or equal (not greater)? ¹127, -128 range only
C, NC ump iI carry set, carry not set? ¹127, -128 range only
O, NO ump iI overIlow, no overIlow? ¹127, -128 range only
$, N$ ump iI sign, no sign? ¹127, -128 range only
NP (PO) ump iI no parity (parity odd)? ¹127, -128 range only
P (PE) ump iI parity (parity even)? ¹127, -128 range only
Loop control.
LOOP Loop unconditional, count in CX, short jump to target address
LOOPE (LOOP) Loop iI equal (zero), count in CX, short jump to target address
LOOPNE (LOOPN) Loop iI not equal (not zero), count in CX, short jump to target address
CX ump iI CX equals zero (used to skip code in loop)
S:bro:tine and nterr:pt n8tr:ction8
CALL, RET Call, return Irom procedure (inside or outside current segment)
INT, INTO $oItware interrupt, interrupt iI overIlow
IRET Return Irom interrupt
String n8tr:ction8
2 oI 3 9/4/01 5:04 PM
8086 Instruction $et $ummary Iile:///D,/notes/8086inst.html
MOV$ Move byte or word string
MOV$, MOV$W Move byte, word string
CMP$ Compare byte or word string
$CA$ $can byte or word string (comparing to A or AX)
LOD$, $TO$ Load, store byte or word string to AL or AX
#epeat nstructons (placed n front of oter strng operatons).
REP Repeat
REPE, REP Repeat while equal, zero
REPNE, REPN Repeat while not equal (zero)
Proce88or Control n8tr:ction8
lag manpulaton.
$TC, CLC, CMC $et, clear, complement carry Ilag
$TD, CLD $et, clear direction Ilag
$TI, CLI $et, clear interrupt enable Ilag
LAHF, $AHF Load AH Irom Ilags, store AH into Ilags
PU$HF, POPF Push Ilags onto stack, pop Ilags oII stack
oprocessor, multprocessor nterface.
E$C Escape to external processor interIace
LOCK Lock bus during next instruction
Inactve states.
NOP No operation
WAIT Wait Ior TE$T pin activity
HLT Halt processor
3 oI 3 9/4/01 5:04 PM
8086 Instruction $et $ummary