M|cro Þrocessor]M|cro Contro||er

Slmpllfled CompuLer/Mlcro CompuLerť
CompuLers have Lhree baslc secLlonsť
CÞuť CenLral Þrocesslng unlLŦ lL ls used Lo recognlze and carry ouL program
lnsLrucLlonŦ 1he lnsLrucLlons are known as opcode or machlne codeŦ lL ls Lruly Lhe
braln of Lhe compuLerŦ
l/C lnLerfacesť lnpuL CuLpuL lnLerfaces are used Lo handle communlcaLlons beLween
compuLer and Lhe ouLslde worldŦ
Memoryť lL ls used Lo hold Lhe program lnsLrucLlon and daLaŦ

ulglLal slgnals move from one secLlon Lo anoLher along Lhe paLh called busesŦ A slngle lC CÞu
ls known as mlcroprocessor (MÞu)Ŧ
AdvanLages of Mlcroprocessor 8ased ConLrolť
owŴlevel slgnal from sensorsţ once converLed Lo dlglLalţ can be LransmlLLed long
dlsLances vlrLually errorŴfreeŦ
A mlcroprocessor can handle complex calculaLlons and conLrol sLraLeglesŦ
Changlng Lhe conLrol sLraLegy ls easy by loadlng ln a new programţ no hardware
changes are requlredŦ
Mlcroprocessor based conLrollers can be easlly connecLed Lo compuLer neLworks
wlLhln an organlzaLlonŦ 1hls allows Lhe deslgners Lo enLer program changes and read
currenL sLaLus from Lhelr desk LermlnalsŦ
ongŴLerm memory ls avallable Lo keep Lrack of parameLers ln slow movlng sysLemsŦ


1ypes of Þrocesses performed by (CÞu)ť
ead/WrlLe daLa from/Lo memory or from/Lo an l/C devlceŦ
ead lnsLrucLlons from memoryŦ
Þerform lnLegral manlpulaLlon of daLa wlLhln Lhe processorŦ
1he lnLernal sLorage of Lhe processor ls known as reglsLersŦ


CenLral Þrocesslng unlL (CÞu)ť
CÞu conLalns loglc Lo sLep Lhrough a programŦ
Þrograms are composed of many very slmple lndlvldual operaLlonsţ called
lnsLrucLlonsţ LhaL speclfy ln exacL deLall how Lhe CÞu wlll carry ouL an
algorlLhm/programŦ
ach unlque lnsLrucLlon ls represenLed as blnary value called an opcodeŦ CÞu
advances Lhrough opcodes on each clock cycleŦ
When an opcode ls feLched from memoryţ lL ls decodedţ afLer whlch approprlaLe
acLlons are carrled ouLŦ
Þrogram counLer (ÞC) reglsLer malnLalns Lhe address of Lhe nexL lnsLrucLlon Lo be
feLched from program memoryŦ
AfLer execuLlng each lnsLrucLlonţ ÞC ls lncremenLed and a new lnsLrucLlon ls feLched
from Lhe address lndlcaLed by ÞCŦ When branch lnsLrucLlons are encounLered SLack
ÞolnLer (SÞ) reglsLer ls usedŦ
ArlLhmaLlc oglc unlL (Au)ť
1hls ls responslble for performlng arlLhmeLlc and loglcal operaLlonsŦ lL also keeps Lrack of
sLaLus flags LhaL Lell sybsequenL lnsLrucLlons wheLher Lhe resulL was poslLlveţ negaLlve or
zero and wheLher an addlLlon or subsLracLlon operaLlon creaLed a carry or borrowŦ
Memoryť
Mlcroprocessors requlre memory resources Lo sLore programs and daLaŦ Memory can be
classlfled ln Lwo broad caLagorlesť
1) volaLlleť oses lLs conLenLs when power ls Lurned offŦ ŦCŴ AM
2) nonŴvolaLlleť Can reLaln lLs conLenLs even lf power ls Lurned offŦ ŦCŴ PuuŦ
lollowlngs are Lypes of memoryť
1) ead Cnly Memory (CM)ť
a) Þrogrammable ead Cnly Memory (ÞCM)
b) rasable Þrogrammable ead Cnly Memory (ÞCM)
c) lecLrlcally rasable Þrogrammable ead Cnly Memory (ÞCM)
2) andom Access Memory (AM)ť
a) uynamlc andom Access Memory (uAM)
b) SLaLlc andom Access Memory (SAM)
3) CLher lorms of Memoryť
a) Cache Memory
b) llash Memory
c) vldeo Memory (vAM)

ead Cnly Memory (CM)ť
1he CMţ also known as flrmwareţ cannoL be wrlLLen on or erased uslng Lhe compuLerŦ
CM chlps conLaln programs LhaL are seL ln aL Lhe facLoryţ Lhese are speclal lnsLrucLlons for
compuLer operaLlonsŦ CM chlps do noL loose Lhelr conLenLs when power ls removedŦ
ÞCMť 1hese can be programmed uslng speclal equlpmenLŦ Cnce Lhe program ls
wrlLLenţ lL cannoL be erased/
ÞCMť 1hese are llke CM chlps excepL LhaL Lhe conLenLs can be erased and Lhe
new daLa can be wrlLLenŦ rasure ls done wlLh a speclal devlce LhaL uses uv llghLŦ
ÞCMť 1hese can be reprogrammed uslng speclal elecLrlcal lmpulsesŦ 1he
advanLages of ÞCM chlps ls LhaL Lhey need noL Lo be removed from Lhe
compuLer Lo be changedŦ
andom Access Memory (AM)ť
1he AMţ also known as lnLernal memoryţ prlmary sLorage or slmply memoryŦ lL has Lhree
baslc Lasksť
lL holds Lhe daLa for processlngŦ
lL holds Lhe lnsLrucLlons (programs)Ŧ
lL holds Lhe daLa afLer lL has processed Ǝ walLlng Lo be senL Lo an ouLpuL sLorageŦ
1he conLenLs of Lhe AM address locaLlons change conLlnually as compuLer execuLes a
programŦ lL requlres fasL Au and Wl1 cycle Llmes so LhaL lL may noL slow Lhe compuLer
downŦ A ma[or dlsadvanLage of AM ls LhaL Lhey are volaLlle and loose all Lhe sLored
lnformaLlon lf power ls lnLerrupLedŦ
CLher Memorlesť
Cache Memoryť 1hese are usually bullL lnLo Lhe MÞu chlpŦ 1hese allows Lhe CÞu Lo
run fasLer because lL does noL have Lo Lake Llme Lo swap lnsLrucLlons ln and ouL of
Lhe AMŦ 1he mosL frequenLly used lnsLrucLlons are kepL ln Lhe cache memory so Lhe
CÞu can look Lhere flrsL and fasLŦ
llash Memoryť 1hese conslsLs of clrculLry on credlLŴcardŴslze cards LhaL can be
lnserLed lnLo sloLs connecLlng Lo Lhe ÞC moLherboardŦ 1hese are nonŴvolaLlle
memoryŦ 1hese are becomlng very popular ln mlcroprocessor/mlcroconLroller based
appllcaLlonsŦ
vldeo Memoryť 1hese chlps are used Lo sLore dlsplay lmages for Lhe monlLorŦ 1he
amounL of vldeo memory deLermlnes how fasL lmages appear and how many colors
are avallableŦ


lnpuL/CuLpuL unlLsť
1he l/C operaLlon ls deflned as Lhe Lransfer of daLa beLween Lhe MÞu and Lhe
exLernal worldŦ 1he Lerm perlpheral devlces ls used for Lhe pleces of equlpmenL LhaL
exchange daLa wlLh a MÞu sysLemŦ
ln lnpuL operaLlons Lhe lnpuL devlce places Lhe daLa ln Lhe daLa reglsLer of Lhe
lnLerface chlp Lo hold unLll lL ls read by Lhe MÞuŦ ln ouLpuL operaLlonsţ Lhe MÞu
places Lhe daLa ln Lhe reglsLer unLll lL ls read by Lhe perlpheralŦ
As Lhe speeds and charecLerlsLlcs of perlpheral devlces can dlffer slgnlflcanLly from
Lhose of Lhe MÞusţ Lhese are connecLed vla lnLerface chlps Lo synchronlze daLa
Lransfers beLween MÞu and Lhe perlpheral devlcesŦ
8usesť
1here are Lhree buses exLernal Lo Lhe MÞu and Lwo buses wlLhln MÞuŦ 1he exLernal address
and daLa buses are Lhe exLenslon of Lhe same buses lnslde Lhe MÞuŦ
Address 8usť 1hls ls a 16Ŵllne unldlrecLlonal bus LhaL carrles 16ŴblL address codes
from Lhe MÞu Lo Lhe memory unlLs Lo selecL Lhe memory locaLlon whlch Lhe MÞu ls
accesslng for Au or Wl1 operaLlonŦ
uaLa 8usť 1hls ls a 8Ŵllne bldlrecLlonal bus over whlch 8ŴblL words can be senL from
Lhe MÞu Lo Lhe memory or from Lhe memory Lo Lhe MÞuŦ lL can carry
daLa/lnsLrucLlon codesŦ
ConLrol 8usť 1hls ls grouplng of all Lhe Llmlng and conLrol slgnals needed Lo
synchronlze Lhe operaLlon of MÞu wlLh Lhe oLher unlLs of Lhe mlcrocompuLerŦ
CompuLer Wordsť
1he fundamenLal unlL of lnformaLlon ln a compuLer ls wordŦ AlLhough lL ls made up
of several blLsţ compuLer LreaLs each word as a slngle unlL and sLores each word ln a
speclflc memory locaLlonŦ
1he words slze for Lhe ma[orlLy of MÞus ls 8ŴblLs ( 1 8yLe)ţ buL 16ŴblL an 32ŴblL MÞus
are becomlng lncreaslngly commonŦ
Words sLored ln a compuLers memory unlL can represenL several Lypes of
lnformaLlonť
a) 8lnary numerlcal uaLať 1hey slmply represenL a numerlcal quanLlLy ln Lhe blnary
number sysLemŦ ŦgŦ 01110011
2
ƹ 113
10

b) Coded uaLať 8lnaryŴcodedŴdeclmal (8Cu) code ls wldely used ln compuLers where
each group of 4 blLs can be represenLed by a slngle declmal dlglLŦ 1husţ an 8ŴblL word
can represenL Lwo declmal deglLsţ a 16ŴblL word can represenL four declmal dlglLsŦ
c) uaLa Wordť uaLa words can be alphaŴnumerlcsŦ AlphabeLlc characLers and oLher
speclal characLers or symbols uslng codes such as Lhe 7ŴblL ASCll codeţ one exLra
parlLy blL ls added Lo each code word Lo produce oneŴbyLe ASCll codeŦ
d) lnsLrucLlon Codesť lor mosL compuLersţ Lhe lnsLrucLlon words LhaL make up a
program wlll convey Lwo Lypes of lnformaLlonť
l) Lhe operaLlon Lo be performed an ll) Lhe address of Lhe operandŦ
lnsLrucLlon Codesť
A hypoLheLlcal 20ŴblL lnsLrucLlon wordť

WlLh 4ŴblLs used for operaLlon codeţ Lhere are 2
4
ƹ 16 dlfferenL op codesţ wlLh each
lndlcaLlng a dlfferenL lnsLrucLlonŦ A more versaLlle compuLer would have a greaLer
number of lnsLrucLlonsŦ
WlLh 16ŴblLs used for address codeţ Lhere are 2
16
ƹ 63ţ336 dlfferenL posslble
addressesŦ
CompleLe lnsLrucLlon words are expressed ln hexadeclmalsŦ
An exampleť lf op code 0100 represenLs one of Lhe 16 posslble operaLlonsţ leL lL ls asslgned
for addlLlon (Auu)Ŧ lf Lhe address code ls 0101101001110010ţ Lhen

1he lnsLrucLlon Lells Lhe compuLer Lo do Lhe followlngť
leLch Lhe daLa word sLored ln Lhe address locaLlon 3A72ţ send lL Lo Au and add lL Lo Lhe
number ln Lhe accumulaLor reglsLerŦ 1he sum wlll be Lhen sLored ln Lhe accymulaLor and Lhe
prevlous conLenLs of Lhe accumulaLor wlll be losLŦ
Mlcro ConLrollersť
Mlcro conLrollers are Lhe lnLegraLlon of a mlcro processor wlLh memory and l/C
devlces and oLher perlpherals such as Llmers on a slngle chlpŦ
1he general mlcro conLroller has plns for exLernal connecLlons on lnpuLs and
ouLpuLsţ powerţ clock and conLrol slgnalsŦ 1he plns for Lhe lnpuLs and ouLpuLs are
grouped lnLo l/C porLsŦ usually such porLs have elghL llnes Lo be able Lo Lransfer an
8ŴblL word of daLaŦ
MoLorola 68PC11ţ lnLel 8031 and ÞlC16lxxx and ÞlC18lxxx are examples of 8ŴblL
mlcro conLrollerŦ
AdvanLages of Mlcro ConLrollersť
lewer chlps are requlred slnce mosL funcLlons are already presenL on Lhe processor
chlpŦ
ower cosL and smaller slze resulL from a slmpler deslgnŦ
ower power requlremenLsŦ
lew exLernal connecLlons are requlred because mosL are made onŴchlp and Lhe mosL
of Lhe chlp connecLlons can be used for l/CŦ
Cverall rellablllLy are hlgher slnce Lhere are fewer componenLs and lnLerconnecLlonsŦ
Mlcroprocessors vsŦ MlcroconLrollersť
Mlcroprocessor MlcroconLroller
1) Mlcroprocessors are mosL flexlbleŦ
2) Mlcroprocessor based sysLems
usually have a von neuman
ArchlLecLure wlLh a slngle memory
for boLh programs and daLa Lo allow
maxlmum flexlblllLy ln allocaLlon of
memoryŦ
1) MlcroconLrollers are mosL compacLŦ
2) MlcroconLroller chlps frequenLly
embody Lhe Parverd ArchlLechLure
whlch has separaLe memorles for
programs and daLaŦ lL has Lhe
poLenLlal advanLage of Lhe separaLe
lnLerface allowlng Lwlce Lhe memory
Lransfer raLe by lnsLrucLlon feLches Lo
occur ln parallel wlLh daLa LransferŦ

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