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1. INTRODUCTION
The explosion of flash memory technology has dramatically increased storage capacity and decreased the cost of non-volatile semiconductor memory. The technology has fueled the proliferation of USB flash drives and is now poised to replace magnetic hard disks in some applications. A solid state drive (SSD) is a non-volatile memory system that emulates a magnetic hard disk drive (HDD). SSDs do not contain any moving parts, however, and depend on flash memory chips to store data. With proper design, an SSD is able to provide high data transfer rates, low access time, improved tolerance to shock and vibration, and reduced power consumption. For some applications, the improved performance and durability outweigh the higher cost of an SSD relative to an HDD. Using flash memory as a hard disk replacement is not without challenges. The nanoscale of the memory cell is pushing the limits of semiconductor physics. Extremely thin insulating glass layers are necessary for proper operation of the memory cells. These layers are subjected to stressful temperatures and voltages, and their insulating properties deteriorate over time. Quite simply, flash memory can wear out. Fortunately, the wear-out physics are well understood and data management strategies are used to compensate for the limited lifetime of flash memory. Flash memory was invented by Dr. Fujio Masuoka while working for Toshiba in 1984. The name "flash" was suggested because the process of erasing the memory contents reminded him of the flash of a camera. Flash memory chips store data in a large array of floating gate metaloxidesemiconductor (MOS) transistors. Silicon wafers are manufactured with microscopic transistor dimension, now approaching 40 nanometers. Intel Corporation introduces its highly anticipated third-generation solid-state drive (SSD) the Intel Solid-State Drive 320 Series. Based on its industry-leading 25-nanometer (nm) NAND flash memory, the Intel SSD 320 replaces and builds on its high-performing Intel X25-M SATA SSD. Delivering more performance and uniquely architected reliability features, the new Intel SSD 320 offers new higher capacity models, while taking advantage of cost benefits from its 25nm process with an up to 30 percent price reduction over its current generation.
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2. FLOATING GATE FLASH MEMORY CELLS

SSDs mainly depend on flash memory chips to store data. The name "flash" was

suggested because the process of erasing the memory contents reminded him of the flash of a camera. Flash memory chips store data in a large array of floating gate metaloxide semiconductor (MOS) transistors. Silicon wafers are manufactured with microscopic transistor dimension, now approaching 40 nanometers. In this flash memory thin insulating glass layers are necessary for proper operation of the memory cells. These layers are subjected to stressful temperatures and voltages, and their insulating properties deteriorate over time. Quite simply, flash memory can wear out. A floating gate memory cell is a type of metal-oxide-semiconductor field-effect transistor (MOSFET). Silicon forms the base layer, or substrate, of the transistor array. Areas of the silicon are masked off and infused with different types of impurities in a process called doping. Impurities are carefully added to adjust the electrical properties of the silicon. Some impurities, for example phosphorous, create an excess of electrons in the silicon lattice. Other impurities, for example boron, create an absence of electrons in the lattice. The impurity levels and the proximity of the doped regions are set out in a lithographic manufacturing process. In addition to doped silicon regions, layers of insulating silicon dioxide glass (SiO2) and conducting layers of polycrystalline silicon and aluminum are deposited to complete the MOSFET structure. MOS transistors work by forming an electrically conductive channel between the source and drain terminals. When a voltage is applied to the control gate, an electric field causes a thin negatively charged channel to form at the boundary of the SiO2 and between the source and drain regions. When the N-channel is present, electricity is easily conducted from the source to the drain terminals. When the control voltage is removed, the N-channel disappears and no conduction takes place. The MOSFET operates like a switch, either in the on or off state.

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Figure 1 : A cross sectional depiction of a floating gate MOSFET memory cell

In addition to the control gate, there is a secondary floating gate which is not electrically connected to the rest of the transistor. The voltage at the control gate required for N-channel formation can be changed by modifying the charge stored on the floating gate. Even though there is no electrical connection to the floating gate, electric charge can be put in to and taken off of the floating gate. A quantum physical process called Fowler-Nordheim tunneling coaxes electrons through the insulation between the floating gate and the P-well. When electric charge is removed from the floating gate, the cell is considered in an erased state. When electric charge is added to the floating gate, the cell is considered in the programmed state. A charge that has been added to the floating gate will remain for a long period of time. It is this process of adding, removing and storing electric charge on the floating gate that turns the MOSFET into a memory cell.

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Erasing the contents of a memory cell is done by placing a high voltage on the silicon substrate while holding the control gate at zero. The electrons stored in the floating gate tunnel through the oxide barrier into the positive substrate. Thousands of memory cells are etched onto a common section of the substrate, forming a single block of memory. All of the memory cells in the block are simultaneously erased when the substrate is flashed to a positive voltage. An erased memory cell will allow N-channel formation at a low control gate voltage because all of the charge in the floating gate has been removed. This is referred to as logic level 1 in a single-level cell (SLC) flash memory cell.

Figure 2 : Erasing and Programming the Contents of a Flash Memory Cell Via Fowler-Nordheim Tunneling

The cell is programmed by placing a high voltage on the control gate while holding the source and drain regions at zero. The high electric field causes the N-channel to form and allows electrons to tunnel through the oxide barrier into the floating gate. Programming the memory cells is performed one word at a time and usually an entire page is programmed in a single operation. A programmed memory cell inhibits the control gate from forming an Nchannel at normal voltages because of the negative charge stored on the floating gate. To form the N-channel in the substrate, the control gate voltage must be raised to a higher level. This is referred to as logic level 0 in an SLC flash memory cell.
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2.1. SINGLE AND MULTIPLE LEVEL CELLS

The control gate voltage necessary to form the N-channel is controlled by the charge on the floating gate. The required voltage is called the gate threshold voltage and is labeled Vth. With SLC flash memory, there is only one programmed state in addition to the erased state. The total of two states allows a single data bit to be stored in the memory cell.

Figure 3 :The Erased And Programmed States Of An Slc Memory Cell

Because there are only two states of charge on the floating gate, there are only two threshold voltages required at the control gate. It is important to note that the control gate threshold voltage varies from one cell to the next. This is a result of the normal manufacturing process variations. The threshold voltages are usually depicted as bell shaped distributions.

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Figure 4 : The distribution of control gate threshold voltages for a large number of SLC memory cells

With multi-level cell (MLC) flash memory, there are multiple programmed states in addition to the erased state. Typically, there are three programmed states resulting in a total of four states. This allows two data bits to be stored in the memory cell. The additional two programmed states result from partially charging the floating gate. A partially charged floating gate will result in an intermediate value for the control gate threshold voltage. In MLC devices, the partial charging of the floating gate is carefully monitored and the resulting distribution of the intermediate threshold voltages tends to be tighter.

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Figure 5 :The distribution of control gate threshold voltages for a large number of MLC memory cells

MLC memory cells are erased in the same way as SLC memory cells and the time required to erase a block is similar. MLC memory cells take longer to program than SLC memory cells, however. The charge state of the floating gate must be carefully monitored during programming to ensure that the resulting control gate threshold voltages are unambiguous. MLC memory cells tend to wear out faster than SLC memory cells because they are more sensitive to physical changes in the insulating SiO2 layer. MLC memory cells also experience higher levels of read errors due to variations in control gate threshold voltage and disturbances from neighboring memory cells.

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3. NAND -FLASH MEMORY ARRAY ARCHITECTURE

NAND flash memory chips arrange the memory cells in a logical not-and (NAND) configuration. This arrangement strings together all of the cells for a common input / output (I/O) bit across all memory pages.

Figure 6 : NAND flash memory cell arrangement

Because of this arrangement, it is not possible to directly access individual data bytes within a memory page. The flash memory controller must read an entire page of memory from the device. Also, an entire page must usually be programmed at once, although some devices permit partial page programming. That makes NAND flash unsuitable for most random byte-access memory applications. The flash memory controller may additionally divide the 2048 bytes per page into four sectors of 512 bytes, a typical size for HDDs. But the NAND flash memory unsuitable for most random byte-access memory applications.

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NAND flash memory is more densely packed on the silicon due to the space saved by reducing the number of I/O bit lines and ground connections. NAND flash memory has a lower cost per bit than NOR flash memory. NAND flash memory is more suitable for data file storage where random byte-access is not essential. NAND flash memory cells are more susceptible to disturbances from reading and programming neighboring pages due to the high density of memory cells on the silicon wafer.

Figure 7 :NAND Flash Memory Block Architecture

Another different type of arrangement combines cells into a not-or (NOR) logic configuration. NOR flash memory allows each memory cell to be individually addressed and is suitable for random byte-access memory application.

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Figure 8 : Simple NAND Flash Memory Layout

To understand how wear leveling is performed on memory within the SSD flash drive, it is important to understand the architecture layout of the NAND flash. An SSD is made up of many individual NAND flash chips. Each individual NAND flash chip is made up of an array of blocks. Within each block is an array of memory cells called pages (or sectors). Pages are typically about 512 bytes, but can be as large as 2048 bytes. Each page incorporates additional overhead bytes to handle such things as ECC and indexing.

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4. DISK DRIVE DEFINITIONS

Hard disk drives (HDD) : HDDs utilize ultra sophisticated magnetic recording and playback technologies. They are used as the primary data storage component technologies. component in notebooks, desktops, servers, and dedicated storage systems.

Hybrid hard drives (HHD) : HHDs are a new type of large buffer computer hard drive. They are different from standard hard drives in that they employ a large buffer (up up to 1GB) of nonvolatile flash memory used to cache data during normal use. By using this large buffer, the platters of the hard drive are at rest almost at all times, instead of constantly spinning as is the case in HDDs. This feature offers numerous benefits, such as decreased power consumption, improved process. reliability, and a faster boot

Solid state drives (SSD) : SSDs are data storage device s that use nonvolatile memory(Flash) and volatile memory ( SDRAM ) to store data. While technically not "disks," these devices are referred to this way because they are typically used as replacements for HDDs. A solid state drive (SSD) is a non-volatile memory system that emulates a magnetic hard disk drive (HDD). SSDs do not contain any moving parts, however, and depend on flash memory chips to store data. SSD is able to provide high data transfer rates, low access time, improved tolerance to shock and vibration, and reduced power consumption. Third generation of SSDs adds enhanced data security features, power-loss management and innovative data redundancy features to once again advance SSD technology.

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4.1. HARD DISK DRIVES

A hard disk drive, commonly referred to as a hard drive , hard disk or fixed disk drive, is a non-volatile storage device which stores digitally encoded data on rapidly rotating platters with magnetic surfaces. Strictly speaking, drive refers to a device distinct from its medium, such as a tape drive and its tape, or a floppy disk drive and its floppy disk. Early HDDs had removable media; however an HDD today is typically a sealed unit with fixed media. Strictly speaking, an HDD is a rigid-disk drive, although it is probably never referred to as such. By way of comparison, a so-called floppy drive has a disc that is flexible. Originally, the term hard was temporary slang, substituting hard for rigid, before these drives had an established and universally-agreed-upon name. some time ago, IBMs internal company term for an HDD was file. HDDs were originally developed for use with computers. In the 21st century, applications for HDDs have expanded beyond computers to include digital video recorders, digital audio players, personal digital assistants, digital cameras and video game consoles. In 2005 the first mobile phones to include HDDs were introduced by Samsung and Nokia. The need for large-scale, reliable storage, independent of a particular device, led to the introduction of configuration such as RAID arrays, network attached storage (NAS) systems and storage area network (SAN) systems that provide efficient and reliable access to large volumes of data . A Hard disk drive stores information on one or more rigid, flat circular disks. The disks are to be mounted on a spindle, with spacers in between, and a motor on the bottom end of the spindle to read and write to the surface of the disks, the drive uses a small electro magnet assembly, referred to as a head, located on the end of a actuator. There is one head for each platter surface on the spindle. The disks are spin at a high speed to allow the head to move quickly over the surface of the disk. Towards the other end of the actuator arm is a pivot point, and at the end is a voice coil, which moves the head. Above and below each coil is a rare earth magnet. This allows the head to move towards the centre of the disk or towards the outside, in a radial pattern.

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Figure 9: Hard Disk Drive

The Integrated Devices Electronics (IDE), in the hard disk drive there is serial ATA as well as the parallel ATA. The IDE is the earlier name that is given for the ATA (parallel). There is also other abbreviation of the term IDE called as the Integrated Development Environment. The PATA is mainly used for the connection of hard drives and optical drives. ATA is the acronym for advanced technology attachment. ATA uses a 16-bit parallel connection to make the link between storage devices and motherboards, and is also called PATA to distinguish it from the newer SATA standard.

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4.2. HYBRID HARD DRIVES

Hybrid Hard Drives are an incremental upgrade to the Hard Disk Drives. It has same basic structure of standard HDDs, but it also has a non-volatile cache. This feature enable instantaneous read/write capability even when the spindle has stopped.

Figure 10 : Hybrid Hard Drives

A Hybrid hard disk drive stores information on one or more rigid, flat circular disks. The disks are to be mounted on a spindle, with spacers in between, and a motor on the bottom end of the spindle to read and write to the surface of the disks, the drive uses a small electro magnet assembly, referred to as a head, located on the end of a actuator. There is one head for each platter surface on the spindle. The disks are spin at a high speed to allow the head to move quickly over the surface of the disk. Towards the other end of the actuator arm is a pivot point, and at the end is a voice coil, which moves the head. Above and below each coil is a rare earth magnet. This allows the head to move towards the centre of the disk or towards the outside, in a radial pattern.

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4.3. SOLID STATE DRIVES

The basic system architecture for an SSD will be described to help visualize the main components that assist in the wear-leveling algorithm. Below is a simple block diagram of an SSD. Data transferred to and from the SSD passes through a Host interface chip that is configured for different interfaces like PATA, SATA, SCSI, SAS, etc. The host interface is connected to two buses, a system bus used for addressing and control, and a data bus that provides the data path to the NAND flash. On the control bus is the CPU, Flash controller and static random access memory (SRAM). The SRAM is used for tables, CPU scratch pad computing and logical block to physical block address mapping. Since the SRAM is volatile memory, pertinent information, such as tables and logical to physical address mapping, are continually backed up to NAND flash. The CPU is the main controller for the SSD. It provides coordination of writing and reading to and from the flash memory. It also executes and monitors the wear-leveling algorithms used on the flash memory. The flash controller performs the intimate control of addressing, programming, erasing and reading of the flash memory.

Figure 11 : Simple block diagram of SSD architecture

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On the data bus, data received is transferred from the host interface into a synchronous dynamic random access memory (SDRAM) buffer. From there, data is flushed and routed to the flash controller, which writes the data into flash memory. Similarly, a read command along with the logical address is sent to the CPU via the host interface chip. The CPU determines the physical address of memory from the mapping table and sends the information to the Flash controller chip so that the data can be accessed and sent to the host interface. From there the data is sent to the host.

Figure 12 : PC interfacing with NAND flash memories

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5. COMPARISON OF SSD WITH HDD AND HHD

Table 1 : Comparison Table

Both SSD and HHD provide power savings in various applications, but the exact power savings fluctuates from application to application exact application.

In a test of a 32GB SSD drive, the power savings of the SSD was 1 watt better than the closest tested HDD.

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6. DEMAND FOR SSDS AND HDDS IN PORTABLE COMPUTERS

Figure 13 : Demand Graph

Both the SSD & HDD are now in the same proportion, as referred the 2011th

graph. But in future some variations may be accepted in graph.

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7. APPLICATIONS
7.1. INTEL THIRD-GENERATION SSD 320SERIES
Intel announced today its highly anticipated third-generation solid-state drive (SSD) the Intel Solid-State Drive 320 Series. Based on its industry-leading 25-nanometer (nm) NAND flash memory, the Intel SSD 320 replaces and builds on its high-performing Intel X25-M SATA SSD. Delivering more performance and uniquely architected reliability features, the new Intel SSD 320 offers new higher capacity models, while taking advantage of cost benefits from its 25nm process with an up to 30 percent price reduction over its current generation. "Intel designed new quality and reliability features into our SSDs to take advantage of the latest 25nm silicon, so we could deliver cost advantages to our customers," said Pete Hazen, director of marketing for the Intel Non-Volatile Memory (NVM) Solutions Group. "Intel's third generation of SSDs adds enhanced data security features, power-loss management and innovative data redundancy features to once again advance SSD technology. Whether it's a consumer or corporate IT looking to upgrade from a hard disk drive, or an enterprise seeking to deploy SSDs in their data centers, the new Intel SSD 320 Series will continue to build on our reputation of high quality and dependability over the life of the SSD."

Figure 14 : Intel Third-Generation SSD 320 Series

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The Intel SSD 320 is the next generation of Intel's client product line for use on desktop and notebook PCs. It is targeted for mainstream consumers, corporate IT or PC enthusiasts who would like a substantial performance boost over conventional mechanical hard disk drives (HDDs). An SSD is more rugged, uses less power and reduces the HDD bottleneck to speed PC processes such as boot up and the opening of files and favorite applications. In fact, an upgrade from an HDD to an Intel SSD can give users one of the single-best performance boosts, providing an up to 66 percent gain in overall system responsiveness. The Intel SSD 320 Series comes in 40 gigabyte (GB), 80GB, 120GB, 160GB and new higher capacity 300GB and 600GB versions. It uses the 3 gigabit-per-second (3gbps) SATA II interface to support an SSD upgrade for the more than 1 billion SATA II PCs installed throughout the world. Continuing to offer high-performing random read and write speeds, which most affect a user's daily computing experience, the Intel SSD 320 produces up to 39,500 input/output operations per second (IOPS) random reads and 23,000 IOPS random writes on its highest-capacity drives. In addition, the company has more than doubled sequential write speeds from its second generation to 220 megabytes-per-second (MB/s) sequential writes and still maintains one of the highest read throughputs at up to 270 MB/s sequential reads. This greatly improves a user's multitasking capabilities. For example, a user can easily play background music or download a video, while working on a document with no perceivable slow down. Already one of the most solid-performing SSDs over time, Intel continues to raise the bar on SSD reliability in the way it has architected its third generation, using proprietary firmware and controller, to further demonstrate that not all solid-state drives are created equal. In this rendition, Intel creatively uses spare area to deploy added redundancies that will help keep user data protected, even in the event of a power loss. It also includes 128-bit Advanced Encryption Standard capabilities on every drive, to help protect personal data in the event of theft or loss.

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INTEL THIRD-GENERATION SSD 320 SERIES

For the better performance of Intel Third-Generation SSD 320 Series , the intel

introduces a new processor called as Intel 3D Tri-gate Transistor for 22nm Processors . Enter Intels new 22nm Tri-Gate transistors which can be packed onto smaller chips than current 2D 32nm transistors while consuming less than half the power. The new transistors will also enable exciting advances in portable electronics, as they are 37 percent more powerful when operating at low voltages. Intel already has plans to produce and ship a new breed of Ivy Bridge processors that utilize the Tri-Gate transistors by 2012, extending Moores law well into the future. Tri-Gate is important to cost-reduce transistors, but this technology might also be crucial to lowering the power consumption for mobile devices. This could prove to be a key element for Intels long-term goal to get into the handset market: Atom based processors will also benefit from Tri-Gate. Intel also says that a lower voltage will be tremendously helpful for graphics processing. Because graphics processors (GPUs) are extremely dense. And because Intel has started to integrate GPUs in its processors with Sandy Bridge, its critically important for them to have a transistor foundation that lets them pursue integration. That said, dont expect the current paradigm to change: Intel considers its graphics processors like an enabler for its CPUs more than a product class in itself. The main moto of Intel organization , Intel Announces Revolutionary 3D Transistors That Cut Energy Use by 50% Intel Tri-Gate 3d Transistor Inhabitat - Green Design Will Save the World . Intel believes that the current implementation of Tri-Gate can work (as is) until 14nm. Beyond that further innovations will be needed.

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FEATURES OF INTEL 3D TRI-GATE TRANSISTOR

Intel is introducing revolutionary Tri-Gate transistors on its 22 nm logic technology Tri-Gate transistors provide an unprecedented combination of improved performance and energy efficiency

22 nm processors using Tri-Gate transistors, code-named Ivy Bridge, are now demonstrated working in systems

Intel is on track for 22 nm production in 2H 11, maintaining a 2-year cadence for introducing new technology generations

This technological breakthrough is the result of Intels highly coordinated researchdevelopment-manufacturing pipeline

Dramatic performance gain at low operating voltage, better than Bulk, PDSOI or FDSOI 37% performance increase at low voltage >50% power reduction at constant performance

Improved switching characteristics (On current vs. Off current) Higher drive current for a given transistor footprint Only 2-3% cost adder (vs. ~10% for FDSOI) 364 Mbit array size >2.9 billion transistors 3rd generation high-k + metal gate transistors Same transistor and interconnect features as on 22 nm CPUs
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8. ADVANTAGES

High Data security features. Enhanced power-loss data protection. The fast hard drive alternative that protects the data. Enhanced reliability. Experience performance Read/Write Speed 270/220 MBPS. Data redundancy through surplus memory array. Large Storage capacity.

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9. CONCLUSION
As the Solid State Drives is a new innovative technology which will provide high data transference, high data security & enhanced reliability. And the most speculious highlighting feature is, the power consumption which can be contributed by the Intel third generation Solid State Drives with the help of the Intel 3-D Tri-Gate processors. Hence in the future the presence of cach memory can be avoided by using these Intel Third Generation Solid State Drives & also their main moto of the Intel organization is to cut energy use by 50% by the implementation of these Third Generation Solid State Drives.

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REFERENCE
[1] . J. Katcher. PostMark: a New Solid State Drives . Technical Report TR3022, Network Appliance, October 1997. [2] . A. Birrell, M. Isard, C. Thacker, and T. Wobber. A Design for High-Performance Flash Disks, December 2007. [3] . S. Nath and A. Kansal. FlashDB: Dynamic Self-Tuning Database for NAND Flash. In IPSN 07: Proceedings of the 6th International Conference on Information Processing in Sensor Networks June, 2009. [4] . Paulo Cappelletti, Flash Memories, Prentice-Hall,2004 [5] . Bruce Jacob, Spencer W.N.G, Memory Systems, Tata MC Graw Hill,2010 [6] . http://www.intel.com/pressroom/.html [7] . http://www.intel.com/go/ssd/.html [8] . http://www.physorg.com/news/.html [9]. http://www.storageview.com/.html

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