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Jagadesh Kumar, Himanshu Batwani and Mayank Gaur (Invited), "Approaches to Nanoscale MOSFET Compact Modeling using Surface Potential Based Models," 14th International Workshop on the Physics of Semiconductor Devices, Mumbai, India, December 2007.

**Approaches to Nanoscale MOSFET Compact Modeling using Surface Potential Based Models
**

M. Jagadesh Kumar Senior Member, IEEE, Himanshu Batwani Student Member, IEEE, and Mayank Gaur As a result, the focus has shifted to the development of surface potential-based models [1], [3], [5]-[8]. In the recent past, a number of surface potential based compact models [2, 4, 5, 11-13] have been developed based on Brew’s charge sheet model [9]. Advanced physical effects such as quantization effects and velocity overshoot, are often considered as add-ons to such formulations [14-16]. In this paper, we will present a unified review of the recent surface potential based approaches developed for MOSFET compact modeling.

VG

Abstract— The objective of this paper is to provide an appraisal of the recent advances in MOSFET compact modeling using the surface potential based approach. MOSFET technology has been at the forefront of the digital and analog circuits for very large scale integration. As a result, development of accurate and efficient MOSFET models becomes critical. The surface potential based models not only lead to a more clear understanding of MOSFET device physics but also provide a better platform to develop an advanced model for circuit simulation. These core models can in general be categorized into either iterative or closed form approximate solutions, but some basic similarities do exist among some of the models developed from the two different approaches. Core compact surface potential based models are discussed and a comparison in terms of accuracy and complexity is presented. Index Terms— Compact modeling, MOSFET, silicon-oninsulator (SOI), surface potential, quantum effects.

VS

VD

Gate Oxide

Lc N+ Source

tOX

I. INTRODUCTION ith the recent advancement in the mixed analog-digital circuit design, the use of MOS transistors has not only been restricted to digital circuit design, but it has been extended to analog circuit design as well. The efficacy of the circuit design is contingent on the precision of the analytical transistor models involved in circuit simulation [1,2]. At present there are essentially three approaches to modeling of MOSFETs – threshold voltage (Vth), inversion charge (qi ) and surface potential (φs) based models. The threshold voltage based models use regional approximations and are joined using suitable smoothing functions over the moderate inversion region. The drawbacks in the thresholdvoltage-based models, such as discontinuity across different operating regions, negative capacitance and negative conductance are well documented [3]. With the recent trends in the supply voltage scaling, the moderate inversion region is becoming an increasingly larger fraction of the overall logic swing, thereby annulling the Vth based approach [4]. The qi based approach uses the relation between the inversion layer charge and the MOS terminal voltages as a basis for modeling. Development of an efficient extrinsic MOSFET model (e.g. gate current, noise model) has been hindered by a lack of appropriate accumulation region models and the regional nature of the inversion charge expressions [2].

Manuscript received July 14, 2007. The authors are with the Department of Electrical Engineering, Indian Institute of Technology, Hauz Khas, New Delhi 110 016, India (e-mail: mamidala@ieee.org).

Lud,S

Lud,D

N+ Drain

W

x

Substrate (P-Silicon)

y

Fig. 1. Cross Section of a bulk MOSFET

II. FUNDAMENTALS OF SURFACE POTENTIAL BASED MODELING Fig. 1 depicts the schematic structure of a bulk MOSFET. The Poisson equation in the channel region of a MOSFET is given by: ∂ 2φ ( x, y ) ∂ 2φ ( x, y ) q (1) + = ( N SUB + n( x, y ) − p ( x, y ) ) εs ∂x 2 ∂y 2 where φ(x,y) represents the potential, NSUB is the impurity concentration in the substrate, s is the permittivity of silicon, n(x,y) and p(x,y) are the electron and hole concentrations, respectively. Eq (1) can be approximated as: ∂ 2φ ( x, y ) ∂ 2φ ( x, y ) q (2) + = ( N SUB + n( x, y ) ) εs ∂x 2 ∂y 2 A rigorous inclusion of both the field gradient terms in (2) does not allow for a closed form solution for the surface potential φs. One way to overcome this difficulty is the use of lookup tables and spline functions as proposed in [17]. A. Gradual Channel Approximation (GCA) [17] The gradual channel approximation (GCA) [17] involves

978-1-4244-1728-5/07/$25.00 ©2007 IEEE

neglecting the lateral field gradient term 2φ/ x2 = - E/ x so that (2) becomes: ∂ 2φ ( x, y ) q (3) = ( N SUB + n( x, y ) ) εs ∂y 2 Before the onset of strong inversion, an explicit closed form solution for the surface potential can be obtained from (3) by taking a parabolic variation of the potential in the direction normal to the oxide-channel interface [18]: φ ( x, y ) = φs ( x) + c1 ( x ) y + c2 ( x) y 2 (4) where c1(x) and c2(x) are calculated by applying appropriate boundary conditions depending on the device structure. Solving (3) in the region of strong inversion for integration with the charge sheet model requires an iterative computation of φs. The implicit relation for the surface potential [17] is given by:

Vgb − V fb − φs = ± 2ε s qN SUB COX

III. SURFACE POTENTIAL BASED MODELS FOR BULK MOSFETS Various surface potential based models have been proposed in literature for the bulk MOSFETs as discussed below. A. PSP Model [2] The surface potential based PSP model was obtained by merging and developing the features of two models; SP [4] and MM11 [11]. The surface potential φs can be expressed as [2]: (Vgb − V fb − φs )2 =

γ 2φt exp −

φs φ φ φ φ + s − 1 + Δ n exp s − s − 1 − ξ s φt φt φt φt φt

φs + φt .exp

φs − 2φ f − Vcb φt

(5)

where φt = kT/q, Vcb is the channel to bulk voltage and φf = (Efi –Ef) is the Fermi potential. Some earlier attempts tried to solve (4) iteratively but it requires a large number of time consuming iterations as the surface potential needs to be evaluated millions of times in simulations [2], [5], [12]. B. Equivalent Form of Poisson equation [10] Chen and Gildenblat [8], [10] proposed an equivalent form of the Poisson equation as: ∂ 2φ ( x, y ) q (6) = ( fN SUB + n( x, y ) ) εs ∂y 2 with the lateral gradient term factor εs ∂ 2φ ( x, y ) f = 1− (7) qN SUB ∂y 2 used to provide an explanation of short channel effects. Taking f<1 provides a sufficiently good explanation of short channel effects [8], [10]. Device simulation results [10] show that the approximation provides an excellent agreement between the simulated and calculated values of surface potential and its derivatives with respect to the terminal voltages. C. Drain Current Model [19] Including both the drift and diffusion components of current in the channel [19], the expression for the drain current can be written as:

Id = W L

VDS

μ.qi .dV

0

(8)

(10) where φt = kT/q is the thermal voltage, Vfb is the flat band voltage, Vcb is the channel to bulk voltage, is the body factor and n = exp[-(Vcb + 2φf)/ φt]. The term (φs/ φt ) affects only the minority carrier contribution to the surface field and is negligible until the inversion layer begins to form. However, an additional constraint d (φs , L − φs ,0 ) = 0 for Vgb = V fb (11) dVgb is to be satisfied for the flat band condition [2]. Hence, an approximation to satisfy the above condition is considered in PSP [2], [4], [11]: φ u2 with u = s ξ (u ) = 2 (12) φt u +2 For the computation of the surface potential, PSP uses an advanced non-iterative algorithm [33] which remains valid for even high values of biases. The effective channel mobility in PSP model is given by [2]: μ0 .μ y (13) μeff = THEMU 2 1 + (MUE.Eeff ) + CS. qbm (qbm + qim )2 + GR where μ0 is the low field mobility, MUE and THEMU account for mobility degradation caused by the surface roughness and phonon scattering of the effective vertical field Eeff [48], [49]. Coulomb scattering similar to [50] is incorporated by the parameter CS, and qbm is the bulk charge density at the surface potential midpoint where φs = 0.5(φs,0 + φs,L). The factor μy accounts for non-uniformity in the doping profile and GR accounts for the series resistance. The drift velocity model used in PSP is taken from MM11 [11] which is based on [51] and is given as:

vd = μ.Ex where μ = μeff 1 +

where qi is the inversion charge and μ denotes the mobility of carriers in the channel. In terms of φs, (8) can be written as: x=L dq dφ I DS = WCOX μ φt i − qi s dx (9) dx dx x =0 The current is dominated by the diffusion component in the sub-threshold region while the drift current dominates in the saturation regime. This results in a smooth transition between current expressions in the linear and saturation regions of operation.

μeff .Ex

vsat

2

−1 2

(14)

and Ex is the lateral component of electric field and vsat denotes the saturation velocity. The resulting expressions for the drift velocity are non-singular. In short channel devices, the drain-source saturation voltage Vdsat differs from the pinch-off voltage due to the fact that the carriers encounter velocity saturation even before reaching the weakly inverted region of the channel near the drain [2], [4]. PSP takes this into account by using the relation

∂I DS =0 (15) ∂ (φs , L − φs ,0 ) to calculate Vdsat. The drain-source voltage VDS is replaced by an effective drain-source voltage Vdse which changes smoothly from VDS in the linear region to Vdsat in the saturation region. The smooth transition [17], [35] is obtained by using Vdse = VDS 1 + VDS Vdsat

ay −1 a y

charge is determined by the quasi-Fermi level and its distribution is governed by the Boltzmann statistics with a constant quasi-Fermi potential φn. The excess minority and majority carriers are given, respectively, by [13]:

Δn = ( n − n0 ) = ni exp −φ f − φn Δp = ( p0

i f

( ) exp (φ ( y) ) − 1 − p ) = n exp (φ ) 1 − exp ( −φ ( y ) )

(25) (26)

(16)

where ay is a local parameter that determines the smoothness of the transition. To get a current model for MOSFETs, the fundamental approximation for the inversion layer charge density is taken as [54]: 1 qi = qim − α . φs − (φs ,0 + φs , L ) (17) 2 where is the symmetric linearization coefficient and qim is the inversion layer charge density at the surface potential midpoint where φs = 0.5(φs,0 + φs,L). Using Pao and Sah’s model [19] for the MOSFET drain current with the mobility μ given by (14) results in: * μeff Wqim dφ . s (18) I DS = 2 1 + ( E x Ec ) dx where Ec = vsat/μeff and qim* = qim + φt. After integration, we get [2]:

I DS = μeff W L

Substituting (25) and (26) into (24) and solving using the boundary condition that deep in the bulk φ = 0, we get Vgb − V fb − φs =

±λφ

1/ 2

t

−2φ f − Vcb φ exp( ) + s − 1 + exp φt φt φt −φs

φ φ exp( s ) − s − 1 φt φt

12

12

(27) where

λ = ( 2ε s qN SUB C φ

2 OX t

)

(28)

(φ

s, L

− φs ,0 ) q −

2 I DS 2 2W 2 vsat q

(19)

where

1 q= φs, L − φs,0

φs , L

qi dφs

φs ,0

−1

(20)

and

φs , L

q = (φs , L − φs ,0 )

φs ,0

d φs qi

(21)

An explicit expression for the drain current IDS can be obtained by solving (19) as [2]: * μeff .W .qim 2 1 I DS = . (φs , L − φs,0 ) . 1+ 1+ 2 (θ sat .(φs, L − φs ,0 )) (22) L 2 θ sat = μeff vsat .L (23) where The PSP model has been verified by fitting MOSFET characteristics up to channel lengths as small as 65 nm and has been found to accurately reproduce not only the drain current but also the output conductance of the devices [2]. B. PUNSIM Model [13] In PUNSIM, the Poisson equation under the gradual channel approximation is written as [55,56]: ∂ 2φ ( x, y ) q (24) = ( n − p + (n0 − p0 ) ) εs ∂y 2 where n0 and p0 are the electron and hole concentrations deep in the bulk. Since we are considering only one kind of dopant atoms (p0 - n0) = NSUB holds. The excess minority carrier

The complete analytic surface potential solution from the accumulation region to the strong inversion region is obtained by solving (27) using a normalized method and the mathematical algorithm for the quadratic equation solution [55]. The piecewise solution of the surface potential in the accumulation and inversion region, obtained in terms of the W-Lambert function [53] matches with the numerical solution except for errors of the order of a few mV in the strong inversion and accumulation region due to the approximation made in the Taylor series expansion [13]. Using the physics based current formulation of the Pao-Sah model [19], the drain current of the MOSFET is written as: dV (29) I DS = W μ qim ch dx where Vch is the quasi-Fermi potential along the channel, μ is the carrier mobility and qim is the inversion layer charge density at the surface potential midpoint. The Poisson equation is used to solve for the quasi Fermi potential as [13]: q +q Vch = φs − 2φ f − φt ln(qi φt ) − φt ln i 2 b (30) γ where qi and qb are the inversion and bulk charge densities, respectively and is the body factor. Neglecting the contribution of the bulk charge to the derivative of the quasiFermi potential, we get: 1 + qi qb dqi dVch = dφs − (31) 1 + qi 2qb qi The PUNSIM current equation [13] is obtained using the linearization of the surface potential and the bulk charge and is given by: 2 2 μ COX W qi,0 − qi, L 1 + 2(α − 1)qim γ 2 I DS = − ( qi.0 − qi. L ) (32) L 2α 1 + (α − 1)qim γ 2 where qi,0 and qi,L are the inversion charges at the source and drain end of the channel, respectively and is the symmetric linearization coefficient. IV. SURFACE POTENTIAL BASED MODELS FOR SOI MOSFETS The SOI technology has emerged as the primary CMOS technology [26-28]. A brief review of different models for modeling the partially depleted SOI (PDSOI) and the fully

depleted SOI (FDSOI) devices is presented in this section. A. Young’s Approach [18] Young [18] proposed a two-dimensional analytical short channel model for FDSOI MOSFET by solving the Poisson equation in the silicon film using a parabolic variation of the potential in the lateral direction.: φ ( x, y ) = φs ( x) + c1 ( x ) y + c2 ( x) y 2 (33) The parameters c1(x) and c2(x) are determined by incorporating appropriate boundary conditions for the electrostatic field and potential as given by:

dφ ( x, y ) dy dφ ( x, y ) dy =

y =0

causing a contradiction [29]. This model also cannot be applied to double gate MOSFETs because of lack of physical consistency. C. SP-SOI Model [33] SP-SOI [33] is symmetric with respect to source/drain, it uses analytical approximate expressions for the surface potential in the channel and symmetric linearization of the inversion charge density [34]. A new analytical approximation for the surface potential is developed to account for the high bulk-to-source voltages (Vbs) encountered in SOI devices as follows [52]:

( xg − x ) 2 = γ 2 e − x + x − 1 + Δ n e x − x − 1 − ξ ( x )

ε ox φs ( x ) − VGS ' ε Si tf

(34) (35)

{

}

(40)

=

y = tSi

ε ox Vsub '− φ ( x, tSi ) ε Si tb

(36) (37) where tf, tb and tSi are the front oxide, back oxide and silicon film thickness respectively, VGS' = VGS – (VFB,f)Si, and VGS is the gate-to-source bias voltage, Vsub' = Vsub – (VFB,b)Si , Vsub is the substrate bias, (VFB,b)Si is the back-channel flat-band voltage and (VFB,b)Si = (φsub - φSi ), φsub is the substrate work function. Substituting φ(x,y) into the Poisson equation, an explicit expression for the surface potential can be derived in the regime before the onset of strong inversion. Young demonstrated a decrease in the threshold voltage reduction on decreasing the strained silicon film thickness [18]. Yan et. al. [30] modified the boundary conditions to assume a zero electric field at the back oxide interface for the single gate device and equal field at both the oxide interfaces for symmetric double gate devices. However, this approach has the disadvantage that it is not valid for asymmetric double gate devices. B. Quasi-2D Approach [31] Banna et. al. [31] developed a threshold voltage model for the fully depleted SOI MOSFET using a quasi 2D approach similar to the one used for modeling threshold voltage, substrate current and other hot electron phenomena in bulk MOSFETs [32]. The two-dimensional Poisson equation was reduced by applying Gauss Law to the silicon film: 2 ε Si .tSi ∂ φ f ( y) + C f (VGS '− φ f ( y)) + Cb (VSUB '− φb ( y)) = q.N A .tSi (38) η ∂y 2 where φf(y) and φb (y) represent the surface potential at the front and back oxide interface, respectively, and is a fitting parameter used to account for the non- uniformities in the lateral potential profile. The back channel surface potential φb (y) is expressed in terms of φf(y) by solving the onedimensional Poisson equation in the silicon film, implying zero lateral potential curvature and long channel operation [31]: dφ f ( y) 1 qN A 2 (39) φb ( y ) = φ f ( y ) − .t Si + .tSi dy y = 0 2 ε Si However, an attempt to model short channel effects is made by introducing non-zero lateral potential curvature, thereby

φ (0, 0) = φs (0) = Vbi φ ( L, 0) = φs ( L) = Vbi + VDS

where is the body factor, n = exp[-(Vcb + 2φf)/ φt], x=φs/φt, xg = (Vgb - Vfb)/φt, and φt=kT/q. The term (x) = x2/(2 +x2) is added to correct the problem in the surface potential equation near flat band condition. The drain current is calculated using symmetric linearization of the channel charge and is given by [33]: I DS = μWCOX ( qi , m + αφt )(φs, L − φs,0 ) Lred + Lsat (41) where μ is the effective channel mobility, qi,m is the inversion charge at the potential mid-point, φs,0 and φs,L represent the surface potentials at the source and drain end of the channel respectively, is the symmetric linearization coefficient, Lred is the effective channel length taking into account channel length modulation and Lsat is a factor to account for velocity saturation. Also the use of symmetric charge linearization instead of source/drain based linearization and a non-singular velocity model preserves the Gummel symmetry (interchangeability of source and drain) [35]. D. HiSim SOI Model [12] The Hiroshima University semiconductor technology academic research center IGFET model (HiSim SOI) [12] iteratively solves for the potential at both the interfaces of the buried oxide, allowing for the inclusion of all device features explicitly. The simulation time with HiSim is approximately a factor of 2 greater than the time taken by BSIM3 [12], [36]. Using Gauss law and the Poisson equation, the following equation describing the operation of the SOI MOSFET [12] can be derived: Q Q + QSOI Vgs − Vfb − ΔVth = φs,bulk − bulk + (φs ,SOI − φb, SOI ) − bulk (42) CBOX CFOX where Vfb and Vth are the flat band voltage and the threshold voltage shift from the long channel devices respectively, CBOX and CFOX are the buried oxide thickness and gate oxide thickness respectively. To get a closed form solution of the Poisson equation, it is assumed that the inversion does not occur at the SOI interface with the buried oxide [12]. This gives the expression for the induced charges in the bulk as: φs,bulk Qb = − 2 qN sub , SOI ε Siφt −1 (43) φt where Nsub,SOI is the doping in the SOI layer and φt=kT/q is the thermal voltage. For a fully depleted MOSFET, the depletion charge in the SOI layer is modeled as:

Qdep , SOI = − qN sub , SOI t SOI

(44)

where tSOI is the SOI layer thickness. Using the charge sheet approximation, the inversion charge Qn.SOI is derived as [12]: Qn , SOI = QSOI − Qdep , SOI (45) The charges on the terminals required for circuit simulation are determined from the surface potentials by integrating along the channel from the source to the drain side. An effective channel length Leff is considered by subtracting the under-diffusion length of the source and drain beneath the gate oxide as: Leff = L − ( Lud , s + Lud , d ) (46) where Lud,s and Lud,d are the source and drain side diffusion lengths under the channel, respectively, as shown in Fig. 1. The short channel effects are modeled in HiSim SOI by considering a threshold voltage shift Vth due to the contribution of the lateral electric field as [12]: E y 2 − E y1 C .t SOI + Eb, SOI (47) Es , SOI = FOX Vgs − V fb − φs , SOI + ε Si dy where Eb,SOI is the vertical electric field at the back oxide interface, Ey1 and Ey2 are the horizontal components of the electric field at the source and drain end of the channel respectively. For small channel lengths the second term in (46) is not negligible and causes a threshold voltage shift given by: dE y ε ΔVth = Si .t SOI . (48) CFOX dy The additional short channel effects of an SOI MOSFET are modeled as an additional threshold voltage reduction and the calculated gate-to-source voltage Vgs’ is incorporated in the Poisson equation for calculating the surface potentials as [13]: Vth = Vth ( LONG ) − ΔVth − ΔVthR (49)

way of including quantum mechanical effects in device physics [37]. Pregaldiny et. al. [16], [21] suggested a way to overcome this difficulty by considering a variational approach. In the inversion region where contribution of only the lowest sub-band is important, the variational approximation gives an accurate estimate of the energy of the lowest sub-band [16], [38], [41]-[43]. The inversion layer electrons, under this approximation, are characterized by a wave function in a direction perpendicular to the Si-SiO2 interface using [37]: b3 / 2 1 . y.exp − b. y ξb ( y) = (51) 2 2 where b is the variational parameter. This wave-function goes to zero at the surface (y=0) as well as deep in the bulk (y ). Minimization of the energy of the lowest sub band leads to the following value of the variational parameter [37]:

* 12.me .q 2 ninv . b(ninv , φs ) = + ndep (φs ) 3 ε Si . 2 1/ 3

(52)

(

)

where me* is the electron longitudinal effective mass, ninv is the charge density in the inversion layer and ndep is the fixed charge density in the depletion layer. Basu and Dutta [37] suggested an interpolating function of the form used in current interpolation, with the resulting expression for qi given by: Vgb − V fb qi = − K .COX .φt .ln 1 + exp (53) nφt where n is the inverse slope of φs vs. Vgb characteristic in weak inversion region and K is a parameter which is varied smoothly from the weak inversion region to the strong inversion region. The expression in (53) reduces to an exponential term in the weak inversion and a linear form in the strong inversion regime. The quantum drift-diffusion equations, also known as the density gradient (DG) equations, present another way to model quantum mechanical effects in nanostructures such as nanoscale MOS capacitors, MOSFETs and double-gate MOSFETs [15]. The analytical solution to the DG equations using perturbation theory decomposes them into simpler equations by expanding the solution in terms of the small parameter [15]. These solutions give results equivalent to those of the numerical approach, with a small error due to neglecting the higher order terms [15]. Yet another approach is the use of non-equilibrium Green’s function approach (NEGF) [44] which provides an accurate description of quantum phenomena like carrier confinement, tunneling and interactions which randomize the motion of the channel carriers. For ballistic transport the NEGF formalism is equivalent to solving the Schrödinger equation [44], but it is readily extendible to two and three dimensions or to the use of molecular orbitals. VI. CONCLUSION A comprehensive review of surface potential based models for MOSFETs has been presented in this paper. The fundamental issues related to the surface potential formulation were first discussed, and the existing compact models for the MOS devices were then reviewed and compared.

' Vgs = Vgs − V fb − ΔVth − ΔVthR (50) where Vth is the threshold voltage shift as in (48) and VthR is the threshold voltage shift due to the parasitic detour field. The MOSFET models discussed so far describe the device operation in the classical physics regime. However, when channel lengths are of the order of a few nm, it becomes essential to use quantum mechanics to accurately predict the device characteristics.

V. QUANTUM MECHANICAL MODELING OF MOSFETS There are several approaches proposed in literature for including quantum mechanical effects in MOSFET modeling. The popular triangular well approximation gives good results for low inversion layer charge densities but fails at values close to the depletion charge densities [37]-[39]. For deepsubmicron MOSFETs, the silicon conduction band splits into discrete sub bands in the narrow potential well created on the Si side of the Si–SiO2 interface, with most of the inversion layer electrons residing in the lowest sub-band [37]-[41] and described by the Schrödinger’s wave equation. The Schrödinger’s and Poisson’s equations have to be solved simultaneously to evaluate the electron concentration in the lowest sub band. However, self consistent solution of coupled Schrödinger Poisson equations is a computationally expensive

REFERENCES

[1] R. V. Langevelde and F. M. Klassen, Solid State Electronics, vol. 44, no. 3, pp. 409-418, March 2000. [2] G. Gildenblat et al, IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 1979-1993, September 2006. [3] K. Joardar et al, IEEE Trans. Electron Devices, vol. 45, no. 1, pp. 134-148, January 1998. [4] G. Gildenblat et al, IEEE Journal of Solid State Circuits, vol. 39, no. 9, pp. 1394-1406, September 2004. [5] A. R. Boothroyd et al, IEEE Trans. Computer Aided Des. Integr. Circuits Syst., vol. 10, no. 12, pp.1512-1529, Dec.1991. [6] M. M. Mattausch et al, IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 15, no. 1, pp.1-7, Jan 1996. [7] R. Rios et al, IEDM Tech. Digest, pp.755-758, Dec. 2004. [8] T. L. Chen and G. Gildenblat, Solid State Electronics, vol.45, no. 2, pp. 335-339, February 2001. [9] J. R. Brews, Solid State Electronics, vol. 21, no. 2, pp. 345-355, February 1978. [10] T. L. Chen and G. Gildenblat, Solid State Electronics, vol.49, no. 2, pp. 267-270, February 2005. [11] MOS-11 [Online] Available: http://www.semiconductors.philips.com/Philips_Models. [12] N. Sadachika et al, IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2017-2024, September 2006. [13] J. He et al, Proc. MIXDES, Gdynia, Poland, pp.111-116, June 2006. [14] H. Abebe et al, Proc. Workshop Compact Model., NSTINanotech, Boston, MA, pp.824-827, 2006. [15] H. Abebe et al, Proc. Int. Conf. Solid State Devices, Kobe, Japan, pp. 592-593, 2005. [16] F. Pregaldiny et al, Solid State Electronics, vol. 48, no. 5, pp. 781-787, May 2004. [17] H. J. Park et al, IEEE Trans. Computer Aided Des. Integrated Circuits and Systems, vol. 10, no. 5, pp. 629-642, May 1991. [18] K. K. Young, IEEE Trans. Electron Devices, vol. 36, pp. 399402, February 1989. [19] H. C. Pao and C. T. Sah, Solid State Electronics, vol. 9, no. 10, pp. 927-937, Oct. 1996. [20] S. Baishya et al, , IEEE Trans. Electron Devices, vol. 53, no. 3, pp. 507-514, March 2006. [21] F. Pregaldiny et al, Solid State Electronics, vol.48, pp.427-435, 2004. [22] Y. Ma et al, Solid State Electronics, vol. 44, pp. 1697-1702, 2000. [23] W. Chen et al, IEEE Trans. Electron Devices, vol. 49, no. 4, pp. 652-657, April 2002. [24] M. I. Vexler, Solid State Electronics, vol. 47, pp.1283-1287, 2003. [25] C. Lallement et al, IEEE Trans. Electron Devices, vol. 50, no. 2, pp. 406-417, February 2003. [26] L. Wei et al, IEEE Trans. Very Large Scale Integrated (VLSI) Systems, vol. 10, no. 3, pp. 351-362, June 2002. [27] G. G. Shahidi, IBM J. Res. Develop., vol.46, no. 2/3, pp. 121131, March-May 2002. [28] A. Ajmera et al, VLSI Symp. Tech. Dig., pp. 15-16, June 1999. [29] G. F. Niu et al, IEEE Trans. Electron Devices, vol. 43, no. 11, pp. 2034-2037, November 1996. [30] R. H. Yan et al, IEEE Trans. Electron Devices, vol. 39, no. 7, pp. 1704-1710, 1992. [31] S. R. Banna et al, IEEE Trans. Electron Devices, vol. 42, no. 11, pp. 1949-1954, 1995. [32] J. H. Liu et al, IEEE Trans. Electron Devices, vol. 40, pp. 86-95, 1993. [33] G. Gildenblat et al, Proc. IEEE Custom Integrated Circuits Conference, pp. 819-822, Sept. 2005.

[34] Y. P. Tsividis, “Operation and Modeling of the MOS Transistor,” McGraw-Hill International, 2nd Edition, 1999. [35] K. Joardar et al, IEEE Trans. Electron Devices, vol. 45, no. 1, pp. 134-148, January 1998. [36] BSIM3v3.3 MOSFET Model User’s Manual, Univ. California, Berkeley, CA, 2005. [37] D. Basu and A. K. Dutta, “Solid-State Electronics, Volume 50, no. 7-8, pp. 1299-1309, July-August 2006. [38] F. Stern and W. E. Howard, Phys. Rev., vol. 163, no. 3, pp. 816835, 1967. [39] D. K. Ferry and R. O. Grondin, “Physics of submicron devices,” Plenum Press, New York, 1991. [40] R. Clerc et al, Solid State Electronics, vol. 45, no. 10, pp. 17051716, October 2001. [41] M. J. van Dort et al, IEEE Trans. Electron Devices, vol. 39, no. 4, pp. 932-938, 1992. [42] T. Ando et al, Rev. Mod Phys, vol. 54, pp. 437-672, 1982. [43] M. J. van Dort et al, Solid State Electronics, vol. 37, no. 3, pp. 411-414, 1994. [44] Z. Ren et al, IEEE Trans. Electron Devices, vol. 50, no. 9, pp. 1914-1925, September 2003. [45] M. Nekoyee et al, Phys. Rev. B, vol. 45, pp. 6643, 1992. [46] C. Lallementet al , IEEE Trans. Electron Devices, vol. 50, no. 2, February 2003. [47] G. Gildenblat et al, Electronics Letters, vol. 36, no. 12, pp. 1072-1073, June 2000. [48] A. G. Sabnis and J. T. Clemens, IEDM Tech. Dig., vol. 25, pp. 18-21, 1979. [49] N. D. Arora and G. S. Gildenblat, IEEE Trans. Electron Devices, vol. 34, no. 1, pp. 89-93, Jan. 1987. [50] C. L. Huang and N. D. Arora, Solid State Electronics, vol. 37, no. 1, pp. 97-103, Jan. 1994. [51] D. L. Scharfetter and H. K. Gummel, IEEE Trans. Electron Devices, vol. ED-16, no. 1, pp. 64-77, Jan. 1969. [52] W. Wu et al, IEEE Trans. Electron Devices, vol. 51, no. 7, pp. 1196-1200, July 2004. [53] R. M. Corless et al, Advances in Computation Mathematics, vol. 5, pp. 329-359, 1996. [54] T. L. Chen and G. Gildenblat, Electron Letters, vol. 37, no. 12, pp. 791-793, June 2001. [55] J. He et al, IEEE Trans. Electron Devices, vol. 53, no. 9, pp. 2008-2016, Sept. 2004. [56] J. He et al, Solid State Electronics, vol. 50, no. 2, pp. 259-262, 2006.

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