You are on page 1of 136

ASSEMBLY LANGUAGE PROGRAMMING

8086 Architecture

BY: PUSKA SUWAL USKAR

INTRODUCTION TO 16 BIT MICROPROCESSOR ARCHITECTURE


Intel

8086 16 bit microprocessor (arithmetic logic unit, internal registers, most of instructions are designed to work with 16 bit binary words). Data bus : 16 bit (read data from or write data to memory and ports either 16 bits or 8 bits at a time. Address bus : 20 bit (can address any one of 210 = 1048576 = 1MB memory locations).

8086 Architecture

Address range : 00000H to FFFFFH


2

16

bit words will be stored in two consecutive memory locations. If first byte of the data is stored at an even address, 8086 can read the entire word in one , operation.
For example if the 16 bit data is stored at even address 00520H is 2607, MOV BX, [00520] 8086 reads the first byte and stores the data in BL and reads the second byte and stores the data in BH. BL (00520) BH (00521)

8086 Architecture

If the first byte of data is stored at an odd address, 8086 needs two operation to read the 16 bit data. For example if the 16 bit data is stored at even address 00521H is F520, MOV BX, [00521] In first operation, 8086 reads the 16 bit data from the 00520 location and stores the data of 00521 location in register BL and discards the data of 00520 location. In second operation, 8086 reads the 16 bit data from the 00522 location and stores the data of 00522 location in register BH and discards the data of 00523 4 location.

8086 Architecture

BLOCK DIAGRAM OF INTEL 8086

8086 Architecture

8086 microprocessor is divided internally into two separate units: Bus Interface Unit (BIU) Execution Unit (EU) The two units functions independently. The is responsible for decoding and executing instructions. It contains arithmetic logic unit (ALU), status and control flags, general-purpose register, and temporary temporary-operand registers. Maintain the microprocessor status and control flags, manipulates the general registers and instruction operands.

8086 Architecture

The BIU is responsible for performing all external bus operations, such as instruction fetching, reading and writing of data operands for memory, address generating, and inputting or outputting data for input/output peripherals. These operations are take place over the system bus. This bus includes 16-bit bidirectional data bus, a 20 bit 20-bit address bus, and the signals needed to control transfer over the bus. The BIU uses a mechanism known as instruction queue. This queue permits the 8086 to pre pre-fetch up to 6 bytes of instruction code.

8086 Architecture

THE EXECUTION UNIT


The EU decodes and executes the instructions. A decoder in the EU control system translates instructions. The EU has 16 bit ALU for performing arithmetic and logic operations. The EU has nine 16 bit registers (AX, BX, CX, DX, SP, BP, SI, DI and Flag registers).

8086 Architecture

AX, BX, CX, DX (general purpose registers) can be used as eight 8 bit registers (AH, AL, BH, BL, CH, CL, DH, DL).

GENERAL PURPOSE REGISTERS


general purpose registers (AH, AL, BH, BL, CH, CL, DH, DL). These registers can be used as 8 8-bit registers individually or can be used as 16 16-bit in pair to have AX, BX, CX, and DX. The AL register is also called the accumulator It has accumulator. some features that the other general purpose registers do not have.

8086 Architecture

8086 Architecture

10

AX

AX 16 bit accumulator AL 8 bit accumulator; accumulator Used for operations involving input/output and most arithmetic. For example: multiply, divide, and translate instructions assume the use of AX. Also, some instructions generate more efficient machine code if they reference AX rather than another register.

11

8086 Architecture

BX

BX is known as the Base register register. This is only general purpose register whose contents can be used for addressing 8086 memory. All memory reference utilizing this register content for addressing uses the DS as the default segment register. BX can also be combined with DI or SI as a base register for special addressing. BX register is similar to the 8085 HL register. (BHH; BLL)

8086 Architecture

12

CX

CX is known as the counter register register. It may contain a value to control the number of times a loop is repeated or a value to shift bits left or right.

8086 Architecture

DX

DX is known as a data register register. Used to hold 16 bit result (data). Some I/O operations require its use, and multiply and divide operations that involve large values assume the use of DX and AX together as a pair.

13

POINTER & INDEX REGISTERS


The

8086 has four other general general-purpose registers, two pointer registers SP and BP, and two index registers DI and SI. These are used to store what are called offset addresses addresses. An offset address represents the displacement of a storage location in memory from the segment base address in a segment register. Unlike the general-purpose data registers, the purpose pointer and index registers are only accessed as words (16 bits).
14

8086 Architecture

POINTER REGISTERS

The two pointer registers (16 bits), stack pointer (SP) and base pointer (BP) are used to access data in the stack segment. The 16 bit SP register provides an offset value, which, when associated with the SS register (SP:SS), refers to the current word being processed in the stack. The SP contents are automatically updated during the execution of a POP and PUSH instruction.
15

8086 Architecture

The 16 bit BP facilitates referencing parameters, which are data and addresses that a program passes via the stack. The processor combines the address in SS with the offset in BP. BP can also be combined with DI and with SI as a base register for special addressing.
16

8086 Architecture

INDEX REGISTERS

The two 16 bit index registers, Source Index (SI and Destination Index (DI) are used in indexed addressing.
8086 Architecture

SI register: is required for some string (character) handling operations. In this context, SI is associated with the DS register. DI register: is also required for some string operations. In this context, DI is associated with the ES register.

17

FLAG REGISTERS
A flag is a flip-flop that indicates some condition flop produced by the execution of an instruction or controls certain operations of the EU. A 16 bit flag register in the EU contains nine active flags. Six of them are used to indicate some condition produced by an instruction and remaining flags are used to control certain operations of the processor.

8086 Architecture

18

The six conditional flags are Carry flag (CF), Parity flag (PF), Auxiliary carry flag (AF), Zero flag (ZF), Sign flag (SF) and Overflow flag (OF).
8086 Architecture

The carry flag (CF): CF is set if there is a carry-out or a borrow-in for the most significant in bit of the result during the execution of an instruction. Otherwise it is reset. The parity flag (PF): PF is set if the result produced by the instruction has even parity paritythat is, if it contains an even number of bits at the 1 logic level. If parity is odd, PF is reset.

19

The auxiliary flag (AF): AF is set if there is a carry-out from the low nibble into the high nibble or a borrow-in from the high nibble into the low nibble of the lower byte in a 16-bit word. Otherwise, AF is reset. The zero flag (ZF): ZF is set if the result produced by an instruction is zero. Otherwise, ZF is reset. The sign flag (SF): The MSB of the result is copied into SF. Thus, SF is set if the result is a negative number of reset if it is positive. The overflow flag (OF): When OF is set, it indicates that the signed result is out of range. If the result is not out of range, OF remains reset.
20
8086 Architecture

The three control flags are Trap flag (TF), Interrupt flag (IF) and Direction flag (DF). The trap flag (TF): if TF is set, the 8086 goes into the single single-step mode of operation. When in the single single-step mode, it executes an instruction and then jumps to a special service routine that may determine the effect of executing the instruction. This type of operation is very useful for debugging programs. The interrupt flag (IF): For the 8086 to recognize maskable interrupt requests at its interrupt (INT) input, the IF flag must be set. When IF is reset, requests at INT are ignored and the maskable interrupt interface is disabled. The direction flag (DF): The logic level of DF determines the direction in which string operations will occur. When set, the string instructions automatically decrement the address; therefore the string data transfers proceed from high address to low address.
21

8086 Architecture

BUS INTERFACE UNIT (BIU)


BIU delivers instruction and data to EU. It manage the bus control unit, segment registers and instruction queue. BIU controls the buses that transfer data to the EU, to memory, and to I/O devices, whereas the segment registers control memory addressing. Another function of BIU is to provide access to instructions. Because the instructions for a program that is executing are in memory, the BIU must access instructions form memory and place them in an instruction queue. The Instruction Queue is a FIFO group of register in which upto 6 bytes of instruction code are pre pre-fetched instructions.

8086 Architecture

22

The EU and BIU work in parallel, with the BIU keeping one step ahead. When the EU is ready for its next instruction, it simply reads the instruction byte(s) for the instruction from the queue in the BIU. The top instruction is the currently executable one and, while the EU is occupied executing an instruction, the BIU fetches another instruction from memory. This fetching overlaps with execution and speeds up processing. Fetching the next instruction while the current instruction executes is called pipelining pipelining.

8086 Architecture

23

SEGMENTS AND ADDRESSING

Segments are special areas defined in a program for containing the code, the data and the stack stack. A segment begins on a paragraph boundary, that is, at a location evenly divisible by 16, or hex 10. The 8086 BIU sends out 20 bit addresses, so it can address any of 220 bytes (1MB) in memory. However, at any given time the 8086 works with only four 65,536 byte (64Kbyte) segments with 536 this 1M range. Four segment registers in the BIU are used to hold the upper 16 bits of the starting addresses of four memory segments that the 8086 is working with at a particular time.
24
8086 Architecture

Three

segments are:
8086 Architecture

Code segment (CS) : contains the machine instructions that are to execute Typically, the first execute. executable instruction is at the start of this segment. CS register addresses the code segment. Data segment (DS) : contains a programs defined data, constants, and work areas. DS register addresses the data segment. Stack segment (SS) : contains any data and addresses that the program needs to save temporarily or for use by subroutine subroutine.

25

64K 64K
8086 Architecture

64K 64K 4 segments can be separated or overlap (in small program which do not need 64K) The registers and segments are not necessarily in the order shown.
26

SEGMENT BOUNDARIES
A

segment register is 16 bits in size and contains the starting address of a segment. A segment begins on a paragraph boundary, which is an address evenly divisible by decimal 16, or hex 10. The BIU inserts zeros (0) for the lowest 4 bits (nibble) of the 20 bit starting address for a segment. If the code segment register contains 348AH, for example, then the code segment will start at address 348A0H.

8086 Architecture

27

SEGMENT OFFSETS
Within a program, all memory locations within a segment are relative to the segments starting address. The distance in bytes from the segment address to another location within the segment is expressed as an offset (or displacement). 2-byte (16 bit) offset can range from 0000H through byte FFFFH. To reference any memory location in a segment, the processor combines the segment address in a segment register with the offset value of that location, that is, its distance in bytes from the start of the segment. 28

8086 Architecture

Consider the data segment that begins at location 038E0H. The DS register contains the segment address of the data segment, 038E[0], and an instruction references a location ], with an offset of 0032H bytes from the start of the data H segment. To reference the required location, the processor combines the address of the data segment with the offset:
DS segment address Offset Actual address 038E0H +0032H 03912H physical address
29

8086 Architecture

8086 Architecture

30

8086 Architecture

31

8086 Architecture

32

SEGMENT REGISTER
A

segment register provides for addressing an area of memory known as the current segment.
Segment register is used to hold the upper 16 bits of the starting address for each of the segments.

8086 Architecture

The

four segment registers are:

Code segment (CS) register Data segment (DS) register Stack segment (SS) register Extra segment (ES) register

33

CS

register: contains the starting address of a programs code segment. This segment address, plus an offset value in the Instruction Pointer (IP) register (CS:IP), indicates the address of an instruction to be fetched for execution. register: contains the starting address of a programs data segment. Instructions use this address to locate data; this address, plus an offset value in an instruction, causes a reference to a specific byte location in the data segment.
34

8086 Architecture

DS

SS register: permits the implementation of a stack in memory, which a program uses for temporary storage of addresses and data. The system stores the starting address of a programs stack segment in SS register. This segment address, plus an offset value in the Stack Pointer (SP) register (SS:SP) indicates the current word SP), in the stack being addressed. . ES register: used by some string operations to handle memory addressing. In this context, ES register is associated with the DI register register.
35

8086 Architecture

INTRODUCTION 8086
There

TO PROGRAMMING THE

are three language levels that can be used to write a program for a microcomputer.
Machine language Assembly language High level language

8086 Architecture

36

MACHINE LANGUAGE

Binary form of the program is referred to as machine language because it is the form required by the machine. It is difficult for a programmer to memorize the thousands of binary instruction codes. Very easy for an error to occur when working with long series of 1s and 0s. Using hexadecimal representation for the binary codes might help some, but there are still thousands of instruction codes to cope with.
37

8086 Architecture

B82301
Machine code

MOV AX, 0123


8086 Architecture

Machine instructions may be one, two, or three bytes in length. First byte is the actual operation, and any other bytes that are present are operands - reference to an immediate value, a register, or a memory location.

38

ASSEMBLY LANGUAGE
Much

more readable form of machine language, called assembly language, uses mnemonic codes to refer to machine code instructions, rather than simply using the instructions numeric values. Translate to machine language so that it can be loaded into memory and run. Assembly language uses two, three or four letter mnemonics to represent each instruction type. Assembly language statements are usually written in a standard form that has four fields. Label NEXT: Op-code Operand comment ADD AL, 07H ;Add 07 and content of AL

A label is a symbol or group of symbols used to represent an address which is not specifically known at the time the statement is written. Labels are usually followed by a colon. The op-code field of the instruction contains the mnemonic for the instruction to be performed. Instruction mnemonics are also called operation code (op-code). The operand field of the statement contains the data, memory address, port address, or the name of the register on which the instruction is to be performed. Comment field starts with semicolon and contain the information about the instruction but are not part of the program.

8086 Architecture

40

HIGH LEVEL LANGUAGE


High

level language use program statements which are even more English English-like than those of assembly language. Compiler translate high-level language statement level to machine code which can be loaded into memory and executed. Programs can usually be written faster than in assembly language because it works with bigger building blocks. Execute slowly and require more memory than the same program written in assembly language.

8086 Architecture

41

TRANSLATION TO MACHINE CODE


Microprocessor

only understand the binary numbers and hence a translator must be used to convert assembly/high-level language programs into level binary machine language so that the microprocessor can execute the program. An assembler translates the program written in assembly language into machine language program (object code). Assembly language program source codes Machine language program object codes.
42

8086 Architecture

o Translator converts source codes to object codes and then into executable formats. o Source code object code . Assembler o Object code executable format . linker

8086 Architecture

Assembler

Linker

Assembly language (Source code) *.ASM

Executable file Object code *.OBJ *.EXE or *.COM


43

There are two ways of converting an assembly language program into machine language:

Manual assembly Using assembly

8086 Architecture

With manual assembly, the programmer is the assembler; programmer translates each mnemonic into its numerical machine language representation by looking up a table of the microprocessors instruction set. Manual assembly is acceptable for short programs but becomes very inconvenient for large programs

44

When an assembler is used, the assembler reads each assembly instruction of a program as ASCII characters and translates them into respective binary op op-codes. Address computation is the advantage of the assembler. (assembler computes the actual address for the programmer and fills it in automatically).

8086 Architecture

45

TYPES OF ASSEMBLER

One pass assembler Assembler goes through the assembly language program once and translates the assembly language program.

8086 Architecture

Can not resolve the forward referencing. Either all labels used in forward references are defined in the source program before they are referenced, or forward references to data items are prohibited.

46

Two pass assembler


8086 Architecture

More efficient & easy to use. Performs two sequential scans over the source code. Pass 1: Scans the code. Validates the tokens. Creates a symbol table. Pass 2: Solves forward referencing. Converts the code to the machine code.

47

8086 Architecture

48

8086 Architecture

49

ASSEMBLY LANGUAGE FEATURES

Program comment: The use of comments throughout a program can improve its clarity, especially in assembly language, where the purpose of a set of instructions is often unclear.

8086 Architecture

A comment begins with a semicolon (;), and wherever it is coded, the assembler assumes that all characters on the line to its right are comments. A comment may contain any printable character, including blank. MOV AX, BX ; move the content of BX to AX.

50

Reserved words

Certain names in assembly language are reserved for their own purposes, to be used only under special conditions. Reserved words, by category, include: Instructions, such as MOV and ADD, which are , operations that the computer can execute; Directives, such as END or SEGMENT, which is used to , provide information to the assembler. Operators, such as FAR and SIZE, which is used in , expressions. Predefined symbols, such as @Data and @Model, which , return information to the program during the assembly.

8086 Architecture

51

Identifiers: An identifier (or symbol) is a name apply to an item in the program for reference.

8086 Architecture

Two types of identifier: Name: refers to the address of a data item, such as : COUNTER in COUNTER DB 0

Label: refers to the address of an instruction, procedure, or : segment, such as MAIN and B30 in the following statements. 30 MAIN PROC FAR B30: ADD BL, 25

52

Identifier can use the following characters: CATEGORY ALLOWABLE CHARACTER Alphabetic letters: A Z and a z Digit: 0 9 (not the first character) Special characters: question mark(?) underline( _ ) dollar ($) at (@) dot ( . ) not first character The maximum length of an identifier is 31 character up to MASM 6.0 and 247 since.
53

8086 Architecture

Statements

An assembly program consists of a set of statements. Two types of statements:

8086 Architecture

Instructions: such as MOV and ADD, which the assembler translates to object code; and Directives: which tell the assembler to perform a specific action, such as define a data item.

Format of a statement:
[identifier] operation [operand (s)] [;comment]
54

An identifier (if any), operation, and operand (if any) are separated by at least one blank or tab character.
8086 Architecture

There is maximum of 132 characters on a line up to MASM 6.0 and 512 since. Examples:
IDENTIFIER OPERATION OPERAND COMMENT DB MOV 1 AX,0

Directive: COUNT Instruction: L30:

;Name, operation, operand ;label, operation, operand


55

Directives: Assembly language support a number of statements that enable to control the way in which a source program assembles and lists lists.

8086 Architecture

Describe the way according to which the microprocessor is directed to perform a specific task. Act only during the assembly of a program and generate no machine executable code.
56

MOST COMMON DIRECTIVES

PAGE and TITLE Listing Directives: The PAGE and TITLE directives help to control the format of a listing of an assembled program. They have no effect on subsequent execution of the program. At the start of the program, the PAGE directive designates the maximum number of lines to list on a page and the maximum number of characters on a line. Its format is PAGE [length] [, width]

8086 Architecture

57

PAGE 60, 132 length is 60 lines per page and width is 132 character per line.
8086 Architecture

The number of lines per page may range from 10 through 255, and the number of characters per line may range from 60 through 132. Omission of a PAGE statement causes the assembler to default to PAGE 50, 80.
58

The TITLE directive to cause a title for a program to print on line 2 of each page of the program listing. Format of TITLE directive is TITLE text [comment] For text, a common practice is to use the name of the program as cataloged on disk.

8086 Architecture

TITLE ASMSORT Assembly program to sort CD titles


Directive text Comment ( ; is not required)

59

SEGMENT and ENDS Directives:


An assembly language program in .EXE format consist of one or more segments. The directives for defining a segment, SEGMENT and ENDS, have the following format: , segment_name SEGMENT MOV AX, BX ADD AX, BX .. ENDS
60

8086 Architecture

segment_name

The SEGMENT statement defines the start of a segment. The segment_name must be present, must be unique, and must follow assembly naming conventions. The ENDS statement indicates the end of the segment and contains the same name as the SEGMENT statement. The maximum size of a segment is 64K. ARRAY1 SEGMENT MOV AX, BX ADD AX, BX ARRAY1 ENDS
61

8086 Architecture

Segment_name ARRAY1 The assembler will assign a numeric value to ARRAY1 corresponding to the base value of the Data segment. The programmer can load ARRAY1 into the DS using the following instruction: MOV AX, @ARRAY1 MOV DS, AX The segment register like DS, CS etc must be loaded via 16 bit register such as AX or by the contents of a memory location. A data array or an instruction sequence between the SEGMENT and ENDS directives is called a logical segment.
62

8086 Architecture

ASSUME Directive:

An 8086 program may have several logical segments that contain code and several that contain data. However, at ay given time the 8086 works directly with only four physical segments: CS, DS, SS and ES. The ASSUME directive tells the assembler which logical segment to use for each of these physical segments at a given time. The format is: ASSUME ss:stackname, DS:datasegname, CS:codesegname

8086 Architecture

63

The above statement tells the assembler that the logical segment named codesegname contains the instruction statements for the program and should be treated as a code segment. It also tells the assembler that it should treat the logical segment datasegname as the data segment. In order words, the DS:datasegnament part of the statement tells the assembler that for any instruction which refers to data in the data segment, data will be found in the logical segment datasegname. ASSUME may also contain an entry for the ES register, such as ES:datasegname; if the program does not use ES, its reference is omitted or code ES:NOTHING.
64

8086 Architecture

PROC Directive

The code segment contains the executable code for a program which consists of one or more procedures, defined initially with the PROC directive and ended with the ENDP directive. The format is NAME OPERATION OPERAND procedure_name PROC FAR procedure_name ENDP COMMENT ; Begin proc ; End proc
65

8086 Architecture

The procedure_name must be present, must be unique, and must follow assembly language naming conventions. The operand FAR in this case, is related to program execution. The ENDP directive indicates the end of a procedure and contains the same name as the PROC statement to enable the assembler to relate the end to the start. Because a procedure must be fully contained within a segment, ENDP defines the end of the procedure before ENDS defines the end of the segment. The code segment may contain any number of procedures used as subroutines, each with its own set of matching PROC and ENDP statements. Each additional PROC is usually coded with (or default to) the NEAR operad.

8086 Architecture

66

END Directive

An END directive ends the entire program and appears as the last statement. Its format is: END [entry-point] point]

8086 Architecture

Entry-point (procedure_name) tells the assembler and linker point where the program will begin execution.
67

MODEL Directive

The MODEL directive selects a standard memory model for the program. It determines the way segments are linked together, as well as the maximum size of each segment. Its format is .MODEL memory_model

8086 Architecture

The memory_model may be Tiny, Medium, Compact, Large, Huge, or Flat.


68

MODEL Tiny Small Medium Compact Large Huge

Description Code & data together may not be greater than 64K Neither code nor data may be greater than 64K Only the code may be greater than 64K Only the data may be greater than 64K Both code & data may be greater than 64K All available memory may be used for code & data
8086 Architecture

69

The formats (including the leading dot) for the directives that define the stack, data, and code segments are: .STACK [size] .DATA .CODE [segment_name] Each of these directives causes the assembler to generate the required SEGMENT statement and its matching ENDS. The default stack size is 1024 bytes, which ca be override. The instruction used to initialize the address of the data segment in DS are: MOV AX,@data ;initialize DS with MOV DS,AX ;address of data segment
70

8086 Architecture

DEFINING TYPE OF DATA


The data segment in an .EXE program contains constants, work areas, and input/output areas. The assembler provides a set of directives that permits definitions of items by various types and lengths; for example, DB defines byte and DW defines word. A data item may contain an undefined (uninitialized) value, or it may contain an initialized constant, defined either as a character string or as a numeric value. Format for data defining:

8086 Architecture

[name]

Dn

expression
71

Name:

a program that reference a data item does so by means of a name, as indicated by the square brackets.

8086 Architecture

Directive (Dn):

the directives that define data items are DB (byte), DW (word), DD (doubleword), DF (farword), DQ (quadword), and DT (tenbytes), each of which explicitly indicates the length of the defined item.

72

Expression:

the expression in an operand may specify an uninitialized value or a constant value. To indicate an uninitialized item, define the operand with a question mark, such as
DATAX DB ? ;uninitialized item

8086 Architecture

When program begins execution, the initial value of DATAX is unknown. The operand can be used to define a constant, such as DATAY DB 25 ;initialized item Use this initialized value 25 throughout the program and can even change the value.

73

An expression may contain multiple constants separated by commas and limited only by the length of the line, as follows: DATAZ DB 21, 22, 23, 24, 35, 26, The assembler defines these constants in adjacent bytes, from left to right. DATAZ + 0 21 DATAZ + 1 22 DATAZ + 2 23 .. The instruction MOV AL, DATAZ+3 loads the value 24 (18H) into the AL register.

8086 Architecture

74

The expression also permits duplication of constants in a statement of the format


8086 Architecture

[name]

Dn

repeat-count DUP (expression) count

The following examples illustrate duplication DW 10 DUP(?) ; ten words, uninitialized DB 5 DUP(12) ;five bytes containing hex ocococococ DB 3 DUP(5 CUP(4)) ;fifteen 4s An expression may define and initialized a character string or a numeric constant.

75

Character string

Character string are used for descriptive data such as peoples names and product descriptions. The string is defined within single quotes, such as PC, or within double quotes, such as PC. The assembler stores the contents of the quotes as object code in normal ASCII format, without the apostrophes. DB is the only format that defines a character string exceeding two characters with the characters stored as left adjusted ad in normal left-to-right sequences. right DB Computer city DB crazy sams CD emporium
76

8086 Architecture

DIRECTIVE FOR DEFINING DATA

DB or BYTE: Define Byte


A DB (or BYTE) numeric expression may define one or more 1 byte constants, each consisting of two hex digits. For unsigned data, the range of values is 0 to 255; for signed data, the range of values is -128 to +127. 128 The assembler converts numeric constants to binary object code (represented in hex).
BYTE1 BYTE2 BYTE3 BYTE4 BYTE5 DB DB DB DB DB ? 48 30H 01111010B 10 DUP(0)

8086 Architecture

77

DW or WORD : Define Word


The DW directive defines items that are one word (two bytes) in length. A DW numeric expression may define one or more one word constants. For unsigned numeric data, the range of values is 0 to 65535; for signed data, the range of value is -32768 to +32767. The assembler converts DW numeric constants to binary object code (represented in hex), but stores the bytes in reverse sequence. Consequently, a decimal value defined as 12345 converts to hex 3039, but is stored as 3930.
78

8086 Architecture

8086 Architecture

WORD1 WORD2 WORD3 WORD4

DW DW DW DW

0FFF0H 01111010B 2, 4, 6, 7, 8 8 DUP(0)

79

DD or DWORD: Define Doubleword


The DD directive defines items that are a doubleword (four byte) in length. A DD numeric expression may define one or more constants, each with a maximum of four bytes ( 8 hex digit). For unsigned numeric data, the range of values is 0 to 4294967295; for signed data, the range is -2147483648 to +2147483647. The assembler converts DD numeric constants to binary object code (represented in hex), but stores the bytes in reverse sequence. Consequently, the assembler converts a decimal value defined as 12345678 to 00BC614EH and stores it as 4E61BC00H.

8086 Architecture

80

DWORD1 DWORD2 DWORD3 DWORD4

DD DD DD DD

? 41562 24, 48 BYTE3 - BYTE2 3

8086 Architecture

81

EQU Directive

The EQU directive (short form of equivalent) an be used to assign a name to constant. PROD EQU 55H directs the assembler to assign the value H 55H every time it finds PROD in the program. H MOV BX, PROD moves 55H in BX. H

8086 Architecture

82

SAMPLE ASSEMBLY LANGUAGE PROGRAM

8086 Architecture

83

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Page 60, 132 TITLE A 05ASM1 0000 0000 0040 0000 0000 0002 0004 0006 0000 0000 0000 0003 0005 0008 000C 000F 0012 0014 0014 B8 ---- R 8E D8 A1 0000 R 03 06 0002 R A3 0004 R B8 4C00 CD 21 MAIN ADD 00D7 007D 0000 0020[0000] STACK DATASEG FLDD FLDE FLDF DATASEG CODESEG MAIN STACK SEGMENT DW ENDS SEGMENT DW DW DW ENDS SEGMENT PROC ASSUME MOV MOV MOV AX, FLDE MOV FLDF, AX MOV AX, 4C C00H INT ENDP END MAIN CODESEG ENDS 21H ;end of procedure ;end of segment FAR SS:STACK, DS:DATASEG, CS:CODESEG AX, DATASEG DS, AX AX, FLDD ;set address of data segment ; in DS ;move 0215 to AX ;add 0125 to AX ;store sum in FLDF ;end processing 215 125 ? 8086 Architecture 32 DUP (0) move and add operations ; -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

; .

84

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 000F 0012 0014 B8 4C00 CD 21 0005 0008 000C A1 0000 R 0000 0000 0003 B8 ---- R 8E D8 0000 0002 0004 00D7 007D 0000

PAGE TITLE

60,132 A05ASM3 Move and add operation .MODEL .STACK .DATA SMALL 64 215 125
8086 Architecture

; -----------------------------------------------------------------------------------;define stack ;define data

FLDD FLDE FLDF

DW DW DW .CODE

? ;define code segment FAR ;set address of data segment in DS

; --------------------------------------------------------------------------------------MAIN PROC

MOV AX, @data MOV DS, AX MOV AX, FLDD ADD AX, FLDE MOV FLDF, AX MOV AX, 4C00H INT 21H MAIN ENDP END MAIN

;move 0215 to AX ;add 0125 to AX ;store sum in FLDF ;End processing 85 ;End of procedure ;End of program

03 06 0002 R A3 0004 R

MACRO ASSEMBLER
Translate a program written in macro language into the machine language. A macro language is the one in which all the instruction sequence can be defined using macros. A macro is an instruction sequence that appears repeatedly in a program assigned with a specific name. The macro assembler replaces a macro name with the appropriate instruction sequence each time it encounters a macro name. The main difference between a macro and a procedure is that in the macro the passage of parameters is possible and in the procedure it is not.

8086 Architecture

86

Syntax of macro:

Declaration of the macro Code of the macro Macro termination directive

8086 Architecture

The declaration of the macro is done the following way: NameMacro MACRO [parameter1, parameter2...] The directive for the termination of the macro is: ENDM

87

Addition MACRO IN AX, PORT ADD AX, BX OUT PORT, AX ENDM

8086 Architecture

When above instruction sequence is to be executed repeatedly macro assembler allow the macro name only to be typed instead of all instructions, provided the macro is defined.
88

There exist difference between a macro program and a subroutine program.


8086 Architecture

A specific subroutine occurs once in a program. A subroutine is executed by calling it from a main program. The program execution jumps out of the main program and then executes the subroutine. At the end of the subroutine, a RET instruction is used to resume program execution following the CALL SUBROUTINE instruction in the main program
89

A macro does not cause the program execution to branch out of the main program. Each time a macro occurs, it is replaced with the appropriate sequence in the main program. The advantages of using macros are that the source programs become shorter and program documentation becomes better. Conditional macro assembler is very useful in determining whether or not an instruction sequence shall be included in the assembly depending on a condition that is true or false. Based on each condition, a particular program is assembled.

8086 Architecture

90

DESCRIPTION OF ASSEMBLY PROCESS IN MACRO ASSEMBLER (MASM)


MASM is two pass assembler. The complete process of assembling, linking, and executing an assembly language program using a macro assembler is similar as mentioned previous.

8086 Architecture

Assembler

Linker

Assembly language (Source code) *.ASM

Executable file Object code *.OBJ *.EXE or *.COM


91

The assembly step involves translating the source code into object code and generating an intermediate .OBJ file, or module. One of the assemblers tasks is to calculate the offsets for every data item in the data segment and for every instruction in the code segment. The link step involves converting the .OBJ module to an .EXE machine code module. The linkers tasks include completing any address left open by the assembler and combining separately assembled programs into one executable module. The last step is to load the program for execution.

92

8086 Architecture

ASSEMBLING THE SOURCE PROGRAM


The assembler converts the source statements into machine code and displays any error messages on the screen. Typical errors include a name that violates naming conventions, an operation that is spelled incorrectly (such as MOVE instead of MOV), and an operand containing a name that is not defined. The assembler attempts to correct some errors but, in any event, reload the editor, correct the .ASM source program, and reassemble it. Optional output files from the assembly step are object (.OBJ), listing (.LST) and cross reference (.CRF or .SBR).

8086 Architecture

93

LINKING AN OBJECT PROGRAM

When the program is free of error messages, the next step is to link the object module that was produced by the assembler and that contains only machine code. The linker performs the following functions:

8086 Architecture

Combines, if requested, more than one separately assembled module into one executable program, such as two or more assembly programs or an assembly program with a C program. Generates an .EXE module and initialize it with special instruction to facilitate its subsequent loading for execution.

Once one or more .OBJ modules are linked into an .EXE module, .EXE module can execute any number of times. But the source program needs correction: correct source program, assemble again into an .OBJ module, and link .OBJ module into an .EXE module.

94

EXECUTING A PROGRAM
Having assembled and linked a program, the program can now execute. If the .EXE file is in the default drive, ask the loader to read it into memory for execution by typing A05ASM1.EXE or A05ASM (without .EXE extension) ASM1 However, since this program produces no visible output, it is suggested that you run it under DEBUG and use Trace commands to step through its execution. DEBUG load the .EXE program module and displays its hyphen prompt.

95

8086 Architecture

16 BIT MICROPROCESSOR ADDRESSING MODE

The 8086 provides various addressing modes to access instruction operands. Operands may be contained in registers, in memory or in I/O ports. The three basic modes of addressing are register, immediate, and memory; memory addressing consists of six types, for eight modes in all. Register addressing Immediate addressing Direct memory addressing Direct-offset addressing Indirect memory addressing Base displacement addressing Base index addressing Base-index with displacement addressing index

8086 Architecture

96

REGISTER ADDRESSING

For this mode, a register provides the name of any of the 8, or16 bit register. Depending on the instruction, the register may appear in the first operand, the second operand or both, as the following examples illustrate: MOV DX, WORD_MEM MOV WORD_MEM, CX MOV DX, BX

8086 Architecture

97

IMMEDIATE ADDRESSING
An immediate operand contains a constant value or an expression. For many instructions with two operands, the first operand may be a register or memory location, and the second may be an immediate constant. The destination field (first operand) defines the length of the data.

8086 Architecture

byte_val DB 150 word_val DW 300 MOV word_val, 40H MOV AX, 0245H

;define byte ;define word


98

DIRECT MEMORY ADDRESSING

In this format, one of the operands references a memory location and the other operand references a register.
8086 Architecture

ADD BYTE_VAL, DL MOV BX, WORD_VAL

99

DIRECT OFFSET ADDRESSING

This addressing mode, a variation of direct addressing, uses arithmetic operators to modify an address. The following examples use these definitions of tables: BYTE_TBL DB 12, 15, 16 22, .. 16, WORD_TBL DB 163, 227 435, .. 227, DBWD_TBL DB 465, 563 897, .. 563, Byte operations: these instructions access bytes from BYTE_TBL: MOV CL, BYTE_TBL[2] MOV CL, BYTE_TBL+2 Word operation: these instruction access words from WORD_TBL: MOV CX, WORD_TBL[4] MOV CX, WORD_TBL+4

8086 Architecture

100

INDIRECT MEMORY ADDRESSING

Indirect addressing takes advantage of the computers capability for segment:offset addressing. The registers used for this purpose are base registers (BX and BP) and index registers (DI and SI), coded within square brackets, which indicate a reference to memory. An indirect address such as [DI] tells the assembler that the memory address to use will be in DI when the program subsequently executes. BX, DI, and SI are associated with DS as DS:BX, DS:DI, and DS:SI, for processing data in the data segment. BP is associated with SS as SS:BP, for handling data in the stack. When the first operand contains an indirect address, the second operand reference a register or immediate value; when the second operand contains an indirect address, the first operand references a register.

101

8086 Architecture

A reference in square brackets to BP, BX, DI or SI implies an indirect operand, and the processor treats the contents of the register as an offset address when the program is executing.

8086 Architecture

DATA_VAL ..

DB

50

LEA BX, DATA_VAL MOV [BX], CL

ADD ADD

CL, [BX] [BP], CL


102

BASE DISPLACEMENT ADDRESSING


This addressing mode also uses base register (BX and BP) and index registers (DI and SI), but combined with a displacement (a number or offset value) to form an effective address. The following MOV instruction moves zero to a location two bytes immediately following the start of DATA_TBL;

8086 Architecture

DATA_TBL

DB

365 DUP(?)

ADD CL, [DI+12] SUB DATA_TBL, DL MOV DATA_TBL[DI], DL

103

BASE INDEX ADDRESSING


This addressing mode combines a base register (BX or BP) with an index register (DI or SI) to form an effective address; for example, [BX+DI] means the address in BX plus the address in DI. A common use for this mode is in addressing a 2 2dimensional array, where, say, BX references the row and SI the column.

8086 Architecture

MOV ADD

AX, [BX+SI] [BX+DI], CL


104

BASE INDEX WITH DISPLACEMENT ADDRESSING

This addressing mode, a variation on base index, combines a base register, an index register, and a displacement to form an effective address.
MOV AX, [BX+DI+10] MOV CL, DATA_TBL[BX+DI]

105

8086 Architecture

INSTRUCTIONS

Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Program Execution Transfer Instructions Processor Control Instructions

106

8086 Architecture

DATA TRANSFER INSTRUCTIONS

General purpose byte or word transfer instructions instructions: MOV POP XLAT copy byte or word from specified source to specified destination
8086 Architecture

PUSH Copy specified word to top of stack Copy word from top of stack to specified location Translate a byte in AL using a table in memory XCHG Exchange bytes or exchange words

Simple input and output port transfer instructions instructions: IN Copy a byte or word from specified port to accumulator
107

OUT Copy a byte or word from accumulator to specified port

Special address transfer instructions: LEA LDS LES Load effective address of operand into specified register
8086 Architecture

Load DS register and other specified register from memory Load ES register and other specified register from memory

Flag transfer instructions LAHF SAHF POPF Load (copy to ) AH with the low byte of the flag register Store (copy) AH register to low byte of flag register Copy word at top of stack to flag register

PUSHF Copy flag register to top of stack


108

ARITHMETIC INSTRUCTIONS

Addition instructions: ADD ADC INC AAA DAA Add specified byte to byte or specified word to word
8086 Architecture

Add byte + byte + carry flag or word + word + carry flag Increment specified byte or specified word by 1 ASCII adjust after addition Decimal (BCD) adjust after addition

Multiplication instructions MUL IMUL AAM Multiply unsigned byte by byte or unsigned word by word Multiply signed byte by byte or signed word by word ASCII adjust after multiplication
109

Subtraction instructions: SUB SBB DEC NEG CMP AAS DAS Subtract byte from byte or word for word Subtract byte and carry flag from byte or word ad carry flag from word. Decrement specified byte or specified word by 1 Negate invert each bit of a specified byte or word and add 1. (form 2s complement) Compare two specified bytes or two specified words ASCII adjust after subtraction Decimal (BCD) adjust after subtraction
8086 Architecture

Division instructions: DIV Divide unsigned word by byte or unsigned DW by word IDIV AAD CBW CWD Divide signed word by byte or signed DW by word ASCII adjust before division Fill upper byte of word with copies of sign bit of lower byte Fill upper word of DW with sign bit of lower word
110

BIT MANIPULATION INSTRUCTION

Logical instructions: NOT AND OR XOR TEST Invert each bit of a byte or word AND each bit in a byte or word with the corresponding bit in another byte or word OR each bit in a byte or word with the corresponding bit in another byte or word Exclusive OR each bit in a byte or word with the corresponding bit in another byte or word AND operands to update flags, but dont change operands
8086 Architecture

111

Shift instruction SHL/SAL SHR SAR Shift bits of byte or word left, put zero(s) in LSB(s). Shift bits of byte or word right, put zero(s) in MSB(s). Shift bits of word or byte right, copy old MSB into new MSB
8086 Architecture

Rotate instructions: ROL ROR RCL RCR Rotate bits of byte or word left, MSB to LSB and to CF Rotate bits of byte or word right, LSB to MSB and to CF Rotate bits of byte or word left, MSB to CF and CF to LSB Rotate bits of byte or word right, LSB to CF and CF to MSB

112

STRING INSTRUCTIONS
REP REPE/REPZ REPNE/REPNZ MOVX/MOVSB/MOVSW COMPS/COMPSB/COMPSW SCAS/SCASB/SCASW LODS/LODSB/LODSW STOS/STOSB/STOSW

An instruction prefix Repeat following instruction until CX=0 Repeat while equal/zero Repeat while not equal/zero Move byte or word from one string to another Compare two string bytes or two string words Scan a string. Compare a string byte with a byte in AL or a string word with a word in AX Load string byte into AL or string word into AX Store byte from AL or word from AX into string
113
8086 Architecture

PROGRAM EXECUTION TRANSFER INSTRUCTIONS

Unconditional transfer instructions: CALL RET JMP Call a procedure (subprogram), save return address on stack Return from procedure to calling program Go to specified address to get next instruction
8086 Architecture

Conditional transfer instructions: JA/JNBE Jump if above/ jump if not below or equal JAE/JNB Jump if above or equal/ jump if not below JB/JNAE Jump if below/ jump if not above or equal JBE/JNA Jump if below or equal/ jump if not above JC JE/JZ Jump if carry =1 Jump if equal/ jump if zero
114

JG/JNLE Jump if greater/ jump if not less than or equal

JGE/JNL JL/JNGE JLE/JNG JNC JNE/JNZ JNO JNP/JPO JNS JO JP/JPE JS

Jump if greater than or equal/ jump if not less than Jump if less than/ jump if not greater than or equal Jump if less than or equal/ jump if not greater than
8086 Architecture

Jump if no carry Jump if not equal/ jump if not zero Jump if no overflow Jump if not parity/ jump if parity odd (PF = 0) Jump if not sign Jump if overflow Jump if parity/ jump if parity even Jump if sign

115

Iteration control instructions: LOOP LOOPE/LOOPZ LOOPNE/LOOPNZ JCXZ Loop through a sequence of instructions until CX=0 Loop through a sequence of instruction while ZF=1 and CX !=0 Loop through a sequence of instruction while ZF=0 and CX!=0. Jump to specified address if CX=0.
8086 Architecture

Interrupt instructions: INT INTO IRET Interrupt program execution, call service procedure Interrupt program execution if OF=1 Return from interrupt service procedure to main program
116

PROCESSOR CONTROL INSTRUCTIONS

Flag set/clear instruction:


8086 Architecture

STC CLC CMC STD CLD STI CLI

Set carry flag Clear carry flag Complement the status of carry flag Set direction flag Clear direction flag Set interrupt enable flag (enable INTR) Clear interrupt enable flag (disable INTR)

117

External hardware synchronization instructions: HLT WAIT LOCK Halt until interrupt or reset Wait until signal on the TEST pin is low An instruction prefix. Prevents another processor from taking the bus while the adjacent instruction executes
8086 Architecture

No operation instructions: NOP No action except fetch and decode

118

THE MOV INSTRUCTION

MOV transfer (copy) data referenced by the address of the second operand to the address of the first operand. The sending field is unchanged. The operands that reference memory or registers must agree in size. MOV destination, source

Destination Memory Accumulator Register Register Memory Register Memory Seg-reg Seg Seg-reg Seg Reg_16 Memory_16

Source accumulator
8086 Architecture

Memory Register Memory Register Immediate Immediate Reg_16 Memory_16 Seg_-reg Seg-reg

119

MOV SP, BX

Copy a word from the BX register to the SP register


8086 Architecture

MOV CL, [BX]

Copy a byte to CL from the memory location whose effective address is contained in BX. The effective address will be added to the data segment base in DS to produce the physical address.

MOV 43H[SI], DH

Copy a byte from the DH register to a memory location. The BIU will compute the effective address of the memory location by adding the indicated displacement of 43H to the contents of the SI register. The BIU then produces the actual physical address by adding this effective address to the data segment base represented by the 16 bit number in the DS register.

120

MOV CX, [434AH]

Copy the contents of two memory locations into the CX register. The direct address or displacement of the first memory location from the start of the data segment is 437AH. The BIU will produce the physical memory address by adding this displacement to the data segment base represented by the 16 bit number in the DS register.

8086 Architecture

MOV CS:[BX], DL

Copy a byte from the DL register to a memory location. The effective address for the memory location is contained in the BX register. Normally an effective address in BX will be added to the data segment base in DS to produce the physical memory address. In this instruction, the CS: in front of [BX] indicates that we want the BIU to add the effective address to the code segment base in CS to produce the physical address. This CS: is called a segment override prefix.

121

MOV AX, 0010H

Load the immediate word 0010H into the AX register.


8086 Architecture

MOV [0000], AL

Copy the contents of the AL register to a memory location. The direct address or displacement of the memory location from the start of the data segment is 0000H.

122

THE LEA, LDS, LES INSTRUCTION


useful for initializing a register with an offset address. A common use for LEA is to initialize an offset in BX, DI, or SI for indexing an address in memory.

8086 Architecture

DATATBL BYTEFLD

DB 25 DUP (?) DB ? LEA BX, DATATBL MOV BYTEFLD, [BX]

123

For the figure below, what is the result of executing the following instruction? LEA SI, [DI + BX + 2H] DS 0100 SI F002 DI 0020 AX 0003 BX 0040 before DS 0100 SI 0042 DI 0020 AX 0003 BX 0040 after

124

8086 Architecture

For these three instructions (LEA, LDS, LES) the effective address could be formed of all or any various combinations of the three elements:

8086 Architecture

What is the result of executing the following instruction? LDS SI, [DI + BX + 2H]

125

126

8086 Architecture

THE ADD INTRUCTION


Add a number from some source to a number from some destination and put the result in the specified destination. The source may be an immediate number, a register, or a memory location. The destination may be a register, or a memory location. The source and the destination in an instruction cannot both be memory locations. The source and the destination must be of the same type. Flags affected: AF, CF, OF, PF, SF, ZF.

127

8086 Architecture

EXAMPLES:
8086 Architecture

ADD AL, 74H ADC CL, BL ADD DX, BX ADD DX, [SI] ADD PRICES[BX], AL ADC AL, PRICES[BX] ADD AX, [SI + DI + 2H]

128

129

8086 Architecture

THE SUB INSTRUCTION


Subtract the number in the indicated source from the number in the indicated destination and put the result in the indicated destination. For subtraction, the carry flag (CF) functions as a borrow flags. The carry flag will be set after a subtraction if the number in the specified source is larger than the number in the specified destination. Source/destination same as addition. Flags affected: AF, CF, OF, PF, SF and ZF

130

8086 Architecture

EXAMPLES:

SUB CX, BX SBB CH, AL SUB AX, 3481H SBB BX, [3427H] SUB PRICES[BX], 04H ; subtract 04 from byte at effective address PRICE[BX] if PRICES declared with DB. Subtract 04 from word at effective address PRICES[BX} if PRICES declared with DW SBB CX, TABLE[BX] SBB TABLE[BX], CX

131

8086 Architecture

THE MUL INSTRUCTION


Multiplies an unsigned byte from some source times an unsigned byte in the AL register or an unsigned word from some source times an unsigned word in the AX register. The source can be a register or a memory location. When a byte is multiplied by the content of AL, the result is put in AX. A 16 bit destination is required because the result of multiplying an 8 bit number by an 8 bit number can be as large as 16 bit. The most significant byte of the result is put in AH, and the least significant byte of the result is put in AL.

132

8086 Architecture

When a word is multiplied by the contents of AX, the product can be as large as 32 bits. The most significant word of the result is put in DX register, and the least significant word of the result is put in the AX register.

8086 Architecture

EXAMPLES:

MUL BH MUL CX MUL CONVERSION[BX]


133

THE IMUL INSTRUCTION


Multiplies a signed byte from some source times a signed byte in AL or a signed word from some source times a signed word in AX. The source can be a register or a memory location. When a byte is multiplied by the content of AL, the result is put in AX. A 16 bit destination is required because the result of multiplying an 8 bit number by an 8 bit number can be as large as 16 bit. The most significant byte of the result is put in AH, and the least significant byte of the result is put in AL.

134

8086 Architecture

When a word is multiplied by the contents of AX, the product can be as large as 32 bits. The most significant word of the result is put in DX register, and the least significant word of the result is put in the AX register. If the magnitude of the product does not require all the bits of the destination, the unused bits will be filled with copies of the sign bit.

8086 Architecture

EXAMPLES:

IMUL BH IMUL AX

135

136

8086 Architecture