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Tech (Embedded Systems)MICROCONTROLLERS FOR EMBEDDED SYSTEM DESIGN Unit I: Introduction to Embedded Systems Overview of Embedded Systems, Processor Embedded into a system, Embedded Hardware Units and Devicesin system, Embedded Software, Complex System Design, Design Process in Embedded System, Formalizationof System Design, Classification of Embedded Systems. Unit II: Microcontrollers and Processor Architecture & Interfacing 8051 Architecture, Input/Output Ports and Circuits, External Memory, Counters and Timers, PIC Controllers.Interfacing Processor (8051, PIC), Memory Interfacing, I/O Devices, Memory Controller and Memoryarbitration Schemes. Unit III: Embedded RISC Processors & Embedded System-on Chip Processor PSOC (Programmable System-on-Chip) architectures, Continuous Timer blocks, Switched Capacitor blocks,I/O blocks, Digital blocks, Programming of PSOC, Embedded RISC Processor architecture ARM Processor architecture, Register Set, Modes of operation and overview of Instructions Unit IV: Interrupts & Device Drivers Exceptions and Interrupt handling Schemes Context & Periods for Context Switching, Deadline & interruptlatency. Device driver using Interrupt Service Routine, Serial port Device Driver, Device drivers for InternalProgrammable timing devices Unit V: Network Protocols Serial communication protocols, Ethernet Protocol, SDMA, Channel & IDMA, External Bus Interface TEXT BOOKS: 1.Embedded Systems - Architecture Programming and Design Raj Kamal, 2 nd ed., 2008,TMH.2.PIC Microcontroller and Embedded Systems Muhammad Ali Mazidi, Rolin D.Mckinaly, Danny Causy PE.3.Designers Guide to the Cypress PSOC Robert Ashpy, 2005, Elsevier. REFERENCES: 1.Embedded Microcomputer Systems, Real Time Interfacing Jonathan W. Valvano Brookes / Cole,1999, Thomas Learning.2.ARM Systems Developers Guides- Design & Optimizing System Software - Andrew N. Sloss, DominicSymes, Chris Wright, 2004, Elsevier.3.Designing with PIC Microcontrollers- John B. Peatman, 1998,
semaphores. messagequeues. File I/O. Overview of Commands. Hard Vs Soft real-time systems. write). Inter-process communication .( open. ProcessControl ( fork. create. Offline Vs Online Scheduling. wait. Signals. Tasks and Threads. exec). fifos.Multiple Process in anApplication. Weighted Round Robin. functional parameters.Dynamic Vs State Systems. shared memory) Unit II: Real Time Systems: Typical real time applications. Periodic task model precedenceconstraints and data dependency. M. vfork. Resource Parameters of jobs and parameters of resources. lseek.I Year I Sem. Temporal Parameters of real Time Work load. close. Effective release time and Dead lines. Interprocess communication. exit. Problem of Sharing data by multiple tasks & routines.( pipes. read.Tech (Embedded Systems)EMBEDDED REAL TIME OPERATING SYSTEMS Unit I: Introduction Introduction to UNIX. A reference model of Real Time Systems:Processors and Resources. Unit III: Scheduling & Inter-process Communication Commonly used Approaches to Real Time Scheduling Clock Driven. Priority Driven. waitpid.Inter-process Communication and Synchronization of Processes.
RT & Embedded Systems OS. I/O Subsystems.Advanced UNIX Programming. 2 nd ed. TEXT BOOKS: 1. case study of sending application Layer byte Streams on a TCP/IP network.Unit IV: Real Time Operating Systems & Programming Tools Operating Systems Services. Scheduling context switches-semaphore. TMH REFERENCES: 1.. Liu.Real Time Systems. Use of µ COS-II Unit V: VX Works & Case Studies Memory managements task state transition diagram.2.Jane W.Binary mutex. KANG G. Case Study of anEmbedded System for a smart card. Shin. I/O systemCase Studies of programming with RTOS. pre-emptive priority.VX Works Programmers Guide . Interrupt Routine in RTOSEnvironmentMicro C/OS-II.Embedded Systems. 2008. S.Case Study of Automatic Chocolate Vending m/c using µ COSRTOS.Architecture. 1996.PHI. Programming and Design by Rajkamal.TMH. Richard Stevens2.C.Need of a well Tested & Debugged RTOs. counting watch dugs.Real Time Systems.3.Krishna.M.
MOS Transistor circuit model.G m .Tech (Embedded Systems)VLSI TECHNOLOGY & DESIGN UNIT I: Review of Microelectronics and Introduction to MOS Technologies: MOS. CMOS. BiCMOS Technology. CMOS & Bi CMOS Inverters. CMOS & BiCMOS Circuits: I ds -V ds relationships.Latchup in CMOS circuit . M.Trends And Projections.I Year I Sem.Basic Electrical Properties of MOS. Zpu/Zpd. Pass Transistor. MOS. Threshold Voltage V t .G ds and o .
Principals of CMOS VLSI Design N. LayoutDesign tools.Wayne Wolf. Network delay. Power optimization. 3rd ed.E Weste. Design. UNIT V: FLOOR PLANNING & ARCHITECTURE DESIGN: Floor planning methods. 1997. Switch logic networks. Adisson We .Pucknell. SOCs and Embedded CPUs. REFERENCES: 1. Scalable Design rules..H. UNIT III: COMBINATIONAL LOGIC NETWORKS: Layouts.Essentials of VLSI Circuits and Systems. Simulation. Clocking disciplines. 2 nd ed.Modern VLSI Design . K.. 2005. Resistive and Inductive interconnect delays. PHI. A. TEXT BOOKS: 1. Architecture testing.2. Highlevel synthesis. Architecture for low power. UNIT IV: SEQUENTIAL SYSTEMS: Memory cells and Arrays. Low power gates. K. D.Eshraghian. Eshraghian Eshraghian. Switch Logic.Design validation and testing. LOGIC GATES & LAYOUTS: Static Complementary Gates. Power optimization. Wires and Vias. Interconnect design. Pearson Education.UNIT II: LAYOUT DESIGN AND TOOLS: Transistor structures. off-chip connections. Gate and Network testing. Alternative Gate circuits.
Integrated andDifferential Services. and Fair (BRED. Flow Characterization. Resource Allocation. Virtual Private Network (VPN): . Resource Reservation and Admission Control Scheduling. thePhysical Layer. M. The First-Generation Cellular Systems. Wireless in Local Loop.16 Standard. Traffic Shaping. Congestion Control. Flow Classes.Tech (Embedded Systems)ADVANCED COMPUTER NETWORKS Unit -I: Congestion and Quality of Service (QoS) Data traffic.Based Wireless Networks: Cellular Systems Fundamentals.Fundamental Rate Limits.Generation Cellular Systems. ChannelReuse. Wireless LAN Topologies. Open loop and Closed Loop Congestion Control in TCP andFrame Relay. Cellular Architecture. Dynamic Resource Allocation. Latest Developments. Unit-II:Wireless Local Area Networks: Introduction.Scheduling. The Third. Wireless ATM.Commercial Alternatives. Congestion. IEEE 802. Choke) Queue Management Schemes. Need For QoS.Bluetooth. Quality of Service. Techniques to Improve QoS. Wireless Wide Area Networks and MANS: The Cellular Concept. Wireless Personal Area Networks (WPANs): Introduction to PAN Technology and Applications. Interference Reduction Techniques. SIR and User Capacity.I Year I Sem. Queue Management: Passive. Wireless LAN Requirements. Active (RED). the Medium Access Control (MAC) Layer. Home RF. The SecondGeneration Cellular Systems. Unit-III:Cellular Systems and Infrastructure.Best Effort Service Features.
I. SONET Layers. S. SONET/SDH: SONET/SDH Architecture. Nicopolitidis. Transmission Convergence (TC) Sub-layer. 2004. VPN Security Issues.3.M.O.JohnWiley & Sons3. G. PHI2.Introduction to Broadband Communication Systems. Benes Networks. M. Wiley-Intersci .4.S. FactorsAffecting QoS Parameters. TEXT BOOKS: 1.. ATM Adaptation Layer 5 (AAL5). SONET Frames. 2 nd updating. Cambridge University Press.Types of VPN. ATM Service Parameters. Akujuobi. Cajetan. Bit-Allocation Algorithm.Sadiku. STS Multiplexing.TMH REFERENCES: 1. A. Papadimitriou. VPN General Architecture. Looping Algorithm. ATM Adaptation Layer 3/4 (AAL3/4).B.Wireless Communications .ATM Adaptation Layer 2 (AAL2). PHI.Ad Hoc Wireless Networks: Architectures and Protocols . Physical Layer Standards for ATM.Telecommunication System Engineering Roger L. 2003. Crossbar Switch. ATM Adaptation Layer: Service Classes and ATM Adaptation Layer.P. ATM Layer: ATM Cell Header Structure at UNI. Unit-V:Interconnection Networks: Introduction. Obaidat.High Performance TCP / IP Networking Mahaboob Hassan. SONET Networks. Current VPN Advantages andDisadvantages. S.C. ATM Adaptation Layer 1 (AAL1). 2004. Jain Raj. ATM Layer Functions. ATM Cell Header Structure at NNI. Rearrangeable Networks. 4/ed.Wireless Networks. Three Stage Class Networks. 2005. Pomportsis. Folding Algorithm. Banyan Networks..Manoj. ATM Traffic and Service Parameterization: ATM Traffic Parameters. Siva Ram Murthy and B. Freeman.Data Communication and Networking . A.Forouzan. Mathew N.Andrea Goldsmith. PhysicalMedium Dependent (PMD) Sublayer. QoS and QoS Classes.PHI. Unit-IV:ATM Protocol Reference Model: Introduction.Properties. VPN Standards.2. ATM Service Categories.
IOProcessor. microprogramming.addressing modes. segmentation. Horizontal and vertical instruction format. cache memory. RISC and CISC instruction set. IO addressing. magnetic disk organization. UNIT IV ILP software approach-complier techniques-static branch protection-VLIW approach-H. UNIT III IO Devices.W support for more ILP at compile time-H. microinstructionsequencing and control. laser printer. partitioning. M. UNIT II Memory devices.Tech (Embedded Systems)ADVANCED COMPUTER ARCHITECTURE(ELECTIVE I) UNIT I Concept of instruction format and instruction set of a computer. DOT matrix printer. Semiconductor and ferrite core memory. introduction to magnetic tape andCDROM. DMA IO modules. problems in parallel processing. Programmed IO. control hazard. datahazard. parallel processing.I Year I Sem. interrupt driver IO. . basic details of Pentium processor and power PC processor. processor organization. memory organization and mapping. main memory. associativememory organization.W verses S. IO channel. concept of virtual memory.W solutionsMultiprocessors and thread level parallelism-symmetric shared memory architectures-distributedshared memory-Synchronizationmulti threading. instruction pipeline. instructioncycle. register organization and stack organization.demand paging. ink jet printer. types of operands and operations.Advanced concepts.
Hayes. 4.UNIT V Storage System-Types-Buses-RAID-errors and failures-bench marking a storage device designing aI/O system. Carl Hamachar. TMH III Edition. Zvonko Vranesic and Safwat Zaky. Terence Fountain.Patteson Morgan Kufmann (An Imprint of Elsevier) Reference Books: 1. Dezso Sima. Computer Architecture A quantitative approach 3 rd edition John L. McGrawHill International Edition.Computer Architecture & Organization. Hannessy & David A. 1998. Pea . Computer organization and architecture . Computer Architecture and parallel Processing Kai Hwang and A.Computer organization. Peter Kacsuk. Williams Stallings.Advanced Computer Architecture.2. John P. PHI of India.Inter connection networks and clusters-interconnection network media practical issues ininterconnecting networks-examples-clusters-designing a cluster Text Books: 1. 3. Briggs Internationaledition McGraw-Hill.2.
I Year I Sem.Tech (Embedded Systems)WIRELESS LANS AND PANS (ELECTIVE I)UNIT 1: Overview of Wireless Communication . M.
WLAN Security. ClientSoftware. MAC protocols. deployment considerations. Wireless Vision. Prashant Krishnamurthy.Based Fixed Broadband Wireless. Low rate WPAN Security.11a and IEEE 802. Energy Constrained Networks. Multicasting.Wireless Networks Application. Satellite Broadband Wireless. Wireless Wide Area Networks: Cellular Telephone Applications.16 (WiMAX).15. High rateWPANs. 2007. RFWPANs.Wireless Communication.Wireless Communication. Design Principles and Challenges. Cross Layer Design. TheWireless Spectrum. Transport layer Protocols. Unit 3: High-speed Wireless LANs and WLAN Security IEEE 802. Technical Issues. WLAN Components. Jeorge Olenewa. Unit 2: Introduction to Wireless LANS Historical Overview of LAN Industry. Wireless Home Networking.Andrea Goldsmith.Wireless NetworksKaveh Pahlaram.Routing. Cellular and Adhoc wireless networks. Surrent Wireless Systems.Adhoc wireless Internet. WLAN Standards and operation.3. Digital Cellular Challenges and Outlook. TEXT BOOKS: 1.3. Unit 4: Low Rate Wireless Personal Area Networks Infrared WPANs. 2002 . WMAN Security. Cambridge University Press. quality of service browsining.11b and other WLAN Standards. 802.WLAN Application. IEEE802. Evolution of The WLAN Industry. Ultra Wideband. WPAN Challenges. Network CapacityLimits. Land.2. Cengage Learning. High rate WPAN Standards. Wireless Metropolitan Area Networks: What is WMAN?. Protocol Layers.History of wireless communication. Unit 5: Ad-Hoc.Marks Ciampor. WLAN Modes. Digital Cellular Technology. applications.
FIR Filters. Welch & Blackman & Tukey methods.Yule-Waker & Burg Methods. MA & ARMA models for power spectrum estimation. Filter design & Implementation for sampling rate conversion. M. Non-parametric Methods: Bartlett. Interpolation by a factor I. Relation betweenauto correlation & model parameters.I Year I Sem. Comparisonof all Non-Parametric methods UNIT IIIParametric Methods of Power Spectrum Estimation: Autocorrelation & Its Properties.Tech (Embedded Systems)ADVANCED DIGITAL SIGNAL PROCESSING (ELECTIVE I)UNIT I Review of DFT. AR Models . Samplingrate conversion by a rational factor I/D. Decimation by a factor D. IIR Filters. Multistage Implementation of Sampling Rate Conversion. Applications of Multirate Signal Processing UNIT IINon-Parametric methods of Power Spectral Estimation: Estimation of spectra from finite durationobservation of signals. Multirate Signal Processing: Introduction. FFT. UNIT IVLinear Prediction .
4 th ed. A.2. Barrie. Pearson Education.Ifeacher. Solution of the Normal Equations: Levinson Durbin Algorithm.G. TEXTBOOKS: 1. PHI. 1988.2.P. 2000.Salivahanan. Jervis. Properties of Linear Prediction Filters UNIT VFinite Word Length Effects : Analysis of finite word length effects in Fixed-point DSP systems Fixed. REFERENCES: 1..Vallavaraj.Alan V Oppenheim & Ronald W Schaffer. PHI.Gnanapriya. Backward Linear Prediction.G. Digital Signal Processing S.: Forward and Backward Linear Prediction Forward Linear Prediction.Vaidyanathan Pearson Education3..J.Floating Point Arithmetic ADC quantization noise & signal quality Finite word length effect in IIR digitalFilters Finite word-length effects in FFT algorithms .DSP A Pratical Approach Emmanuel C.PHI.Manolokis. Algorithms & Applications .Digital Signal Processing: Principles.Discrete Time signal processing . C.TM . 2 ed.Kay. M .Proakis & D.3.Multirate Systems and Filter Banks P. W. Schur Algorithm. Optimum reflection coefficients for the Lattice Forward and Backward Predictors.Modern spectral Estimation : Theory & Application S.
.Switching and Finite Automata Theory Z.Fundamental mode model Flow table State reduction Minimal closed covers Races. Transitioncount testing. Transition Check Approach . Signature analysis and test bridging faults. Biswas.Digital Systems Testing and Testable Design Miron Abramovici.State transition table. Unit-IV: PLA Minimization and Testing PLA Minimization PLA folding.Problem of Initial state assignment for One Hotencoding .2.Friedman. 5 th ed. Unit-II: Fault Modeling & Test Pattern Generation Logic Fault model Fault detection & Redundancy.Fundamentals of Logic Design Charles H.State identification and fault detection experiment.Logic Design Theory N. Melvin A. Kohavi .State assignment for FPGA s .3.I Year I Sem.Machine identification.Tech (Embedded Systems)DIGITAL SYSTEM DESIGN (ELECTIVE II)Unit-I: Designing with Programmable Logic Devices Designing with Read only memories Programmable Logic Arrays Programmable Array logic SequentialProgrammable Logic Devices Design with FPGA s Using a One-hot state assignment. PHI REFERENCES: 1. Breuer and Arthur D. Unit-III: Fault Diagnosis in Sequential Circuits Circuit Test Approach. Cycles andHazards.State Machine charts Derivation of SM Charts Realization of SM charts Design Examples Serial adder with Accumulator .John Wiley & Sons Inc. Fault model in PLA. PODEM.Fault equivalence and fault location Fault dominance Single stuck at fault model Multiple stuck at fault models Bridging fault modelFault diagnosis of combinational circuits by conventional methods Path sensitization techniques. Unit-V: Minimization and Transformation of Sequential Machines The Finite state Model Capabilities and limitations of FSM State equivalence and machine minimization Simplification of incompletely specified machines. 2 nd . M. N. BooleanDifference method Kohavi algorithm Test algorithms D algorithm. Random testing. Test generation and Testable PLA Design.Binary Multiplier Signed Binary number multiplier (2 s Complementmultiplier) Binary Divider Control logic for Sequence detector Realization with Multiplexer PLA PAL. Design of fault detection experiment. Roth. TEXT BOOKS: 1. Cengage Learning.
Training Errors. McCulloch-Pitts Neuron Model. Winner Take-All Learning Rule. Features and Decision Regions. Discriminant Functions. Neuron Modeling for Artificial Neuron Models.Summary of Learning Rules. Learning Factors. Single Layer Continuous Perceptron Networks for Linearly SeparableClassifications. Multicategory Single Layer Perceptron Networks. 4 th Edition.3. Network architecture Versus Data Representation.ed. UNIT II Single Layer Feed Forward Networks Classification Model. Supervised and Unsupervised Learning Neural Network Learning rules: Hebbian Learning Rule. Linear Machine and MinimumDistance Classification. Models of Artificial Neural Networks. Feed Forward Network and Feed Backward Network. M. Initial weights Cumulative Weight Adjustment versusIncremental Updating. Delta Learning Rule for Multiperception layer. PHI. Steepness of activation function. 2001.Digital Design Morris Mano. Lee . learning constant. Perception Learning Rule. GeneralizedDelta Learning Rule. momentum method.Ciletti. UNIT III Multilayer Feed Forward Networks Linearly Nonseparable Pattern Classification. PH I Year I Sem. Out Star Learning Rule.Digital Circuits and Logic Design Samuel C.Tech (Embedded Systems)NEURAL NETWORKS AND APPLICATIONS (ELECTIVE II)UNIT I Fundamental Concepts. M. Feed Forward Recall and Error Back Propagation Training. Nonparametric Training Concept. Necessary . Models & Learning Rules of Artificial Neural Systems Biological Neuron Models and their Artificial Models Biological Neuron. Delta Learning RuleWidrow-Hoff Rule. Perceptron Convergence Theorem.D. Examples of Error Back-Propagation. Neural Processing. TMH2.. Correlation Learning Rule. Training and Classification using the DiscretePerceptron: Algorithm and Examples.
REFERENCES: 1. Yagananarayana.Basic concepts of Dynamical systems.4. Chelkuri K.N. Sanjay Ranka.M.TMH. Deepa. Sumati. initialization of weights. Mathematical Foundation of Gradient-Type Hopfield Networks.Dr. Shivanandam. 1999. Application of Back propagation Networks in pattern recognition & Image processing UNIT IV Associative Memories Basic concepts Linear associator . PenramInternational2. TEXT BOOKS: 1.Fundamental of Neural Networks Laurene F . N.Introduction to Artificial Neural Systems .Kishan Mehrotra. New Delhi. Example Solution of Optimization Problems.1/e. Clustering and similarity measures Winner take all learning . PHI.Associative Memory of Spatio-temporal Patterns UNIT V Matching And Self-Organizing Networks Hamming net and MAXNET Unsupervised learning of clusters. Mohan. 2 nd ed. Summing networkswith digital outputs. S. New Delhi. Multidirectional Associative Memory. S.number of Hidden Neurons. Counter propagationnetworks.J. feature mapping: Self organizing feature maps.Bidirectional Associative Memory. Solving Simultaneous Linear Equations.Introduction Neural Networks Using MATLAB 6. Artificial Neural Network Simon Haykin. B. separability limitations. Cluster discovery networks (ART1).Zurada. Mathematical Foundation of Discrete-Time Hop field Networks.S. Elements of Artificial Neural Networks .Artificial Neural Networks .recall mode. Transientresponse of Continuous Time Networks.. Minimization of the Traveling salesman tour length. Jaico Publishers2. Boltzman machines. Pearson Education3.0 .
Client . output. Input / Output. Evaluation of operating System Unit II:Introduction to UNIX and LINUX: B asic commands & command arguments.Server model. Memory hierarchy. Communication in Distributed systems : Layered protocols. Name Spaces. pipes. Inter process Communication: Introduction. Interrupts. filters and editors. Process creation & termination. Designissues. Unit IV:Introduction to Distributed systems: Goals of distributed system. . Remote procedure call and Group communication. Semaphores. file and record locking. Hardware and software concepts. Shared Memory. I/O Communication techniques. Sockets& TLI.I Year I Sem. Instruction execution. Client Server example. Standard input. M. I/Ofunction. Operating system objectives andfunctions. Systems V IPC. Input /output redirection.Streams & Messages. FIFOs. ATM networks. Message queues. Shells and operations Unit III:System Calls: System calls and related file structures.Tech (Embedded Systems)ADVANCED OPERATING SYSTEMS (ELECTIVE II) Unit I:Introduction to Operating Systems: Overview of computer system hardware.
.1998.. Andrew S Tanenbaum 3 rd ed. Ring algorithm.The UNIX Programming Environment Kernighan & Pike. Galvin. 6 th ed.Bully algorithm. Modern Operating Systems. S.1986.Stallings.The Complete reference LINUX Richard Peterson. PHI. PHI.3.UNIX User Guide Ritchie & Yates.Unit V:Synchronization in Distributed systems : Clock synchronization. Peter B.2. E-tech algorithms. PE. . McGraw Hill..3.Andrew. Tanenbaum. REFERENCES: 1.2. 4 th ed. Greg Gagne.Operating Systems : Internal and Design Principles . PE.5.Operating System Principles. TEXT BOOKS: 1...Bach. 7 th ed.Distributed Operating System . Distributed dead lock prevention and distributed deadlock detection. PE. Atomic transactions Deadlocks: Dead lock in distributed systems. Mutual exclusion.W. PHI.Abraham Silberchatz.UNIX Network Programming . 1994. John Wiley4.Richard Stevens .6.The design of the UNIX Operating Systems Maurice J.
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