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OPEN-LOOP OP-AMP CONFIGURATIONS

The term open-loop indicates that no feedback is fed to the input from output. The op-amp functions as a very high gain amplifier. There are three open-loop configurations of op-amp, namely, i) Differential amplifier ii) Inverting amplifier and iii) Noninverting amplifier

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41

ECE204 Analog Circuit Design

Open-loop Differential Amplifier

The input voltages are represented by v small

i1

and v

i2

.

R and R

i1

V

o

(

= A V

i1

V

i2

)

where A is large-signal voltage gain.

i2

are negligibly

R and R i 1 V o ( = A V i 1 − V i

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42

ECE204 Analog Circuit Design

ECE204 Analog Circuit Design Inverting Amplifier The output voltage is 180 output voltage V is given

Inverting Amplifier

The output voltage is 180 output voltage V is given by

ο

out-of-phase with respect to the input and hence, the

o

V

o

= −AV

i

The input is amplified by open-loop

.

gain A and is phase-shifted by 180

ο

Noninverting Amplifier

V = AV

o

i

The input signal is amplified by A and the output is in-phase with input

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ECE204 Analog Circuit Design

Limitations of Open-loop Op-amp Configurations

In all the above open-loop configurations, only very small values of input voltages can be applied. Or, clipping of the output waveform can occur When operated so, the output is either in negative or positive saturation. This prevents the use of open-loop configurations of op-amps in linear applications. The open-loop gain is not constant - it varies with changing temperature and variations in power supply.

CLOSED-LOOP OP-AMP CONFIGURATIONS

The op-amp can be effectively utilized in linear applications by providing a feedback, either directly or through another network.

If the signal fed-back is out-of-phase by

or degenerative feedback. If feedback is in-phase, then it is positive or regenerative feedback

An op-amp with feedback is a closed-loop amplifier

180

ο , then the feedback is negative

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44

ECE204 Analog Circuit Design

The most commonly used configurations are Inverting amplifier (voltage-shunt feedback) and Noninverting amplifier (voltage-series feedback).

Inverting Amplifier

Input signal drives the inverting input

through

R

1

Because of the phase inversion, the

out-of-phase

output signal is

with the input signal

180

ο

This means that the feedback signal opposes the input signal and the feedback is negative or

degenerative

that the feedback signal opposes the input signal and the feedback is negative or degenerative Copyright

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45

ECE204 Analog Circuit Design

Virtual ground

A virtual ground is a ground which acts like a ground. It may not have physical connection to ground. This property indicates that the inverting and noninverting terminals of the op-amp are at the same potential.

The open-loop gain of an op-amp is extremely high, typically 200,000 for a 741.

is

For example, when the output voltage is 10V, the input differential voltage V given by

id

V

id

=

V

o

10

=

A

200,000

= 0.05 mV

Furthermore, the open-loop input impedance of a 741 is around 2 MΩ.

Therefore, for an input differential voltage of 0.05mV, the input current is only

I

i

=

V id

0.05 mV

=

R i 2 M Ω

= 0.25 nA

Since the input current is so small, this can be approximated as zero. Hence, the inverting input of Fig. 3.35(a) acts as a virtual ground.

46

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ECE204 Analog Circuit Design

Practical considerations

i) Setting the input impedance

R 1 to be too high will pose problems with the

bias current, and it is usually restricted to 10k.

ii)The gain can not be set very high due to the upper limit set by the gain-

bandwidth (GBW

= A × f ) product. A

v

v is normally below 100.

iii) The peak output of the op-amp is about 2V less than supply

iv) Heavy output current may damage the op-amp

Noninverting Amplifier

The feedback is negative or degenerative

R 1 × V

V

i

=

o

R

1 + R

f

V

o

R

1

+

R

f

R

f

=

1

=+ .

 

V

i

R

1

R

1

Hence, the voltage gain is

V

o

R

f

A v = =+

V

i

1

R

1

=+ .   V i R 1 R 1 Hence, the voltage gain is V o

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ECE204 Analog Circuit Design

Example For the non-inverting amplifier of Fig. R = 1kΩ

Calculate the closed-loop voltage gain of the amplifier and feedback factor β .

and R

f

1

=

10

kΩ

Solution

A v =

1

+

R

f

R

1

The closed-loop voltage gain

= +

1

10 k Ω

1 k Ω

= 11

The feedback factor β

=

R 1 1 k Ω

=

R

1

+

R

f

1

k

Ω+ 10 Ω

k

=

0.091

.

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ECE204 Analog Circuit Design

DIFFERENTIAL AMPLIFIER

Let R

Using the superposition principle,

If

If

1

=

R

2

=

R

3

=

R

f

=

R

V

i

V

i

1

2

=

=

0

0

, V =−V

o2

i2

,

V

o

1

[

= V

i

1

/ 2

](

1

+ R

/

)

R =V

i

1

If both inputs are applied,

V

o

=

V

o

=V

o1

+V

o2

=V V

i1

i2

If R

1

+

f

R

f

( R

1

R

R

3

2

R

3

V i 1

) ,

R

f

R

R + R

3

2

 

R

V

i

2

⎠ ⎜ ⎝ R + R ⎠ 3 2   R V i 2 General Descriptio

General Description of Op-amp 741

i) μA741 is an internally frequency-compensated op-amp

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ECE204 Analog Circuit Design

ii)

It is a monolithic IC, fabricated using planar epitaxial process

iii)

It has internal short-circuit protection

iv)

It has externally connected offset null capability

v)

It has large common-mode and differential voltage ranges

vi)

It is useful in many applications such as integrator, differentiator, adder, subtractor, voltage follower or buffer and other feedback applications

vii)

It consumes low power

viii)

It suffers from no latch-up

ix)

It is available in all the three types of packages, namely, 8-pin metal Can, 10-pin Flatpack and 8 or 14-pin dual-in-line package or DIP

x)

For 741C, two sets of electrical specifications are provided, where the first set is meant for operating characteristics at room temperature (25°C) and the other set applies to the commercial temperature range (0° to + 70°C)

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50

ECE204 Analog Circuit Design

UNIT II APPLICATIONS OF OPERATIONAL AMPLIFIERS

SIGN CHANGER (PHASE INVERTER)

Input impedance

The impedances

Closed-loop voltage gain is -1 & 180° phase shift at output – thus a phase inverter If two are connected in cascade, then the output from the second stage is in phase with, or the same as the input signal without any sign change

The outputs from the two stages are equal in magnitude but opposite in phase

Such a system is an excellent paraphase amplifier.

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Z

1

and feedback impedance

Z and

1

Z

f

Z

f

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are equal in magnitude and phase

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Inverting op-amp with voltage shunt feedback

f Z f Dr VSKB are equal in magnit ude and phase Dr VSKB Inverting op-amp

1

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ECE204 Analog Circuit Design

SCALE CHANGER

If the ratio Z

The input voltage is multiplied by a factor –k The scaled output is available at the output

PHASE SHIFT CIRCUITS The phase shift circuits produce phase shifts that depend on the frequency and maintain a constant gain Also called constant-delay filters or all-pass filters

f

/ Z

1

= k

is a real constant, then the closed-loop gain is –k

Z

f

and

Z

1 are precision resistors to obtain scaled value of input voltage

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That is, the time difference between input and output remains constant when frequency is changed over a range of operating frequencies

A constant gain is maintained for all the frequencies within the operating range - thus,

called all-pass The two types - lagging phase angles and leading phase angles

If

f (equal in magnitude and differ in angle), then the op-amp shifts the phase

of the sine input voltage

Any phase shift between -180 o and +180 o can be obtained by varying Z

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Z

1

=

Z

1

and

Z

f

.

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ECE204 Analog Circuit Design

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ECE204 Analog Circuit Design Dr VSKB Phase-Lag Circuit Assumed the Inverting input app lied at (-)

Phase-Lag Circuit

Assumed the

Inverting input applied at (-) terminal Non-inverting amplifier with a low-pass filter Inverting input gain is -1

Non-inverting gain is 1

v i drives the inverting amplifier

+

R f

R

1

= +

1

1

=

2

,

since

For the circuit shown in Fig, it can be written as

V

R

f =

R

1

.

Dr VSKB

1

1 + j

RC

ω

V

i

o

(

j

)

ω

=− V + 2

i

⎛ 1 ⎞ ⎛ 1 − j ω RC ⎞ V ( j ω )
1
⎛ 1 −
j
ω
RC
V
(
j
ω
)
=
V
− 1 + 2
⎟= ⎠ ⎜
V
o
i
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i
1 +
j
ω
RC
1 +
j
ω
⎜ ⎝
RC
The relationship between output and input is
V
(
j
ω
)
j
ω
RC
o
= ⎛ ⎜ 1 −
V i j
(
ω
)
1 +
j
ω
RC

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ECE204 Analog Circuit Design

The phase angle θ =−

When ω =0, θ = zero and when ω =, θ = -180°

tan

1

(ωRC)

tan

1

(ωRC)

=−

2 tan

1

(ωRC)

θ = −

2 tan

1

(

f / f

o

)

where

f o

=

1

2π RC

Example 4.1 Find the phase angle and the time delay for the circuit shown in Fig. (a)

for a frequency of 2kHz, assuming

R

1

=

20k

Ω

, R

=

39k

Ω

, R

R

1

and C=1nF.

Dr VSKB

f

=

Solution

The circuit is a phase-lag network.

Therefore,

f o

=

1

2

RC

π

=

 

1

Dr VSKB

 

[

2

×

π

×

39

×

10

3

1

××

10

9

]

= 4081 Hz .

The phase angle of 2kHz frequency is

θ =− 2 tan

1

2

×

10

4081

3

⎟=− ⎞ 52.2 .

°

Phase angle is directly proportional to delay, and 360° of delay pertains to one period.

Therefore,

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θ t d

360°

T

=

=

1

θ

=

1

52.2

f 360 °

 

2

×

10

3

360

°

which gives

t d

= 72.5

μ

s

.

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ECE204 Analog Circuit Design

Phase-Lead Circuit

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ECE204 Analog Circuit Design Phase-Lead Circuit Dr VSKB Dr VSKB The RC circuit forms a high-pass
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Dr VSKB

The RC circuit forms a high-pass network.

The output voltage V

o

()

j

ω

=−

V

i

()

j

ω

+ 2

Therefore,

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V

o

(

j

ω

)

=

1 + j

ω

RC

V

i

(

j

ω

)

1 + j

RC

ω

j 1 + j

ω

RC

RC

ω

θ

=

180

° −

tan

1

(ωRC)

tan

1

(ωRC)

=

180

V

i

° −

( ω)

j

2 tan

1

(ωRC)

(4.7)

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ECE204 Analog Circuit Design

When the frequency = zero, the phase angle = 180°. As the frequency is increased, the leading phase decreases and it finally approaches zero at high frequencies.

θ

=

180

° −

2 tan

1

(

f / f

o

)

VOLTAGE FOLLOWER

where

f o

=

1

2π RC

.

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If

unity-gain amplifier or voltage follower.

That is,

R

1

= ∞

and

R

f

= 0

in the noninverting amplifier, then the amplifier acts as an

R

f

R

1

= A

v

= 1 .

1

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+

R

f

1

A v =

1

or

R

R f

Since

R

In other words,

= 0, we have A

v

1 Dr VSKB

V

o

= V or, the circuit is called voltage follower.

i

Offers very high input impedance of order of MΩ and very low output impedance. Therefore, used for impedance matching applications.

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ECE204 Analog Circuit Design

VOLTAGE TO CURRENT CONVERTER (TRANSCONDUCTANCE AMPLIFIER)

An ideal V to I source (VCCS) gives

a current

an independent, controlling voltage

i.e.,

Two circuits:

L

V

i

. Dr VSKB Dr VSKB
.
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=

V

i

/ R

1

;

V . Applying KVL at node a, and

a

I

L

that is a constant k times

I

L

= kV

i

(i)

(ii)

V-to-I with floating load V-to-I with grounded load

Z

L

I

B

Z

f

= 0

L

,

,

V

i

=

I

L

V

i

R

1

.

.

i.e.

(i) Load

The voltage at node a is

Thus, as

(ii) Load

with R = R

is floating.

I

is grounded. The voltage at node a is

I

V

1

i

V

a

+ I

+

2

= I

2

+

L

a

V

o

;

V

V

o

=

(V

i

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(

V V

i

a

)

/ R +

=

I

L

R

I R)/ 2

L

(

V

o

V

a

)

/ R = I

L

;

The gain of this NI op-amp circuit is 1 + R/R = 2.

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ECE204 Analog Circuit Design

V

o

= 2

V

a

=

V

i

+

V

o

I

L

R

Or

V

I

i

L

=

=

I

V

L

i

R

/

R

Hence, it is a voltage to current transducer

Or

I

L

1

g

m

=

=

V

i

R

The circuits are called VCCS since

where g

I

L

=

V i = V g

R

1

i

m

m is the transconductance in Siemens.

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ECE204 Analog Circuit Design

I-TO-V CONVERTER (CURRENT-CONTROLLED VOLTAGE SOURCES) A current to voltage converter is an ideal current-controlled voltage source Also called transresistance amplifier

Output voltage is a constant k times an independent

Due to the virtual ground

The current through

Thus

I

i

or V

o

= kI

i

V

a

=

0 ,

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R 1 is zero

I i flows through resistor R

C

f

V

o

= −I R

i

f

.

connected across R

f

f .

reduces the

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high frequency possible oscillations

Noninverting I to V converter circuit

I i has a return path to ground

Voltage at noninverting input is

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R

f

V

i

1

I R

i

= I R .

i

i

=

1

+

R

f

Then

V

o

V = 1 +

i

R

1

R

1

1 I R i = I R . i i = ⎛ ⎜ ⎝ 1 +

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9

ECE204 Analog Circuit Design

ADDER OR SUMMING AMPLIFIER

The adder is called summing amplifier. Since a virtual ground exists at node a, V
The adder is called summing amplifier.
Since a virtual ground exists at node a,
V
V
V
1
2
n
I
=
+
+
+
R
R
R
1
2
n
R
R
R
Dr VSKB
f
f
f
V
=−
R
I
=−
V
+
V
+ + V
o
f
1
2
n
R
R
R
1
2
n
If
R
=
R
=
=
R
=
R
,
then
1
2
n
R
f
V
=−
(
V
+
V
+
+
V
)
o
1
2
n
R
Dr VSKB

Or

V

o

= V A

1

V

1

+ V A

2

V

2

+ V A

3

V

3

+

+ V A

n

Vn

where

A

v1

, A

v2

A

vn

are individual gains.

A level-shifter circuit can be realized by use of a two-input summing circuit

One input can be the ac signal, and the second input can be the dc value

The dc value acts as the offset for the ac signal.

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10

ECE204 Analog Circuit Design

SUBTRACTOR

[

V

2

V

1

1

/ 2

=

2

](

1

V

+

2

V

o

=

=

R

f

)

=

V

2

, then

V

o

2

+

V

o

1

=

=

R .

V

1

V

2

=

0 , Dr VSKB V 1
0
,
Dr VSKB
V
1

Assume R

By superposition principle, if

V

R

R

3

o 2

=

R / R

=

0

Similarly, if

V

o

1

=−

Considering both inputs applied,

Thus, the output voltage is proportional to the difference between the two input

voltages. Hence, it acts as a difference amplifier with unity gain.

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=

ADDER-SUBTRACTOR … ?

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ECE204 Analog Circuit Design

INSTRUMENTATION AMPLIFIER

Instrumentation amplifiers are used in monitoring and controlling of the physical quantities in the industrial processes for measurement and control of temperature, humidity, and light intensity. The major function of an instrumentation amplifier is precise amplification of low level output signal of the transducer

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Widely used in applications where low noise, low thermal and time drifts, high input impedance and accurate closed-loop gains are required.

AD521, AD524, AD624 from Analog Devices, and μA725, ICL7605, and LH0036.

The important features of an instrumentation amplifier are

i) high gain accuracy

ii) high CMRR

iii) high gain stability with low temperature coefficient

iv) low dc offset and

v) low output impedance

R

R

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The differential amplifier input impedance limited by

The gain of the differential amplifier is decided by

1

2

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.

/ R

1

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ECE204 Analog Circuit Design

This limitation is overcome by voltage follower for each signal input. This has the disadvantage that the gain of amplifier cannot easily be changed. This offers high input impedance and a high gain.

A

1

and

A

2

are voltage follower or buffers

When V =V , common mode signal=0

The voltage across resistor R is zero. Since no current flows through resistors R and R’, V =V and V =V

1

2

'

2

'

1

2

1

For V V , current in R is I =

1

2

(

V

1

V

2

)

R

'

And I will flow through R

Voltage at NI terminal of A 3 is

R V

2

1

'

R

1

+

R

2

Dr VSKB R 1 V’ 2 V’ 1 R 1
Dr VSKB
R 1
V’ 2
V’ 1
R
1

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Dr VSKB

By using superposition theorem,

Simplifying, we get

V o =−

R

2

R

1

 

R

2

'

V

+

R

+

1

2

R V

2

1

'

1

'

R

)

1

2

⎢ ⎣ R

1

R

1

+ R

2

V o =−

(

'

2

V

V

⎥ ⎦

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ECE204 Analog Circuit Design

Since there is no current entering the op-amp,

I =

(

V

1

V

2

)

R

, and I flows through R’.

' R ' ' V = R I +V = ( V − V )
'
R
'
'
V
= R I +V
=
(
V
V
)
+
V
1
1
1
2
1
R
R
'
1
R
'
'
and
V
=−R I +V =−
(
V
V
)
+
V
2
2
1
2
2
V’ 2
R
Dr VSKB
'
'
Substituting
V
and
V
for
V ,
V’ 1
R
1
2
o
1
'
R
2
R
2
(
V o =
V
V
)(
+
V
V
)
1
2
1
2
R
R
1
R
2
R
'
Dr VSKB
2
i.e.,
V o
=
1
+
(
V
V
)
1
2
R
R
1

By using a variable resistor R, the gain of this instrumentation amplifier can be varied.

Dr VSKB

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14

ECE204 Analog Circuit Design

INTEGRATOR (or integrating amplifier)

waveform integrator.

The circuit is based on the general parallel-inverting voltage feedback model.

A circuit in which the output voltage is the time integral of the input voltage

Integrator produces a summing action over a required time interval

Ideal Integrator

Feedback element

The Kirchoff’s current equation at node a is

Z

f

replaced by a capacitor

C

f

Dr VSKB

i

1

= I

B

+ i

f

Since

The

I

B

is negligibly small,

i

1

= i

f

 

( )

t

=

 

dv

c

() t

 

i

C

C

   

dt

 

v

i

() ()

t

v

a

t

=

C

d

 

R

1

 

f

dt

Or,

(v ()t

a

o

()t )

v

Dr VSKB

However, v

Therefore,

()t

a

C

()t = 0

f

d

(

b

v

i

= v

()

t

=

R

1

dt

v

o

(t))

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15

Copyright Dr VSKB

ECE204 Analog Circuit Design

Integrating both sides with respect to time,

Therefore,

t

0

v

v

i

()

t

t

d

dt

C

0

R

1

f

dt

=

o

( )

t =−

1

R C

1

f

t

0

v

i

(

v

o

()

t dt

())

t

+

v

dt

o

(

=−

C

f

v

o

0

)

where

() (0)

t

v

o

v

o

(0)

is the initial output voltage.

The output voltage is directly proportional to the negative integral of the input

voltage and inversely proportional to the time constant

In frequency domain, the above equation becomes

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R C

1

f

.

V

o

()

s

=−

1

V

i

(s)

sR C

1

f Dr VSKB

Letting s = jω in steady state,

V

o

(

)

j ω

=−

1

j

R C

ω

1

f

V

i

( ω)

j

Hence, the magnitude of the transfer function of the integrator is

A
A

=

V ( j ω ) Dr VSKB j 1 o = = V ( j
V
(
j
ω
)
Dr VSKB
j
1
o
=
=
V
(
j
ω
)
ω
(
R C
)
ω
R C
i
1
f
1
f

At ω = 0, the gain of the integrator is infinite. Also the capacitor acts as an open circuit and hence there is no negative feedback.

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Copyright Dr VSKB

ECE204 Analog Circuit Design

Summing Integrator

The summing integrator is derived from the simple integrator The output voltage for the summing integrator can be written as

Therefore,

v

o

1

t

0

v

1

()

t

+

V

1

v

2

R

1

()

t

+

v

3

()

t

()

t =−

dt + v

o

Dr VSKB

()

0

C

f

1

R

1

sC

f

R

()

s

2

+

R

3

V

3

3

() ()

V

2

s

+

s

R

2

R

V

o

( )

s =−

Dr VSKB Fig. 4.21 Summing integrator Dr VSKB
Dr VSKB
Fig. 4.21 Summing integrator
Dr VSKB

Copyright Dr VSKB

17

ECE204 Analog Circuit Design

Limitations of an Ideal Integrator

Even in the absence of input signal, the offset voltage and the bias current contribute for an error voltage at the output. Thus, it is not possible to get a true integration of the input signal at the output. The output waveform is distorted due to this error voltage.

Dr VSKB

The bandwidth of an ideal integrator is very small. To avoid this, a resistor is placed in parallel with the integrator capacitor to limit the low frequency gain. However, this limits the useful integration range at higher frequencies.

Dr VSKB

A few additional components are used along with the ideal integrator circuit to minimize the effect of the error voltage. Such an integrator is called practical integrator.

Practical Integrator Circuit

Dr VSKB

The parallel combination of

integrator. It provides the dc stabilization, by limiting the low frequency gain to

R

f

and

C

f dissipates power. Thus, this circuit is a lossy

R

f

/ R

1

.

Copyright Dr VSKB

18

ECE204 Analog Circuit Design

V () s V () s i o + sC V () s + =
V
() s
V
()
s
i
o
+
sC V
()
s
+
=
0
f
o
R
R
1
f
1
Or
V
( )
s
=−
V
(s)
o
i
sR C
+
R
/
R
1
f
1
f
Substituting s = jω,
V
1
R
/ R
Dr VSKB
o
f
1
A =
=
=
.
2
2
2
2
V i ω 2 R
C
+ R
/ R
1
(
R
C
) 2
1
f
1
f
f
f

When

At low frequencies, the gain is approximately equal to

At 3dB level the gain is

R

f is very large the lossy integrator is approximately an ideal integrator.

0.707

(

R

f

/ R

1

Dr VSKB

1

)

.

R

f

/ R .

1

Dr VSKB
Dr VSKB

Copyright Dr VSKB

19

ECE204 Analog Circuit Design

, circuit, determine the lower frequency limit of integration and the output response for the inputs (a) sine wave (b) square wave and (c) step input.

Solution

of

Given

integration is

Example Assuming R

in a practical integrator

1 =

10 k

Ω

R

f

=

100

k

Ω

and

C

f

=

10

nF

R

1 =

R

f

C

R

f

=

100

k

Ω

and

C

f

=

10

 

1

2

π

×

100

×

10

3

×

10

×

10

Ω

,

=

10

k

nF .

The

lower

frequency

limit

Dr VSKB

1

f

a

=

9 =

159Hz

2π

f

For accurate integration, input freq. must be atleast one decade above f

a) For the sine wave input

For an input of 1V peak sine wave at 2.5kHz, the output

a

Dr VSKB

v

o

is

i.e., 1590Hz.

= −

v

o

( )

t

=

1

R C

1

f

1

10

k Ω×

10

nF

v

c

( )

t

dt

1sin(2

π

= −10 sin(2 × 2500t)dt

π

4

2500 )

Dr VSKB

×

t

dt

=−

10 4

2

π

×

2500

) dt π 4 ∫ 2500 ) Dr VSKB × t dt =− 10 4 2

[

cos(2

π

×

2500 )]

t = 0.637cos(2π × 2500t)

The output is a cosine wave with peak of 0.637V only

Copyright Dr VSKB

20

ECE204 Analog Circuit Design

b) For the square wave input

The input is 2.5kHz with 1V peak The output will be ramps The peak value of the output for first half cycle is

v =−

o

1

1 0.2 ms

1

0

R C

f

dt =−

10

4

×

0.2

×

Dr VSKB
Dr VSKB

10

3

=−2V

Similarly, integration over the next half-cycle produces a positive change of 1V.

c) For the step input

If input is a step voltage V

for 0 t 0.6ms,

i

Dr VSKB

= 1 V

step voltage V for 0 ≤ t ≤ 0.6ms, i Dr VSKB = 1 V 1

1

R C

1

f

0.6 ms

0

1

1 dt

Then v

o

=−

Dr VSKB

× t

t

t

=

=

0.6

0

ms

=−

10

4

×

3

10

×

0.6

×

10

×

10

3

×

10

=−

9

6V

=−

10

Copyright Dr VSKB

21

ECE204 Analog Circuit Design

DIFFERENTIATOR

The differentiator can perform differentiation, i.e. the output voltage is the differentiation of the input voltage.

Ideal Differentiator

Kirchoff’s Current Law at node a

Dr VSKB
Dr VSKB

,

i

i

C

C

C

1

= I

B

+ i

f

 

= i

f

 

d

v

a

v

o

 

dt

(

v

i

v

a

) =

R

f

Since

I

B

0

But v

Therefore,

a

= V , because A is very large.

v

b

0

C

1

dv

i

v

o

=−

dt

R

f

or

Dr VSKB

v

o

=−

R

f

C

1

dv

i

dt

Summing Differentiator …. ⎡ dv ( t ) dv ( t ) ⎤ 1 Dr
Summing Differentiator ….
dv
( t )
dv
( t )
1
Dr VSKB
2
v
(
t
) =−
R
C
+ C
o
f
1
2
dt
dt
dv
( t )
dv
( t )
1
2
If C
= C
, v
( t ) == −
R
C
+
1
2
o
f
1
dt
dt
22

Copyright Dr VSKB

ECE204 Analog Circuit Design

Example Design a differentiator to differentiate an input signal that varies in frequency from 10Hz to about 1kHz. Solution

The upper cut-off frequency,

1 Dr VSKB

f

a

=

1

kHz

=

2

R C

π

f

1

Letting C = μF

1

1

, we have

R

f

=

1

(2

π

3

)(10 )(10

6

)

=

1.59

k

Ω

Limitations of Differentiator

The differentiator circuits are more susceptible to noise When differentiated, the noise fluctuations will generate large noise signals

Dr VSKB

This problem minimized by placing a resistor in series with the input capacitor. This modified circuit differentiates only low frequency signals with a constant high frequency gain.

.

Therefore, at high frequencies, the differentiator will become unstable and may enter

As the frequency increases, gain increases due to the reduction of

1

=

1

2

fC

π

1

X C

into saturation. This makes the circuit very sensitive to noise and the stability is affected. The noise component may override the signal also.

23

Dr VSKB

Copyright Dr VSKB

ECE204 Analog Circuit Design

Practical Differentiator

The input current

i

C

=

V

i

V

a

V

i

Z

1

Z

1

) .

=

where

Z

1

= (R

1

in series with C

1

Z

1

=

R

1

+

1

1

+

sR C

1

1

=

sC

1

sC

1

sC V

1

i

()

s

I

C

=

(

1

+

sR C

1

is

1

i

)

f 1

The current i

f 1

=

It can be expressed as

v

a

v

o

v

o

=−

I

R

f

f 1

=

V

o

()

s

R

f

R

and

f

Dr VSKB
Dr VSKB

Dr VSKB

i

f

2

=

C

f

d

(

v

a

v

o

)

=− C

dv

o

 

dt

f

dt

Taking the Laplace transform, I

Applying Kirchoff’s Current Law at node a,

f

2

=− sC V

f

o

(s)

I

C

= I

f 1

Therefore,

sC V

1

i

()

s

=−

(

1 + sR C

1

1

Dr VSKB

)

V

o

()

s

R

f

sC V

f

o

(s)

;

Or V

o

( )

s

+ I

=−

f 2

sR

f

C V

1