OPENLOOP OPAMP CONFIGURATIONS
The term openloop indicates that no feedback is fed to the input from output. The opamp functions as a very high gain amplifier. There are three openloop configurations of opamp, namely, i) Differential amplifier ii) Inverting amplifier and iii) Noninverting amplifier
Copyright Dr VSKB
41
ECE204 Analog Circuit Design
Openloop Differential Amplifier
The input voltages are represented by v small
i1
and v
i2
.
R and R
i1
V
o
(
= A V
i1
−V
i2
)
where A is largesignal voltage gain.
i2
are negligibly
Copyright Dr VSKB
42
ECE204 Analog Circuit Design
Inverting Amplifier
The output voltage is 180 output voltage V is given by
ο
outofphase with respect to the input and hence, the
o
V
o
= −AV
i
The input is amplified by openloop
.
gain A and is phaseshifted by 180
ο
Noninverting Amplifier
V = AV
o
i
The input signal is amplified by A and the output is inphase with input
43
Copyright Dr VSKB
ECE204 Analog Circuit Design
Limitations of Openloop Opamp Configurations
In all the above openloop configurations, only very small values of input voltages can be applied. Or, clipping of the output waveform can occur When operated so, the output is either in negative or positive saturation. This prevents the use of openloop configurations of opamps in linear applications. The openloop gain is not constant  it varies with changing temperature and variations in power supply.
CLOSEDLOOP OPAMP CONFIGURATIONS
The opamp can be effectively utilized in linear applications by providing a feedback, either directly or through another network.
If the signal fedback is outofphase by
or degenerative feedback. If feedback is inphase, then it is positive or regenerative feedback
An opamp with feedback is a closedloop amplifier
180
ο , then the feedback is negative
Copyright Dr VSKB
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ECE204 Analog Circuit Design
The most commonly used configurations are Inverting amplifier (voltageshunt feedback) and Noninverting amplifier (voltageseries feedback).
Inverting Amplifier
Input signal drives the inverting input
through
R
1
Because of the phase inversion, the
outofphase
output signal is
with the input signal
180
ο
This means that the feedback signal opposes the input signal and the feedback is negative or
degenerative
Copyright Dr VSKB
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ECE204 Analog Circuit Design
Virtual ground
A virtual ground is a ground which acts like a ground. It may not have physical connection to ground. This property indicates that the inverting and noninverting terminals of the opamp are at the same potential.
The openloop gain of an opamp is extremely high, typically 200,000 for a 741.
is
For example, when the output voltage is 10V, the input differential voltage V given by
id
V
id
=
V
o
10
=
A
200,000
= 0.05 mV
Furthermore, the openloop input impedance of a 741 is around 2 MΩ.
Therefore, for an input differential voltage of 0.05mV, the input current is only
I
i
=
V id
0.05 mV
=
R i 2 M Ω
= 0.25 nA
Since the input current is so small, this can be approximated as zero. Hence, the inverting input of Fig. 3.35(a) acts as a virtual ground.
46
Copyright Dr VSKB
ECE204 Analog Circuit Design
Practical considerations
i) Setting the input impedance
R 1 to be too high will pose problems with the
bias current, and it is usually restricted to 10kΩ.
ii)The gain can not be set very high due to the upper limit set by the gain
bandwidth (GBW
= A × f ) product. A
v
v is normally below 100.
iii) The peak output of the opamp is about 2V less than supply
iv) Heavy output current may damage the opamp
Noninverting Amplifier
The feedback is negative or degenerative
R 1 × V
V i = 
o 

R 
1 + R f 

V o R 1 
+ 
R 
f 
R f 

= 
1 =+ . 

V i 
R 
1 
R 1 
Hence, the voltage gain is
V
o
R
f
A _{v} = =+
V
i
1
R
1
Copyright Dr VSKB
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ECE204 Analog Circuit Design
Example For the noninverting amplifier of Fig. R = 1kΩ
Calculate the closedloop voltage gain of the amplifier and feedback factor β .
and R
f
1
=
10
kΩ
Solution
A _{v} =
1
+
R
f
R
1
The closedloop voltage gain
= +
1
10 k Ω
1 k Ω
= 11
The feedback factor β
=
R 1 1 k Ω
=
R
1
+
R
f
1
k
Ω+ 10 Ω
k
=
0.091
.
Copyright Dr VSKB
48
ECE204 Analog Circuit Design
DIFFERENTIAL AMPLIFIER
Let R
Using the superposition principle,
If
If
1
=
R
2
=
R
3
=
R
f
=
R
V
i
V
i
1
2
=
=
0
0
, V =−V
o2
i2
,
V
o
1
[
= V
i
1
/ 2
](
1
+ R
/
)
R =V
i
1
If both inputs are applied,
V
o
=
V
o
=V
o1
+V
o2
=V −V
i1
i2
If R
⎛
^{⎜} ⎝
1
+
_{f} ≠ R f ( R ⎛ 1 ≠ R R 3 2 ≠ R 3 ⎞ ⎟ V i 1 
) , − 
R 
f 

R ⎞ ^{⎟} ⎠ ^{⎜} ⎝ R + R ⎠ 3 2 
R 
V
i
2
General Description of Opamp 741
i) _{μ}_{A}_{7}_{4}_{1} is an internally frequencycompensated opamp
Copyright Dr VSKB
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ECE204 Analog Circuit Design
ii) 
It is a monolithic IC, fabricated using planar epitaxial process 
iii) 
It has internal shortcircuit protection 
iv) 
It has externally connected offset null capability 
v) 
It has large commonmode and differential voltage ranges 
vi) 
It is useful in many applications such as integrator, differentiator, adder, subtractor, voltage follower or buffer and other feedback applications 
vii) 
It consumes low power 
viii) 
It suffers from no latchup 
ix) 
It is available in all the three types of packages, namely, 8pin metal Can, 10pin Flatpack and 8 or 14pin dualinline package or DIP 
x) 
For 741C, two sets of electrical specifications are provided, where the first set is meant for operating characteristics at room temperature (25°C) and the other set applies to the commercial temperature range (0° to + 70°C) 
Copyright Dr VSKB
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ECE204 Analog Circuit Design
UNIT II APPLICATIONS OF OPERATIONAL AMPLIFIERS
SIGN CHANGER (PHASE INVERTER)
Input impedance
The impedances
Closedloop voltage gain is 1 & 180° phase shift at output – thus a phase inverter If two are connected in cascade, then the output from the second stage is in phase with, or the same as the input signal without any sign change
The outputs from the two stages are equal in magnitude but opposite in phase
Such a system is an excellent paraphase amplifier.
Dr VSKB
Z
1
and feedback impedance
Z and
1
Z
f
Z
f
Dr VSKB
are equal in magnitude and phase
Dr VSKB
Inverting opamp with voltage shunt feedback
1
Copyright Dr VSKB
ECE204 Analog Circuit Design
SCALE CHANGER
If the ratio Z
The input voltage is multiplied by a factor –k The scaled output is available at the output
PHASE SHIFT CIRCUITS The phase shift circuits produce phase shifts that depend on the frequency and maintain a constant gain Also called constantdelay filters or allpass filters
f
/ Z
1
= k
is a real constant, then the closedloop gain is –k
Z
f
and
Z
1 are precision resistors to obtain scaled value of input voltage
Dr VSKB
That is, the time difference between input and output remains constant when frequency is changed over a range of operating frequencies
A constant gain is maintained for all the frequencies within the operating range  thus,
called allpass The two types  lagging phase angles and leading phase angles
If
f (equal in magnitude and differ in angle), then the opamp shifts the phase
of the sine input voltage
Any phase shift between 180 ^{o} and +180 ^{o} can be obtained by varying Z
Dr VSKB
Dr VSKB
Z
1
=
Z
1
and
Z
f
.
Copyright Dr VSKB
2
ECE204 Analog Circuit Design
PhaseLag Circuit
Assumed the
Inverting input applied at () terminal Noninverting amplifier with a lowpass filter Inverting input gain is 1
Noninverting gain is 1
v i drives the inverting amplifier
+
R f
R
1
= +
1
1
=
2
,
since
For the circuit shown in Fig, it can be written as
V
R
_{f} =
R
1
.
Dr VSKB
1
1 + j
RC
ω
V
i
o
(
j
)
ω
=− V + 2
i
Copyright Dr VSKB
3
ECE204 Analog Circuit Design
The phase angle _{θ} =−
When _{ω} =0, _{θ} = zero and when _{ω} =∞ , _{θ} = 180°
tan
−
1
(ωRC)
−
tan
−
1
(ωRC)
=−
2 tan
−
1
(ωRC)
θ = −
2 tan
−1
(
f / f
o
)
where
^{f} ^{o}
=
1
2π RC
Example 4.1 Find the phase angle and the time delay for the circuit shown in Fig. (a)
for a frequency of 2kHz, assuming
R
1
=
20k
Ω
, R
=
39k
Ω
, R
R
1
and C=1nF.
Dr VSKB
f
=
Solution
The circuit is a phaselag network.
Therefore,
f o
=
1
2
RC
π
=
1 
Dr VSKB 

[ 2 
× 
π 
× 
39 
× 
10 
3 
1 ×× 
10 
− 
9 
] 
= 4081 Hz .
The phase angle of 2kHz frequency is
θ =− 2 tan
− 1
⎛ 2
^{⎜} ⎝
×
10
4081
3
⎟=− ⎞ 52.2 .
⎠
°
Phase angle is directly proportional to delay, and 360° of delay pertains to one period.
Therefore,
Dr VSKB
θ t d
360°
T
=
=
1 
θ 
= 
1 
− 52.2 

f 360 ° 
2 
× 
10 
3 
360 
° 
which gives
^{t} d
= 72.5
μ
s
.
Copyright Dr VSKB
4
ECE204 Analog Circuit Design
PhaseLead Circuit
The RC circuit forms a highpass network.
The output voltage V
o
()
j
ω
=−
V
i
()
j
ω
+ 2
Therefore,
Dr VSKB
V o ( 
j 
ω 
) 
^{=} − 1 + j ω 
RC 

V i ( 
j ω 
) 
1 + j RC ω 
⎛
^{⎜} ⎝
j 1 + j
ω
RC
RC
ω
θ
=
180
° −
tan
−
1
(ωRC)
−
tan
−
1
(ωRC)
=
180
⎞
V
⎟
⎠
i
° −
( ω)
j
2 tan
−
1
(ωRC)
(4.7)
Copyright Dr VSKB
5
ECE204 Analog Circuit Design
When the frequency = zero, the phase angle = 180°. As the frequency is increased, the leading phase decreases and it finally approaches zero at high frequencies.
θ
=
180
° −
2 tan
−1
(
f / f
o
)
VOLTAGE FOLLOWER
where
^{f} ^{o}
=
1
2π RC
.
Dr VSKB
If
unitygain amplifier or voltage follower.
That is,
R
1
= ∞
and
R
f
= 0
in the noninverting amplifier, then the amplifier acts as an
R
f
R
1
= A −
v
= 1 .
1
Dr VSKB
+
R
f
1
A _{v} =
1
or
R
R f
Since
R
In other words,
= 0, we have A
v
1 Dr VSKB
V
o
= V or, the circuit is called voltage follower.
i
Offers very high input impedance of order of MΩ and very low output impedance. Therefore, used for impedance matching applications.
Copyright Dr VSKB
6
ECE204 Analog Circuit Design
VOLTAGE TO CURRENT CONVERTER (TRANSCONDUCTANCE AMPLIFIER)
An ideal V to I source (VCCS) gives
a current
an independent, controlling voltage
i.e.,
Two circuits:
L
V
i
=
V
i
/ R
1
;
V . Applying KVL at node a, and
_{a}
I
L
that is a constant k times
I
L
= kV
i
(i)
(ii)
VtoI with floating load VtoI with grounded load
Z
L
I
B
Z
f
= 0
L
,
,
V
i
=
I
L
V
i
R
1
.
.
i.e.
(i) Load
The voltage at node a is
Thus, as
(ii) Load
with R = R
is floating.
I
is grounded. The voltage at node a is
I
V
1
i
V
a
+ I
+
2
= I
− 2
+
L
a
V
o
;
V
V
o
=
(V
i
Dr VSKB
(
V −V
i
a
)
/ R +
=
I
L
R
−
I R)/ 2
L
(
V
o
−V
a
)
/ R = I
L
;
The gain of this NI opamp circuit is 1 + R/R = 2.
Copyright Dr VSKB
7
ECE204 Analog Circuit Design
V
o
= 2
V
a
=
V
i
+
V
o
−
I
L
R
Or
V
I
i
L
=
=
I
V
L
i
R
/
R
Hence, it is a voltage to current transducer
Or
I
L
1
g
m
=
=
V
i
R
The circuits are called VCCS since
where g
I
L
=
V i = V g
R
1
i
m
m is the transconductance in Siemens.
_{D}_{r} _{V}_{S}_{K}_{B}
Dr VSKB
Copyright Dr VSKB
8
ECE204 Analog Circuit Design
ITOV CONVERTER (CURRENTCONTROLLED VOLTAGE SOURCES) A current to voltage converter is an ideal currentcontrolled voltage source Also called transresistance amplifier
Output voltage is a constant k times an independent
Due to the virtual ground
The current through
Thus
I
i
or V
o
= kI
i
V
a
=
0 ,
R 1 is zero
I i flows through resistor R
C
f
V
o
= −I R
i
f
.
connected across R
f
f .
reduces the
Dr VSKB
high frequency possible oscillations
Noninverting I to V converter circuit
I i has a return path to ground
Voltage at noninverting input is
Dr VSKB
R
f
⎞
⎟
⎠
V
i
1
I R
i
= I R .
i
i
=
⎛
⎜
⎝
1
+
R
f
⎞
⎟
⎠
⎛
⎜
⎝
Then
V
o
V = 1 +
i
R
1
R
1
Copyright Dr VSKB
9
ECE204 Analog Circuit Design
ADDER OR SUMMING AMPLIFIER
Or
V
o
= V A
1
V
1
+ V A
2
V
2
+ V A
3
V
3
+
+ V A
n
Vn
where
A
v1
, A
v2
A
vn
are individual gains.
A levelshifter circuit can be realized by use of a twoinput summing circuit
One input can be the ac signal, and the second input can be the dc value
The dc value acts as the offset for the ac signal.
Dr VSKB
Copyright Dr VSKB
10
ECE204 Analog Circuit Design
SUBTRACTOR
[
V
2
V
1
1
/ 2
=
2
](
1
V
+
2
V
o
=
=
R
f
)
=
V
2
, then
V
o
2
+
V
o
1
=
=
R .
V
1
V
2
=
Assume R
By superposition principle, if
V
R
R
3
o 2
=
R / R
=
0
Similarly, if
V
o
1
=−
Considering both inputs applied, −
Thus, the output voltage is proportional to the difference between the two input
voltages. Hence, it acts as a difference amplifier with unity gain.
Dr VSKB
=
ADDERSUBTRACTOR … ?
Dr VSKB
Copyright Dr VSKB
11
ECE204 Analog Circuit Design
INSTRUMENTATION AMPLIFIER
Instrumentation amplifiers are used in monitoring and controlling of the physical quantities in the industrial processes for measurement and control of temperature, humidity, and light intensity. The major function of an instrumentation amplifier is precise amplification of low level output signal of the transducer
Dr VSKB
Widely used in applications where low noise, low thermal and time drifts, high input impedance and accurate closedloop gains are required.
AD521, AD524, AD624 from Analog Devices, and μA725, ICL7605, and LH0036.
The important features of an instrumentation amplifier are
i) high gain accuracy
ii) high CMRR
iii) high gain stability with low temperature coefficient
iv) low dc offset and
v) low output impedance
R
R
Dr VSKB
Dr VSKB
The differential amplifier input impedance limited by
The gain of the differential amplifier is decided by
1
2
Copyright Dr VSKB
.
/ R
1
12
ECE204 Analog Circuit Design
This limitation is overcome by voltage follower for each signal input. This has the disadvantage that the gain of amplifier cannot easily be changed. This offers high input impedance and a high gain.
A
1
and
A
2
are voltage follower or buffers
When V =V , common mode signal=0
The voltage across resistor R is zero. Since no current flows through resistors R and R’, V =V and V =V
1
2
'
2
'
1
2
1
For V ≠V , current in R is I =
1
2
(
V
1
−
V
2
)
R
'
And I will flow through R
Voltage at NI terminal of A _{3} is
R V
2
1
'
R
1
+
R
2
Dr VSKB
Dr VSKB
By using superposition theorem,
Simplifying, we get
V _{o} =−
R
2
R
1
R 
2 
' V 
+ ⎡ R + 1 
2 ⎤ 
⎡ 
R V 2 1 
' 

1 
' 
R ) 1 
2 
⎢ ⎣ R 
1 ⎥ ⎦ 
^{⎢} ⎣ 
R 
1 
+ R 
2 
V o =−
(
'
2
V
−
V
⎤
⎥ ⎦
13
Copyright Dr VSKB
ECE204 Analog Circuit Design
Since there is no current entering the opamp,
I =
(
V
1
−
V
2
)
R
, and I flows through R’.
By using a variable resistor R, the gain of this instrumentation amplifier can be varied.
Dr VSKB
Copyright Dr VSKB
14
ECE204 Analog Circuit Design
INTEGRATOR (or integrating amplifier)
waveform integrator.
The circuit is based on the general parallelinverting voltage feedback model.
A circuit in which the output voltage is the time integral of the input voltage
Integrator produces a summing action over a required time interval
Ideal Integrator
Feedback element
The Kirchoff’s current equation at node a is
Z
f
replaced by a capacitor
C
f
Dr VSKB
i
1
= I
B
+ i
f
Since
The
I
B
is negligibly small,
i
1
= i
f
( ) t = 
dv 
c () t 

i 
C 
C 

dt 

v 
i () () t − v a t = 
C 
d 

R 1 
f 
dt 
Or,
(v ()t
a
o
()t )
− v
Dr VSKB
However, v
Therefore,
()t
a
C
()t = 0
f
d
(
b
v
i
= v
()
t
=
R
1
dt
− v
o
(t))
15
Copyright Dr VSKB
ECE204 Analog Circuit Design
Integrating both sides with respect to time,
Therefore,
t
∫
0
v
v
i
()
t
t
∫
d
dt
C
0
R
1
f
dt
=
o
( )
t =−
1
R C
1
f
t
∫
0
v
i
(
−
v
o
()
t dt
())
t
+
v
dt
o
(
=−
C
f
v
o
0
)
where
() (0)
t
−
v
o
v
o
(0)
is the initial output voltage.
The output voltage is directly proportional to the negative integral of the input
voltage and inversely proportional to the time constant
In frequency domain, the above equation becomes
Dr VSKB
R C
1
f
.
V
o
()
s
=−
1
V
i
(s)
sR C
1
f Dr VSKB
Letting s = _{j}_{ω} in steady state,
V
o
(
)
j ω
=−
1
j
R C
ω
1
f
V
i
( ω)
j
Hence, the magnitude of the transfer function of the integrator is
=
At _{ω} = 0, the gain of the integrator is infinite. Also the capacitor acts as an open circuit and hence there is no negative feedback.
16
Copyright Dr VSKB
ECE204 Analog Circuit Design
Summing Integrator
The summing integrator is derived from the simple integrator The output voltage for the summing integrator can be written as
Therefore,
v
o
1
t
∫
0
⎛
⎜
⎝
v
1
()
t
+
V
1
v
2
R
1
()
t
+
v
3
()
t
⎞
⎟
⎠
()
t =−
dt + v
o
Dr VSKB
()
0
C
f
1
R
1
sC
f
⎛
⎜
⎝
R
()
s
2
+
R
3
V
3
3
() ()
V
2
s
+
s
R
2
R
⎞
⎟
⎠
V
o
( )
s =−
Copyright Dr VSKB
17
ECE204 Analog Circuit Design
Limitations of an Ideal Integrator
Even in the absence of input signal, the offset voltage and the bias current contribute for an error voltage at the output. Thus, it is not possible to get a true integration of the input signal at the output. The output waveform is distorted due to this error voltage.
Dr VSKB
The bandwidth of an ideal integrator is very small. To avoid this, a resistor is placed in parallel with the integrator capacitor to limit the low frequency gain. However, this limits the useful integration range at higher frequencies.
Dr VSKB
A few additional components are used along with the ideal integrator circuit to minimize the effect of the error voltage. Such an integrator is called practical integrator.
Practical Integrator Circuit
Dr VSKB
The parallel combination of
integrator. It provides the dc stabilization, by limiting the low frequency gain to
R
f
and
C
f dissipates power. Thus, this circuit is a lossy
− R
f
/ R
1
.
Copyright Dr VSKB
18
ECE204 Analog Circuit Design
When
At low frequencies, the gain is approximately equal to
At 3dB level the gain is
R
f is very large the lossy integrator is approximately an ideal integrator.
0.707
(
R
f
/ R
1
Dr VSKB
1
)
.
R
f
/ R .
1
Copyright Dr VSKB
19
ECE204 Analog Circuit Design
, circuit, determine the lower frequency limit of integration and the output response for the inputs (a) sine wave (b) square wave and (c) step input.
Solution
of
Given
integration is
Example Assuming R
in a practical integrator
_{1} =
10 k
Ω
R
f
=
100
k
Ω
and
C
f
=
10
nF
R
_{1} =
R
f
C
R f = 
100 k Ω 
and 
C 
f 
= 10 

1 

2 π 
× 
100 × 10 
3 
× 
10 
× 10 
− 
Ω
,
=
10
k
nF .
The
lower
frequency
limit
Dr VSKB
1
f
a
=
9 ^{=}
159Hz
2π
f
For accurate integration, input freq. must be atleast one decade above f
a) For the sine wave input
For an input of 1V peak sine wave at 2.5kHz, the output
a
Dr VSKB
v
o
is
i.e., 1590Hz.
= −
v
o
( )
t
=
1
R C
1
f
1
10
k Ω×
10
nF
∫
∫
v
c
( )
t
dt
1sin(2
π
= −10 sin(2 × 2500t)dt
π
4
∫
2500 )
Dr VSKB
×
t
dt
=−
10 ^{4}
2
π
×
2500
[
−
cos(2
π
×
2500 )]
t = 0.637cos(2π × 2500t)
The output is a cosine wave with peak of 0.637V only
Copyright Dr VSKB
20
ECE204 Analog Circuit Design
b) For the square wave input
The input is 2.5kHz with 1V peak The output will be ramps The peak value of the output for first half cycle is
v =−
o
1
1 0.2 ms
∫
1
0
R C
f
dt =−
10
4
×
0.2
×
10
−
3
=−2V
Similarly, integration over the next halfcycle produces a positive change of 1V.
c) For the step input
If input is a step voltage V
for 0 ≤ t ≤ 0.6ms,
_{i}
Dr VSKB
= 1 V
1
R C
1
f
0.6 ms
∫
0
1
1 dt
Then v
o
=−
Dr VSKB
× t
t
t
=
=
0.6
0
ms
=−
10
4
×
3
10
×
0.6
×
10
×
10
−
3
×
10
=−
−
9
6V
=−
10
Copyright Dr VSKB
21
ECE204 Analog Circuit Design
DIFFERENTIATOR
The differentiator can perform differentiation, i.e. the output voltage is the differentiation of the input voltage.
Ideal Differentiator
Kirchoff’s Current Law at node a
,
i
i
C
C
C
1
= I B 
+ i f 

= i f 

d 
v 
a 
− 
v 
o 

− 

dt 
( v 
i 
v 
a 
) = 
R 
f 
Since
I
B
≈ 0
But v
Therefore,
a
= V , because A is very large.
v
b
≈ 0
C
1
dv
i
v
o
=−
dt
R
f
or
Dr VSKB
v
o
=−
R
f
C
1
dv
i
dt
Copyright Dr VSKB
ECE204 Analog Circuit Design
Example Design a differentiator to differentiate an input signal that varies in frequency from 10Hz to about 1kHz. Solution
The upper cutoff frequency,
1 Dr VSKB
f
a
=
1
kHz
=
2
R C
π
f
1
Letting C = μF
1
1
, we have
R
f
=
1
(2
π
3
)(10 )(10
−
6
)
=
1.59
k
Ω
Limitations of Differentiator
The differentiator circuits are more susceptible to noise When differentiated, the noise fluctuations will generate large noise signals
Dr VSKB
This problem minimized by placing a resistor in series with the input capacitor. This modified circuit differentiates only low frequency signals with a constant high frequency gain.
.
Therefore, at high frequencies, the differentiator will become unstable and may enter
As the frequency increases, gain increases due to the reduction of
1
=
1
2
fC
π
1
X C
into saturation. This makes the circuit very sensitive to noise and the stability is affected. The noise component may override the signal also.
23
Dr VSKB
Copyright Dr VSKB
ECE204 Analog Circuit Design
Practical Differentiator
The input current
i
C
=
V
i
−
V
a
V
i
Z
1
Z
1
) .
=
where
Z
1
= (R
1
in series with C
1
Z
1
=
R
1
+
1
1
+
sR C
1
1
=
sC
1
sC
1
sC V
1
i
()
s
I
C
=
(
1
+
sR C
1
is
1
i
)
f 1
The current i
f 1
=
It can be expressed as
v
a
−
v
o
v
o
=−
I
R
f
f 1
=
V
o
()
s
R
f
R
and
f
Dr VSKB
i
f
2
=
C
f
d 
( 
v 
a − 
v 
o 
) 
=− C 
dv 
o 

dt 
f 
dt 
Taking the Laplace transform, I
Applying Kirchoff’s Current Law at node a,
f
2
=− sC V
f
o
(s)
I
C
= I
f 1
Therefore,
sC V
1
i
()
s
=−
(
1 + sR C
1
1
Dr VSKB
)
V
o
()
s
R
f
− sC V
f
o
(s)
;
Or V
o
( )
s
+ I
=−
f 2
sR
f
C V
1
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