2N5060 Series Sensitive Gate Silicon Controlled Rectifiers

Reverse Blocking Thyristors
Annular PNPN devices designed for high volume consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO-226AA (TO-92) package which is readily adaptable for use in automatic insertion equipment. • Sensitive Gate Trigger Current — 200 µA Maximum • Low Reverse and Forward Blocking Current — 50 µA Maximum, TC = 110°C • Low Holding Current — 5 mA Maximum • Passivated Surface for Reliability and Uniformity • Device Marking: Device Type, e.g., 2N5060, Date Code
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Peak Repetitive Off–State Voltage(1) (TJ = 40 to 110°C, Sine Wave, 50 to 60 Hz, Gate Open) 2N5060 2N5061 2N5062 2N5064 Symbol VDRM, VRRM 30 60 100 200 IT(RMS) IT(AV) 0.51 0.255 ITSM 10 Amps 0.8 Amp Amp TO–92 (TO–226AA) CASE 029 STYLE 10 1 2 Value Unit Volts
Preferred Device

http://onsemi.com

SCRs 0.8 AMPERES RMS 30 thru 200 VOLTS

G A K

*

On-State Current RMS (180° Conduction Angles; TC = 80°C) *Average On-State Current (180° Conduction Angles) (TC = 67°C) (TC = 102°C) *Peak Non-repetitive Surge Current, TA = 25°C (1/2 cycle, Sine Wave, 60 Hz) Circuit Fusing Considerations (t = 8.3 ms) *Forward Peak Gate Power (Pulse Width 1.0 µsec; TA = 25°C)

3

PIN ASSIGNMENT
1 I2t PGM PG(AV) IGM VRGM TJ Tstg 0.4 0.1 0.01 1.0 5.0 –40 to +110 –40 to +150 A2s Watt Watt 2 3 Cathode Gate Anode

v v v

*Forward Average Gate Power (TA = 25°C, t = 8.3 ms) *Forward Peak Gate Current (Pulse Width 1.0 µsec; TA = 25°C) *Reverse Peak Gate Voltage (Pulse Width 1.0 µsec; TA = 25°C) *Operating Junction Temperature Range *Storage Temperature Range *Indicates JEDEC Registered Data.

ORDERING INFORMATION
Amp Volts
Preferred devices are recommended choices for future use and best overall value. See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

°C °C

(1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded.

© Semiconductor Components Industries, LLC, 2000

1

May, 2000 – Rev. 4

Publication Order Number: 2N5060/D

di/dt = 6 A/µs.7 Volts µA tq µs 2N5060. initiating current = 20 mA) Turn-On Time Delay Time Rise Time (IGT = 1 mA.8 1.0 10 — — mA µs td tr VTM IGT — — — — — — — — 200 350 0. (4) RGK current is not included in measurement.2N5060 Series THERMAL CHARACTERISTICS Characteristic *Thermal Resistance.1 — — — — — — — 3. Junction to Ambient *Lead Solder Temperature (Lead Length 1/16″ from case. dv/dt — 30 — V/µs p http://onsemi.2 Volts Volts — — 1. 2N5064 — — 10 30 — — DYNAMIC CHARACTERISTICS Critical Rate of Rise of Off–State Voltage (Rated VDRM. RL = 100 Ohms) Holding Current (4) *(VAK = 7 Vdc. IRRM — — — — 10 50 µA µA ON CHARACTERISTICS *Peak Forward On–State Voltage(3) (ITM = 1. IGT = 1 mA) TC = 25°C TC = –40°C TC = 25°C TC = –40°C TC = 110°C TC = 25°C TC = –40°C IH VGT VGD 0. VD = Rated VDRM. di/dt = 6 A/µs Turn-Off Time (Forward Current = 1 A pulse. 10 s Max) Symbol RθJC RθJA — Max 75 200 +230* Unit °C/W °C/W °C q ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS *Peak Repetitive Forward or Reverse Blocking Current(2) (VAK = Rated VDRM or VRRM) TC = 25°C TC = 110°C IDRM. duty cycle 1%. (3) Forward current applied for 1 ms maximum duration.com 2 . 0. Exponential) *Indicates JEDEC Registered Data.2 A peak @ TA = 25°C) Gate Trigger Current (Continuous dc)(4) *(VAK = 7 Vdc. (2) RGK = 1000 Ω is included in measurement. dv/dt = 20 V/µs. RL = 100 Ohms) *Gate Non–Trigger Voltage (VAK = Rated VDRM.0 0. 2N5061 2N5062.1% Duty Cycle. Junction to Case(1) Thermal Resistance. Pulse Width = 50 µs. (1) This measurement is made with the case mounted “flat side down” on a heat sink and held in position by means of a metal clamp over the curved surface. RL = 100 Ohms) Gate Trigger Voltage (Continuous dc)(4) *(VAK = 7 Vdc. Forward Current = 1 A.2 — 5.

3 180° 0.5 IT(AV).2 90° 120° 0. MAXIMUM ALLOWABLE AMBIENT TEMPERATURE ( °C) 130 α = CONDUCTION ANGLE 110 TYPICAL PRINTED CIRCUIT BOARD MOUNTING α CASE MEASUREMENT POINT – CENTER OF FLAT PORTION 90 70 60° 90° 180° dc 50 α = 30° 30 0 0.2 0. AVERAGE ON-STATE CURRENT (AMP) IT(AV).1 60° 0. Maximum Case Temperature Figure 2. Maximum Ambient Temperature http://onsemi.3 0. MAXIMUM ALLOWABLE CASE TEMPERATURE (°C) 130 120 110 100 dc 90 80 70 60 50 0 0.4 0. AVERAGE ON-STATE CURRENT (AMP) Figure 1.2N5060 Series Voltage Current Characteristic of SCR + Current Anode + VTM on state IRRM at VRRM IH Symbol VDRM IDRM VRRM IRRM VTM IH Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak on State Voltage Holding Current Reverse Blocking Region (off state) Reverse Avalanche Region Anode – + Voltage IDRM at VDRM Forward Blocking Region (off state) CURRENT DERATING TC .com 3 .4 α = 30° 120° α = CONDUCTION ANGLE a TA .1 0.

2N5060 Series CURRENT DERATING 5.0 5. INSTANTANEOUS ON-STATE CURRENT (AMP) 1.02 0.07 0.0 3. Typical Forward Voltage r(t).2 0.0 10 20 30 50 70 100 NUMBER OF CYCLES Figure 4.5 0.05 0.5 3.005 0.0 10 20 t. Power Dissipation 1.5 1.2 0.0 ITSM .02 0. PEAK SURGE CURRENT (AMP) 10 7. Thermal Response http://onsemi.0 0.6 a α = CONDUCTION ANGLE α = 30° 60° 90° 180° 0.5 2.3 0.5 IT(AV).1 0. MAXIMUM AVERAGE POWER DISSIPATION (WATTS) 0.0 2.01 0 0.5 1.0 1. TRANSIENT THERMAL RESISTANCE NORMALIZED Figure 5.7 0.4 dc 0.01 0.002 0.0 1.0 3.02 0.0 0.2 2.0 i T .3 0.0 0.1 0.0 TJ = 110°C 25°C 1.01 0.0 2.0 5.1 0. Maximum Non–Repetitive Surge Current 0.4 0.1 0.05 120° 0.com 4 .0 7.5 vT.0 2. AVERAGE ON-STATE CURRENT (AMP) Figure 3.0 2. INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) 0 0 0.03 0. TIME (SECONDS) Figure 6.8 P(AV).05 0.2 0.2 0.0 5.

6 0. GATE TRIGGER VOLTAGE (VOLTS) VAK = 7.0 V RL = 100 RGK = 1.0 k 1.0 2.0 k I GT .4 0.5 0. HOLDING CURRENT (NORMALIZED) 3.0 2N5060-61 2. Typical Gate Trigger Voltage Figure 8.3 – 75 –50 –25 0 25 50 75 100 110 TJ.2N5060 Series TYPICAL CHARACTERISTICS 0.0 0. JUNCTION TEMPERATURE (°C) Figure 9.6 0.0 VAK = 7.0 I H . JUNCTION TEMPERATURE (°C) Figure 7.0 0.0 V RL = 100 0. JUNCTION TEMPERATURE (°C) VAK = 7. Typical Gate Trigger Current 4.61 2N5062-64 0.2 –75 –50 –25 0 25 50 75 100 110 TJ.8 VG .8 2N5060. GATE TRIGGER CURRENT (NORMALIZED) 200 100 50 2N5062-64 20 10 5.com 5 .5 0.7 0. Typical Holding Current http://onsemi.0 V RL = 100 RGK = 1.4 –75 –50 –25 0 25 50 75 100 110 TJ.0 1.

3.5 16.5 1.0059 Max 4.2 0.9 6. No more than 1 consecutive missing component is permitted.2841 0.15 — 0.08 0. Splices will not interfere with the sprocket feed holes. 6.110 .8 0.0 9.65 19 6.1653 0.2658 0. Maximum non–cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches.051 0.5 12. Device Positioning on Tape Specification Inches Symbol D D2 F1.5 8.com 6 .44 0. Component lead to tape adhesion must meet the pull test requirements.95 0.3741 0.35 17.0567 0. 4.5 5.2N5060 Series TO–92 EIA RADIAL TAPE IN FAN FOLD BOX OR ON REEL H2A H2A H2B H2B H W2 H4 H5 L1 L F1 F2 P2 P1 P P2 D H1 W1 W T T2 T1 Figure 10.610 0.15 Item Tape Feedhole Diameter Component Lead Thickness Dimension Component Lead Pitch Bottom of Component to Seating Plane Feedhole Location Deflection Left or Right Deflection Front or Rear Feedhole to Bottom of Component Feedhole to Seating Plane Defective Unit Clipped Dimension Lead Wire Enclosure Feedhole Pitch Feedhole Center to Center Lead First Lead Spacing Dimension Adhesive Tape Thickness Overall Taped Package Thickness Carrier Strip Thickness Carrier Strip Width Adhesive Tape Width Adhesive Tape Position Min 0.06 — 0.51 2.2 mm. 5.95 3.5 0. having at least three feed holes is required before the first and after the last component.2342 0.768 0.433 — 0.2165 .09842 0. A tape trailer and leader.5 .38 2.1397 0.059 0.1496 0. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive.3346 0 0 0. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm.039 0.0 1.4921 0.027 0.1556 0.3 0. 7. Maximum alignment deviation between leads not to be greater than 0.5079 0.5 5.0945 .014 0.5 11 — 12.020 0. 2. http://onsemi.156 0.5 2.01968 NOTES: 1.015 0.4 1.8 4.55 0.7086 0.5 0 0 18 15.5 8.6889 0.75 3.649 0.7481 0. 8.20 1.3346 0. F2 H H1 H2A H2B H4 H5 L L1 P P1 P2 T T1 T2 W W1 W2 Millimeter Max Min 3.0 19.

LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. Device Suffix U. INCHES MIN MAX 0.70 ––– 6.54 2.055 0.533 1.61.64 2N5060.66 0.64RLRA 2N5060. CATHODE 2.045 0.100 0.210 0.62.015 0.18 4. 4.50 12.20 4. GATE 3.250 ––– 0.021 0.39 2.33 3.32 5. Bulk Round side of TO92 and adhesive tape visible Flat side of TO92 and adhesive tape visible 2N5060RL1 PACKAGE DIMENSIONS TO–92 (TO–226AA) CASE 029–11 ISSUE AJ A R P L SEATING PLANE B NOTES: 1.115 ––– 0.66 ––– 2.04 2. 3. CONTROLLING DIMENSION: INCH.165 0.64RLRM Europe Equivalent Shipping Bulk in Box (5K/Box) Radial Tape and Reel (2K/Reel) Radial Tape and Fan Fold Box (2K/Box) Description of TO92 Tape Orientation N/A.93 ––– 3.42 2.15 1. 2.39 0.2N5060 Series ORDERING & SHIPPING INFORMATION: 2N5060 Series packaging options.35 ––– 2.S.62.170 0.125 0.020 0.45 5.43 ––– K X X G H V 1 D J C SECTION X–X N N DIM A B C D G H J K L N P R V STYLE 10: PIN 1.com 7 . 1982.095 0.500 ––– 0.080 0.105 ––– 0.19 0.5M.61. ANODE http://onsemi.016 0.135 ––– MILLIMETERS MIN MAX 4.205 0.175 0. 2N5060.105 0. DIMENSIONING AND TOLERANCING PER ANSI Y14.407 0.

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