XXXII NATIONAL SYSTEMS CONFERENCE, NSC 2008, December 17-19, 2008

A FRACTAL APPROACH TO GENERATE SPACE VECTOR PWM FOR MULTILEVEL INVERTERS
Anish Gopinath1, M.R. Baiju2 Control Electronics & Checkout Division (CECD), VSSC, Trivandrum, Kerala 2 Department of Electronics & Communication, College of Engineering, Trivandrum
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Abstract—This paper aims to establish the inherent fractal structure in the space vector representation of multilevel inverter. The established fractal is used in the proposed method of generation of Space Vector PWM (SVPWM) for a 3-level inverter. The proposed method avoids look up tables for sector identification and switching vector determination associated with SVPWM implementation. The optimum switching sequence is also achieved for every sector without look up tables. The generation of SVPWM using inherent fractal structure has been explained for a 3-level inverter and simulation results are presented. The method can be extended to higher-level inverters. The implementation is carried out using dSPACE 1104 card.

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INTRODUCTION

ULTILEVEL inverters serve as induction motor drives generating sinusoids of varying amplitudes and frequencies[1]. In comparison to a 2-level inverter, multilevel inverter generates sinusoids with lesser harmonic distortion [1,2]. Pulse Width Modulation techniques aid inverters in generating these sinusoids. Conventionally, sine-triangle comparison, and space vector concepts were used to generate PWM signals for multilevel inverters. In the generation of PWM using space vector, known as Space Vector PWM (SVPWM), the instantaneous reference space vector is approximated by switching the three nearest inverter voltage space vectors [3 - 9]. In the literature, SVPWM is considered as a better method of PWM generation [2 - 9]. However the complexity involved in the implementation of SVPWM for multilevel inverters increases with the levels of the inverter. The increase in complexity is attributed to the increase in the number of switching voltage space vectors with the inverter levels. The implementation of SVPWM involves (i) identifying the sector enclosing the reference space vector (ii) determining the switching voltage space vectors required to approximate the reference space vector (iii) determining the duration of each of these voltage space vectors and (iv) optimizing the switching sequence for each sector. Several methods for the implementation of SVPWM with reduced complexity have been proposed in the literature [4 - 11]. In [4 - 6], a method of implementing SVPWM using a coordinate transformation of the instantaneous reference space vector to another coordinate system is proposed. In [6], a method of implementing SVPWM using a mapping

technique is also proposed. In the conventional methods of SVPWM implementation, look up tables are necessary mainly to achieve an optimized switching sequence for every instantaneous reference space vector. Techniques utilizing the equivalence of SVPWM and Sine-Triangle PWM can also generate SVPWM signals without using look up tables [10,11]. In the present work, the inherent fractal structure in the switching voltage space vector representation of multilevel inverter is brought out and the same is used to generate SVPWM signals for multilevel inverters. The implementation of SVPWM using the inherent fractal structure reduces the complexity in the various stages of implementing SVPWM. The proposed method of SVPWM implementation reduces the complexity in sector identification [12]. In the proposed method, the switching vectors are also determined simultaneously with sector identification without look up tables. The determination of the duration of operation of these switching voltage space vectors is done by mapping the switching vector located at a vertex of the identified sector to the actual zero vector [6]. The proposed method also determines the optimum switching sequence in every sector without look up tables. This paper explains the generation of SVPWM using the inherent fractal structure for a 3-level inverter. The simulation is performed for a 3-level inverter configuration. The method can be applied to any multilevel inverter configurations. The implementation for a 3-level inverter is carried out using DS1104 card and the experimental results are also presented. II. FRACTAL IN THE SWITCHING SPACE VECTOR REPRESENTATION OF 3-LEVEL INVERTER In SVPWM, the reference space vector is obtained from the three instantaneous reference phase voltages. The triangle formed by the three switching voltage space vectors located nearest to the reference space vector is a sector. Fig.1 shows the switching space vector locations of a 2-level inverter. The 2-level inverter has six triangular regions, sector, and are numbered I-VI. These six regions result from the eight switching vectors corresponding to a 2-level inverter.

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2 shows the switching voltage space vectors of a 3-level inverter. Fig. called sectors.2 Switching voltage space vectors of 3-level inverter will result in the switching voltage space vector representation of 3-level inverter. GENERATING SVPWM USING THE INHERENT FRACTAL STRUCTURE The generation of SVPWM involves three stages (i) sector identification and switching vector determination. 3. According to fractal theory [13] the procedure that divides the triangle into four smaller triangles by determining the midpoints of each side of the original triangle is called Sierpinski iteration. and A06. (where i from 1 to 12). The six sectors of a 2-level inverter are shown in Fig.2. is the Sierpinski triangle. Thus the sectors of a 3-level inverter can be seen to have evolved from the sectors of 2-level inverter by dividing each triangular region of the 2-level inverter into four smaller triangular regions. These 12 new space vector locations are named A1i. A03. Generating the sectors of 3-level inverter from the sectors of 2-level inverter A05 A110 A A06 703 . 3(b).3. Sector identification and switching vector determination Sector identification involves determining the sector enclosing the instantaneous reference space vector. The 3-level inverters have 12 new space vector locations in addition to the space vector locations of a 3-level inverter. A02. This can be done by determining the midpoints of each side of the sectors of the 2. The 2-level inverter has two redundant zero vectors. The midpoints are shown as solid dots in Fig. In Fig.2 that these additional space vector locations are at the midpoints of each side of the six triangular regions. in Fig. A05. The joining of the three midpoints. which is the outcome of Sierpinski iteration. III. Fig. β) components of the instantaneous reference space vector can be obtained from the three instantaneous A14 A02 A03 A14 A02 reference phase voltages as A15 A12 A00 A19 A11 A111 A112 A13 A01 A03 A02 A16 A17 A15 A00 A110 A12 A11 A112 A13 A01 A04 A01 A04 A17 A04 A18 A18 A05 A06 A11 A05 A111 (c) (a) 06 (b) Fig.A03 A02 A03 A16 A01 A14 A15 A02 A12 A13 A11 A112 A11 A01 II III A04 A00 I VI V A04 IV A17 A110 A00 A18 A06 A05 Fig. The remaining two vectors are the zero vectors located at A00. of the 2-level inverter.1 Switching voltage space vectors of 2-level inverter A05 A111 A06 The six switching vectors are located at A01. Fig. A03 A16 A00 Fig. The (α.3 shows the generation of the sectors of a 3-level inverter from the sectors of an equivalent 2-level inverter. (ii) determination of duration of the switching vectors and (iii) optimization of switching sequence for every sector.level inverter. The structure. 3(a).3 (b) the midpoints of each sector of the 2-level inverter is obtained. A04. The 12 new space vector locations will increase the total number of sectors of 3-level inverter to 24.(c). It may be noted from Fig.

The region identified for the reference vector A00R is region I. the sector identified is ∆ A12A13A02. which determine the duration of operation of switching voltage vectors for each of the six regions of the 2-level inverter. When the vector located at A12 is chosen to correspond to zero vector. the voltage space vector located at A12 is chosen to correspond to the zero vector.4. 211). the coordinates and switching states of A12 are obtained as the average of the coordinates and inverter states of A00 and A02. For the instantaneous reference space vector A00R. in Fig. Similarly. The midpoints corresponding to each side of the region I of 2-level inverter are determined. The triangle with the centroid closest to the instantaneous reference space vector tip is the sector to be identified. the sector will be equivalent to region I of the 2-level inverter as shown in Fig. which has the maximum value for the sum of all the redundant states. The inverter states corresponding to the vector located at A12 are (110.Vα = 3 Va 2 3 Vβ = (Vb − Vc ) 2 (1) In the proposed method. 020 A03 A02 220 020 A03 110 221 A02 A12 220 020 A03 110 221 A02 R A04 022 R A11 100 211 A13 R A 12 100 211 220 A13 210 210 A00 000 111 222 200 A01 A04 022 A00 000 111 222 200 A01 A04 022 A00 000 111 222 A11 200 A01 201 002 A05 (a) A06 202 002 A05 102 (b) A06 202 002 A05 (c) A06 202 Fig. This is done by repeatedly comparing the three instantaneous reference phase voltages and determining the region as in [9]. Choosing a vector located at one of the vertices of the identified sector to correspond to the actual zero vectors does the mapping. The three new vectors located at the midpoints will result in four new triangles.The coordinates and the inverter states of the location A13 are obtained as the average of the coordinates and switching states of A01 and A02. Determination of duration of each switching vector The determination of duration of switching vector is done by mapping the sector identified to enclose the reference space vector to a sector of the 2-level inverter [6]. The distance of the reference space vector from each of these centroids is determined. together with sector identification. A01 and A02 are (000. Since each of these four triangles are equilateral triangles the coordinates of the centroid of each triangle can be obtained as the average of the coordinates of the three vertices.4(c).4 (b). B. The average of the α and β coordinates of the vectors at A00 and A01 will result in the coordinates of A11. refer Fig. 222). the switching vectors are also determined without look up tables. The vector chosen to correspond to the zero vectors is subtracted from the remaining two vectors located at the other vertices of the sector and also from the instantaneous reference space vector. The inverter states corresponding to the switching vectors located at A00. sector identification begins with determining the region enclosing the reference space vector from the six regions of an equivalent 2-level inverter. which are the sectors of 3-level inverter. The conventional equations. A12 and A13. and the space vectors located at the vertices of the sector are the switching vectors that will approximate the instantaneous reference space vector. The vector chosen is the one. The averaging applied to the inverter states will result in the inverter states corresponding to the switching vector located at A11 as (100. The sector ∆ A12A13A02 encloses the reference space vector. This will reduce the identified sector to a sector of the 2-level inverter. The midpoints are located at A11.5. can be used after such mapping is applied. Thus the new voltage space vector locations and the inverter states corresponding to these new voltage space vectors are obtained simultaneously. Similar mapping can be applied to every identified sector and can be mapped onto one of the six regions of the 2-level inverter. 111. The inverter states of the vector located at A13 are obtained as (210). (200) and (220) respectively. 221). For the sector identified to enclose the reference space vector A00R. The centroids of each of these four new sectors are now determined. Sector identification by the proposed method 704 . Thus in the proposed method.

6 shows all the sectors of a 3-level inverter generated through the proposed method. Fig. EXPERIMENTAL AND SIMULATION RESULTS 110 221 A12 A13 210 A00 000 111 222 100 211 A11 200 A01 Fig.13. Thus it involves only one switching per phase for a sampling interval.11 shows the simulated phase voltage for a 3-level inverter. Fig. A13 and A02 are (110. 211) and (210) respectively. the last two redundant states are selected for the vector. The figure shows that the inverter switches between the voltages 150V and 300V. ( 100. As stated earlier.5. The figure shows that the inverter switches between the levels of 0V. the last redundant states are selected. In the adopted strategy. The output switches between the levels 2. The result is obtained by simulating the proposed method for an induction motor model. Fig. Fig. The proposed method has also been implemented. Fig. In the present work. formed by the vectors located at the vertices of the ∆ A12A13A02.6.8 shows the PWM signals for the three phases for two consecutive sampling instants. The three levels of the inverter is represented at the output of the DAC with three voltage levels. 150V and 300V.5V and 5V. Fig.10 shows the result for 2-level operation of the inverter. 221). a strategy is adopted which will result in an optimum switching for every sector. IV. For the instantaneous reference space vector A00R. For the remaining two vectors. two of the redundant states are obtained for this vector. The method is implemented using DS1104 card and the levels of the inverter have been generated using a DAC card. The PWM signals are shown when the tip of the reference space vector is located in different sectors.14 shows the phase voltage for three level inverter corresponding to 3-level operation Fig. Mapping to determine the duration of switching vectors C.9 shows the simulated pole voltage for the 3level inverter corresponding to a 2-level operation. According to the adopted strategy. This selection can result in an optimum switching. For the remaining two vectors of the sector. The figure shows that an optimum switching achieved since it involves only one switching as the inverter moves from one voltage space vector to another. the switching states corresponding to the vectors located at the A12. one of the vectors is selected to coincide with the actual zero vector. for a 3-level inverter. Switching voltage space vector locations for a 3-level inverter . Optimization of the switching sequence of the sector. the last redundant state is selected. The output obtained from the DAC has three voltage levels as shown in Fig. The sum of the switching states for the voltage vector located at A12 is 1+1+0+2+2+1=7. So the optimum switching sequence for this sector is 110 210 705 The proposed method has been simulated for a 3-level inverter. The proposed method of obtaining an optimum switching sequence using the adopted strategy of choosing a virtual zero vector will result in an optimum switching without using any look up tables. This is true for any virtual zero vector since the virtual zero vector should be chosen as the one closest to the actual zero vector and hence has the maximum redundant states.12 shows the simulated pole voltage for a 3-level inverter corresponding to 3-level operation of the inverter. the vector selected to coincide with the zero vector is the vector which has maximum value for the sum of all the switching states including the redundant states. Optimum switching implies that there occurs only one switching as the inverter moves from one switching vector to another. Thus the vectors located at A13 and A02 have the states selected as (211) and (210) respectively.A02 R 220 211 221. In order to determine the duration of operation of the switching vectors of the identified sector. on TMS 320F240 platform using a dSPACE 1104 card.7 and Fig. The 24 sectors of the 3-level inverter has been generated. The switching voltage space vector located at A12 is thus selected to coincide with the zero vector since it has maximum value for sum of switching states. enclosed by the sector ∆ A12A13A02. Fig. which is selected to coincide with the actual zero vector. The sum of the switching states for the vectors located at A13 and A02 are 5 and 3 respectively.

Pole voltage for the 3-level operation 706 .9. Phase voltage for the 2-level operation simulated with a motor model Fig.Fig.11.10 Pole voltage obtained through a DAC output Fig. Pole voltage for the 2-level operation Fig.7 PWM signals for the 3 phases for 2 consecutive sampling instants for a particular sector Fig.8 PWM signals for the 3 phases for 2 consecutive sampling instants for another sector Fig.12.

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