OPTIC FIBRE COMMUNICATION SYSTEM

DONE BY: ANJUS ANU ANAND ASHA JOHN Ms.SumoI.N.C Mr. Asini.H

GUIDED BY:

ABSTRACT
The circuit for OPTIC FIBRE COMMUNICATION SYSTEM is designed to demonstrate the transmission and reception of a digital data through an optic fibre cable. The optic signals generated by the transmitter circuit are received by the optical receiver circuit after transmission through an optic fibre cable.This communication is much more effective than ordinary communication. It provides bandwidth in the GHz range.lt provides minimum transmission loss. It finds many applications in communication systems, measuring systems, industrial, medical and military applications.

CONTENTS

INTRODUCTION

o BLOCK DIAGRAM o BLOCK DIAGRAM EXPLANATION o CIRCUIT DIAGRAM o CIRCUIT DIAGRAM EXPLANATION o PCB DESIGNING AND FABRICATION o PCB LAYOUT o PCB SCHEMATIC o COMPONENTS LIST o CONCLUSION o REFERENCES o DATASHEETS INTRODUCTION This project done on communication using optic fibres can be used for data transmission over small distances in computer networks, closed circuit T.V s etc. The information carrying capacity is directly proportional to the frequency or bandwidth of the carrier wave. This system uses light as a carrier wave in the frequency range 10A13 Hz to 10A16 Hz. Hence information transmission capacity increases by several order of magnitude.Thus it overcome almost all

the drawbacks of communication systems involving electrical signals. BLOCK DIAGRAM EXPLANATION
The block diagram given in the figure shows a basic optic fibre communication system.lt mainly consists of three elements
1) Optical transmitter 2) The optic fibre cable 3) The optical receiver

This general description is appropriate for analog as well as digital communication systems.Fibre optic technology and communication technology are involved in this system. 1) The optical transmitter It consists of electronic components which convert the electrical signals into corresponding optical signals. The data in the form of electrical signal is provided to drive the circuit. This is achieved by using an astable multivibrator which generate a series of digital data in the form of ones and zeroes. This signal is used to turn ON and OFF an LED.This is done by means of a transistor switching circuit.The electrical signals are converted into light signals by an optical source consisting of an LED. These light signals are then transmitted through the optic fibre cable. The LED provides light of constant wavelength and low transmission loss. The light injected into the OFC is a faithful representation of the information. 2) The optic fibre cable It consists of glass fibres which act as wave guide for optical signal. For long distance transmission^ or more fibres are joined together. The optic fibre is made of three layers namely core, cladding and protective covering.Optic fibre works on the principle of total internal reflection. 3) The optical receiver It consists of a photo detector, amplifier and a signal indicator. The photodetector converts optical signal into corresponding electrical signal. Here an LDR is used to detect the incoming light signals. The amplifier amplifies the signal. An LED is used to indicate the reception of the data.

CIRCUIT DIAGRAM
TRANSMITTER

RECEIVER

CIRCUIT DIAGRAM EXPLANATION

OPTICAL TRANSMITTER The circuit for a basic optic fibre communication system for transmitting a series of digital data is shown in the figure. For the purpose of generating the digital signals, an astable multivibrator is designed. When the circuit is connected as shown in the above figure(pin 2 and 6) connected it triggers itself and free runs as a multivibrator.The external capacitor charges through Rl and R2 and discharges through R2 only. Thus the duty cycle may be precisely set by the ratio of these two resistors. In the astable mode of operational charges and discharges between 1/3 Vcc and 2/3 Vcc. As in the triggered mode ,the charge and discharge times are therefore frequency are independent of the supply voltage. The charge time(output high) is given by: tl=.693(Rl+R2)Cl And the discharge time (output low) by : t2=0.693(R2)Cl Thus the total period t is given by : T=tl+t2= 0.693(R1+2R2)C1 The frequency of

oscillation is then : f=l/T=1.44/(Rl+2R2)Cl The duty cycle is given by :D=R2/R1+2R2 The output signals thus produced by the astable multivibrator is fed to a transistor switching circuit.For this a BF 194 transistor is used.

Switching circuit
An LED is connected to the collector of the transistor which will be turned ON and OFF according to the input digital data. As the input to the base of the transistor goes high ,the transistor switches to saturation. Current passes through the transistor and therefore LED glows. As the input to the transistor goes low ,the transistor switches to cut off and therefore LED doesn't glow. Superluminiscent LEDs are used here. For proper operation of astable multivibrator ,a +10 V supply and for the switching circuit a +5V supply is used. The LED thus produces the optical signals which are to be transmitted. The LED is coupled to the OFC by means of suitable coupler without any loss of data.Thus the signal is effectively transmitted through the OFC. OPTIC FIBRE CABLE Here multimode type OFC is used. The OFC is made from silica glass. A plastic coating is also provided. They have larger numerical aperture to facilitate efficient coupling to inherent light sources such as light emitting diodes. They provide bandwidth in the GHz range. Optic fibre works on the principle of total internal reflection of light. When a ray of light passes from a dielectric medium of refractive

index nl (denser) to other of refractive index n2(rarer) ,and when the angle of incidence is critical angle e, then the refracted ray in the fibre just grazes the surfaces separating the two medium.ie the angle of refraction becomes 90.When the angle of incidence becomes greater than critical angle, the light ray gets totaly internally reflected into the same medium. This phenomenon is called total internal reflection. Any light ray incident on the fibre edge at an angle greater than 0a meets the core cladding interface at an angle less than critical angle and will not be totally internally reflected and transmitted. Only the light rays that enter the fibre edge within the angle Oa will be accepted by the fibre for total internal reflection. Thus this angle of incidence 0a is called the acceptance angle. The numerical aperture of a fibre deopends on the acceptance angle 0a by the relation Sin Oa=NA. Optic fibres are very light and easy to handle. Using these the hazards due to short circuit can be avoided. It is also ideal for secret communication because it is very difficult to tap. Optic fibres are unaffected by outdoor atmospheric conditions like lightning. Besides there is no possibility of spark from broken fibre. It will not corrode and is unaffected by most chemicals. They are also immune to electromagnetic interference and avoid crosstalk.Also transmission losses are very low.

OPTICAL RECEIVER

The light transmitted through the OFC has to be properly received. For this optical signal has to be converted into corresponding electrical form . To perform this optical detectors are used. Here an LDR is used for this purpose. The OFC is effectively coupled to the LDR without lossage of incoming data. The LDR is placed in the biasing circuit of the transistor BF547.As the incoming signal goes high, the resistance of the LDR goes low. Current flows and proper biasing is achieved. The transistor then switches to saturation. An LED is connected at the collector of the transistor as an indicator of the incoming signal. As the transistor switches to saturation, current flows and LED glows. When the incoming signal goes low ,the resistance of the LDR becomes high. Current doesn't flow. Transistor switches to cut off and therefore the LED turns OFF. Thus the data has been effectively transmitted from the transmitter circuit to the receiver. This circuit forms the basis of all optic fibre systems.

POWER SUPPLY
A regulated power supply is an electronic circuit that is

designed to provide a constant dc voltage of predetermined value across load

terminals irrespective of ac mains fluctuations or load variations. It mainly consists of an ordinary power supply and a voltage regulating device The system requires a regulated +5 v supply for the switching circuit and a +10V supply for the astable multivibrator. A +5V supply is also needed for the receiver circuit. These can be delivered from the 230V domestic supply. Before applying this to the system we must step down this high voltage to an appropriate value. After that it should be rectified. This will provide a

unidirectional current. To achieve a +5V DC we should regulate this. All these are done in power supply circuitry, which is explained below. A 12-0-12 V step down transformer is connected to provide the necessary low voltage. The transformer also works as an isolator between the hot and cold end. The hot end refers to the 230 V supply, which is a hazardous one, and the cold one refers to the safe, low voltage. Now the hot portion appears only at the primary of the transformer.The secondary of the transformer deliver 12 V ac pulses along with a ground. This ac supply goes to a center tap rectifier, which converts the ac into a unidirectional voltage.The ripples in the resulting supply is filtered and smoothed by a 2200 microfarad /25V capacitor. The 0.1 microfarad capacitor bypasses any

high frequency noises.The resulting supply has the magnitude above 17 V. This voltage is fed to the regulator IC 7805 and 7810.This IC 7805 provides a regulated 5V positive supply at its 3rdpin.The required input for this is more than 7.5 V. The IC 7810 provides a regulated 10V positive supply at its 3 rd pin

Device type 7805 7810

Output voltage in volts +5 +10

Maximum input voltage in volts 35 35

Minimum input voltage in volts 7.3 12.5

PCB DESIGNING AND FABRICATION DESIGN AND PCB FABRICATION The PCB consists of an insulating base material on which copper conductors are etched by photolithography or screen printing. The insulating materials provides electrical isolation and mechanical rigidity for the printed conductors as such it should possess the essential electrical and mechanical properties and good flexural strength, reasonable high temperature with standing capability, low moisture absorption warpage, good merchantability, good electrical resistance, high dielectric strength, low dielectric constant, low dissipation factor etc. PHOTOGRAPHIC METHOD OF PCB FABRICATION Photographic method is another commonly used PCB fabrication method. It is more expensive and widely used for massive production. SCREEN PRINTING In this method, a mesh is prepared and is placed over the copper sheets. Screen printing material is pasted over the areas where the circuit is to be land. All other areas are kept open. The different steps used in PCB fabrication are listed below :Cutting copper clad lamination The copper clad laminates are manufactured in 4 inch*3 inch size. From this sheet pieces are cut off to the required size using a shearing machine. For the purpose of handling the PCB during fabrication, borderline of PCB. Hence atleast cutting PCB provides 10 mm of additional space from the actual required PCB size. Cleaning The copper oxides may build up on the copper surface. Inorder to remove this following procedure is required :a) Wipe with cotton wool socked in trichloro ethylene b) Dipping in 10% HC1 for 1 minute at room temperature. c) Scrub with pumice powder. PCB LAYOUT

TRANSMITTER

PCB SCHEMATIC

CONCLUSION
This circuit can be considered as the basis for all systems utilizing the optic fibre technology. The project explains the transmission of data through an optic fibre cable. Optic fibre sensors like smoke or pollution detector,LDV,crack sensors etc has wide usage today. Besides optic fibres finds many applications in telecommunication, LAN networks, industrial applications like horoscope and remote sensing, medical applications, military applications like antitank missile system, secret communication links etc. It is expected that Photonics ,the light based systems rather than electronics, the electron flow devices will dominate in the coming years.

NE555 SA555 SE555 GENERAL PURPOSE SINGLE BIPOLAR TIMERS

LOW TURN OFF TIME MAXIMUM OPERATING FREQUENCY GREATER THAN 500kHz TIMING FROM MICROSECONDS TO HOURS OPERATES IN BOTH ASTABLE AND MONOSTABLE MODES HIGH OUTPUT CURRENT CAN SOURCE OR SINK 200mA ADJUSTABLE DUTY CYCLE TTL COMPATIBLE TEMPERATURE STABILITY OF 0.005% PERC DESCRIPTION The NE555 monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200mA. The NE555 is available in plastic and ceramic minidip package and in a 8-lead micropackage and in metal can package version.
D S08 (Plastic Micropackage) N DIP8 (Plastic Package)

ORDE R

TemperaturePackageNumberRang e5NE555oc,70CSA555 | ^oc105C| SE555 |55C125C

PIN CONNECTIONS (top view)

c L2 ~ L3 ~ 4 C

J
8
7

J J 1 J
6 5

1 2 3 4 5

- GND - Trigger

- Output - Reset - Control voltage 6 - Threshold 7 - Discharge 8-Vcc

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NE555/SA555/SE555

BLOCK DIAGRAM

THRESHOLD -CONTROL VOLTAGE "

SCHEMATIC DIAGRAM
CONTROL VOLTAGE THRESHOLD COMPARATOR

Vcc'O R1 4.7k R2 R3 4.7k 830 R12 6.8k

J Q2 Q5^|-*-Q6
Q7^|

JoB

Q9^

019

*1

f
IQ2C

i--1

THRESHOLD

[,Q1
Q

^J
[011
Q12

R14 220

>

5k
TRIGGER

o
O

[QIC _ . Q16J
R15

RESET

roi5
014 R5 10k R6 n 100k

DISCHARGE O

r o ,7 1 r7 n 1
100k

7k

"1 i

I
GND TRIGGER COMPARATOR

ABSOLUTE MAXIMUM RATINGS

Symbol Vcc
::=-

Tj

Parameter Supply Voltage Operating Free Air Temperature Range for NE555 for SA555 for SE555 Junction Temperature Storage Temperature Range

Value 18 0 t o 7 0 -40 to 105 -55 to 125 150 -65 to 150

Unit V

c c c
Unit V V

OPERATING CONDITIONS
Symbol Parameter Vcc Supply Voltage Vthi Vttjg, VC|, Vreset Maximum Input Voltage SE555 4.5 to 18 Vcc NE555 - SA555 4.5 to 18 Vcc

ELECTRICAL CHARACTERISTICS

NE555/SA555/SE555

Tamb = +25C, Vcc = +5V to +15V (unless otherwise specified)

Symbol Ice Parameter Supply Current (RL ) (- note 1) Low State VCc = +5V Vcc = +15V High State VCc = 5V Timing Error (monostable) (RA= 2k to 100kfl, C = 0.1 uF) Initial Accuracy - (note 2) Drift with Temperature Drift with Supply Voltage Timing Error (astable) (RA, RB = ika to lookn, c = o.iuF, Vcc = +15V) Initial Accuracy - (note 2) Drift with Temperature Drift with Supply Voltage Control Voltage level Vcc = +15V Vcc = +5V Threshold Voltage VCC = +15V Vcc = +5V Threshold Current - (note 3) Trigger Voltage Vcc = +15V Vcc = +5V Trigger Current (Virig = 0V) Reset Voltage - (note 4) Reset Current
Vreset = +0.4V Vreset = 0V

Min.

SE555 Typ. 3 10 2
0.5 30 0.05

Max. 5 12 2 100 0.2

NE555 - SA555 Min. Typ. Max. 3 10 2 6 15 1 50 0.1 2.25 150 0.3

3 0.5

Unit mA % ppm/C %N % ppm/C

%/V V V

1.5 90 0.15
9.6

VCL Vth

2.9 9.4 2.7

10
3.33 10 3.33 0.1

10.4 3.8 10.6 4

0.25 5.2 1.9 0.9

2.6 8.8 2.4

10 3.33

11 4

10 3.33 11.2 4.2

0.1 0.25 5.6 2.2

Ith
v

uA
V

trig

4.8 1.45

5 1.67 0.5

4.5 1.1

5 1.67 0.5

trig Vreset

2.0 1 0.4 1.5

HA
V

0.4

I reset VOL

0.7 0.1 0.4

1
0.4 1

0.4

0.7 0.1 0.4

mA
V

VOH

Low Level Output Voltage Vcc = +15V, l0(sink)= 10mA lo(sink) = 50mA lo(sink) = 100mA lo(sink) = 200mA Vcc = +5V, lo(sink) = 8mA lO(sink) = 5mA High Level Output Voltage Vcc = +15V, lo(source) = 200mA lo(source) = 100mA Vcc = +5V, lo(source) = 100mA

0.1 0.4 2 0.15 0.5 2.2 2.5 0.1 0.25 0.2 0.05

13 3

12.5 13.3 3.3

12.75 2.75

0.1 0.4 2 0.25 2.5 0.3 0.75 2.5 0.4 0.25 0.35 12.5 13.3 3.3

Notes: 1. Supply current when output is high is typically 1mA less. Tested at Vcc = +5V and Vcc = +15V. This will determine the maximum value of RA + RB for +15V operation the max total is R = 20M2 and for 5V operation the max total R = 3.5M12.

2. 3.

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NE555/SA555/SE555

ELECTRICAL CHARACTERISTICS (continued)

SymbolParameterSE555NE555 - SA555Unit Figure 1 : Minimum Pulse Width Required for Figure 2 : Supply Current versus Supply Voltage Trigering O-SilS 0Min.Typ.Max.Min.Typ.Max. Idis(off)Discharge Pin Leakage Current (output high) (Vdis = 5416 10V)2010020100nAVdis(sat)Discharge pin Saturation Voltage (output low) - (note 5) Vcc = +15V, Idis = 15mA Vcc = +5V, Idis = 4.5mA180 80480 200180 80480 200mVtr tfOutput Rise Time Output Fall Time100 100200 200100 100300 300nstoffTurn off Time - (note 6) (V reS et = Vcc)0.50.5US Notes : 5. No protection against excessive Pin 7 current is necessary, providing the package dissipation rating will not be exceeded. 6. Time mesaured from a positive going input pulse from 0 to 0.8x Vcc into the threshold to the drop from high to low of the output trigger is tied to treshold. 0 0.1 VjIV) Figure 3 : Temperature 0.2 0.3 V, (V) 5 10 15

Delay Time versus c50 26

Figure 4 : Low Output Voltage versus Output Sink Current

0.01

gsit 7

Vjr5V -55-c/ JS-c// 125'C

0.1

- 50 -251 2 525 10 0 50 75 lsiNK,rnA ' lam b('C)

20

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NE555/SA555/SE555

Figure 5 : Low Output Voltage versus Output Sink Current

(V)

Figure 6 : Low Output Voltage versus Output Sink Current

vs= 10V
2S*C---------------ZS'C ---------------

55'C -

-55-cn

0.1

2 5 l5INK lmAI

10

20

10

20

'SINK1"1*1

Figure 7 : High Output Voltage Drop versus Output

Figure 8 : Delay Time versus Supply Voltage

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NE555/SA555/SE555

GS4 2Q 1 1 I\ \\25-<125'C,
5 1 0

GSO ZS

VV M1
2 0 1 1

'SOURCE " *'

0 5 VS(V)

10

15

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NE555/SA555/SE555

APPLICATION INFORMATION MONOSTABLE OPERATION In the monostable mode, the timer functions as a one-shot. Referring to figure 10 the external capacitor is initially held discharged by a transistor inside the timer.

t = 0.1 rns / div INI1 'UT =1 2.0'//divOUTPU1' vo-TACiE =5.0Vdiv/<r1

Figure 10

CAPACITOR VOLTAGE = 2.0V/div R1 = 9.1kQ, C1 = 0.01uF, R|_=

Figure 12 Figure 11

1kQ

The circuit triggers on a negative-going input signal when the level reaches 1/3 Vcc. Once triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered again during this interval. The duration of the output HIGH state is given by t = 1.1 R1C1 and is easily determined by figure 12. Notice that since the charge rate and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply. Applying a negative pulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2) during the timing cycle discharges the external capacitor and causes the cycle to start over. The timing cycle now starts on the positive edge of the reset pulse. During the time the reset pulse in applied, the output is driven to its LOW state. When a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the short circuit across the external capacitor and driving the output HIGH. The voltage across the capacitor increases exponentially with the time constant x = R1C1. When the voltage across the capacitor equals 2/3 Vcc, the comparator resets the flip-flop which then discharge the capacitor rapidly and drivers the output to its LOW state. Figure 11 shows the actual waveforms generated in this mode of operation.

When Reset is not used, it should be tied high to avoid any possibly or false triggering.

10 100 1.0 10 100 10 (td) us

s

us

ms

ms

ms

ASTABLE OPERATION When the circuit is connected as shown in figure 13 (pin 2 and 6 connected) it triggers itself and free runs as a multivibrator. The external capacitor charges through Ri and R2 and discharges through R2only.

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NE555/SA555/SE555

Thus the duty cycle may be precisely set by the ratio of these two resistors. In the astable mode of operation, C1 charges and discharges between 1/3 Vcc and 2/3 Vcc. As in the triggered mode, the charge and discharge times and therefore frequency are independent of the supply voltage.

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Figure 13

Figure 15 : Free Running Frequency versus Ri, R2 and Ci

(tiF) 10 1.0 0.1 0.01 0.00 0.1 1 SO-

10

100

1k

10k f0(Hz)

Figure 14 shows actual waveforms generated in this mode of operation. The charge time (output HIGH) is given by : ti = 0.693 (Ri + R2) Ci and the discharge time (output LOW) by: t2 = 0.693 (R2) Ci Thus the total period T is given by : T = ti + tz = 0.693 (Ri + 2R2) Ci The frequency ofoscillation is them : f = ^ = 1.44 ~ T ~ D= Ri (Ri + 2R2) Ci + may be easily found by and 2R figure 15. 2The duty cycle is given by: R2 t = 0.5 ms / div

PULSE WIDTH MODULATOR When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to pin 5. Figure 16 shows the circuit. Figure 16 : Pulse Width Modulator.

-O Vcc*

Trigger O-------- 2

NE555

ouTPU"r voLTAC3E =5.0V'div

/V

Output O

acii"or 1"age= 1OV/dV /V/V)V/\

= 4.8kfl, C1= 0.1uF, RL= 1kQ

Figure 14

NE555/SA555/SE555

LINEAR RAMP When the pullup resistor, RA, in the monostable circuit is replaced by a constant current source, a linear ramp is generated. Figure 17 shows a circuit configuration that will perform this function. Figure 17.

For the output low it is t.2 = [(RARB)/(RA + RB)] CLn1 2RB - RA Thus the frequency of oscillation is f , ti + t2 Note that this circuit will not oscillate if RB is greater Figure 19 : 50% Duty Cycle Oscillator.

O Vcc'

Output o

Figure 18 shows waveforms generator by the linear ramp. The time interval is given by : (2/3 Vcc RE (RI+ R2) C Ri Vcc - VBE VBE = 0.6V T= (RI+ R2> Figure 18 : Linear Ramp. 50% DUTY CYCLE OSCILLATOR For a 50% duty cycle the resistors RA and RE may be connected as in figure 19. The time preriod forthe output high is the same as previous, ti = 0.693 RA C.

than 1/2 RA because the junction of RA and RB cannot bring pin 2 down to 113 Vcc and trigger the lower comparator. ADDITIONAL INFORMATION Adequate power supply bypassing is necessary to protect associated circuitry. Minimum recommended is 0.1 u.F in parallel with 1uP electrolytic.

-i

Vcc = 5V Time = 20us/DIV Ri = 47kfl R2 = 100kfl Re = 2.7k2 C = 0.01N.F

Top trace : input 3V/DIV Middle trace : output 5V/DIV Bottom trace : output 5V/DIV Bottom trace : capacitor voltage 1V/DIV

PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP

e 4

n i i n tn
u_
[8 5

I1

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NE555/SA555/SE555

Dimensions Min. A a1
B

Millimeters Typ. 3.32

Max.

Min. 0.020

Inches Typ. 0.131

Max.

0.51 1.15 0.356 0.204 7.95 2.54 7.62 7.62 6.6 5.08 3.18 3.81 1.52 1.65 0.55 0.304 10.92 9.75

0.045 0.014 0.008 0.313 0.100 0.300 0.300

0.065 0.022 0.012 0.430 0.384

b b1 D E e e3 e4 F i L
Z

0260 0.200 0.125 0.150 0.060

PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO)

e3

ti

uuuu
Dimensions Min. A a1 a2 a3 b b1 C d D E e e3 F L M 3.8 0.4 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 4.0 1.27 0.6 0.150 0.016 0.1 Millimeters Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 ______0.5 0.026 0.014 0.007 0.010 Min. 0.004 Inches Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024

45 (typ.) 5.0 0.189 6.2 0.228

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NE555/SA555/SE555

8 (max.)

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico Morocco The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

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