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# Analog Electronics Circuits Laboratory Manual

EXPERIMENT NO. 1

RC COUPLED AMPLIFIER
AIM: To design and conduct of RC Coupled single stage (a) BJT (b) FET amplifier and determination of gain frequency response, input and output impedance COMPONENTS: Resistors, Capacitors, RPS, AFG, BJT SL100, FET BFW 10/11, DRB, Multimeter, Connecting Board and wires A. BJT RC COUPLED AMPLIFIER CIRCUIT DIAGRAM:

DESIGN:

a) To Find RE Assume VCC = 12V, VRE = 2V, IC = 4 mA, β = 100(SL100) IE ≈ IC RE = VRE / IE = VRE/ IC = 2/4.0m = 470Ω RE = 470Ω (Std) b) To Find R1 and R2 VB = VBE + VRE = 0.7 + 2 = 2.7V IB = IC /β= 4m/100 = 0.04mA

Dept of E&C, G.C.E., Ramanagaram

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Analog Electronics Circuits Laboratory Manual

10IB

9IB

Assume 10IB flows in R1, 9IB flows in R2 R1 =( VCC – VB)/ 10IB = (12 – 2.7)/ 10(0.04m) = 23.25KΩ R1 = 22KΩ (Std) VB = VR2 = 9IB * R2 R2 = VB /9IB = 2.7 / 9(0.04m) = 7.5KΩ R2 = 6.8KΩ (Std) c) To Find RC Choose VCE = VCC /2= 12/2 = 6V VCC – ICRC – VCE – VRE = 0 12 – (4m)RC – 6 – 2 = 0 RC = 1KΩ RC = 1KΩ (Std) b) To Find CE, CC1 and CC2 XCE = RE /10 at f = 100Hz 1/2πfCE = RE/10 CE = 10 / 2πfRE = 10 /[2π(100)(270)] CE = 47µF (Electrolyte)

= 59µF

Choose CC1 = CC2 = 0.47µF. These are coupling capacitors to offer low reactance path for ac signal

Dept of E&C, G.C.E., Ramanagaram

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Analog Electronics Circuits Laboratory Manual

B. FET RC COUPLED AMPLIFIER CIRCUIT DIAGRAM:

DESIGN: From data sheet of BFW 10/11 IDSS = 10 mA VP = - 3V or - 4V Let ID = 2mA a) To Find Rs : From the equation of the current ID = IDSS( 1 – VGS/VP)2 ID / IDSS = ( 1 – VGS/VP)2 Substituting for ID = IDSS and VD VGS = - 1.65 VGS = IDRS RS = VGS /ID =0.820KΩ RS = 1KΩ b) To Find RG : IGSRG = VGS RG = VGS/ IGS = 1.65 /1µA = 1.65MΩ RG = 2MΩ c) To Find RD : Applying KVL VDD = IDRD +IDRS+VDS RD = (VDD-VDS – IDRS)/ ID RD = 1.5KΩ
Dept of E&C, G.C.E., Ramanagaram

Assume & set VDD = 10V then VDS = VDD = 5/2V

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Analog Electronics Circuits Laboratory Manual

d) To Find Cs & CC Let f =100KHz XCS = RS /100 = 1000 /100= 10Ω XCS= 1/2πfCS CS = 1/ 2πfCE = 0.15µf Cs= 0.15µf Select C = 0.22µf = CC1 = CC2

FOR BJT & FET AMPLIFIERS
PROCEDURE: a) To get frequency response: 1. The connection are made as shown in the circuit diagram 2. Before applying the input signal, the DC conditions are checked y setting Vcc = 12V. Vcc must be closed to 1/2Vcc = 6V. 3. Input sinusoidal signal (frequency = 1 KHz and voltage 50 mV peak-to-peak) should be applied using ASG. Care should be taken to get undistorted wave at the output, while applying input signal. 4. Keeping input signal Vin constant, the frequency of input is varied from 100Hz to 1MHz in suitable steps while measuring the output voltage for different frequencies. 5. The gain of the amplitude is calculated and tabulated. The graph of frequency Vs gain in dB is plotted on a semi log sheet. 6. Bandwidth is calculated from the frequency response. Also gain bandwidth product is computed. TABULAR COLUMN: Vs = _____________________mV Frequency(Hz) 100Hz Vo(P-P) (V) Gain Av = Vo/Vi Gain Av in dB = 20log10Av

1MHz

Dept of E&C, G.C.E., Ramanagaram

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Analog Electronics Circuits Laboratory Manual

INPUT & OUTPUT WAVEFORM:
Vin (V)

t

V0(V) Vm t

FREQUENCY RESPONSE CURVE:

Gain in dB

b) To measure output impedance ‘Zo’:

Dept of E&C, G.C.E., Ramanagaram

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The DRB value gives the input impedance Zi of an amplifier. 3. 4. Bandwidth (BW) = _____________________Hz Midband gain = Amid = _____________________ Gain Bandwidth Product = BWxAmid = _______________ Input Impedance = _______________Ω Output Impedance = __________________Ω Dept of E&C. c) To measure input impedance ‘Zi’: 1. DRB is connected as shown in the circuit and let the resistance of DRB be high in terms of several kilo ohms or mega ohms. 2. RESULT: 1. Keep the input sine wave frequency in the mid band region. 3.. Ramanagaram 6 . 3. 2. Keep the input frequency in the mid band region. DRB is connected as shown in the circuit and keep the resistance of DRB to zero. 2. Resistance on DRB is decreased till Vo reduces to half of its value. Output voltage Vo is measured 4. 5. 4.Analog Electronics Circuits Laboratory Manual 1. Resistance on DRB is increased till Vo reduces to half of its value.E. The DRB value gives the output impedance Zo of an amplifier. Output voltage Vo is measured. G.C.

75 M Ω R1= 1MΩ (Std) Dept of E&C. CRO. COMPONENTS: Transistor SL100 (2 No’s).Analog Electronics Circuits Laboratory Manual EXPERIMENT NO.2/4µ = 0. input and output impedances.E.25kΩ RE = 1 kΩ (Std) To find RE: To find R1 & R2: Let.6+0. IC1= 4mA. 2 DARLINGTON EMITTER FOLLOWER AIM: Designing and wiring of BJT Darlington emitter follower with & without bootstrapping and determination of gain.04ma IB1= IC1/β= 0.6/3.6 µA R2= VR2/I2 = VRE+ VBE1+ V BE2/ I2= 5+0.. IC2=0 .7 MΩ R2= 1MΩ (Std) R1= VR1/I1= VCC – V R2/ 4µ = 10 – 6. IB2= IC2/β= 0. G.4µA)= 4µA I2= 9 IB1= 3. ASG.C. β= 100 Let VCC=10V.4 µA Let I1=10 I B1= (10)( 0. Ramanagaram 7 . Resistors. RPS. 0-30 V RANGE. Capacitors. CRO probes CIRCUIT WITHOUT BOOTSTRAP CIRCUIT DIAGRAM: DESIGN: for SL 100.4µA VCE2= VCC /2= 5V Applying KVL to the output circuit VCC= VCE2+ ICE2 RE RE= VCC – VCE2/IC2= 10-5/4m= 1.6µ = 1.

95 = 200kΩ PROCEDURE (for both with and without Bootstrap): 1) The circuit is connected as shown in the circuit diagram. 5) Input and output impedances are measured for both the circuits.E.Analog Electronics Circuits Laboratory Manual CIRCUIT WITH BOOTSTRAP: DESIGN: Let R3= 10KΩ Bootstrap capacitor CB should be large. 2) The DC condition is checked i e VCE = VCC/ 2 is measured which should be approximately 5V 3) A sine wave of 1V PEAK TO PEAK (1 KHz is applied to the input and output voltage is measured for different frequencies. Ramanagaram 8 . G.0.. 4) The same procedure is repeated with & without bootstrap. The voltage gain = Vo/Vi should be approximately equal to 1 for different frequencies. Select CB= 10µf Zi (without bootstrap ) = hie + R3 = 11KΩ Zi ( with bootstrap ) = Rs/ 1-Av = 10k/ 1. Procedure is same as RC coupled amplifier. Dept of E&C.C.

EXPECTED INPUT & OUTPUT WAVEFORM (for both with & without Bootstrap): Dept of E&C. DRB is connected as shown in the circuit and keep the resistance of DRB to zero. Keep the input frequency in the mid band region. Output voltage Vo is measured 4. 4.. 2.C. Ramanagaram 9 .E. Resistance on DRB is increased till Vo reduces to half of its value. 3. To measure input impedance ‘Zi’(for both with and without Bootstrap): 1. G.Analog Electronics Circuits Laboratory Manual To measure output impedance ‘Zo’(for both with and without Bootstrap): 1. Keep the input sine wave frequency in the mid band region. Output voltage Vo is measured. The DRB value gives the output impedance Zo of an amplifier. 3. Resistance on DRB is decreased till Vo reduces to half of its value. DRB is connected as shown in the circuit and let the resistance of DRB be high in terms of several kilo ohms or mega ohms. 2. The DRB value gives the input impedance Zi of an amplifier.

WITHOUT BOOTSTRAP : a) Voltage gain = A v = _______________________ b) Input impedance = Z i = ___________________Ω c) Output impedance = Zo = _______________________Ω 2. WITH BOOTSTRAP : a) Voltage gain = Av = ________________________ b) Input impedance = Z i = ________________________Ω c) Output impedance = Zo = ______________________Ω Dept of E&C.Analog Electronics Circuits Laboratory Manual Tabular column for without bootstrap: Vi = __________________ V Frequency (Hz) 100 HZ 1MHZ Tabular column for with bootstrap: Vi = __________________ V Frequency (Hz) 100 HZ 1MHZ RESULTS: 1..E. Ramanagaram Vo(V) A v= Vo/ Vi Vo(V) A v= Vo/ Vi 10 . G.C.

9IB flows in R2 R1 = (VCC – VB )/10IB = (12 – 1. 3 VOLTAGE SERIES FEEDBACK AMPLIFIER AIM: To design BJT voltage series feedback amplifier and determination of gain.2V RE = VRE / IE = 1. Multimeter.9V IB = IC / β = 2m/115 = 17. DRB.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO.9)/10(17.C. BJT SL100. AFG.21KΩ R1 = 56KΩ Dept of E&C. COMPONENTS: Resistors. split the 600Ω resistance as 220 + 390Ω) b) To Find R1 and R2 VB = VBE + VRE = 0.E.. Capacitors.35μ) = 58. RPS. G. input and output impedance with and without feedback. frequency response.2/2mA = 600Ω RE =600Ω (for the first stage alone.2 = 1. Ramanagaram 11 . Connecting Board and wires CIRCUIT DIAGRAM: DESIGN: Assume Vcc = 12V VRE = VCC / 2 = 12/2 = 6V IC = 2mA β = 115 (transistor Q1 & Q2 are BC1474 ) a) To Find RE Let VRE = 12/10 = 1.35µA Assume 10IB flows in R1.7 + 1.

E. Care should be taken to get undistorted wave at the output. Bandwidth is calculated from the frequency response.1) PROCEDURE: a) To get frequency response: 1.Analog Electronics Circuits Laboratory Manual VB = VR2 = 9IB * R2 R2 = VB /9IB = 1. Dept of E&C.01 to 0.16 KΩ XCE = RE / 10 at f = 100Hz 1/2πfCE = RE/10 CE = 10 / 2πfRE = 10 / 2π(100)(270) = 59µF CE = 47µF (Electrolyte) Choose CC1 = CC2 = 0. G.C.. Ramanagaram 12 . Β = RE / (RE + Rf ) = 390 / (10K+390) = 0. The connection are made as shown in the circuit diagram 2. The graph of frequency Vs gain in Db (=20log Vo/Vin) is plotted on a semi log sheet. 4. CC1 and CC2 = 12. 6.037 (The value of β is usually chosen between 0.35µ) R2 = 12KΩ c) To Find RC Choose VCE = VCC/2 = 12/2 = 6V VCC – ICRC – VCE – VRE = 0 12 – (2m)RC – 6 -1. Before applying the input signal. These are coupling capacitors to offer low reactance path for ac signal II STAGE: Design of second stage is same as that of the first stage Let RF = 10KΩ Calculation of feedback factor (β) theoretical The feedback amplifier β is given by. The gain of the amplitude is calculated and tabulated. Also gain bandwidth product is computed. the frequency of input is varied from 100Hz to 1MHz in suitable steps while measuring the output voltage for different frequencies. Input sinusoidal signal (frequency = 1 KHz and voltage 50 mV peak-to-peak) should be applied using ASG.47µF. while applying input signal.2KΩ b) To Find CE. Keeping input signal Vin constant.4KΩ RC = 2.2 = 0 RC = 2.9/ 9(17. VCC must be closed to 1/2VCC = 6V. the DC conditions are checked y setting Vcc = 12V. 3. 5.

Analog Electronics Circuits Laboratory Manual TABULAR COLUMN: Vi = _____________________mV Frequency(Hz) 100Hz Vo(P-P) (V) Gain Av = Vo/Vi Gain Av in dB = 20log10Av 1MHz EXPECTED WAVEFORM: FREQUENCY RESPONSE CURVE: W o t fe db c ith u e a k G in a ind B Whfe db c it e a k f1 f1 1 f2 f2 2 F(H ) z Dept of E&C.E.C.. Ramanagaram 13 . G.

The DRB value gives the input impedance Zi of an amplifier. DRB is connected as shown in the circuit and let the resistance of DRB be high in terms of several kilo ohms or mega ohms. 5. Keep the input sine wave frequency in the mid band region. 5. 2. Output voltage Vo is measured. Resistance on DRB is decreased till Vo reduces to half of its value. RESULT: A.E. G. DRB is connected as shown in the circuit and keep the resistance of DRB to zero. Keep the input frequency in the mid band region. 3. Bandwidth (BW) = _____________________Hz Midband gain = Amid = _____________________ Gain Bandwidth Product = BWxAmid = _______________ Input Impedance = _______________Ω Output Impedance = __________________Ω Dept of E&C. Resistance on DRB is increased till Vo reduces to half of its value. 4..C. 2. Output voltage Vo is measured 4. 4. Ramanagaram 14 .Analog Electronics Circuits Laboratory Manual b) To measure output impedance ‘Zo’: 1. 2. WITH FEEDBACK 1. 3. c) To measure input impedance ‘Zi’: 1. The DRB value gives the output impedance Zo of an amplifier. 3. 2. 3. WITHOUT FEEDBACK 1. 4. Bandwidth (BW) = _____________________Hz Midband gain = Amid = _____________________ Gain Bandwidth Product = BWxAmid = _______________ Input Impedance = _______________Ω Output Impedance = __________________Ω B.

.E. capacitors.1µ F R1 2 K 2 Ω RC 1K Ω V0 0. Connecting wires and board.0 7 µ 4 f 4 1K Ω o r 5K Ω pt o 1K Ω CE 4 µ 7 F NOTE: Point ‘1’.C. Resistor. CRO probes. Design For tank circuit: f0= 1/[2πRC√(6+4k)] Where k = RC/R Assume f0 = 1 KHz. CRO.8K Ω RE 40 Ω 7 2 0. ‘3’ & ‘4’ are to observe the different phase shift of the RC phase shift oscillator.0 7 µ 4 f 1 1K Ω S 10 L 0 P T O 1k Ω R2 6. G. ‘2’. ASG. RPS (0-30 range).0503 µ f Select C ≈ 0.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO. R = 1KΩ From design RC = 1KΩ k = RC /R = 1 C = 1/[2πR f0√(6+4k)] C = 1/[2 π(1K)(1K)√(6+4)] = 0.0 7 µ 4 f 3 0. Multimeter. 4 RC PHASE SHIFT OSCILLATOR AIM: Wiring and testing for the performance of BJT-RC phase shift Oscillator for f0 ≤ 10 KHz COMPONENTS: Transistor SL100 (1 number). CIRCUIT DIAGRAM: VC C 1 V 2 0. Ramanagaram 15 .047µ f (Std) Dept of E&C.

hfe ≥ 4k +23 +29/k is satisfied.5KΩ R2 = 6.7 / 9(0.0m = 470Ω RE = 470Ω (Std) b) To Find R1 and R2 VB = VBE + VRE = 0. The value of 4k +23 +29/k is 56. G.C.04mA Assume 10IB flows in R1.e. Design of an amplifier: a) To Find RE Assume VCC = 12V.8KΩ (Std) c) To Find RC Choose VCE = VCC /2= 12/2 = 6V VCC – ICRC – VCE – VRE = 0 12 – (4m)RC – 6 – 2 = 0 RC = 1KΩ RC = 1KΩ (Std) d) To Find CE XCE = RE /10 at f = 100Hz 1/2πfCE = RE/10 CE = 10 / 2πfRE = 10 /[2π(100)(270)] CE = 47µf (Electrolyte) = 59µF Dept of E&C. IC = 4 mA.7 + 2 = 2.7)/ 10(0.25KΩ R1 = 22KΩ (Std) VB = VR2 = 9IB * R2 R2 = VB /9IB = 2. 9IB flows in R2 R1 =( VCC – VB)/ 10IB = (12 – 2. Hence.Analog Electronics Circuits Laboratory Manual NOTE: The hfe of SL100/BC107 is 100.E.7V IB = IC /β= 4m/100 = 0.. VRE = 2V. β = 100(SL100) IE ≈ IC RE = VRE / IE = VRE/ IC = 2/4.04m) = 7. Condition for sustained Oscillation i.04m) = 23. Ramanagaram 16 .

Ө4 = 180˚ Dept of E&C.. G.E.Analog Electronics Circuits Laboratory Manual EXPECTED WAVEFORMS: 1. Ө1 = 0˚ point ‘2’.tan-1 ( B/A) point ‘4’. Ramanagaram 17 . Ө3 = 120˚ Ө2 = tan-1 ( B/A ) Ө3 = 180˚. Ө2 = 60˚ A B point ‘3’. Output Waveform: V0 2. Lissageous Pattern A B Point’1’.C.

5. the entire circuit has to be rigged up.e. 6.Degree θ 4 =……………….. 3. Keep the time/sec knob in ‘X-Y’ position & output voltage ‘VO’ point to channel’1’ fixed. Ramanagaram 18 . 5. The frequency & amplitude of the sine wave is noted at the output. G. 2.Analog Electronics Circuits Laboratory Manual PROCEDURE: 1. ‘2’. To observe the different angles θ .C. 4.. the 1KΩ or 5 KΩ pot has to be adjusted. The amplifier is rigged up as per the circuit and DC conditions is checked i. Procedure to observe Lissageous pattern (or phase shift): 1. After getting the above DC condition. 6. Hz & fth………………. For proper undistorted output. f pract= 1/T Hz = ………………. Hz VOP-P =………….Degree Channel ‘2’ point ‘1’ point ‘2’ point ‘3’ point ‘4’ Dept of E&C. keep the channel ‘2’ to different points ‘1’. Degree θ 2 =……………… Degree θ 3 =………………. 2. CRO (1st channel) has to be connected between points(1) and ground to observe Sinusoidal waveform. VCE = ½ VCC 2.E.. Volts θ 1= ………………. Theoretical frequency should be compared with practical frequency. 3. ‘3’ & ‘4’ respectively. one at a time as shown in the table below: Angle θ (Degree) 0˚ 60˚ 120˚ 180˚ RESULT: 1. 4.

1µ f V o 0. SL100/BC107. Connecting wires & Board.8KΩ RE 40 Ω 7 PT O 1K Ω CE 4 μf 7 L1 5m H C 30 p 3 f L2 2. Ramanagaram 19 .6mH NOTE: The hfe of SL100/BC107 is 100 and ratio of L1 / L2 is 2. hfe ≥ L1 / L2 is satisfied. A. G. CRO probes.. CRO.1µ f S 10 L 0 R2 6. RPS( 0 -30V ). HARTLEY OSCILLATOR CIRCUIT DIAGRAM: Vc c 1 V 2 R1 2 KΩ 2 0. Dept of E&C.68 mH Leq = L1 + L2 = (5 + 2. Multimeter. Condition for sustained Oscillation i.6m H DESIGN OF TANK CIRCUIT Assume fo = 100KHz C = 330 pf fo = 1 / 2π √( LeqC) Leq = 1 / (2πfo)2C =1 / [(2πx 100K)2330p] = 7.C.6)mHz L1 = 5mH. Hence.1µ f RC 1KΩ 0. L2 = 2.Analog Electronics Circuits Laboratory Manual EXPERIMENT N0.E. capacitors and Inductors. 5 HARTLEY & COLPITTS OSCILLATORS AIM: To test the performance of BJT Hartley and Collpitt Osicillator for RF range f0 ≥ 100KHz COMPONENTS: Resistors.e.

6mH C2 2200 pf DESIGN OF TANK CIRCUIT Assume fo = 100KHz Assume C1 = 1000pF C2 = 2200pF fo = 1 / 2π √( LeqC) Ceq = ( C1* C2 )/ (C1 + C2) = 687. Ramanagaram 20 .E.Analog Electronics Circuits Laboratory Manual B. Hence Condition for sustained Oscillation i. Dept of E&C.8] L = 3.1µf R1 22KΩ 0.1µf RC 1kΩ 0. hfe ≥ C2 / C1 is satisfied.1µf V o SL 100 R2 6. G.. COLPITTS OSCILLATOR CIRCUIT DIAGRAM: Vcc 12 V 0.6 mH NOTE: The hfe of SL100/BC107 is 100 and ratio of C2 / C1 is 2.e.801 L = 1 / ( (2πfo)2C ) = 1 / [(2πx 100K)2687.2.C.8KΩ RE 470 Ω POT 1KΩ CE 47 μf C1 1000 pf L 3.

7)/ 10(0. IC = 4 mA.E.25KΩ R1 = 22KΩ (Std) VB = VR2 = 9IB * R2 R2 = VB /9IB = 2. β = 100(SL100) IE ≈ IC RE = VRE / IE = VRE/ IC = 2/4. CC1 and CC2 XCE = RE /10 at f = 100Hz 1/2πfCE = RE/10 CE = 10 / 2πfRE = 10 /[2π(100)(270)] = 59µF CE = 47µf (Electrolyte) Choose CC1 = CC2 = 0.47µf.0m = 470Ω RE = 470Ω (Std) b) To Find R1 and R2 VB = VBE + VRE = 0..04mA Assume 10IB flows in R1. VRE = 2V. G.04m) = 23.7 / 9(0. These are coupling capacitors to offer low reactance path for ac signal Dept of E&C. 9IB flows in R2 R1 =( VCC – VB)/ 10IB = (12 – 2.Analog Electronics Circuits Laboratory Manual AMPLIFIER DESIGN OF BOTH THE OSCILLATORS a) To Find RE Assume VCC = 12V.5KΩ R2 = 6.8KΩ (Std) c) To Find RC Choose VCE = VCC /2= 12/2 = 6V VCC – ICRC – VCE – VRE = 0 12 – (4m)RC – 6 – 2 = 0 RC = 1KΩ RC = 1KΩ (Std) d) To Find CE.C. Ramanagaram 21 .7V IB = IC /β= 4m/100 = 0.7 + 2 = 2.04m) = 7.

tank circuit is also connected and the output is observed between collector and the ground. G. 3) Undistorted sine wave is obtained by adjusting the variable inductor /capacitor 4) The amplitude and frequency of the sine wave is noted. 5) Practical frequency is compared with theoretical frequency.E.e..C. VCE = ½ VCC 2) After checking the above condition. Ramanagaram 22 . RESULT: Hartley oscillator: 1) VOP-P = ________________V 2) F(theo) = ________________ KHz 3) f( pract) = _______________KHz Colpitts Oscillator: 1) VOP-P = _______________V 2) f (theor) = _______________ KHz 3) f ( pract) = ______________ KHz Dept of E&C.Analog Electronics Circuits Laboratory Manual EXPECTED OUTPUT: Vo(V) t PROCEDURE: 1) The amplifier circuit is rigged up as shown in the circuit diagram & the DC condition is checked i.

CIRCUIT DIAGRAM: Vcc 12V 0.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO. 1MHz or 2MHz crystal.C. Ramanagaram 23 . G.E. Connecting wires and board.1µf V o R1 22 KΩ CRYSTAL 2 MHz RC 1KΩ 0. 6 BJT CRYSTAL OSCILLATOR AIM: Testing for the performance of BJT crystal oscillator for f0 > 100 KHz COMPONENTS: Resistor. SL100 (NPN).. Capacitors.8KΩ 1000 pf RE 470 Ω CE 47μf POT 1KΩ EXPECTED OUTPUT WAVEFORM: Vo(V) ftheo = 2 MHz f = 1/T T(Sec) Dept of E&C. RPS(0-30V range).1µf SL 100 R2 6.1KΩ Potentiometer.

7)/ 10(0.. Ramanagaram 24 .0m = 470Ω RE = 470Ω (Std) b) To Find R1 and R2 VB = VBE + VRE = 0.7 / 9(0.C.04m) = 23.7V IB = IC /β= 4m/100 = 0. VRE = 2V.04mA Assume 10IB flows in R1. G. 9IB flows in R2 R1 =( VCC – VB)/ 10IB = (12 – 2.Analog Electronics Circuits Laboratory Manual AMPLIFIER DESIGN: a) To Find RE Assume VCC = 12V.E.8KΩ (Std) c) To Find RC Choose VCE = VCC /2= 12/2 = 6V VCC – ICRC – VCE – VRE = 0 12 – (4m)RC – 6 – 2 = 0 RC = 1KΩ RC = 1KΩ (Std) d) To Find CE XCE = RE /10 at f = 100Hz 1/2πfCE = RE/10 CE = 10 / 2πfRE = 10 /[2π(100)(270)] CE = 47µf (Electrolyte) (Std) = 59µF Dept of E&C. β = 100(SL100) IE ≈ IC RE = VRE / IE = VRE/ IC = 2/4. IC = 4 mA.7 + 2 = 2.5KΩ R2 = 6.04m) = 7.25KΩ R1 = 22KΩ (Std) VB = VR2 = 9IB * R2 R2 = VB /9IB = 2.

G. Ramanagaram 25 .C. DC condition should be checked (VCE =1/2Vcc = 5V) 3. Volts Dept of E&C. To get undistorted sine wave output. 1K pot can be slightly be adjusted. V o(p-p) =…………………. 2.. RESULT: 1. Hz 2.E. By connecting the tank circuit.Analog Electronics Circuits Laboratory Manual PROCEDURE: 1. The circuit (amplifier part) has to be rigged up as per the diagram. the oscillations are observed at the collector. The frequency of the sine wave (f =1/T) is calculated and noted. 5. 4. f pract =…………………..

1. CRO Probes. POSITIVE CLIPPER: Circuit Diagram: 1 KΩ 0 A FG V i 1 Vp 0 p 1K z H + + - B 1 Y 27 VR 1. Ramanagaram 26 .C.4V The value of resistor R is chosen is R = √RfRr where Rf =10Ω R = 10KΩ Rr = 10MΩ Waveform: Vin (V) 1 Vp 0 p Vm = 5V t Transfer Characteristic: V0(V) 2V t T F = 1/T Dept of E&C. Connecting Wires and Board.E. ASG.4V V o Design: Let the output be clipped to say +2V Vo(max) = +2V Vo(max) = Vf+Vref (Assume Vf = 0. DC Regulated Power Supply.6) Vref = Vo(max) – Vf Vref = 1.. Resistors.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO 7 DIODE CLIPPING CIRCUITS AIM: To test the diode clipping (single/double ended) circuits for peak clipping and peak detection COMPONENTS: Diode BY127. G.

6) Vref = Vo(min) – Vf = -2 – (-0.Analog Electronics Circuits Laboratory Manual VO (V) 2V 2V Vin (V) 2.E.4V The value of resistor R is chosen is R =√ RfRr where Rf =10Ω = 10KΩ Rr = 10MΩ Waveform: Vin (V) 1 Vp 0 p t V0(V) Vm -2V T F = 1/T 5 V t Transfer Characteristic: Dept of E&C.. G. NEGATIVE CLIPPER: Circuit Diagram: 1 KΩ 0 AG F V i 1 Vp 0 p 1K z H + B 17 Y 2 - + VR 1. Ramanagaram 27 .C.6) = -1.4V V o Design: Let the output be clipped to say -2V Vo(min) = -2V Vo(min) = Vf + Vref (without sign) (Assume Vf = 0.

Analog Electronics Circuits Laboratory Manual VO (V) -2V -2V Vin (V) 3.E..4V Vref1 = 3.6 V The value of resistor R is chosen is R = √RfRr R = 10KΩ where Rf =10Ω Rr = 10MΩ Waveform: Dept of E&C.6V + V o Vref 1 3.C. Ramanagaram 28 . DOUBLE ENDED CLIPPER (i) Clipping at independent levels: Circuit Diagram: 1 KΩ 0 AG F V i 1 Vp 0 p 1K z H + B 12 Y 7 B 12 Y 7 - + Vref 2 2.4V - - Design: Let the output be clipped to say below 2V and 4V level Vo(max) = 4V Vo(min) = 2V Vo(max) = Vf+Vref1 (Assume Vf = 0.6 = 2.6 V Vref2 = 2.6 = 3.4V Vo(min) = -Vf+Vref 2 Vref2 = Vo(min) + Vf = 2 + 0.6) Vref1 = Vo(max) – Vf = 4 – 0. G.

0.E.Vf = -2 –(.4V -Vo(min) = -(Vf+Vref 2 ) Vref2 = Vo(min) .6) Vref1 = Vo(max) – Vf = 2 – 0..6) Dept of E&C. Ramanagaram 29 .6 = 1.4V + Vref 1 V o - 1. G.Analog Electronics Circuits Laboratory Manual Vin (V) 1 Vp 0 p t V0(V) 4V 2V t Vm 5V T F = 1/T Transfer Characteristic: VO(V) 4V 2V 0 2V 4V Vin (V) (ii) Square Wave Generator: Circuit Diagram: 1 KΩ 0 AG F V i 1 Vp 0 p 1K z H + B 17 Y 2 B 17 Y 2 - + Vref 2 1.4V Design: Let the output be clipped to say below +2V and -2V level Vo(max) = +2V Vo(min) = -2V Vo(max) = Vf+Vref1 (Assume Vf = 0.C.

G. Negative Clipper 3. RESULTS: The following different clippers are verified: 1.4 V The value of resistor R is chosen is R = √RfRr where Rf =10Ω = 10KΩ Rr = 10MΩ Waveform: Vin (V) 1 Vp 0 p t V0(V) Vm 5V t 2 V -2 V T F = 1/T Transfer Characteristic: VO (V) 2V -2V 2V -2V Vin (V) PROCEDURE: 1. Double Ended Clipper a. 2. By giving input as 10V peak-to-peak outputs are observed and compared with the actual waveforms (i. Ramanagaram 30 . The corresponding transfer characteristics are observed using X via Y mode. Square wave generator Dept of E&C. Vin(peak) > Vref). 3.E. The circuits are connected as per the diagrams. 4. Different clipping levels are noted for all circuits by connecting input to 1st channel of the CRO and output to 2nd channel. Slice Circuit b.e..Analog Electronics Circuits Laboratory Manual = -1. Positive Clipper 2.C.

E.e. DESIGN: For all the circuits.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO 8 DIODE CLAMPING CIRCUITS AIM: To design and test positive and negative clamping circuits.6V R V o 1 KΩ 0 Design: The value of resistor R is chosen is R = √RfRr where Rf =10Ω R = 10KΩ Rr = 10MΩ Design for Vo(min) = +2V Vo(min) = +Vref . NEGATIVE PEAK CLAMPER OR POSITIVE CLAMPER A) WITH POSITIVE REFERENECE Circuit Diagram: C 1 μf 0 AG F V i 1 Vp 0 p 1K z H + B 17 Y 2 - + - VR 2. CRO Probes.6 Vref = +2. DC Regulated Power Supply.= 10 µ f R 10K C = 10 µf 1.6) Vref = Vo(min) + Vf = 2 + 0.6V Capacitor voltage. the time constant RC>>T Let RC = 100T (Condition for Stiff Clamper) Assume T = 1msec i. Connecting Wires and Board. G.Vf (Assume Vf = 0.= -------------. Capacitor.. Vc = Vm + Vref . ASG. Resistors. F =1KHz R = 10KΩ 100T (100) (1msec) C = -------.C.Vf Dept of E&C. COMPONENTS: Diode BY127. Ramanagaram 31 .

Vf + Vref ] From equation (1) Vi Vo 0 Vm .Vf + Vref ] Dept of E&C.Vf + Vref Vm 2Vm .Vf + Vref -Vm .E.Analog Electronics Circuits Laboratory Manual Vo = +Vi + Vc = +Vi + [ Vm .C.Vf + Vref Waveform: Vin (V) 5V 10 Vp-p 0 -5V VO(V) 12V t(sec ) (1) Vo(V) Vi(V) Theoretical Practical 0 7 5 12 -5 2 2V 0 t(sec ) T f=1/T B) WITH NO REFERENCE Circuit Diagram: C 1 μf 0 AG F V i 1 Vp 0 p 1K z H + B 17 Y 2 - R 1 KΩ V 0 o Design: The value of resistor R is chosen is R = √RfRr where Rf =10Ω R = 10KΩ Rr = 10MΩ Design for Vo(min) = 0V From equation (1) Vo = +Vi + Vc = +Vi + [ Vm . G.. Ramanagaram (1) 32 .

4 -5 -0..Vf Vm 2Vm . G.4V t(s c ) e Vo(V) Vi(V) Theoretical Practical 0 4.Vf (Assume Vf = 0.Analog Electronics Circuits Laboratory Manual Vref = 0V Assume Vf = 0.4V R 1 KΩ 0 V o Design: The value of resistor R is chosen is R = √RfRr where Rf =10Ω R = 10KΩ Rr = 10MΩ Design for Vo(min) = . Vc = Vm .Vo(min) .Vref .6) Vref = .C. Ramanagaram 33 .2 .4 5 9.6V T f =1/T t(s c ) e C) WITH NEGATIVE REFERENCE Circuit Diagram: C 1 μf 0 AG F V i 1 Vp 0 p 1K z H + B 17 Y 2 - + VR 1.6 = -1.6 0 -0.E.0.Vf -Vm .Vf = .6V Vi Vo 0 Vm .Vf Waveform: Vin (V) 5V 1 Vp-p 0 0 -5V VO(V) 9.Vf Dept of E&C.4V Capacitor voltage.2V Vo(min) = -Vref .

E.C.Vf .Analog Electronics Circuits Laboratory Manual Vo = +Vi + Vc = +Vi + [ Vm . G.4V Design: The value of resistor R is chosen is R = √RfRr where Rf =10Ω = 10KΩ Rr = 10MΩ Design Vo(max) = +2V Dept of E&C.Vref Vm 2Vm ..Vref -Vm .Vf . Ramanagaram 34 . POSITIVE PEAK CLAMPER OR NEGATIVE CLAMPER A) WITH POSITIVE REFERENCE Circuit Diagram: C 1 μf 0 AG F V i 1 Vp 0 p 1K z H + B 17 Y 2 - + VR R o 1 KΩ V 0 - 1.8 5 8 -5 -2 0 t(sec ) -2V T f =1/T 2.(Vf + Vref) Waveform: Vin(V) 5V 10Vp-p 0 -5V VO(V) 8V t(sec ) (1) Vo(V) Vi(V) Theoretical Practical 0 5.Vf .Vref ] From equation (1) Vi Vo 0 Vm .

6) Vref = Vo(max) .E.Vf .Vc – Vo = 0 Vo = Vi .0.6 = 1.[ Vm . G.C.Vf Output voltage +Vi . Ramanagaram 35 .Vref .Vref .4 V Vref = 1.Vf = 0 Vc = Vi .Vf] = +Vi .Vref .Vf = 2 .Vc .Analog Electronics Circuits Laboratory Manual Vo(min) = +Vref + Vf (Assume Vf = 0.Vref ] (2) From equation (2) Vi Vo 0 -Vm +Vf + Vref Vm + Vf + Vref -Vm -2Vm + Vf + Vref Waveform: Vin(V) 5V 10 Vp-p 0 -5V VO(V) 2V 0 t(sec ) t(sec ) Vo(V) Vi(V) Theoretical Practical 0 -3 5 2 -5 -8 -8V T f =1/T B) WITH NO REFERENCE Circuit Diagram: C 1 0 μf AG F V i 1 Vp 0 p 1Kz H + - B 17 Y 2 R 1 KΩ 0 V o Dept of E&C.Vc = +Vi .[Vi .4V Capacitor voltage is considered when diode conducting Vi ..

Vm + Vf 0 -4.6V Truth Table: Vi 0 Vm -Vm Waveform: Vin (V) 5V 1 Vp-p 0 0 -5V VO(V) 0.4 + Vf 5 0.[ Vm .Vc = +Vi .Vref ..2Vm + Vf -5 -9.Vf] = +Vi .6V 0 t(s c ) e t(s c ) e (2) Vo(V) Vo Vi(V) Theoretical Practical . G.6V R 1 KΩ 0 V o Dept of E&C.4 -9.E.6 . Ramanagaram 36 .C.[Vi .Vf .Vref ] Vref = 0V Assume Vf = 0.4V T f =1/T C) WITH NEGATIVE REFERENCE Circuit Diagram: C 1 μf 0 AG F V i 1 Vp 0 p 1K z H + B 17 Y 2 - + VR 2.Analog Electronics Circuits Laboratory Manual Design: The value of resistor R is chosen is R = √RfRr where Rf =10Ω R = 10KΩ Rr = 10MΩ From equation (2) Design for Vo(max) = 0V Vo = Vi .

Vo(max) . 2.Analog Electronics Circuits Laboratory Manual Design: The value of resistor R is chosen is R = √RfRr where Rf =10Ω R = 10KΩ Rr = 10MΩ Design for Vo(max) = . Only dc shift is observed at the output. Vc = Vm .Vref . G.Vf + Vref ] From equation (1) Vi 0 Vm -Vm Waveform: Vin (V) 5V 1 Vp-p 0 0 -5V T f =1/T t(se ) c (1) Vo . Ramanagaram 37 . (sine wave can also be input) 3. A square wave of amplitude 10V peak-to-peak is given as input.[ Vm . RESULT: The given waveform for both the positive and negative clamping is verified. The shape.Vref Vo(V) Vi(V) Theoretical Practical 0 -7 5 -2 -5 -12 0 -2V t(se ) c -1 V 2 VO(V) PROCEDURE: 1.Vf Vo = +Vi . time period and peak-to-peak amplitude of the output is same as input Dept of E&C. 4.Vref .6) Vref = .2Vm + Vf .C.Vc = +Vi . The circuit is rigged up as shown in the circuit diagram.Vf = .[Vm .2) + 0. OBSERVATION: 1.(.Vf + Vref] Vf .6V (magnitude) Capacitor voltage. 2.6 Vref = +2. The different clamping levels should be noted for each circuit. Output is observed on the CRO for each circuit by putting the amplitude knob to DC and should be compared with theoretical waveform.2V Vo(max) = -Vref + Vf (Assume Vf = 0.E..

Ramanagaram 38 . CRO.1μf 1 V -P 0 P 1K z H A C Vi S 10 K 0 V o(P-P) 7 Ω 5 1 W 0 -1 V 2 RS P DESIGN: Assume RL as 75Ω (10Watts) and VCC = 12V When Power developed is maximum Vm = VCC RL = V m / Im Im = Vm /RL =Vcc/RL = 12/75 = 0.22W Pac = V2CC/2RL = 122 / 2 x 75 = 0. COMPONENTS: AFG.16) = 1. G. SK100) CIRCUIT DIAGRAM: 1 V 2 RS P S 10 L 0 0.96W %η = Pac /Pdc*100 % = 0.16 A Pdc = (2/π)(VCC*Im)Watt = (2/π)( 12 x 0.C.96/1.. transistors (SL100.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO 9 CLASS-B PUSH PULL AMPLIFIER AIM: To determine the conversion efficiency of Transformer less Class-B Push Pull amplifier. Load resistor (75Ω.22 * 100% = 78. Power supplies.1μf 0.E. 10Watts).6% Dept of E&C.

.Analog Electronics Circuits Laboratory Manual Theoretical value of %η is also 78. Calculate the conversion efficiency RESULT: Conversion Efficiency of Class-B Push Pull amplifier is η =_______% Dept of E&C. AFG is set to 10V.E.C. Connect the circuit as shown in the fig and switch on the power supply.5% Hence choose RL as 75Ω (10Watts) CALCULATIONS: Take Vm across the load resistor RL through CRO. Measure output across the RL and not the value of Vm 4. %η = (Pac /Pdc) * 100% OUTPUT WAVEFORM: V0(V) Vm PROCEDURE: 1.1KHz sine wave applied to the input of the circuit 3. Ramanagaram 39 . G. 2. Vm = VO(P-P)/2 Im = Vm /RL Pdc = (2/π)(Vm*Im)Watt Pac = V2m/2RL Conversion Efficiency.

COMPONENTS: Transformer (12-0-12)V. 10W). η% = (V2dc / V2rms) * 100 = [I2dc R / I2rms (R+Rf)] * 100 = [(Im/ π) 2R / (Im/ √2)2 (R+Rf)] * 100 = [(1/ π) 2 R / (1/ √2)2 (R+Rf)] * 100 = [(1/ π) 2 / (1/ √2)2] * [R/ (R+Rf)] * 100 = [(1/ π) 2 / (1/ √2)2] ( If Rf << R. bridge wave rectifier circuits with and without capacitor filter.483 Dept of E&C. Rf can be neglected ) 2 = 4 / π * 100 = 40.E. Diodes (BY127).C. γ = Vac / Vdc Vac = √ (V2rms – V2dc ) /Vdc = √ [( Vm/ 2) 2 – (Vm/ π) 2 ] / (Vm/ π) = √ [( 1/ 2) 2 – (1/ π) 2 ] / (1/ π) = 1. Ramanagaram 40 . full wave. Power Resistor (75Ω. THEORY: For Half Wave Rectifier Vdc = Vm / π Vrms = Vm / 2 Ripple factor. G.21 Efficiency. Connecting Wires and Board.. For Full Wave Rectifier Vdc = 2Vm / π Vrms = Vm / √2 Ripple factor. %R = (Rf +Rs)/RL* 100% Rf & Rs is very small compared to RL. hence voltage regulation is very small. γ = Vac / Vdc Vac = √ (V2rms – V2dc ) = √ [( Vm/ √2) 2 – (2Vm/ π) 2 ] / (2Vm/ π) = √ [( 1/ √2) 2 – (2/ π) 2 ] / (2/ π) = 0. Determination of ripple factor. CRO Probes.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO 10 RECTIFIER CIRCUITS AIM: To test half wave.5 % % Voltage regulation. regulation and efficiency.

HALF WAVE RECTIFIER (HWR) with out Filter: a) CIRCUIT DESIGN: Load Resistor.96 / √2 = 11.96 V Vrms = Vm / √2 = 16. Rf = 8Ω RL = Vdc / Idc = 5 / 75m RL = 75Ω RL = 75 Ω. η% Ripple factor. Ramanagaram 41 .Analog Electronics Circuits Laboratory Manual Efficiency.1 % Theortical Values: Parameters Efficiency.96 12V is required as input voltage to the rectifier.E. G.5V.21 Full wave rectifier (Center tap and Bridge) 81. η% = (V2dc / V2rms) * 100 = [I2dc R / I2rms (R+Rf)] * 100 = [(2Im/ π) 2R / (Im/ √2)2 (R+Rf)] * 100 = [(2/ π) 2 R / (1/ √2)2 (R+Rf)] * 100 = [(2/ π) 2 / (1/ √2)2] * [R/ (R+Rf)] * 100 = [(4/ π2) / (1/ 2)] ( If Rf << R. Idc = IL = 75mA.2% 0.. γ Half wave rectifier 40. RL: Assume Vdc = 5.Idc Rf Vm = π (Vdc + Idc Rf) Vm = 16.C.6% 1. 10Watts (Std) Transformer: Vdc = (Vm / π ) .48 1. Rf can be neglected ) 2 = 8 / π * 100 = 81. Use 12 – 0 – 12V Transformer b) CIRCUIT DIAGRAM: 12V BY127 RL 75Ω 10W 230V 50Hz Ac supply 0V V0 Dept of E&C.

HALF WAVE RECTIFIER (HWR) with C. η% = (V2dc / V2rms) * 100 % Voltage regulation..Analog Electronics Circuits Laboratory Manual c) PRACTICAL DESIGN: Vm from output figure Average or DC value of voltage. %R = [(VNL – VmFL) / VmFL ]* 100 d) EXPECTED OUTPUT WAVEFORM: Vin (V) t V0(V) Vm t e)TABULAR COLUMN: VNL =_________V VmFL =_________V Vm =_________V Vrms(V) Vdc(V) Vac(V) Ripple factor Efficiency Voltage regulation γ η% %R 2.E. Ramanagaram 42 . Idc = IL = 775mA.C.Filter: a) CIRCUIT DESIGN: Load Resistor: Assume Vdc = 17V. Vrms = Vm/ 2 Vac = √ (V2rms – V2dc ) Ripple factor. Vdc = Vm/ π rms value of voltage. Rf = 8Ω RL = Vdc / Idc = 5 / 225m RL = 75Ω RL = 75 Ω. G. 10Watts (Std) Dept of E&C. γ = Vac / Vdc Efficiency.

Analog Electronics Circuits Laboratory Manual Transformer: Vdc = (Vm / π ) + Idc Rf Vm = π (Vdc . Ramanagaram 43 . G.C. Use 12 – 0 – 12V Transformer Capacitor: Choose C = 470 µf Assume f = 50Hz.Idc Rf) Vm = 16.163 Also the theoretically the value of γ is 0.163 b) CIRCUIT DIAGRAM: BY127 12V 230 V 50Hz Ac supply 0V RL 75Ω.E. Vm is taken from the output wave form Vdc = Vm – (Vr (p-p) / 2) Vrms = Vr (p-p) / 2√3 γ = Vrms / Vdc %R = [(VNL – VmFL) / VmFL ]* 100 d) EXPECTED OUTPUT WAVEFORM: Dept of E&C.99 / √2 = 12 12V is required as input voltage to the rectifier.163 γ = 0.99 V Vrms = Vm / √2 = 16.. 10Watts γ = 1 / 2√3fRLC = 0. RL =75 Ω. 10W 470 µf V0 c) PRACTICAL DESIGN: Vr (p-p) .

Idc = IL = 150mA.C.96 / √2 = 11. 10Watts Transformer: Vdc = (2Vm / π ) . Dept of E&C.33Ω Choose RL = 75 Ω.E.Analog Electronics Circuits Laboratory Manual Vin(V) t V0(V) W ith out filter t Vr(P-P) Vm t V0(V) W ith C-filter e) TABULAR COLUMN: VmFL =_________V VNL =_________V Vm =_________V Vr(P-P)(V) VDC(V) Vrms(V) Ripple factor Voltage regulation γ %R 3.Idc Rf Vm = π (Vdc + Idc Rf)/2 Vm = 16.96 V Vrms = Vm / √2 = 16. CENTER-TAPPED FULL WAVE RECTIFIER with out filter: a) CIRCUIT DESIGN: Load Resistor: Assume Vdc = 11V. Rf = 8Ω RL = Vdc / Idc = 5 / 150m RL = 73.96 12V is required as input voltage to the rectifier. G. Ramanagaram 44 ..

E. Ramanagaram 45 .. G.Analog Electronics Circuits Laboratory Manual Use 12 – 0 – 12V Transformer b) CIRCUIT DIAGRAM: 1 V 2 B 17 Y 2 RL 7 Ω 5 1 W 0 20 V 3 5 H 0 z A c s p ly up V0 0V 1 V 2 B 17 Y 2 c) PRACTICAL DESIGN: Vm is taken from the output wave form Vdc = 2Vm / π ) Vrms = Vm / √2 Vac = √ (V2rms – V2dc ) γ = Vac / Vdc η% = (V2dc / V2rms) * 100 %R = [(VNL – VmFL) / VmFL ]* 100 d) EXPECTED OUTPUT WAVEFORM: Vin(V) t V0(V) Vm t Dept of E&C.C.

5Ω Choose RL = 75 Ω.. Ramanagaram 46 .filter: a) CIRCUIT DESIGN: Load Resistor: Assume Vdc = 17V. 10Watts Transformer: Vdc = (2Vm / π ) .96 V Vrms = Vm / √2 = 16. Idc = IL = 225mA. RL =75 Ω γ = 1 / 4√3fRLC = 0.Idc Rf Vm = π (Vdc + Idc Rf)/2 Vm = 16.082 Also the theoretically the value of γ is 0.Analog Electronics Circuits Laboratory Manual e) TABULAR COLUMN: VmFL =_________V VNL =_________V Vm =_________V Vrms(V) Vdc(V) Vac(V) Ripple factor Efficiency Voltage regulation γ η% %R 4.C.96 / √2 = 11.082 Dept of E&C. G.E.082 γ = 0. CENTER-TAPPED FULL WAVE RECTIFIER with C . Rf = 8Ω RL = Vdc / Idc = 5 / 225m RL = 75. Use 12 – 0 – 12V Transformer Capacitor: Choose C = 470 µf Assume f = 50Hz.96 12V is required as input voltage to the rectifier.

E.C. γ = Vrms / Vdc Voltage regulation.. G. Ramanagaram 47 .Vm is taken from the output wave form Vdc = Vm – (Vr(p-p) / 2) Vrms = Vr(p-p) / (2√3) Ripple factor. %R = [(VNL – VmFL) / VmFL ]* 100 d) EXPECTED OUTPUT WAVEFORM: Dept of E&C.Analog Electronics Circuits Laboratory Manual b) CIRCUIT DIAGRAM: B Y127 12V RL 75Ω 10W 230 V 5 0H z Ac su p p ly 0V 470 µf V0 12V B Y127 c) PRACTICAL DESIGN: Vr (p-p) .

Idc = IL = 150mA..C.E. G.Idc Rf Dept of E&C. FULL WAVE BRIDGE RECTIFIER without filter: a) CIRCUIT DESIGN: Load Resistor: Assume Vdc = 11V. Ramanagaram 48 .Analog Electronics Circuits Laboratory Manual Vin(V) t V0(V) With out filter Vm t V0(V) With Cfilter t Vr(P-P) e) TABULAR COLUMN: VmFL =_________V VNL =_________V Vm =_________V Vr(p-p) (V) VDC(V) Vrms(V) Ripple factor Voltage regulation γ %R 5. Rf = 8Ω RL = Vdc / Idc = 5 / 150m RL = 73. 10Watts Transformer: Vdc = (2Vm / π ) .33Ω Choose RL = 75 Ω.

96 12V is required as input voltage to the rectifier. Ramanagaram 49 .96 / √2 = 11.E. D2. G. D4 -.BY 127 c) PRACTICAL DESIGN: Vm is taken from the output wave form Vdc = 2Vm / π Vrms = Vm / √2 Vac = √ (V2rms – V2dc ) γ = Vac / Vdc η% = (V2dc / V2rms) * 100 %R = [(VNL – VmFL) / VmFL ]* 100 d) EXPECTED OUTPUT WAVEFORM: Vin (V) t V0(V) Vm t e) TABULAR COLUMN: VmFL =_________V Dept of E&C. D3..Analog Electronics Circuits Laboratory Manual Vm = 16.96 V Vrms = Vm / √2 = 16.C. Use 12 – 0 – 12V Transformer b) CIRCUIT DIAGRAM: 12 V Vm = π (Vdc + Idc Rf)/2 230 V 50 Hz Ac supply D1 D3 RL 75 Ω 10W D2 12 V V0 D4 D 1.

D3 .BY 127 c) PRACTICAL DESIGN: Vr (p-p) . Idc = IL = 225mA. RL =75 Ω γ = 1 / 4√3fRLC = 0. Rf = 8Ω RL = Vdc / Idc = 5 / 225m RL = 75.Vm is taken from the output wave form Dept of E&C.filter: a) CIRCUIT DESIGN: Load Resistor: Assume Vdc = 17V.E.96 12V is required as input voltage to the rectifier. Use 12 – 0 – 12V Transformer Capacitor: Choose C = 470 µf Assume f = 50Hz. G.Idc Rf Vm = π (Vdc + Idc Rf)/2 Vm = 16.5Ω Choose RL = 75 Ω.082 b) CIRCUIT DIAGRAM: 12 V 230 V 50 H z A c supply D1 D3 RL 75 Ω 10 W D4 470 µf V0 D2 12 V D 1.Analog Electronics Circuits Laboratory Manual VNL =_________V Vm =_________V Vrms(V) VDC(V) Vac(V) Ripple factor Efficiency Voltage regulation γ η% %R 6. Ramanagaram 50 . FULL WAVE BRIDGE RECTIFIER with C .C.082 Also the theoretically the value of γ is 0..96 / √2 = 11. D 2.D4 -.96 V Vrms = Vm / √2 = 16.082 γ = 0. 10Watts (Std) Transformer: Vdc = (2Vm / π ) .

With load resistor (RL). output voltage VNL is measured. % R & γ is calculated.Analog Electronics Circuits Laboratory Manual Vdc = Vm – (Vr(p-p) / 2) Vrms = Vr(p-p) / (2√3) γ = Vrms / Vdc η% = (V2dc / V2rms) * 100 %R = [(VNL – VmFL) / VmFL ]* 100 d) EXPECTED OUTPUT WAVEFORM: Vin (V) t V0(V) Wh it ot u f e ilt r Vm t V0(V) Wh it Cf e ilt r t Vr(P-P) e) TABULAR COLUMN: VmFL =_________V VNL =_________V Vm =_________V Vr(p-p) (V) VDC(V) Vrms(V) Ripple factor Voltage regulation γ %R PROCEDURE: 1. 2.C. Input AC is applied & output waveform should be noted. The output voltage is with RL is denoted by VFL.. The circuit is rigged up as per the circuit diagram.γ and %R is calculated. RESULT: The output waveform of Half wave rectifier. Ramanagaram 51 . %R is calculated 5. 3. Output voltage Vm is noted for rectifier without filter from CRO or multimeter. G. Output voltage Vr (p-p) is noted for rectifier with filter from CRO or multimeter . With C –filter output waveform should be noted down η% .E. Dept of E&C. 4. Center tapped full wave rectifier and Bridge full wave rectifier is tested and respective η% .

THEVENIN’S THEOREM: AIM: To verify THEVENIN’S THEOREM using DC circuit COMPONENT’S: Resistors. multimeter & milliammeter.E.Analog Electronics Circuits Laboratory Manual EXPERIMENT NO 11 THEVENIN’S THEOREM & MAXIMUM POWER TRANSFER THEOREM 1. Ramanagaram 52 .1 Vin (V) 2 3 4 5 6 7 IL(mA) VL(V) Dept of E&C. G. RPS.. Circuit diagram: R1 470 Ω R2 680 Ω I 0-1 0 0m A A RPS V in DC + - R3 1K Ω RL 1K ΩVL B Fig.C.

E. Ramanagaram 53 .C.Analog Electronics Circuits Laboratory Manual R1 470 Ω R2 680 Ω A RPS Vin DC + - R3 1KΩ B Vth Fig2 Vin (V) 2 3 4 5 6 7 R1 470 Ω R2 680 Ω R2 680 Ω Vth(V) A A R3 1K Ω B R th R1 // R3 320 Ω R th B Fig 3 Rth = ( R1 // R3 ) + R2 = ( 470 // 1K ) + 680 = 1KΩ Rth 1K Ω I'L 0-1 0 m 0 A A RS P Vth D C Fig 4 + Rth 1K Ω B - V'L Fig 5 Dept of E&C.. G.

The circuit is connected as shown in the fig (4). RESULT: It is found that VL & IL are obtained from the complex network are equal to I'L & V'L are obtained from the thevenin’s equivalent network. Connect the components as shown in fig. (1). Vary the DC power supply set the voltage to 2V load current IL & load voltage VL are measured & tabulated. The resistance in the thevinin’s resistance (Rth). Then vary power supply to 3V. a potentiometer or a resistance box and connecting wires. The resistance of the circuit is measured across the terminals P & Q using a multimeter or by using a ohm’s law. The experiment is repeated for different values of thevenin’s voltage & the corresponding valuesm of I'L & V'L are tabulated. CIRCUIT DIAGRAM: Dept of E&C. 4. The voltage source is removed & terminals A &B are shorted as in fig (3). The values of DC supply voltage are adjusted to thevenin’s voltage. multimeter. Ramanagaram 54 . 6V and the corresponding values of IL & VL are noted. MAXIMUM POWER TRANSFER THEOREM: AIM: To verify maximum transfer power transfer theorem. 2. G.E. 4V. a DC power supply.. 3. B. COMPONENTS: Resistance in the range of 100Ω to 300Ω.The Vth are measured for different values of input voltage & are tabulated. 5V. The RL is removed as in fig (2) & voltage across the terminals A & B is measured. The corresponding values of load current & load voltage are noted. which is the thevenin’s voltage (Vth).C.Analog Electronics Circuits Laboratory Manual Vth (V) I'L(mA) V'L(V) PROCEDURE: 1.

Ramanagaram 55 . And set the power supply to 5V. When R = 1KΩ SL No RL(Ω) I (mA) P = I2 RL (Watts) 2. G. When R= 470Ω SL no RL(Ω) I (mA) P = I2 RL(Watts) PROCEDURE: 1. The circuit is connected as shown in the fig(1) for R=1KΩ. Dept of E&C.Analog Electronics Circuits Laboratory Manual R + RPS Vin 5V DC I 0-100 mA - + - RL EXPECTED GRAPH: Pm ax Pw o er in W atts RL= R RL inO m h s TABULAR COLUMN: 1.C..E.

G. Power transferred to load is calculated using the relation P= I2 RL. DIB. Millimeter (0.C..A plot of load resistor VS power is drawn as in figure (2) 3. SERIES RESONANT CIRCUIT AIM: To find the resonant frequency. DCB. XL = XC Wr L= 1/ Wr C Wr2 = 1/LC fr = 1 / 2 π DESIGN: For fr =2. Multimeter & connecting wires. The load resistance RL is varied and the corresponding values of current are noted and tabulated. CIRCUIT DIAGRAM: AFG Vin 10Vpp 1KHz C1 0.E. The experiment is repeated for different values of R (= 470Ω). RESULT: Maximum power is transferred when RL = R EXPERIMENT NO 12 SERIES & PARALLEL RESONANT CIRCUIT 1.47μf L 8.5KHz Dept of E&C. Ramanagaram √LC 56 . COMPONENTS: ASG.5 KHz FORMULAS: At resonance.Analog Electronics Circuits Laboratory Manual 2.100A) µA.86 mH I 0-100 mA Fig 1: Circuit diagram for f = 2. band width and Q-factor of the given Series Resonant circuit.

From the graph. 2.0K 3.707Imax I in mA f1 fr f2 Frequency in Hz TABULAR COLUMN: Vi = ________________V Frequency (Hz) 0. For each frequency.E.0K 2.1K 2.9K 3.86 mH EXPECTED GRAPH: Imax 0.C. .47μ) L = 8.47μf L = 1/ (2π fr) 2 C = 1/(2π x2. . . bandwidth is calculated 5.5K 4.5K 2. current is noted and the frequency Vs current is plotted.8K 2.5m) 2(0. 2.5K 1.2K .Analog Electronics Circuits Laboratory Manual Assume C = 0. Ramanagaram I (mA) 57 . The frequency at which current is maximum is known as the resonant frequency (fr) 4. The connections are made as shown in the figure. The same procedure is repeated to calculate the resonance frequency by varying L & C (keeping frequency and voltage constant) Dept of E&C. G. C are fixed.0K 1. The values of L.0K PROCEDURE: 1.. 3.

47μf L = 1/ (2π fr) 2 C = 1/(2π x2.47μ) = 8. XL = XC Wr L= 1/ Wr C Wr2 = 1/LC fr = 1 / 2 π DESIGN: For fr =2. Q-factor = fr / (f2 –f1 ) =_________________ 2.86 mH AFG Vin 10Vpp 1KHz C1 0. fr(theoretical) = 1/2π √(LC) = _____________Hz 3. G.100A) µA. Multimeter & connecting wires. band width and Q-factor of the given Parallel Resonant circuit. fr(practical) = ____________________ Hz 2. Band width = f2 –f1 = ___________________Hz 4.5K) 2(0. DCB.47μf I 0-100 mA Fig 2: Circuit diagram for f = 2. Ramanagaram 58 . CIRCUIT DIAGRAM: L 8.E.5 KHz FORMULAE: At resonance.Analog Electronics Circuits Laboratory Manual RESULT: 1. DIB. Millimeter (0. PARALLEL RESONANT CIRCUIT : AIM: To find the resonant frequency.86mH EXPECTED GRAPH: √LC Dept of E&C.C.. COMPONENTS: ASG.5KHz Assume C = 0.

The values of L.9K 3.5K 4. fr(theoretical) = 1/2π √(LC) = _____________Hz 3.. 2. C are fixed.0K 1.5K 2. The frequency at which current is maximum is known as the resonant frequency (fr).C. . current is noted and the frequency Vs current is plotted.414 Imin Imin f1 fr f2 Frequency in Hz TABULAR COLUMN: V = ___________________ V Frequency (Hz) 0.0K 3. fr(practical) = ____________________ Hz 2.E.Analog Electronics Circuits Laboratory Manual I in mA 1.1K 2.2K . RESULT: 1. bandwidth is calculated. Band width = f2 –f1 = ___________________Hz 4.0K PROCEDURE: 1. G. 5. The connections are made as shown in the figure. Ramanagaram I (mA) 59 .5K 1. The same procedure is repeated to calculate the resonance frequency by varying L & C (keeping frequency and voltage constant).8K 2. . From the graph. Q-factor = fr / (f2 –f1 ) =_________________ Dept of E&C.0K 2. . 4. For each frequency. 2. 3.