# ECE 301 – Digital Electronics

FSM Design Examples
(Lecture #25)

The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.

Sequential Circuit Design
1. Understand specifications
2. Draw state graph (to describe state machine behavior) 3. Construct state table (from state graph) 4. Perform state reduction (if necessary) 5. Assign a binary value to each state (state assignment) 6. Create state transition table 7. Select type of Flip-Flop to use 8. Derive Flip-Flop input equations and FSM output equation(s) 9. Draw circuit diagram
Spring 2011 ECE 301 - Digital Electronics 2

Binary state-assignment Spring 2011 ECE 301 .Digital Electronics 3 . Mealy machine 2.FSM Design Example #1: Design a sequence detector that outputs a 1 when either 011 or 101 is detected. Requirements: 1. The FSM does not reset when a sequence is detected.

Digital Electronics 4 .Example #1: State Graph Spring 2011 ECE 301 .

Example #1: State Table Present Next State State X = 0 X = 1 Output X=0 X=1 Spring 2011 ECE 301 .Digital Electronics 5 .

Digital Electronics 6 .Example #1: State Reduction Spring 2011 ECE 301 .

Digital Electronics 7 .Example #1: State Transition Table (using Binary state assignment) A+B+C+ ABC X=0 X=1 X=0 Z X=1 Spring 2011 ECE 301 .

Binary state-assignment 3. Mealy machine 2. The FSM does not reset when a sequence is detected. JK Flip-Flops Spring 2011 ECE 301 .FSM Design Example #2: Design a sequence detector that outputs a 1 when either 11 or 010 is detected. Requirements: 1.Digital Electronics 8 .

Digital Electronics 9 .Example #2: State Graph Spring 2011 ECE 301 .

Example #2: State Table Present Next State State X = 0 X = 1 Output X=0 X=1 Spring 2011 ECE 301 .Digital Electronics 10 .

Digital Electronics 11 .Example #2: State Reduction Spring 2011 ECE 301 .

Digital Electronics 12 .Example #2: State Transition Table (using Binary state assignment) A+B+ AB X=0 X=1 X=0 Z X=1 Spring 2011 ECE 301 .

Example #2: JK Excitation Table Q 0 0 1 1 Q+ 0 1 0 1 J 0 1 x x K x x 1 0 Spring 2011 ECE 301 .Digital Electronics 13 .

Digital Electronics 14 .Example #2: State Transition Table (using Binary state assignment) A+B+ AB X=0 X=1 JAKA X=0 X=1 JBKB X=0 X=1 Spring 2011 ECE 301 .

Digital Electronics 15 .Example #2: FF Input Equations JA = KA = Spring 2011 ECE 301 .

Example #2: FF Input Equations JB = KB = Spring 2011 ECE 301 .Digital Electronics 16 .

Digital Electronics 17 .Example #2: FSM Output Equation Z= Spring 2011 ECE 301 .

Digital Electronics 18 .Example #2: FSM Circuit Diagram Spring 2011 ECE 301 .

Mealy machine 2.Digital Electronics 19 . The FSM does not reset when a sequence is detected. Binary state-assignment 3. T Flip-Flops Spring 2011 ECE 301 .FSM Design Example #3: Design a sequence detector that outputs a 1 when either 11 or 010 is detected. Requirements: 1.

Digital Electronics 20 .Example #3: T Excitation Table Q 0 0 1 1 Q+ 0 1 0 1 T 0 1 1 0 Spring 2011 ECE 301 .

Example #3: State Transition Table (using Binary state assignment) A+B+ AB X=0 X=1 X=0 TA X=1 X=0 TB X=1 Spring 2011 ECE 301 .Digital Electronics 21 .

Digital Electronics 22 .Example #3: FF Input Equations TA = TB = Spring 2011 ECE 301 .

Digital Electronics 23 .Example #3: FSM Output Equation Z= Spring 2011 ECE 301 .

Example #3: FSM Circuit Diagram Spring 2011 ECE 301 .Digital Electronics 24 .

Digital Electronics 25 .Questions? Spring 2011 ECE 301 .