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Chapter 3 Gate-Level Minimization

Karnaugh Maps SOP and POS Simplifications Don’t Care Conditions NAND and NOR Implementations Parity Generation and Detection

Learning Objectives • Given a function (completely or incompletely specified) of three to five variables, plot it on a Karnaugh map and use to simplify Boolean expressions. The function may be given in minterms, maxterms, or algebraic form. • Determine the essential prime implicants of a function from a map. • Obtain the minimal sum-of-products or product-of-sums form of a function from a map. • Determine all of the prime implicants of a function from a map. • Understand the relation between operations performed using the map and the corresponding algebraic operations.

K-Map • Provides an alternative technique for representing Boolean functions • One Box/square on map is for each row i.e minterm or maxterm of the function in Truth Table • Karnaugh map's input values must be ordered such that the values for adjacent columns vary by only a single bit, for example, 00, 01, 11, and 10. This is necessary to observe the variable transitions
– Known as a Gray code

Multiple Inputs K-Map

• Three and Four-variable maps

K-Map Method • The Karnaugh Map (K-Map) method uses a simple procedure for minimizing Boolean functions. The largest possible “power of 2 rectangle” must be enclosed. – Rules to consider Every cell containing a 1 must be included at least once. – It is possible to find two or more expressions that satisfy the minimization criteria. The 1’s must be enclosed in the smallest possible number of rectangles. SOP or POS. – The key is to learn to identify visual patterns. – The result is always an expression that is in one of the two standard forms. – The map is a diagram made up of squares with each square representing one minterm of the function. . – Much faster and more more efficient than previous minimization techniques with Boolean algebra.

– We mark the squares of the minterms that belong to a given function.Two-Variable Map • A two-variable map holds four minterms for two variables. .

Representing 2-Variable Functions • K-Map for AND • K-Map for OR .

– The sequence used. we mark the squares of the minterms that belong to a given function. – Note that the sequence is not arranged in a binary way. . – Again.Three-Variable Map • A three-variable map holds eight minterms for three variables. allows only one bit to change from column to column and row to row. similar to Gray code.

Three-Variable Map • Correction: Columns are yz and not xz in fig 3-3 (book) .

you can map the function into a K-map by remembering – – – – – the cells of a k-map represent minterms a 1 in a cell indicates that the minterm is part of the function two adjacent 1’s represent a two literal term four adjacent 1’s represent a one literal term eight adjacent 1’s represent a true function. F = 1 .Mapping Functions for three-variable map • When you have already been provided a function.

– F = m0 + m1 = x’y’z’ + x’y’z = x’y’(z’ + z) = x’y’ . we use this to do minimization.Minimization Characteristics in 3-Variable Maps • Since any two adjacent cells in a 3-variable map represent a change in only a single bit. – Consider the two cells for m0 and m1 where the difference is the negation of the bit z.

z) = x’y’ + xy . – F (x.Minimization Example • Each of the two adjacent pairs of entries can be simplified by eliminating the changing bit (z in both cases).y.

Note on Adjacency • So far. we have assumed that adjacent cells in the map need to touch each other but this is not always the case. – m0 and m2 are considered adjacent » m0 + m2 = x’y’z’ + x’yz’ = x’z’(y’ + y) = x’z’ – m4 and m6 are considered adjacent » m4 + m6 = xy’z’ + xyz’ = xz’(y’ + y) = xz’ .

Another Example • The four adjacent squares can be combined to give the single literal term z’ • The remaining single term is combined with the adjacent square that was already used to give us the term x’y’ • F = z’ + x’y’ .

Four adjacent squares represents a term of one literal. . 4.3-Variable Map Patterns • The number of adjacent squares that may be combined always represent a number that is a power of 2 such as 1. – – – – One square represents one minterm with three literals. 2. Eight adjacent squares represents the entire map and produces a function that is always equal to 1. Two adjacent squares represents a term of two literals. and 8.

7) • Minimum sum of products: F = z + xy’ . 4.Mapping Functions (Example) • Given the function – F = x’z + xy’ + xy’z + yz • Map the function • Determine the sum of minterms equation • Determine the minimum sum of products expression 1 1 1 1 1 • Sum of minterms: F = ∑(1. 5. 3.

– F = y’z + x’z’ .Another Minimization Example • Each of the two adjacent pairs of entries can be simplified by eliminating the changing bit. – x is eliminated in column 2 – y is eliminated in the other pair.

Another Minimization Example • Two variable maps. – F=AB’C’ +AB ′C +ABC +ABC ′ + A’B’C + A’BC’ BC A 00 01 11 10 0 1 0 1 0 1 1 1 1 1 F=A+B ′C +BC ′ . – F=AB +A′B +AB′ ′ ′ B A 0 1 0 1 0 1 1 1 F=A+B • Three variable maps.

C) = A C 0 B A 1 0 0 0 1 1 1 C F(A.Another Minimization Example Alternate Labeling of k-map AB C A 0 0 1 1 1 1 0 G(A.5.B.C) = Σm(0.4.B.7) = AC + B’C’ 0 B .

Another Minimization Example Few Simplifications b 0 1 0 0 1 1 0 1 f=a a b 0 1 0 1 1 1 0 0 g = b' a ab c 00 01 11 10 0 0 0 1 0 1 0 1 1 1 Cout = ab + bc + ac ab c 00 01 11 10 0 0 0 1 1 1 0 0 1 1 f=a .

4.z) = Σ(2.3.5) • Sol: – 1 is marked in each minterm that represents the function – Find the possible adjacent squares and mark them with rectangles – The upper right rectangle represents the area enclosed closed by x’y (eliminating the changing bit) – Similarly lower left rectangle represents xy’ – The logical sum of these two terms gives: F = x'y + xy' .Example 3-1 – Simplify Boolean function F(x.y.

7) • Sol: – 1 is marked in each minterm that represents the function – Find the possible adjacent squares and mark them with rectangles – Two adjecent squares are combined in the third column to give a two-literal term yz – The remaining two squares with 1’s are enclosed in half rectangles.6.z) = Σ(3. This gives twoliteral term xz’ – The logical sum of these two terms gives: F = yz + xz’ .Example 3-2 – F(x.y.4.

Example 3-3 – F(x.z) = Σ(0.4.y. This gives two-literal term xy’ – The logical sum of these two terms gives: F = z’ + xy’ .5.6) • Sol: – 1 is marked in each minterm that represents the function – Find the possible adjacent squares and mark them with rectangles – We combine four adjacent squares to get a single literal term z’ as m0+m2+m4+m6 = x'y'z'+x'yz'+xy'z'+xyz‘ = x'z'(y'+y) +xz'(y'+y) = x'z' + xz‘ = z' – The remaining two squares with 1’s are enclosed by a rectangle (with one square that is already used once).2.

(A’ first row and C two middle columns) – A’B has 1’s in squares 011 and 010 in the same way – AB’C has 1 square 101 and BC has two 1’s in squares 011 and 111 – The function has total of 5 minterms as shown in figure – Find the possible adjacent squares and mark them with rectangles as shown in the map – It can be simplified with only two terms giving: F = C + A’B .Example 3-4 – F = A'C + A'B + AB'C + BC – express it in sum of minterms find the minimal sum of products expression • Sol: – The two squares corresponding to the first term A’C.

– Again. – Note that the sequence is not arranged in a binary way.Four-Variable Map • A four-variable map holds 16 minterms for four variables. – The sequence used is a Gray code and allows only one bit to change from column to column and row to row. . we mark the squares of the minterms that belong to a given function.

4-Variable Map Minterms Labeling .

and 16. – – – – – One square represents one minterm with four literals. 2. Two adjacent squares represents a term of three literals. Four adjacent squares represents a term of two literals. 8. Eight adjacent squares represents a term of one literal. . Sixteen adjacent squares represents the entire map and produces a function that is always equal to 1.4-Variable Map Patterns • The number of adjacent squares that may be combined always represent a number that is a power of 2 such as 1. 4.

Minimization Example • The eight adjacent squares can be combined to form the one literal term y. • Four adjacent squares can be combined to form the two literal term wz’. • F = y + wz’ .

• The remaining 1 is combined with a single adjacent 1 to obtain the three literal term w’y’z’. • F = x’z’ + x’y + w’y’z’ . • Four adjacent squares can be combined to form the two literal term x’y.Another Example • Four adjacent corners can be combined to form the two literal term x’z’.

Another Example • F=A′BC ′+A′CD ′+ABC+AB ′C′D ′+ABC ′+AB ′C ′ ′ ′ CD 00 01 11 10 AB 00 01 11 10 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 1 F=BC ′+CD ′+ AC+ AD ′ .

3.11.13.D) = Σm(0.8.10.15) – F = C + A’BD + B’D’ C + A’BD + B’D’ A 1 0 1 0 1 1 1 0 0 1 1 1 0 1 1 0111 1111 D C 0000 D B C 1 A 1000 B Solution set can be considered as a coordinate System! .14.5.9.Another Example • F(A.B.12.C.

Another Example Magnitude Comparator A 0 1 1 0 0 1 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 1 0 A 0 0 0 0 1 0 0 0 1 1 0 1 A 1 1 0 0 D C 0 0 0 D C 0 0 0 D C 1 0 1 B B B K-map for LT K-map for EQ K-map for GT LT = A' B' D + A' C + B' C D EQ = A'B'C'D' + A'BC'D + ABCD + AB'CD’ GT = B C' D' + A C' + A B D' .

6.1.8.5.2.son the left to give the term w’z’ – We combine the single square left on right with three adjecent squares that are already used to give the term xz’ – The logical sum of these three terms gives: F = y’ + w’z’+xz’ Correction in the book: Add 1 in the square .y.14) • Sol: – 1 is marked in each minterm that represents the function – Find the possible adjacent squares and mark them with rectangles – We combine eight adjacent squares to get a single literal term y’ – The top two 1’s on the right are combined with the top two 1.z) = Σ(0.13.12.Example 3-5 – F(w.9.4.x.

Example 3-6 – F= A’B’C’+B’CD’+A’BCD’+AB’C’ • Sol: – Each of three literal term in map is represented by two squares and four literal term in map is represented by one square – We combine the 1’s in the four corners to give the term B’D’ – The two left hand 1’s in the top row are combined with two 1’s in the bottom row to give the term B’C’ – The remaining 1’s may be combined in the two-square area to give the term A’CD’ – The logical sum of these three terms gives: F = B’D’ + B’C’+ A’CD’ .

• If a minterm in a square is covered by only one prime implicant. Those with only one prime implicant are essential. – Two adjacent 1’s form a prime implicant. that prime implicant is said to be essential. and so on. – A single 1 on a map represents a prime implicant if it is not adjacent to any other 1. – Four adjacent 1’s form a prime implicant if they are not within a group of eight adjacent squares. .Prime Implicants • A prime implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map. provided they are not within a group of four adjacent squares. – They are found by looking at each square marked with a 1 and checking the number of prime implicants that cover it.

Finding Simplified Expressions • The procedure for finding simplified expressions is – determine all essential prime implicants first – determine the expression from the logical sum of the essential prime implicants with other prime implicants needed to cover the remaining minterms • There may be more than one simplified expression. .

Example of Prime Implicants • Two essential prime implicants (caused by m0 and m5) – This gives us two terms: x’z’ and xz • Finding prime implicants for the remainders results in four expressions: – – – – F = xz + x’z’ + yz + wz F = xz + x’z’ + yz + wx’ F = xz + x’z’ + x’y + wz F = xz + x’z’ + x’y + wx’ .

4 and 20 are adjacent). – Each square in the first map is adjacent to the corresponding square in the second map (i. It is just like placing one map on the top of the other.e. .Five-Variable Map • A five-variable map holds thirty-two minterms for five variables. – We use two four variable map with one of the variables distinguishing between the two.

5-Variable Map Patterns .

Two adjacent squares represents a term of four literals. 4. 16. – – – – – – One square represents one minterm with five literals. Four adjacent squares represents a term of three literals. and 32. Thirty-two adjacent squares represents the entire map and produces a function that is always equal to 1. Sixteen adjacent squares represents a term of one literal.5-Variable Map Patterns • The number of adjacent squares that may be combined always represent a number that is a power of 2 such as 1. . Eight adjacent squares represents a term of two literals. 2. 8.

6.25.Z) = Σ(0.W.Minimization Example (5-Variable Map) • Example 3-7 • Simplify the Boolean function F(V.21.2.9.13.4.Y.X.31) vxz v’w’z’ wy’z • F = v’w’z’ + wy’z + vxz .23.29.

– If we mark the empty squares with 0s and then combine the zeros into valid adjacent squares.Product of Sums Minimization • By definition. F’ – The complement of F’ [as (F’)’ = F] by DeMorgan’s theorem (by taking the dual and complementing each literal. we obtain a simplified expression of the complement of the function i. gives us the product of sums form ..e. all the squares in a map that are not marked with a 1 represent the complement of the function. section 2-4).

POS Minimization Example xz yz w’x 0 0 0 0 0 0 0 0 0 xy • F’ = w’x + yz + xz + xy • F = (F’)’ • =(w’x + yz + xz + xy)’ = (w + x’)(y’ + z’)(x’ + z’)(x’ + y’) .

9.2.5.10) – Simplify the function in » sum of products (SOP) » Product of sums (POS) • Sol: – The squares marked with 1’s represents minterms and are combined to form simplified function in sum of products (SOP).8. F=B’D’+B’C’+A’C’D – If the squares marked with 0’s are are combined we obtain the simplified complemented function F’=AB+CD+BD’ – Applying DeMorgan’s theorem we obtain the simplified function in product of sum form (POS) F=(A’+B’)(C’+D’)(B’+D) .1.Example 3-8 – F = Σ(0.

SOP Gate Implementation • F1 = B’D’ + B’C’ + A’C’D .

POS Gate Implementation • F2 = (A’ + B’)(C’ + D’)(B’ + D) .

SOP and POS Gate Implementation Two-level logic diagrams .

Function Comparison .

x. 10. uses minterms » F(w. z) = ∑(0. fill in 1’s for the minterms and then fill the remaining cells with 0’s – If you are given maxterms. y. fill in 0’s for the maxterms and then fill the remaining cells with 1’s – For SOP simplification. 12. 11). 4. solve the map for the 0’s to get complemented function. y.Working With Maxterms • At times. Remember that the numbers used for minterms are the opposites of the numbers used for maxterms: » F(w. – The previous process actually worked with minterms. z) = ∏(3. x. 5. uses maxterms – If you are given minterms. 2. 15). solve the map for the 1’s – For POS simplification. Taking the complement of this complemented function we obtain function in POS form . 6. 8. 1. 9. we may be required to work with maxterms. 14. 13. 7.

• Functions that have unspecified outputs for some input combinations are called incompletely specified functions. we have always assumed that all combinations of the input values are necessary in our expressions. we do not care what the specification of the combination is.Don’t Care Conditions • So far. four bit binary has six combinations that are not used. . – These are called don’t care conditions because in most applications. – For example. • Sometimes there are unspecified combinations within a function.

– When we choose adjacent squares to simplify the map. . we use the letter ‘X’. a don’t care condition cannot be specified with a 0 because it would require the function to always be 0 for the combination. • To specify don’t care conditions in a map. whichever leads to the simplest expression. • Likewise.Indicating Don’t Care Conditions • A don’t care condition cannot be specified with a 1 because it would require the function to always be 1 for the combination. the don’t care minterms can be assumed to be 0 or 1.

5. 13) = Σ(1.3.z) = Σ(1. 1.9.13) • It has don’t-care conditions: d(w. 9. 5. 3.y.x.x.y.2. 2. 3. 7. 9.z) = Σ(0. 13) . 5.7) F1 = w’x’+y’z F2 = w’z+y’z = Σ(0.Simplify With Don’t Care Conditions • Simplify the Boolean function: F (w.

11.2.x.y.7.5.3.Example 3-9 • Simplify the Boolean function: F (w.z) = Σ(1.3.11.7.15) • It has don’t-care conditions: d(w.15) Either of two are acceptable . F = Σ(1.y.7.x.3.1.2.z) = Σ(0.5) F = Σ(0.15) .11.

More Examples with Don’t Care CD 00 01 11 10 AB 00 01 11 10 0 x 1 x 1 x 1 0 0 x 1 1 0 1 x 1 F=A′C′D+B+AC CD 00 01 11 10 AB 00 01 11 10 0 x 1 x 1 x 1 0 0 x 1 1 0 1 x 1 F=A′B′C′D+ABC′+BC+AC .

OR and NOT into the equivalent NAND and NOR logic diagrams. . rules have been developed that allow us to convert Boolean functions using AND.NAND and NOR Implementations • Digital circuits are frequently constructed with NAND and NOR implementations: – they are easier to make – they are used in all IC digital logic families • Because of their use.

.NAND Circuits • The NAND gate is a universal gate that can be used to construct any gate. therefore being able to replace all AND and OR gates.

NAND Notation • A convenient method for creating a NAND circuit is to obtain the simplified Boolean function in terms of Boolean operators and then convert the function to NAND logic. • To facilitate the conversion to NAND logic we define equivalent alternative symbols as shown below for NAND gate .

– F = AB + CD • All three diagrams are equivalent .Two-Level Implementation • The implementation of Boolean functions with NAND gates requires that the function be in sum of products form.

Two-Level Implementation • F = AB+CD+E • F = ((AB)' (CD)' E')' =AB+CD+E .

y.z)= Σ(1.2.3.Example 3-10 • Implement F(x.7) with NAND gates .4.5.

unless the single literal is already complemented .2-Level NAND Rules • Given a Boolean function. with inputs coming from outputs of first level gates – A term with a single literal requires an inverter in the first level. follow these rules to obtain the NAND logic diagram: – Simplify the function and express it in sum of products – Draw a NAND gate for each product term of the expression that has at least two literals. This is group of first level gates – Draw a single gate using the AND-invert or the invert-OR graphic symbol in the second level.

Multilevel NAND Circuits • The general procedure for converting a multi-level AND-OR diagram into an all-NAND diagram is as follows: – Convert all AND gates to NAND gates with AND-invert graphic symbols – Convert all OR gates to NAND gates with invert-OR graphic symbols – Check all the bubbles in the diagram » Every bubble that is not compensated by another along the same line will require the insertion of an inverter or complement the input literal .

Multilevel NAND Example .

Multilevel NAND Example .

NOR Circuits • The NOR operation is a dual of the NAND operation and therefore all procedures and rules for NOR logic are the dual of the corresponding procedures and rules for the NAND logic. .

.NOR Notation • A convenient method for creating a NOR circuit is to obtain the simplified Boolean function in terms of Boolean operators and then convert the function to NOR logic.

– F = (A + B)(C + D)E .Two-Level Implementation • The implementation of Boolean functions with NOR gates requires that the function be in product of sums form.

• In a two-level circuit. and NOR. NAND.Nondegenerate Forms • Consider that we have four types of gates: AND. we can have as many as 16 combinations of two-level forms: – Eight of these combinations are called degenerate forms because they degenerate to a single operation » For example. OR. an AND-AND circuit is simple an AND of all inputs • The eight nondegenerate forms are: – – – – – – – – AND-OR NAND-NAND NOR-OR OR-NAND OR-AND NOR-NOR NAND-AND AND-NOR .

OR .INVERT Implementation • The two forms NAND-AND and AND-NOR are equivalent and performs the AND-OR-INVERT function • AND-NOR resembles the AND-OR except for the inversion done by the bubble in the output of NOR gate • In the figure (next slide) the function implemented is – F = (AB+CD+E)’ • F' = AB+CD+E (sum of products) .AND .

AND .OR .INVERT Implementation .

AND – INVERT Implementation • The OR-NAND and NOR-OR forms performs the ORAND-INVERT function • OR-NAND resembles the OR-AND except for the inversion done by the bubble in the output of NAND gate • In the figure (next slide) the function implemented is – F = [ (A+B)(C+D)E ]’ • F' = (A+B)(C+D)E (product of sums) .OR .

OR - AND – INVERT Implementation

Exclusive-OR Function • Exclusive-OR (XOR) performs the following function
– x ⊕ y = xy’ + x’y

• This function is equal to one only if one of x or y is equal to one but not both. • Exclusive NOR (XNOR) can be generated by taking the complement of an XOR operation
– (x ⊕ y)’ = xy + x’y’

• XNOR is also known as equivalence • The following identities apply to XOR
– – – – – x⊕0=x x ⊕ 1 = x’ x⊕x=0 x ⊕ x’ = 1 x ⊕ y’ = x’ ⊕ y = (x ⊕ y)’

• XOR is also commutative and associative
– A⊕B=B⊕A – (A ⊕ B) ⊕ C = A ⊕ (B ⊕ C) = A ⊕ B ⊕ C

Exclusive-NOR Function

XOR Implementations

. • The complement of an odd function is an even function. C – (AB’ + A’B)C’ + (AB + A’B’)C – AB’C’ + A’BC’ + ABC + A’B’C – ∑(1.Odd Function • The XOR operation with three or more variables can be converted into an ordinary Boolean function by replacing the ⊕ with its equivalent Boolean expression – A ⊕ B ⊕ C = (A ⊕ B) . This is defined as an odd function. 7) [As (A ⊕ B)’ = AB + A’B’] • This function is equal to 1 only if one variable is equal to 1 or if all three variables are equal to 1. C’ + (A ⊕ B)’ . 4. 2. – This implies that an odd number of variables must be one.

NOR gate .. even function) is obtained by replacing the output gate with an exclusive.OR gates • The complement of an odd function (i.e.Even Function • The three input odd function is implemented by means of 2-input exclusive.

.Parity Generation and Checking • XOR functions are very useful in systems requiring error-detection and correction codes. • Parity bit is for the purpose of detecting errors. – The circuit that checks the parity is called a parity checker. It is an extra bit added to make the total number of 1’s either odd or even • The message including the parity bit is transmitted and then checked at the receiving end for errors • An error is detected if the checked parity does not correspond with the one transmitted – A circuit that generates a parity bit is called a parity generator.

OR function) . So P constitutes the odd function (three variable exclusive.Parity Generation and Checking • Table shows the truth table for even parity generator • The three bits x. The parity bit P is the output • P must be generated to make the total number of 1’s even. y and z constitute the message and are inputs.

OR gates • parity check: C = x ⊕ y ⊕ z ⊕ P – C=1: an odd number of data bit error – C=0: correct or an even number of data bit error .Parity Generation and Checking • The parity checker can also be implemented with exclusive.

End of Chapter 1 3 End of Chapter .