LEVEL 3-2

(version 1.7)

Inventory
 Chapter 1. NB scheme  Chapter 2. POWER  Chapter 3. CHARGE  Chapter 4. CLOCK  Chapter 5. HDMI  Chapter 6. Touch Pad  Chapter 7. Keyboard  Chapter 8. AUDIO P5~P77 P78~P185 P186~P223 P224~P247 P248~P261 P262~P279 P280~P292 P293~P328

Inventory
 Chapter 9. MODEM  Chapter 10. USB  Chapter 11. PCMCIA  Chapter 12. IEEE 1394  Chapter 13. Card Reader  Chapter 14. SATA  Chapter 15. ODD  Chapter 16. LAN P329~P338 P339~P358 P359~P363 P364~P380 P381~P393 P394~P400 P401~P409 P410~P430

Inventory
 Chapter 17. VGA  Chapter 18. LCD  Chapter 19. BIOS  Chapter 20. MEMORY  Chapter 21. POST CODE  Chapter 22. NEW CARD  Chapter 23. EC P431~P446 P447~P485 P485~P511 P512~P538 P539~P584 P585~P590 P591~P621

Chapter 1 NB scheme

Overview
 Introduction  Diagram  Q & A (Repair Experience)

Introduce
 Intel Product  AMD Product  EeePC Product

Intel Chip Family & Comparison

Intel Centrino Evolution
Centrino1-4==(Centrino1) Centrino 5=(Centrino2)
(Core™2 Duo )
Platform code CPU Code Carmel Banias (130nm) DDR-333 1 (1M) Odem+ MontaraGM (400MHz) ICH4-M Calexico (b) Sonoma Dothan (90nm) DDR2-533 1 (2M) Alviso (533MHz) ICH6-M Calexico2 (a/b/g) Napa Yonah (65nm, Dual Core)L2=2MB DDR2-667 2 (2M/4M) Calistoga (667MHz) ICH7-M Golan (a/b/g) Santa Rosa Merom (65nm, Dual Core)L2=4MB DDR2-667 2 (4M/6M) Crestine (800MHz) ICH8-M Golan 2 (n) Montevina Penryn (45nm,Dual/Four Core)L2=6MB DDR3-1066 2/4 (6M) Cantiga GM/PM (1066MHz) ICH9-M
Echo peak/Shirley Peak WiMAX & n / (n)

Support DDR
CPU Catch (L2) GMCH (FSB) ICH Wi-Fi
(802.11)

Intel Centrino Evolution
Core
Platform Code CPU Code Support RAM CPU Catch (L3) ICH Wi-Fi Calpella Clarksfield(Nehalem) Auburndale(Nehalem) (45nm)(Internal DDR3 (45nm)(Internal DDR3 memory memory controller with controller) graphic chip) DDR3-1066/1333 4/2 (8 M) IbexPeak-M(DMI) Puma Peak / WiMAX 的”Kilmer Peak” DDR3-1066/1333 2 (4M) IbexPeak-M(DMI) Shirley Peak/ Echo Peak Arrandale(Westmere) CULV(32nm) DDR3-1066 2 (4M) IbexPeak-M(DMI) Shirley Peak/ Echo Peak

QM67.Intel Centrino Evolution Core2 Platform Code Huron River Sandy Bridge (32nm) DDR3-1066/1333 CPU Code Support DDR CPU Catch (L3) ICH Wi-Fi 4/8 (8 M) QS67. UM67 Centrino Advanced-N + WiMAX 6150 . HM67. HM65.

Intel Chip Family & Comparison .

Intel Chip Family & Comparison .

Montevina vs Calpella .

Calpella vs Huron River .

Diagram Sonoma Platform Napa Platform Santa Rosa Platform Montevina Platform Calpella Platform Sandy Bridge Platform .

Sonoma Platform Diagram-1 .

Sonoma Platform Diagram-2 .

Napa Platform Diagram-1 .

Napa Platform Diagram-2 .

Santa Rosa Platform Diagram .

Santa Rosa Platform Diagram Crestline / ICH8M 芯片 .

Montevina Platform Diagram .

Calpella Platform Diagram (Clarksfileld) .

Calpella Platform Diagram (Auburndale) .

Sonoma Diagram – M51A Sample
• GMCH Core Frequency 333MHz • 12.1” active matrix TFT, • XGA 1024x768 resolution, •LVDS •D-Sub 15 pin

CPU
Dothan

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Intel Pentium M Processor Speed at 1.6G~2.13GHz (Dothan) • 2MB On-Die L2 Cache

CRT

LCD Con.& Inverter

•400/533 MHz FSB •DDR2 SDRAM 400/533 MHz •DDR1 SDRAM 333 MHz •Dual Channel support DDR2 •Single Channel support DDR1

•On board 256M DDR2 SDRAM 400 MHz design

Alviso
(GMCH) 915GM

Memory DIMM

•1 x SODIMM socket for expansion up to 768GB DDR2-400/533 DRAM support •PCI BUS ,33MHz

USB 2.0 X3 port

•USB 2.0

•DMI Link ,100MHz

•IDE BUS •Ultra ATA 100/66ICH6-M •2.5” 30/40/60/80 GB •4200/5400RPM •Azalia Link

•Combo drive •Dual drive •Super multi drive

MINI PCI Slot

LAN 控制ler RTL 8101L

Cardbus R5C841

RJ-45

•LPC BUS ,33MHz

IEEE 1394

PCMCIA type II

4 IN 1 Card Reader •MMC •SD •MS •MS-Pro

Audio CODEC ALC861

FWH SST 49LF004A

Int. & Ext. MIC

Headphone -out Jack / Int. SPK

Modem Module

KBC M38857

Int. KB & T/P

Napa Diagram- W5F Sample
• • GMCH Core Frequency 400MHz 12.1” Wide active matrix TFT, 1280x768resolution, • Support EDID
CRT

CPU
Yonah

Intel Yonah dual core • T2300/2400/2500/2600 1.66/ 1.83/ 2.0/ 2.16G Processor • 2MB On-Die L2 Cache

•667 MHz FSB •DDR2 SDRAM 533/667 MHz •Single or Dual Channel support

LCD Con.& Inverter
TV

•LVDS •D-Sub 15 pin •S-Video

•On board 512M DDR2 SDRAM 533/667 MHz design

Calistoga
(GMCH) 945GM

Memory DIMM

Bluetooth V2.0

CMOS Module 1.3 mega pixels

USB 2.0 X3 •USB 2.0 ICH7-M

•1 x SODIMM socket for expansion up to 1GB DDR2-533/667 DRAM support

•DMI Link ,100MHz (Direct Media Interface) •PCI BUS 3.3V ,33MHz •Azalia Link

•IDE BUS ,Ultra ATA 100/66

•2.5” 60/80/100/120 GB •4200/5400RPM
•Combo drive •Super multi drive NEW CARD MINI CARD 802.11 a/b/g Intel 3945 ABG TPM 1.2 •PCIE-E •LPC BUS ,33MHz SPDIF or Line out
FWH SST 49LF004A

Audio CODEC ALC660 Int. SPK

Cardbus R5C832

LAN 控制ler RTL 8101

IEEE 1394 •MMC •SD •MS •MS-Pro •XD

RJ-45

KBC M38857

Int. & Ext. MIC

Int. KB & T/P

Modem Module

5 IN 1 Card Reader

Santa Rosa Diagram – A8Se Sample

Montevina Diagram –N80V Sample

Calpella Diagram –G60J Sample

Huron River结构图 –G60J Sample Calpella Diagram –N53SV Sample

AMD Platform

AMD Notebook Platform

AMD Notebook Chipsets

AMD Business Class

AMD Business Class

Among Danube platform system, chip group adopt three chip structural design, monobasic M880G (RS880M) at north bridge chip continue to use still ,But the chip of south bridge is upgraded from SB710 to SB820 M, the north bridge combines Mobility Radeon HD 4200 figure core, obility Radeon HD 5000 series to do for the independent display card and its matching. Besides supporting DDR3 SO-DIMM memory, AMD Danube platform also supports SATA 6Gbps high-speed interface, DVI/HDMI/DisplayPort video to expand interfaces, and the generator of the integrated clock and a new generation's wireless technology.

AMD Client Processor Roadmap .

AMD Puma Diagram–N50Tr Sample .

AMD Tigris Diagram–K40AF Sample .

AMD Danube Diagram –K42DR Sample .

AMD CPU S1g4 .

AMD CPU S1g4  S1g4 processor support all S1g3 processor features. .

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Eeepc Platform .

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5W 512KB 45nm 10W 2*512KB 45nm 13W 2 3 1 1 2 .66GHZ 1/2 800MHZ 1.5W 512KB 45nm 2.66GHZ 1/2 667MHZ 1.所屬平台 Diamondville PineTrail Diamondville PineTrail 處理器型號 Atom N270 Atom N280 Atom N450 Atom D410 Atom D450 運行頻率 核心數 FSB 1.66GHZ 2/4 800MHZ L2 製程 TDP功耗 512KB 45nm 2.5W 512KB 45nm 5.66GHZ 1/2 533MHZ 1.66GHZ 1/2 667MHZ 1.

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Socket A Athlon XP .

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Chapter 2 POWER Repair Guide .

Overview  Introduction  Diagram  Repair Flow Chart  Q & A (Repair Experience) .

Introduction  Classification of the power circuit  Linear & Switching Regulator  Switching Buck Converter  Voltage & Current Mode Control  Multiple Output Controller  Multi-Phase Operation .

@ DC Converter  Linear & Switch @ IC in Power circuit.  ACAC: AC Converter.  DCAC: Inverter. generally call “Regulator” .Power Classification Type  ACDC: Rectification.  DCDC: DC Converter.

Linear Regulator INPUT REF .+ OUTPUT • Linear Regulator – Advantages • Simple • Low Cost – Issues • Power Dissipation .

Switching Regulator • Switching Regulator – Advantages • Efficient The Basics of Switching Regulator – Issues • Noise • Layout .

Switching Buck Converter Synchronous Buck Converter is More Efficient VCC VIN VCC VIN PWM controller FB GND UGATE PHASE VOUT PWM controller FB UGATE PHASE LGATE PGND VOUT GND ST和ARD BUCK CONVERTER SYNCHRONOUS BUCK CONVERTER .

Voltage Mode vs. Current Mode Control CONTROL IC PWM LOGIC VIN CONTROL IC VOUT VIN PWM LOGIC VOUT VOLTAGE CONTROL CURRENT CONTROL VOLTAGE CONTROL • Voltage Mode control Single control Loop – No Current Sense Resistor – Better Noise Immunity – Less Sensitive to Layout • Current Mode control Immediate Response to change s in Input Voltage – Inherent Current Limiting .

)  Montevina Power Plane Standard Diagram (F6V.F9S.etc)  AMD Puma Power Plane Standard Diagram (N61DA…………………………………etc)  Diamondville Power Plane Standard Diagram (1008HA…………………………………etc)  PineTrail Power Plane Standard Diagram (1201HA…………………………….etc.etc..etc.….N80Vr..)  ATOM+ MCP79 Power Plane Standard Diagram (1201N…………………………………etc)  Eeepc AMD CPU Power Plane Standard Diagram (1201T…………………………….W7S..Diagram  Santa Rosa Power Plane Standard Diagram (A8S.) .)  Calpella Power Plane Standard Diagram (N71JA…………………………………..etc)  Sandy Bridge Puma Power Plane Standard Diagram (N53SV………………………………….….M51Va.N20A….F3E.N80Vc.etc.Z96S….F7Sr.A8E.

Diagram-1 (Santa Rosa ) .

Diagram-2-1 (Montevina) .

Diagram-2-2 (Montevina) .

Diagram-3 (Calpella) .

Diagram-4 (Sandy Bridge) .

Diagram-5

(AMD Puma)

Diagram-6

(Diamondville Puma)

Diagram-7

(PineTrail Puma)

Repair Flow Chart(1)
Start
Confirm the symptom problem is Power to GND or No Power Trace the circuit, V.I Check & change NG related Component Change NG CMOS BATT & X‟tal Component /trace related circuit Trace related circuit, Change Defect Component Measure AC_BAT_SYS signal (AC mode : 19V,BATT mode 16.8V) No Power / Power On error

Visual Inspection A/D & BATT Connector/Measure voltage

COMS Voltage between 3V~3.3V X‟tal CLK signal is correct 32.768kHz

Measure COMS battery/ X‟tal CLK for S.B is OK ?

Confirm the circuit, Check All Always/ Stand-by Voltage (ex. +3V/+5V always) (by RD design)

Check Always/ stand-by Voltage is OK ?

Change NG Component

Trace and confirm the circuit to Check 1.PWR_SW# status Hi->Lo->Hi and Lid_SW# signal must be always Hi 2.PWR_BTN# signal status Lo->Hi->Lo (to S.B) (all status Hi or Lo will be by RD Design spec.) 1.PM_SUSC# +3V , +5V +12V ………etc (by model request) 2.PM_SUSB# +12Vs , +3Vs , +5Vs…..etc (by model request) 3.CPUVR_ON Vcore , VRM_PWRGD , CLK_EN#

Check PWR_SW# & PWR_BTN# circuit is OK

Trace related component, compare with the circuit Change NG Component

Measure & Check Control Signal PM_SUSC# / PM_SUSB# / PM_SUSA# /CPUVR_ON

Finished

Repair Flow Chart(2)
Start Power GND Confirm the symptom problem is Power to GND or No Power

Visual Inspection All Component is OK ? ICT jump Power Voltage GND

Check component have short or burn

Confirm the problem

AC_BAT_SYS Signal GND

Confirm the TSICT program, Check what kind voltage of ICT Power jump (+3V or +3Vs / +5V or +5Vs ….)

Confirm & check to separate which power circuit cause AC_BAT_SYS to GND

(一)Separate

ICT power Jump solder, Use multi-Meter to measure which side voltage to GND (二)Confirm the circuit and use TSICT program to Find out all the connection component Check Item as follow: (1)Check MOS-FET component (G-S gate is no short) (2)Check Capacitor (V.I capacitor surface is no rift) (3)Change voltage to GND of BGA component Finish

Power circuit can differentiate to 4 section : (一)Main Power IC circuit Check MOS-FET ,Capacitor ,Power IC (二)BATT charge circuit Check MOS-FET ,Capacitor ,Diode ,Charge IC (三)CPU Vcore Power circuit Check MOS-FET ,Capacitor ,Diode ,CPU power IC (四)LCD Inverter Power supply circuit Check Capacitor or Inductance

NB power training
--For Montevina platform

An important component platform needed---EC

       

Keyboard matrix/Touchpad control Power/Charger…LEDs instruct Fan tachometer control Power management (sleep/hibernate/wake up/Lid switch) Power sequence control with ICH9M Battery charger/cell capacity/temperature monitor GPIO control …………
PS: If the system cann‟t power on, we can snatch LPC_FRAME# to make known that whether EC has worked.

ACPI (Advanced Configuration and Power Interface, advanced configuration and power interface) It is by Intel, Unless Microsoft, Phoenix, HP and computer powers that Toshiba make together last specification, it last operating system can Utilize the state of power with various devices of direct management.

Power Sequence Provision---ACPI Power State

 G0/S0:Full on  G1/S1:CPU sleep ----SB(EXP:ICH9M) has the option to assert the CPUSLP# signal to further reduce processor power consumption.  G1/S3:Suspend to RAM ----The system context is maintained in system DRAM, but power is shut off to non-critical circuits. Memory is retained, and refreshes continue. All clocks stop except RTC clock.  G1/S4:Suspend to Disk ----The context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.

 G2/S5:Soft off ----System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
 G3:Mechanical off ----power failure Because the system does not have any power.

Power Sequence types on notebook
 Five types of power sequence  G3S5  S5S0 (Power on)  S0S5 (Power down)  S3S0  S0S3

Power on---AC/DC block flow
Difference:
 AC mode (plug in adaptor): G3S4/S5 , have VSUS power. (to save power)  DC mode (only plug in battery): G3S4/S5 , have no VSUS power.
0 0 1
VSUS_ON START AC_IN#

1
VSUS_ON -> 0 PM_RSMRST# -> 0

VSUS_ON -> 1 Delay 5ms

end

end

0

Wait VSUS_GD=1

1
PM_PWRBTN# -> 1 Delay 20ms PM_RSMRST# -> 1

end

AC_OK=1 10.9V) OTHER MAIN POWER(+1.VRM_PWRGD 8.+1.PM_SUSC# 12.PM_RSMRST# 9.H_CPU_RST# MAX8725 3.5V.PWR_SW # 4.CPU_VRON (55ms) MEMORY POWER(+1.PM_PWROK 5.Power on---AC NB Cantiga 19.8V.SUSC_O N 14.+3V A 16.) Vcore controller 16.AC_BAT_SYS 4.05V etc.PWRBTN# 11.PLT_RST# sequence 2.VSUS_G D 13.VSUS_O N RT8203 1.A/D_DOCK_I N CPU 20.VRM_PWRGD .SUSB_ON 15.PM_SUSB# RTC BAT SB ICH9M 17.RTCRST# EC ITE8752 7.0.

SUSB_ON 15.VRM_PWRGD 9.9V) OTHER MAIN POWER(+1.SUSC_O N 14.PM_SUSC# 12.BAT_CON CPU 20.AC_BAT_SYS 4.VSUS_G D 13.RTCRST# EC ITE8752 Vcore controller 16.0.+1.PM_RSMRST# 5.AC_OK=0 10.8V.PM_SUSB# RTC BAT SB ICH9M 17.PM_PWROK 6.H_CPU_RST# MAX8725 3.VRM_PWRGD 8.+3V A 16.PWR_SW # 4.5V.Power on---DC NB Cantiga 19.) .CPU_VRON (55ms) MEMORY POWER(+1.05V etc.PWRBTN# 11.PLT_RST# sequence 2.VSUS_O N RT8203 1.

F3Q Power on Sequence(1) .

F3Q Power on Sequence(2) .

F3Q Power on Sequence(3) .

F3Q Power on Sequence(4) .

F3Q Power on Sequence(5) .

Power down---Block flow  Block flow .

Power down---General Sequence .

 2. and the adaptor LED indication flicker.Common Bugs(1)  1. plug in debug card. show 00 –> CPU not work –>measure power sequence black screen.The power LED lighten. and power LED not lighten. Maybe The BIOS ROM content has been wrecked. for example: 80 code no motion. show F0~F2 –> one DIMM slot failed show 38 –> check USB port and USB device If not mount LPC debug & Newcard debug card because of cost down. show d0~d5 –> memory plug failed or memory broken black screen. +3VA powered? Why not VSUS power? Power IC or MOSFET or Diode burnout?  3. view the 80 post code.The system cann‟t be powered on. Here is somewhere short. . check all power rails whether have been short to GND. try to flash BIOS by JIG board or measure sequence. but the system cann‟t bring up to DOS.The system cann‟t be powered on.

solution: update BIOS to 217 or newer version . and it send software SCI to active.take a software bug on M51A for example in Vista. but in XP. can use hotkeys Fn+F5 & Fn+F6 to control backlight brightness.Common Bugs(2)  4. these hotkeys have no function Vista: report to driver directly to active; but XP: need report to BIOS. find whether a device driver installed wrongly cause it un-plug device to check BIOS updated? Care for BIOS release note check FAN status/thermal module –> over temperature? and so on……  5.The system ofen show blue screen suddenly in OS un-install drives (even enter safe mode).

NB power training --For calpella platform .

Montevina platform VS Calpella (power) 2.Powet sequence GFX Core –RT8152 1.MB39A132 charging’s Establishment 4.MAX8725 charging’s Establishment 5.RT8152 intorduse 2.Outline Charger –MB39A132 1.RT8202 .MAX17015 charging’s Establishment Vcore –RT8856 1.Chang to prepare 3.RT8206 2. Power sequence System –RT8206/RT8202 1.Adapter/battery exchange 2.VID’s Establishment setp 3.

Power-flow .

1V IMON Vttcpu-H DPRSTP# Performance other Performance OVP Support slow C4 /X 1.55V .5V) VID[6:0] 1.7V deleted Turbo boost 1.2V PMON 3.8V) VID[6:0] 1.5) 2个(CPU+Ibex Peak-M) VGFX (Graphics)/ Vcore (core) /VTT-CPU(core) DDR3(1.二、Vcore –RT8856 1、 Montevina platform VS Calpella (power) Item chipsets Power rail power Memory Support VID/ Vboot DAC codes Vboot Monitor Power saving signal DPRSLPVR Montevina (IMVP6+) 3个(CPU+NB+SB) Vcore(core) DDR2(1.3V-H Calpella (IMVP6.

VID[2:0].DPRSLPVR.VID[6].2、VID’s Establishment POC (power on configuration) line: Vcore power pull high before,CPU will pass VID[5:3] step to know VR Imax.IMON will know Vcore and GFX-core’spower. CPU will passVR .PSI #---default. Turbo Boost Technology: CPU Core and GFX Core make power sharing, improve thrt performance .

.3、Power sequence  Wait system power OK after,EC will pull CPU_VRON to High,Vcore power than to up,VRM_PWRGD pull high after 6ms. .

三、GFX Core –RT8152 1、RT8152 intorduce GFX core no need to Establishment POC line,VID pull H/L only for factory ATS test(No put in CPU. CPU pass VR的IMON to know GFX-core‟spower.VID floating),DPRSLPVR no need to Establishment default. Turbo Boost Technology .

2、Power sequence  GFX Core power between VTT_CPU power after ,Vcore power befer,  CPU Send GFX_VRON news ,power level is CTT_CPU .

四、system –RT8206/RT8202 1、RT8206  RT8206‟s work principle the same RT8205  +3VA open by +5VA than pass LDO to output. .

raise the efficiency EN=floating.RT8202 of Fixed frequency ,Freq=500KHz .2、RT8202: two type EN =High. RT8202 will follow loading to reduce PWM operating frequency .

should be change controller . except consider AC _ IN _ OC# and BAT _ IN _OC# What signals does need considering? A: first need check adapter and battery are OK or not =>And then see AC _ IN _ OC # and BAT _ IN _ OC#(TS1#) Connect it by mistake =>Confirm whether EC is OK Q2:Q2: RT8206 operation principle,K40C use this chip,a lot of 3vo and 5vo are loss. AC_BAT_ SYSwhether the voltage =>Is 5VA OK =>Is 3VA OK =>VSUS_ON stand up =>If no 3VO/5VO voltage. Leave ADAPTER show battery icon. MAX17015 charge the principle.so don‟t boot A:Want this pieces of question according to at check forward step by step: Confirm first whether the board or component are damaged =>After having the power.Q&A Q1:MAX8725. leave the battery show ADAPTER icon. .

AC_BAT_SYS Y +3VA Y N Device short to GND Repair Flow Chart PWR Control IC /MOS Damage N PWR Control IC Damage SUS Y SUSC Y SUSB Y CPU N Y VSUS_ON N Y SUSC_EC# EC Damage N IC/MOS Damage N Y SUSC_EC# IC/MOS Damage N Y CPU_VRON IC/MOS Damage .

EX1: Adapter indicator lamp to glimmers ceaselessly AC indicator lamp to glimmers ceaselessly AC_BAT_SYS N Device short to GND Battery PWR short to GND Device short to GND NB.SB to GND .

EX2: NO +3VSUS.+5VSUS voltage AC N +3VA Y Remove +3VAO-> +3VA JP N N +3VA Y EC Damage RT8206 Damage VSUS_ON Y measure MOS OK? N Change MOS Y IC Damage .

1.Remove PWR to Device of JP .

Link JP of below .二.

AC in Adapter indicator lamp to glimmers N ceaselessly Y PWR short to GND Device short to GND Link +3VAO-> +3VA JP N Y EC short to GND Join sequentially of other JP N Chang PWR IC measure Power rail H-s& L-s MOS Exchang damage H-s& L-s MOS .

EX3: NB don‟t charge Battery is it intact VSET_EC ISET_EC have or not? Y N MOS ok or no?t Y Change IC N EC Damage Change MOS .

EX4: No VCORE voltage Other power Ok? N CPU_VRON EC Damage Y Measure MOS OK? N 更換MOS Y IC Damage .

NB power training --For Sandy Bridge platform .

N53SV Power Sequence .

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NB power training --For AMD platform .

N61DA use RX881 replacement RS880 N61DA use clock gen by SB inside. .

S5S0 .

 S3S0 .

The system cann‟t be powered on. check all power rails whether have been short to GND. and power LED not lighten. show 00 –> CPU not work –>measure power sequence black screen. but the system cann‟t bring up to DOS. plug in debug card. Maybe The BIOS ROM content has been wrecked. try to Newcard port.The power LED lighten.Problems 1. show d0~d5 –> memory plug failed or memory broken black screen. 4. for example: 80 code no motion. Here is somewhere short. +3VA powered? Why not VSUS power? Power IC or MOSFET or Diode burnout? 3. and the adaptor LED indication flicker.The system cann‟t be powered on. flash BIOS by JIG board or measure sequence.The system often show blue screen suddenly in OS un-install drives (even enter safe mode). show F0~F2 –> one DIMM slot failed If not mount LPC debug because of cost down. view the 80 post code. find whether a device driver installed wrongly cause it un-plug device to check BIOS updated? Care for BIOS release note check FAN status/thermal module –> over temperature? and so on…… . 2.

. search Windows error code Keyboard string key. re-plug DIMM. re-weld. Disconnect all Device. flash EEPROM. replace the HDD. what issues need to be considered. can‟t into the system. crashes. confirm all reset nets. re-plug DIMM. Replace the keyboard. where do you begin。 Disconnect all Device.Problems When normal voltage and frequency are still not open where do you begin. for the EC and keyboard interface. flash EEPROM. check Debug code Blue screen. check the EMI capacitor . keyboard interface to ground resistance is normal. check the FAN & Thermal module.

.Problems E-SATA device can‟t recognize Check cable is connected or not WLAN can‟t open Check WLAN switch is connected or not Start soon shot down for no reason Check thermal pip & fan is not connected correctly.

Problems Boot no display. but the debug card can run code Check LVDS cable is not connected Check LVDS cable is bad .

NB power training --For EeePC(1008HA) platform .

5 types of Power sequence G3S5 S5S0(Power on) S0S5(Power off) S3S0 S0S3 .

8V & VTT_DDR SUSB# VS ADP off off on off on on on on low low high low high high high high off off on off on on on on low low low low high high high high off off off off on on on on low low low low low low high high off off off off off off on on G3 BAT ADP S5/S4 BAT ADP S3 BAT ADP S0 BAT EC firmware make this different Power latch make this different .Power states on 1008HA States Mode VA VSUS_ON VSUS SUSC# 1.

Power on sequence .

Sym Timing Parameters Min Max Unit Ta Vcc/Vccp assertion to VID valid VID/BSEL valid to Vcc stable 10 us Tb 100 us Tc Vccp stable to VID/BSEL valid PWRGOOD assertion to RESET# deassertion time VCC.BOOT stable to PWRGOOD assertion BCLK stable to PWRGOOD assertion VCCA stable to PWRGOOD assertion 10 us Td 1 10 ms Te 0.05 20 ms Tf 10 BCLKs Tg 1 ms .

Outline Block Diagram Features Power on sequence Common bug analyze on 1008HA Q&A Appendix .

AC_BAT_SYS Check +3VA Of f Open the short pin between +3VA & +3VAO On EC/SPI ROM Damage On Press power bottom Power LED on Of f Check VSUS_ON On Of On f Check RT8205D circuit Of Check RT8205D circuit f 1008HA can change power board Of f Unplug Devices & Check device Refresh Bios Check Drivers & AP Or is there any virus? Not solve Solve Use OEM Image No OK Check Bios menu SATA IDE/AHCI mode (default AHCI) Check HDD System stable Check PM_RSMRST# . PM_PWRBTN#. SUSB# & SUSC# Ok Low Check PLT_RST# Low High Check SUSB_ON & SUSC_ON High OK Refresh Bios or Change EC chip Check power voltage CLK frequency No yes Boot in OS 00 Check main power Check debug code Ok d5 Check memory module OK Update latest Bios No yes .Debug flow No ADP in ADP LED flickering yes There is somewhere short Check VA SUS power Check Charger circuit AD_DOCK_IN.

VSUS power aren’t ready (VSUS_ON isn’t High) 3. FFC cable plug/unplug when the system is not in G3 states (Mechanical OFF) 2. FFC cable doesn't plug well and the system is not in G3 states (AC or Battery plug in) . PWR LED doesn’t light while pressing power bottom 2.EC EOS Issue Symptom: 1. Refresh Bios doesn’t work 4. There is some evident damage on EC chip Root cause: 1.

Outline Block Diagram Features Power on sequence Common bug analyze on 1008HA Appendix .

Outline Block Diagram Features Power on sequence Common bug analyze on 1008HA Q&A Appendix .

Definition of each states .

NB power training --For EeePC(1201HA) platform .

Agenda • Power Solution Introduction • Common Bug Criteria and Solution .

Power Solution Power State & Signal Control Power flow Power Schematic .

5VA /X (*) Standby Power EX:3VSUS. there‟s no always power when only insert battery.5VSUS VSUS_ON Dual Power EX:1.1.Power State & Signal Control Always Power Power Rail Control EX:3VA.5VS SUSB_ON EX:VCCP CPU_VRON (*):Because of the power latch circuit. .8V SUSC_ON Main Power EX:3VS.

5VS (1A) RT8202APQW (Controller) CPU_VRON VCCP: Hi-side: EMB20N03V Low-side: EMB20N03V +VCCP (5.5A) +1.1A) SUSB_ON +5VSUS (3A) EMB20N03V (SWITCH) EMB20N03V (SWITCH) EMB20N03V (SWITCH) EMB20N03V (SWITCH) +5VS (1.5A) EMB20N03V (MOS) +VCCP_C6 (2A) SYSTEM SLPIOVR# RT8202APQW (Controller) VCCP_PWRGD VCORE: Hi-side: EMB20N03V Low-side: EMB20N03V +VCORE (4A) VRM_PWRGD .5VS (150mA) +3VS +3V UP7714 (LDO) (1.5A) +2.2.Power flow EMB24B03G (SWITCH) AC_APR_UC_10 A/D_DOCK_IN MB39A132 (Controllor) BAT CHG_ACOK#_10 RT8205CGQW (Controller) 3VSUS: Hi-side: EMB20N03V Low-side: EMB20N03V 5VSUS: Hi-side:EMB20N03V Low-side:RJK0355 VSUS_ON SUSC_ON SUSB_ON VSUS_ON +3VSUS (4A) SUSC_ON SUSC_ON RT8202APQW (Controller) 1.5A) +5V (1.8V (3A) UP7711 (LDO) UP7704 (LDO) VTT_DDR (0.5A) +1.5A) (2.8V: Hi-side:EMB20N03V Low-side: EMB20N03V AC_BAT_SYS EMB20P03G SWITCH CHARGER AC_BAT_SYS (under0.45A) +5VA UP7714 (LDO) +3VA (0.

3.Power Schematic • Load Switch • Linear circuit • Switching circuit • Charger circuit • Power Latch circuit .

45.+5VS EN PRN59C 6 5 100KOhm 1 PT 28 1 GND 3 P_SUSB# _ON_ 10 2 4 2 PT 24 1 PQ30A 2 PQ30B 1 UM6K1N +5VSUS 1 Shape PQ29 EMB20N03V 8 7 6 S 5 5D G 1 2 3 4 Shape + PCE6 100UF/6.a) Load switch PQ28 EMB20N03V 8 7 6 S 5 5D G PR116 P_3VS5VS_EN_10 1 1 00 KOhm 3 PRN5 9B 1 00 KOhm PRN5 9A When EN is high.5A) +5VS +5V_USB 6 PRN59D 32.37. the mosfet turn on +3VSUS Shape 1 2 3 4 Shape +3VS (1.5A) +5VA +12VSUS 1 1 1 PT 23 PT 27 2 1 62KOhm 1% 1 PC110 1UF/16V PC111 0.01UF/16V /X GND GND S0 S5 S3/S5 10KOhm PC114 0.01UF/16V GND 2 GND 2 2 .01UF/16V GND 2 +3VS.46.3V /X 1 PL17 2 (1.50 SUSB_ON 10mil 7 8 10mil 100KOhm 1 PC112 1UF/16V 2 70Ohm /100Mhz 5 4 UM6K1N PR117 1 GND GND 2 1 PC113 0.

1 UF/16 V 1 1 P R14 0 1 0K Ohm 2 GND 2 GND GND 2 +3V S _V DA C_CH +3V S _V DA C_CH +2.3 V 1 2 2 P T 32 P T 31 GND GND GND GND 2 2 .8V 1 1 P T 36 P T 35 1 1 P U7B P R13 9 1 0K Ohm 10 11 12 13 GND3 GND4 GND5 GND6 UP 77 11 U8 1 5mil GND +VT T _ DDR 1 1 P C83 1 0UF/6 .3 V 1 UP 77 11 U8 P C85 GND 1 0UF/6 .8V 2 +5V S P L1 4 7 0Ohm /1 00 Mhz 2 5mil 1 2 3 4 P U7A V IN GND1 RE FIN V OUT GND2 NC3 NC2 V CNT L NC1 9 8 7 6 5 +1.5V S S HORT_ P IN /X P C10 3 1 1 1 UF/16 V 1 P C10 1 P C10 2 1 UF/16 V /X 1 1 1 0UF/6 .5A +1.1 UF/16 V 0 .b) Linear circuit VTT_DDR / 0.3 V P _V T T DDR_RE F_ 10 2 2 2 1 GND GND GND P C87 P C86 0 .5VS / 150mA E N NC/SS /FB GND V IN V OUT P U9 UP 77 14 B MA5 -00 5 4 P R10 9 1 0K Ohm 1% P R10 8 P JP 2 0 2 2K Ohm 1 % P _2 .5V S _FB JP2 10 P _ 1 GND 1 P R10 7 0 Oh m 2 P _2 .5V S _S HDN#_ 10 1 2 3 2 +2.5V S _FB _11 0 2 _2 .3 V P C84 1 0UF/6 .

4 8.5V S _OV # _1 0 D 3 1 4.5V S _CNT LUP0 06 U8 _1 77 mb _s oi c _8 p_ 19 7x2 36 _4 vi aP R11 4 5 1K Ohm P C10 8 1% 0 .5V S _V IN_S 1 2 3 4 P OK EN V IN CNT L GND2 GND1 FB V OUT NC GND 9 P R11 1 8 6 .1 UF/16 V 1 P R34 1 0K Ohm P C29 1 0UF/6 .5 V S_ OV _1 0 1 P 1 G GND 3 GND P _1 .5V S _E N_ 10 P _1 .+3VA_AEC / 100mA +5V A P T 22 T P C26 T /X +5V A 2 P R30 1 00 KOh m P U2 E N NC/SS /FB GND V IN V OUT UP 77 14 B MA5 -00 5 4 P C25 2 2 20 PF/50 V /X 1 P T 11 T P C26 T /X 1 P _3 V A -E C_ E N_ 10 1 2 3 P R32 1 % 3 1.5V S _FB _1 0 2 1 _1 .3 V P _1 .45 .8V 2 +1.5 0 S US B _ON P JP 2 1 2 1 +1.6 6K Oh m P C10 6 1 P R11 2 P C10 4 0 .1 UF/16 V /X 2 GND 2 GND 2 GND .6K Oh m P JP 7 /X P _3 V A -E C_ FB _ 10 2 1 _3 V A -E C_ FB J P_ 10 2 P 1 S HORT_ P IN 1 1 +3V A 1 1 P C27 1 UF/16 V P C28 0 .43 .4 5 P M_L E V EL DOWN# 1 1 00 KOh m 2 S P C12 7 0 .5V S S HORT_ P IN /X 1 1 1 1 1 MOHM 1 0UF/6 .3 V 1 1 P T 30 P T 29 2 1 1 0UF/6 .44 .37 .3 4K Oh m 7 P _1 .1 UF/16 V /X P C10 5 1 1 P R11 3 2 1 P C10 7 1 0UF/6 .3 V c 08 05 _h 57 GND 2 c 06 03 2 GND GND GND +1.3 V 2 2 2 2 GND GND 2 2 GND P Q27 2 N7 00 2 P R11 5 2 1 _+1.5VS / 1A P T 40 1 +5V S P U12 A P R11 0 1 0K Ohm 2 1 P _1 .1 UF/16 V /X 8 .5V S _FB JP _ 10 P 6 5 3 2.

so output is adjusted too. MOS turn-on resistance is adjusted to change voltage drop on MOS. UP7704 for 1. The greater voltage drop on MOS.5VS.5VS.Common IC in linear circuit: 1201HA use UP7711 for VTT_DDR. Action Principle: Amplified signal controls MOS GATE voltage. the smaller current allowed UP7714 IC internal structure Variable resistor . furthermore. and UP7714 for +3VA and +2.

42 CPU_VRON 2 0Oh m PR145 1 P_VCCP_ENF_10 5 1 4 P_VCCP_EN_10 6 32.965V PD18 BAT 54CW /X 1 2 +5VA GND 1 PR105 2 PR144 30KOHM 3 1 GND 2 PR149 100KOh m 2 0Oh m /X 2 +VCCP_OV 0 14 32.0497V Low : Vout = 0.48.1UF/16V 2 100KOh m PM_LEVE LDOWN# 14.1UF/25V 2 1 PQ24 EMB20N03V 1 P_VCCP_SNU_S 2 1 NC1 GND1 PGND L GATE 7.43.1UF/16V Defaul t 4 1 1 PQ62 0A 2 UM6K1N 1 1 3 PR106 2 PQ62 0B UM6K1N GND PC173 0.46.74KOhm 1% PC98 0.c) Switching circuit PR93 P_VCCP_ENF_10 2 0Oh m /X PR95 820KOh m 1 1 +5VS P_VCCP_IN_S P_VCCP_TON_1 0 P_VCCP_EN_1 0 PL12 1 2 AC_BAT _SYS 70Ohm /100Mhz 1 +3VS +5VS P_VCCP_IN_S 2 PC90 10UF/25V c1206_h75 1 PC126 10UF/25V c1206_h75 5 2 P_VCCP_BST _15 P_VCCP_UG_ 20 2 8 7 6 5 D GND S G GND 1 GND PU8A 17 16 15 14 13 +VCCP / 5.50 SUSB_ON PQ26 B 5 UM6K1N 100KOh m PC100 0.3V 22UF/6.2UH 2 1 1 PT 20 PT 21 GND2 TON EN/DEM NC2 BOOT PR96 100KOh m +VCCP 1 P_VCCP_VDD_10 2 VOUT P_VCCP_FB_10 3 VDD P_VCCP_PW RGD_10 FB 4 PGOOD 1 2 PD14 1 2 BAT 54CW 3P_VCCP_BST _15 PC92 0.3V PJP19 2 PC159 PC160 22UF/6.1UF/16V 18 20 2 PU8B GND3 GND4 GND5 GND6 RT 8202APQW 19 21 PR102 10KOhm 1% PR103 2 GND 1 15KOhm 1% PQ26 A 2 1 2 GND 1 6 2 PT 37 S0 GND PR104 1 PC99 0.42 VCCP_PWRGD 1 12 UGA TE 11 PHASE 10 OC 9 VDDP 1 2 P_VCCP_PHASE_20 1 P_VCCP_OCR_10 2 4 3 2 1 P_VCCP_PHASE_S 1 5 2 1 1 1 +VCCP PR98 10KOhm 1% P_VCCP_FB_ 10 PC96 0.1UF/16V /X EN 2 GND GND GND GND 2 .44.37.46 UM6K1N 1 S3/S5 S3/S5 3 Hi : Vout = 1.1UF/16V /X 1UF/16V 2 PC95 1UF/16V RT 8202APQW PQ2 5 EMB2 0N0 3V PC94 2 PJP18 SHORT _PIN /X PC93 1000PF/50V c0603 PC158 22UF/6.3V 2 2 8 7 6 5 D Ilimit = Rilim / Rsense * 20u PR99 P_VCCP_FB_ 10 1 2 PR100 1Oh m 402KOh m 1 SHORT _PIN /X 2 5 6 7 8 GND GND GND S G GND GND P_VCCP_LG_2 0 PC97 2 2 1000PF/50V 1 1 GND GND 4 3 2 1 GND P_VCCP_FBJP_10 1 1 PR101 2.5A PL13 1 2.

Vout=Ton/(Ton+Toff)*Vin Duty cycle=Vout/Vin Ton:H-S Turn-on time Toff:L-S Turn-on time Toff Vdriver+Vboot UGATE: Ton Vdriver LGATE: Vin Switching‟s advantages compared to Linear: 1.The basic principle of DC-DC switching circuit is to regulate the output voltage value by controlling the duty cycle. High conversion efficiency PHASE: .Output voltage can be lower 2.

GND GND 2 1 4 3 .1 UF/16 V /X 29 P W R_ S W# P Q37 B UM6K 1 N GND 3 5 HOT K EY _ S W0 #_ P 2 When push the power button.2 2UF/2 5V/X P S -ON 32 P C12 3 0 .32 P W R_ S W_ E C# 2 P R13 2 0 Oh m P D15 1 2 3 1 B A T 54 A W P D16 B A T 54 A W 2 1 3 1 GND 1 1 EC Latch 5 P S -ON P RN61 C 6 5 1 00 KOh m P RN61 D 8 7 1 00 KOh m BAT GND P R13 4 2 P R13 6 5 10 KOh m /X 1 1 00 KOh m /X P C12 5 2 1 0 . 3VA & 5VA will exist GND 6 P C12 4 2 1 1 UF/25 V /X P R13 3 2 1 1 00 KOh m /X 1 3 A /D_DOCK _IN P Q38 A UM6K 1 N /X 2 P R13 5 3 90 KOh m /X P Q38 B UM6K 1 N /X 5 1 GND 2 4 This circuit is used for power saving.e) Power Latch P R12 8 A C_B A T _S Y S 1 2 10 K Ohm +3V_P L 20 mil +3 V _P L P_ 3VPL _FB_ 10 P R12 9 33 0K OHM When insert battery only.3 V 1 P U11 A P L4 31 LB A C EN P R13 0 20 0K Oh m /X 4 1 2 6 P RN61 B 1 00 KOh m P R13 1 0 Oh m /X P RN61 A 1 00 KOh m 2 P Q37 A UM6K 1 N +3VA 3 2 2 3 GND 4 3.47 P _CHG_ ACOK # _1 0 2 9. or insert adaptor.3VA & 5VA will be latched low.+3VA_PL is high. RT8205CGQW +3V A +3V _P L +VCC_ RTC P _+3V A _ +5 V A_ E N_1 0 3 4 2 1 2 1 For Power Latch PC1 22 2 1 10 UF/6 .

Common Bug Criteria and Solution • • • • • Switching Circuit Debug Flow How to make an estimation initially? How to determine whether MOS is burned? How to determine whether IC is normal? LDO circuit debug .

Switching Circuit Debug Flow MOS Visual Inspection Inductor,Resister IC and components around Static Measurement Input/Output Resistance Confirmation MOS Resistance Confirmation Input/output voltage Power on Test IC VCC,ENABLE voltage .1.

2.How to make an estimation initially ? Measure if MOS is short? Visual inspect whether MOS, Yes inductor,capacitor,IC has any burned symptom Measure if capacitor is short? Measure if IC is damaged? Yes Change damaged component .

For the output: Measure Output Resistance short? Yes Measure MOS to confirm Maybe L-S MOS is burned .

For the input: Maybe H-S MOS is burned Measure 19V input short? Yes Maybe L-S MOS is burned Maybe input capacitor is burned Measure MOS Measure MOS Change capacitor PS:All measurement above is static on board .

How to determine whether MOS is burned? Input/output short is commonly due to MOS short,if it is the case. all high side MOS is considered OK. .Measure the resistance between Drain and Source. which should be above 50ohm. the MOSFET is considered bad. please measure MOSFET first. Onboard MOSFET in switching circuit criteria For high side MOS 1. Measure the resistance between Gate and Source. if so.3. 2. if it isn‟t above K magnitude.

. all low side MOS is considered OK.For low side MOS 1. the MOSFET is considered bad. Measure the resistance between Drain and Source. Measure the resistance between Gate and Source. 2. If it isn‟t above K magnitude. If not short.

G and D.Attentions: 1.S last .Please discharge the MOSFET before measurement (mustn‟t power on) : separately short G and S.D first. G. D and S one time.Measurement sequence: measure D.S or G. (short G and S is necessary) 2.

• • • • Resistance measurement sequence: D-S. the MOSFET is OK.Summary: • If MOS G-S. The MOS which removed should be confirmed burned or not. maybe it‟s the problem of IC. above 0.for high side MOS D-S above 50ohm or for low side MOS D-S not short. G-S Able to use diode level( and D. If all MOS is changed OK. G-D resistance is above 1K ohm . but output still short.1V is OK. G-D. 1 ) 2to measure voltage between S . or the load device (for Vcore or charger or any other without short pin).

If abnormal. Static measurement (suggest step): Remove IC. check timing control circuit after power on 4. check whether the voltage of IC ENABLE and VCC pins is normal (can compare with a good one) .When VCC is abnormal. 3. check whether output is normal after power on again.Change good IC.4. measure the resistance between every pin of IC and GND (compare with good IC) b. IC is likely damaged. 2.How to determine whether IC is OK? If there is no voltage after power on with all MOS OK. NC1 GND1 PGND LGATE VOUT VDD FB PGOOD UGATE PHASE OC VDDP 12 11 10 9 . Power on test: 1 2 3 4 PU500 GND2 TON EN/D EM NC2 BOOT 17 16 15 14 13 RT8202APQW 5 6 7 8 1. When ENABLE is abnormal. measure whether the series connected resistors and VCC power rail are OK or not. disconnect timing control circuit. a.

+1. VCC. EN/SHDN# is normal to exclude timing problem. measure each PIN voltage.5VS Firstly. +2. Last. change IC to exclude the problem of IC self.LDO circuit debug 1 2 3 P U2 E N NC/S S /FB GND V IN V OUT UP 77 14 B MA 5 -00 5 4 • • • LDO circuits include: +3VA. Also can check REFIN/SET/FB. measure whether output resistance is short or not . Check whether input VIN.5VS. Then power on.5. Normally. • . correct REFIN/SET/FB voltage means IC is OK.+VTT_DDR.

EPC (1215T) Power .

Agenda • Power Solution Introduction • Common Bug Criteria and Solution .

Power Solution Power State & Signal Control Power flow Power Schematic .

5VA /X (*) Standby Power EX:3VSUS.Power State & Signal Control Always Power Power Rail Control EX:3VA.5VSUS VSUS_ON Dual Power EX:1. there‟s no always power when only insert battery. .5V SUSC_ON Main Power EX:3VS.5VS SUSB_ON EX:VCCP VCORE CPU_VRON (*):Because of the power latch circuit.1.

83A) FDMC8 884 VSUS_PWRGD VSUS_ON VRM_PWRGD RT8202 H:EMB09N03V L:EMB09N03V*2 +1.Power flow BAT Adaptor 40W(1 9V/2.1A ) EC VSUS_ON SUSB_ON MP224 9 RT8206*1/2 H:FDMC8884 +5VSYS_EN +5VSYS VSUS_ON SUSC_ON L:EMB09N03V +5VSUS&5VSUS_USB (3.05A) CPU PSI# SUSB_ON UP771 3 +0.1VS (3.VSS_SENSE.5VS (1.765A) +5VA +3VA (0.5V +1.1VSUS_PWRGD SUSB_ON +1.3A) FDMC8 884 SUSB_ON VSUS_PWRGD SUSB_ON CPU_VRON +5VS&+5VS_USB(4.62A) +1.15A) H:EMB09N03V L:EMB09N03V*2 SUSB_ON PM_DPRSLPVR FDMC8 884 SYSTEM +1.1A) A/D_DOCK_IN AC_BAT_SYS EMB24 B03G MB39A 132 H:FDM C8884 L:FDM C8884 CHG_EN# S_SMBCLK1 S_SMBDATA1 AC_OK BAT 3S2P/ 12.8VS (2.5V (8.HT_CPU_PWRGD +1.1A ) MP224 9 .1VSUS 1.VDDCR_NB_SENSE.1A) +1.2.1VSUS (9.6A) EMB09 N03V EMB09 N03V +3VS AC_OK RT8202 VSD VSC SUSC_ON +1.6V/3A P_AC_ARP_UC_10 SWITC H EMB20 P03 AC_BAT_SYS RT8206*1/2 H:F DMC8 884 CHG_EN# VSUS_ON +3VSUS L:F DMC8 884 S_SMBCLK1 SUSB_ON S_SMBDATA1 CHARGER +3VS FDMC8 884 APL53 25 +3VSUS (5A) (4.8VS (2.64 A) +1V_APU(5.75VS (1A) CLK_EN# CPU_VRON SVD SVC RT8870A NB: H:IRF8714 L:IRF8736 CPU: H:IRF8714 L:IRF8736 VRM_PWRGD VDDCR_NB VDDCR_CPU (10A) (11A) VDDCR_CPU_SENSE.

3.Power Schematic • Load Switch • Linear circuit • Switching circuit • Charger circuit • Power Latch circuit .

the mosfet turn on .a) Load switch 5VSYS_USB EN When EN is high.

b) Linear circuit Mp2249: Enable >1.4V will close IC。 .8V Vout begin to climb ,Whem Enable<0.

.

the smaller current allowed UP7713 IC internal structure . POR is granted 2.15V will close IC;>0.Common IC in linear circuit: 1215T use UP7713 and UP7714 1.3V, VOUT use 5mV use begin to climb and Prevent inrush Electric current The greater voltage drop on MOS. The REFIN pin can do referebce input then do enable to use, <0.

0 1.1 1 1.8 Ohmic region ◎ A Off Saturation region On Off VGS=VT+4V VGS=VT+3V 1.1 2.0 0.2 1.2 2.3 1.9 2.22 0.1 1.4 1.0 2.8 0.8 1.2 1.6 0.5 1.4 0.LDO Behavior-steady state Steady state Saturation ◎ C Saturation Cut off ◎ B ◎ D Saturation Cut off ◎ E ID(A) 2.4 1.6 VGS=VT+2V C ◎ D B ◎ VGS=VT+1V VGS=VT Cut off region ◎ 1.7A 1.6 1.2 VDS(V) Output characteristic .

c) Switching circuit---SYSTEM .

High conversion efficiency .Output voltage can be lower 2. Vout=Ton/(Ton+Toff)*Vin Duty cycle=Vout/Vin Ton:H-S Turn-on time Toff:L-S Turn-on time Toff Vdriver+Vboot UGATE: Ton Vdriver LGATE: Vin PHASE: Switching’s advantages compared to Linear: 1.The basic principle of DC-DC switching circuit is to regulate the output voltage value by controlling the duty cycle.

<7.5% low Pin 14 27 15 26 16 25 17 24 18 23 19 20 21 22 29 Description EN1\2: >0. UGATE1\2: switching up Gate voltage PHASE1\2: switching phasevoltage BOOT1\2: Switching Boot pin LGATE1\2: switching Low gateoltage PVCC: MOSFET gate driver power supply SECFB:5VSUS->12VSUS charge pump GND PGND SKIP#: switching mode choose .RT8206 introduce Pin 1 2 3 4 5 6 7 8 9 10 30 11 32 12 31 13 28 Description REF: provide 2V reference TON: Step switching frequency VCC: Power ENLDO: Contrao 19V transform5VA of LDO with EN NC VIN: provide switching of input LDO: 5VA pin out NC BYP: provide 5VA.5VSUS transform, when 5VSUS OK after.8V IC begin work. VOUT1\2: 3VSUS 5VSYS PIN out FB1\2: Two switching of feedback ILIMIT1\2:Two switching of OCP protect PGOOD1\2: When VOUT reach92.5% Open drain.

Detail introduction: SS and power off .

d) VCORE circuit .

RT8870 introduce Pin 1 2 3 4 5 Description RBIAS: : provide 2V reference EN: >2V IC begin work,<0. voltage level decision the pull high voltage DRPSEL: next page OCSET_NB\OCSET: Provide over current protect VCC: controller power supply FB_NB\FB: output voltage feedback COMP_NB: switching regulator error amplifier output pin TON_NB\TON:Step switching frequency ISP_NB,ISN_NB:return circuit of electric current 7 8 40 9 10 39 11 38 12 37 32 33 35 36 13 14 .8V close IC SVC: serial VID clock signal SVD: serial VID data signal PWROK:<0.ISN1:return circuit of electric current ISP0.57V SVI no work.ISN0:return circuit of electric current 6 PGOOD: VOUT OK after open drain.8V to receive SVI command Pin 15 34 16 24 28 17 25 27 18 23 29 19 22 30 20 21 31 26 Description RGND\NB: remote sense GND PGND_NB\0\1: L-S GND LGATE_NB\0\1: switching Low gate voltage PHASE_NB\0\1: switching hase voltage UGATE_NB\0\1: switching up Gate voltage BOOT_NB\0\1: switching boot voltage PVCC: MOSFET gate driver power supply ISP1.>0.

Detail introduction: DRPSEL DRPSEL: DRPSEL PIN voltage=5V ,roop no open,Boot‟s voltage=1.4V,SVI no work DRPSEL PIN voltage<=3V , Boot‟s voltage=1.1V,SVID can regulate VOUT voltage .

Detail introduction: SS and power off .

Detail introduction: SVID .

Detail introduction: protection .

e) Charger When use adapter When use battery only Vin Vout When charge the battery CHG_EN# .

. Adapter present: AC_OK = high.Detail introduction: Action Battery present: BAT_IN=high. Charger Enable CHG_EN# = high. Battery absent: BAT_IN=low. Adapter absent: AC_OK = low. CHG_EN# = low. SMB1_DATA: set charge current and voltage Any of these signals not correct will cause charger works in wrong way. Charger Disable Battery Package BAT_IN# SMB1_CLK SMB1_DATA CHG_EN# AC_OK EC SMB1_CLK SMB1_DATA MB39A132 SMB1_CLK.

.e) Power Latch When push the power button. or insert adaptor.3VA & 5VA will be latched low.+3V_PL is high. 3VA & 5VA will exist When insert battery only.

Charger IC will be reduced charged the electric current to protect adapter first. Power limit can work and send out PWRLIMIT#x signal to system then to drop frequently . .f) Power limit When the systematic consumption reaches the Adapter consumption. if systematic consumption increase still.

Common Bug Criteria and Solution • • • • • Switching Circuit Debug Flow How to make an estimation initially? How to determine whether MOS is burned? How to determine whether IC is normal? LDO circuit debug .

Switching Circuit Debug Flow MOS Visual Inspection Inductor,Resister IC and components around Static Measurement Input/Output Resistance Confirmation MOS Resistance Confirmation Input/output voltage Power on Test IC VCC,ENABLE voltage .1.

How to make an estimation initially ? Measure if MOS is short? Visual inspect whether MOS, Yes inductor,capacitor,IC has any burned symptom Measure if capacitor is short? Measure if IC is damaged? Yes Change damaged component .2.

For the output: Measure Output Resistance short? Yes Measure MOS to confirm Maybe L-S MOS is burned .

For the input: Maybe H-S MOS is burned Measure 19V input short? Yes Maybe L-S MOS is burned Maybe input capacitor is burned Measure MOS Measure MOS Change capacitor PS:All measurement above is static on board .

which should be above 50ohm. all high side MOS is considered OK. if so. the MOSFET is considered bad.3. . Onboard MOSFET in switching circuit criteria For high side MOS 1.How to determine whether MOS is burned? Input/output short is commonly due to MOS short,if it is the case. Measure the resistance between Gate and Source. 2. if it isn‟t above K magnitude.Measure the resistance between Drain and Source. please measure MOSFET first.

2. If not short. all low side MOS is considered OK. Measure the resistance between Gate and Source. Measure the resistance between Drain and Source.For low side MOS 1. the MOSFET is considered bad. If it isn‟t above K magnitude. .

(short G and S is necessary) 2.Measurement sequence: measure D.Please discharge the MOSFET before measurement (mustn‟t power on) : separately short G and S.S or G.D first. D and S one time.Attentions: 1. G.S last . G and D.

G-S Able to use diode level( and D. 1 ) 2to measure voltage between S • If all MOS is changed OK. the MOSFET is OK.Summary: • If MOS G-S. The MOS which removed should be confirmed burned or not. or the load device (for Vcore or charger or any other without short pin). maybe it‟s the problem of IC.for high side MOS D-S above 50ohm or for low side MOS D-S not short. above 0. G-D resistance is above 1K ohm .1V is OK. but output still short. . G-D. • • • Resistance measurement sequence: D-S.

check timing control circuit after power on 4.When VCC is abnormal. NC1 GND1 PGND LGATE UGATE PHASE OC VDDP 12 11 10 9 .Change good IC. disconnect timing control circuit. measure the resistance between every pin of IC and GND (compare with good IC) 1 2 3 4 GND2 TON EN/D EM NC2 BOOT OK. Power on test: 1.If abnormal.How to determine whether IC is OK ?If there is no voltage after power on with all MOS VOUT VDD FB PGOOD b. When ENABLE is abnormal. RT8202APQW 5 6 7 8 2. measure whether the series connected resistors and VCC power rail are OK or not. PU500 17 16 15 14 13 4. 3.a. IC is likely damaged. check whether output is normal after power on again. check whether the voltage of IC ENABLE and VCC pins is normal (can compare with a good one) . Static measurement (suggest step): Remove IC.

EN/SHDN# is normal to exclude timing problem. Then power on. change IC to exclude the problem of IC self. • .+1.5VS • • Firstly. Also can check REFIN/SET/FB. measure whether output resistance is short or not . Last. Normally. VCC.+VTT_DDR. Check whether input VIN. measure each PIN voltage. correct REFIN/SET/FB voltage means IC is OK.5. +2.LDO circuit debug 1 2 3 P U2 E N NC/S S /FB GND V IN V OUT UP 77 14 B MA 5 -00 5 4 • LDO circuits include: +3VA.5VS.

Chapter 3 CHARGE Repair Guide .

Overview  Introduction  Diagram  Signal Description  Repair Flow Chart  Q & A (Repair Experience) .

Introduction  Battery Pack: -Battery cell -Protection Board Protection circuit Gas Gauge IC : BQ2060H BQ20Z90 -Outer Casing .

6 1000 6%/month Ni-Cad 40 1.2 800 20%/month Energy Density (W-Hr/Kg) Operating Voltage Lifetime (approx.Rechargeable Battery  Li-Ion Battery  NiMH Battery  NiCad Battery Li-Ion 90 3. cycles) Self Discharge .2 1000 15%/month Ni-MH 60 1.

Features of Li-Ion Battery  Smaller  lighter  Low self-discharge rate  No memory effect  No Pollution  Overcharge or over discharge will have permanent damage .

V. . C.Charging Characteristics (Li-Ion) •CC(Constant current) & CV(Constant voltage) C.C.

Glossary #1  Nominal Capacity: .4AH (1A= 103mA) .6v/cell (or 3.mAH ex: 400mAH = 0.Li-Ion : 3.2v/cell .AH  Nominal voltage: .Ni-MH : 1.7v/cell) .

Glossary #2  Series & Parallel: I V V Series Parallel .

6v Li-Ion. over discharge: under 2.35v /cell)  Self discharge  Cycle life -500~1000 (fullemptyfull) . (ex:3.6v Li-Ion.3v ~4. 4. (ex:3.Glossary #3  Over discharge -for battery spec.75v~2.5v /cell)  Over charge -for battery spec.

3.Battery Label Li-Ion Ni-MH Li-Polymer Norman Voltage:14.7 v/cell .8v .4S :4 x 3.8v Battery Capacity -4000mAH -2P: 2 x 2000(mAH) 2000mAH/cell .7 =14.

Connecter(Old) 1 Pin 1 2 3 2 3456 Description Ground Battery Type HDQ Bus I I/O Signal GND TS HDQ_BAT Type 4 5 6 BAT_EDV NC BAT_S End of discharger No Connection Battery input/output voltage I PWR(I/O) .

Connecter(New) .

Battery Pack Battery connecter Gas Gauge Board Protection Board .

Gas Gauge IC –BQ20Z90H Battery Parameter Record Charge and discharge counting Voltage Temperature Automatic calibration Battery Status Wake up function .

Gas Gauge IC –BQ2050H PIC16C54 HDQ Bus HDQ BQ2050H 1 2 3456 .

Battery Learning  Charge  Full Discharge NAC=0 (Discharge complete) Charge Full .

FRAME .

FRAME .

FRAME .

(Bq20Z90) .Charge Circuit Sample (Bq20Z90 .

DCIN & LDO & REF .

ACIN & ACOK AC_APR_UC .

.AC IN A / D_DOCK_IN AC signal to determine is correctly insertion or not.

PKPRES# .

MODE Select Setting .

640Wh .6V X 2200 X 2 = 47.160Wh 60.520 Wh 2200mAh 2600mAh 2800mAh 6cell 47.360Wh 74.3串 2並 3 X 3.520Wh 56.880Wh 80.480Wh 8cell 63.

EC EC .

5VREF CLK. CHG_EN ->Hi . Change NG related Component/fix any trace open NG OK Change ECat firstly . Change NG related component fix any trace open NG OK Check C. Vcc Pin = A/D_VIN ->19V Check EC IC Voltage & CLK. AC_APR_UC ->Hi (A/D in) TS# ->Lo (BATT in) .C & C. 32. CHG_LED ->Hi Check charge IC signal .G Component Fix any trace open & BAD solder problem NG Measure Voltage & CLK Check Charge IC Voltage.V Setting Trace the related circuit. and then Charge IC Finish . 2. +3VA_EC.Repair Flow Chart Start Visual Inspection check Charge IC & EC & related component are no damage Change defect Charge IC & EC & N.768MHz Check PIC IC signal . BAT_CHG_OUT Change NG X‟tal & RLC Component and fix any trace open NG OK OK Check which Control signal for device is wrong Confirm circuit.

when the system current increases. PQ8902 turn. AC_BAT_SYS = A / D_DOCK_IN. ACOK down after. Adapter to the system power supply. charging the charge current will decrease. charge IC with current share function. while to the Battery Charge. insert an instant spike CAP absorbed by the system side. PQ8902 off. PQ8903 off. PQ8903 conduction. PQ8902 fully on.一、charger –MB39A132 1、Adapter/battery transform Charge voltage. . &electric urrent „s set Charge IC  Only adapter. Adapter power supply to the system.  Only battery. PQ8903 not conduct. Battery power supply to the system Adapter. Battery are the presence.

 Battery notify the EC his voltage .2、Prepare charge BATSEL_1 BATSEL_0 VSET_EC ISET_EC CHG_EN AC_IN_OC# ACOK SMB0_CL K SMB0_DA Battery T MB39A132 Pack EC TS1# BAT1_IN_OC# Battery DETECT Adaptor DETECT  Battery and Adapter must exist.  according to the battery state notify the charge IC how to charge or need to EC charge or not. and message. capacity. current.(Pre-charging \ CC \ CV) .

4V  Adapter present: ACOK=Low, AC_IN_OC#= Low  Adapter absence : ACOK=High, AC_IN_OC#= High .7V/17.adapter in detect  ACOK=13.

Battery in detect  Battery present: TS1#=Low,BAT1_IN_OC#=Low  Battery absence : TS1#=High,BAT1_IN_OC#=High Note:Have project directly TS1 # and BAT1_IN_OC # to short .

put CHG_EN to High and start charging. and set the charge voltage of single cell.3、MB39A132 charging set BATSEL_1 BATSEL_0 VSET_EC ISET_EC CHG_EN AC_IN_OC# ACOK SMB0_CLK SMB0_DAT MB39A132 Battery Pack EC TS1# BAT1_IN_OC# Battery DETECT Adaptor DETECT Smart charging: EC control the VCHG & ICHG, Model Share the circuit ,Support 2S/3S/4S battery  VSET_EC:EC according to the information of battery.  ISET_EC:EC according to the related number of battery and battery status (Pre-charging or Quick-charging) to set voltage electric current  CHG_EN :When BATSEL_0、 BATSEL_1 、VSET_EC、 ISET_EC setting finished. .

.BATSEL_0、 BATSEL_1  BATSEL_0、 BATSEL_1:EC according to the series connection number. notify the charge IC and according to the VSET_EC message to set Battery charge voltage.

4、 MAX8725 charging set SMB0_CL K SMB0_DA Battery T Pack EC BATSEL_2P# PRECHG CHG_EN# MAX8725 TS1# BAT1_IN_OC# AC_IN_OC# CHG_AC_OK Battery DETECT Adaptor DETECT  BATSEL_2P#:Ec tell Charge IC about battery’s pack ,Set CC, BATSEL_2P# =Low,is a 2P/3P battery,ICC=2.5A; BATSEL_2P# =High,is a 1P battery,ICC=1.5A。  PRECHG:EC detect the Battery Voltage <3V*Cells,PRECHG=1, Battery-Pack into the Pre-Charging Mode,charge current=150mA  CHG_EN#:EC detect the Battery .when it reach the condition of charging , CHG_EN# = 1. Charger Enabled . CHG_EN# = 0. Charger Disabled.

.  ISET_EC:EC according to the related number of battery and battery status (Pre-charging or Quick-charging) to set voltage electric current  CHG_EN :When BATSEL_0、 BATSEL_1 、VSET_EC、 ISET_EC setting finished.5、MAX17015 charging set SMB0_CL K SMB0_DA Battery T VSET_EC ISET_CTL MAX17015 Pack EC AC_IN_OC# CHG_AC_OK TS1# BAT1_IN_OC# Battery DETECT Adaptor DETECT Smart charging: EC control the VCHG & ICHG, Model Share the circuit ,Support 2S/3S/4S battery  VSET_EC:EC according to the information of battery. and set the charge voltage of single cell. put CHG_EN to High and start charging.

0 1UF/2 5V 32 .8 UH 1 2 25 mOHM 2 5 P C39 1UF/16 V 1 1 1 3 2 2 P D8 /X B A T 54 CW GND P R44 20 0K Oh m 1 2 3 4 5 6 7 8 33 32 31 30 29 28 27 26 25 CHG_V CC GND V IN CT L1 GND1 V RE F RT CS A DJ3 BAT T 24 23 22 21 20 19 18 17 P _CHG_V IN_1 0 P _CHG_CT L 1_ CTL 2_ 10 P _CHG_RT _ 10 P _CHG_CS _ 10 P _CHG_A DJ CV_ 10 P _CHG_V B T T _1 0 MB 39 A 13 2_ VRE F P Q13 E MB 20 N0 3V P C40 10 00 P F/5 0V 1 1 1 P C41 10 UF/2 5V 1 GND 2 2 GND2 CTL 2 CB OUT1 LX VB OUT2 PGND CEL LS ACIN P Q10 B UM6K 1 N 32 B A T _L EA RN 5 3 P _CHG_A CIN_1 0 P _CHG_A COK #_ 10 P _CHG_INE 3-_ 10 1 CHG_COMPAI_1 0 -INE1 OUTC1 OUTC2 +INC2 -INC2 ADJ2 COMP2 COMP3 1 P R46 22 K Ohm V CC -INC1 +INC1 A CIN A COK -INE 3 A DJ1 COMP1 1 P R43 22 0K Oh m 2 2 P _CHG_CIRS +_ 5 P R45 GND P _CHG_CIRS -_5 1Oh m P _CHG_V B T T _1 0 1 2 P _CHG_L G_2 0 1 1 4 3 2 1 2 1 1 2 1 P R49 10 0K Oh m 2 GND 2 1UF/25 V P U3A MB 39 A 13 2 9 10 11 12 13 P_CHG_ADJCI_ 10 1 4 P_CHG_COMPCI_ 10 15 P_CHG_COMPCV_ 101 6 P C47 0.d) Charger A /D_ DOCK_ IN 1 P R35 15 mOh m 2 When use adapter P T 12 T P C26 T P T 13 T P C26 T P U3B 34 35 36 37 GND 1 10 K Ohm 2 P D6 B A T 54 CW P R39 1 2MOh m 2 3 GND3 GND4 GND5 GND6 MB 39 A 13 2 1 1 A C_B A T _S Y S 8 7 6 D2 1 P C30 47 00 P F/5 0V P P 1 P C31 0.1 UF/25 V P RN62 D 10 0K Oh m UP 62 68 A MA 6 1 P C56 /X 0.38 S MB 1_ CL K 32 .4K Ohm 1% 1 1 P C44 P C45 0.1 UF/25 V 2 1 10 00 P F/5 0V GND GND GND P D7 B A T 54 CW P C37 /X 0.1 UF/25 V P Q8 E MB 24 B0 3G D1 D1 D2 5 P R36 G1 S1 S2 G2 2 1 1 P C32 0. Bat tery discharges +3 V A GNDGND 2 P R51 22 K Ohm 1 2 P C49 82 0P F/50 V 2 1 1 P C51 /X 12 0P F/50 V 1 P R56 10 K Ohm P _CHG_INE 3-_ 10 GND GND +5 V S US GND GND 2 1 P C50 33 00 P F/5 0V P _CHG_V B T T _1 0 P C52 P R55 12 0P F/50 V 1K Oh m 2 1 2 1 V mi d P R52 56 K Ohm P R53 10 K Ohm 1% /X 12 2 P R54 10 0K Oh m 2 1 P _CHG_CT L 1_ CTL 2_ 10 2 1 GND P Q14 A UM6K 1 N 2 GND P C54 0.0 1UF/2 5V 4 3 2 1 1 2 2 2 GND A /D_ DOCK_ IN MB 39 A 13 2_ VRE F CHG_V CC GND 1 1 2 6.1 UF/25 V GND When charge the battery +3 V A 1 2 BAT_LEARN = 1.1 UF/16 V P _CHG_CIRS +_ 5 P _CHG_CIRS -_5 P R50 10 K Ohm P C48 0.1 UF/16 V /X P R47 37 . Adaptor Mode Vin A C_B A T _S Y S P _A C_ AP R_ UC_ 10 11 GND P Q12 E MB 20 N0 3V 8 7 6 5 D S G P T 14 T P C26 T P _CHG_HG_ 20 P L7 P R42 Vout BAT P C42 10 UF/2 5V P_CHG_SNU_ S 8 7 6 5 D S G P JP 1 0/X S HORT _ P IN P JP 1 1/X S HORT _ P IN P JP 1 2/X S HORT _ P IN .1 UF/16 V P R48 33 K Ohm 4 2 1 GND 1 GND P C46 0. Charger Disa ble 2 1 P RN62 A 10 0K Oh m A /D_ DOCK_ IN 1 2 P _A C_ AP R_ UC_ 10 P RN62 B 10 0K Oh m P T 26 1 GND A C_OK 32 GND +3 V A +5 V S US P Q16 2N7 00 2 P R57 CHG_EN# D P Q15 3 2N7 00 2 11 3 4 3 3 3 D 2 6 11 G 2 S B A T _IN P Q14 B UM6K 1 N 5 32 P RN62 CS 2 1 2 8 P C55 0.1 UF/16 V 2 2 2 2 2 2 1 P C43 0.1 UF/16 V 1 10 0K Oh m 2 P U4 1 5 1 /X 2 GND 7 2 2 GND GND GND GND GND 4 3 G 10 0K Oh m 2 P_ADIN_ SNU_S V mi d 1 2 1 1 2 3 4 S D G 8 7 6 5 1 2 3 4 2 2 BAT P R38 P R37 10 0K Oh m P JP 8 /X S HORT _ P IN P JP 9 /X S HORT _ P IN 10 K Ohm P Q9 E MB 20 P0 3G When use battery only 1 P _CHG_V IN_S 1 2 P L6 70 Ohm /1 00 Mhz P C34 10 UF/2 5V P L5 70 Ohm /1 00 Mhz 2 1 P Q10 A UM6K 1 N P R41 10 0K Oh m D P Q11 2N7 00 2 2 P _CHG_A COK #_ 10 P _CHG_A COK #_ 10 43 .0 1UF/2 5V 3 P C33 10 UF/2 5V 1 2 2 1 1 P_CHG_BST_2 0 P_CHG_HG_2 0 P_CHG_PHASE_ 20 P_CHG_VL_ 20 P_CHG_L G_2 0 P C38 /X 0. Battetry Mode CHG_ACOK# = 0. Charger E nable CHG_E N# = 1 .1 UF/16 V 1 2 T P C26 T P T 15 /X 2 6 P C53 10 00 P F/5 0V 1 1 CHG_E N# 32 CHG_E N# = 0 .1 UF/25 V P R40 1Oh m 1 2 1 2 2 2 1 6 2 GND P_CHG_AIRS+_ 5 P_CHG_AIRS-_5 23 3 1 1 2 P T 25 1 2 P _CHG_P HA S E _2 0 5 G 2 S /X P C35 1 P C36 0.1 UF/16 V GND 2 38 .49 CHG_ACOK# = 1.38 S MB 1_ DA T A 1 2 3 GND V CC S CL OUT 1 S DA OUT 2 6 5 4 P _6 26 8_ V CC P _CHG_A DJ CV_ 10 P _CHG_A DJ CI_ 10 P C58 0.43 B A T _IN# P C57 0.

SMB1_DATA: set charge current and voltage Any of these signals not correct will cause charger works in wrong way. Adapter absent: AC_OK = low. Battery absent: BAT_IN=low.Battery present: BAT_IN=high. . CHG_EN# = low. Adapter present: AC_OK = high. Charger Disable Battery Package BAT_IN# SMB1_CLK SMB1_DATA CHG_EN# AC_OK EC SMB1_CLK SMB1_DATA MB39A132 SMB1_CLK. Charger Enable CHG_EN# = high.

Chapter 4 CLOCK Repair Guide .

Overview  Diagram  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

结构图-1 CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK# CLK_REQ_MCH# CLK_MCH66 (AGP/Hub-link) CLK_MCH_3GPLL (PCI-E x16 /with DMI-link) CLK_MCH_3GPLL# (PCI-E x16/with DMI-link) DREFCLK (for GMCH) DREFCLK# (for GMCH) CLK_AGP66 (AGP) CLK_PCIE_PEG (PCI-E) CLK_PCIE_PEG# (PCI-E) CLK_VGA27 CLK_ICHPCI CLK_USB48 CLK_ICH14 CLK_ICHHUB CLK_PCIE_ICH (PCIE x1) CLK_PCIE_ICH# (PCIE x1) CPU MCH (Hub/DMI) (PCI-E) (GMCH) CLOCK Generator (1) VGA (AGP/PCI-E) ICH (HUB) (PCI-E) .

结构图-2 CLK_CBPCI CLK_MINIPCI CLK_LANPCI CLK_SIOPCI CARDBUS MINIPCI LAN SIO KBC FWH CLK_SIO_14M CLK_KBCPCI CLK_FWHPCI CLK_PCIE_NEWCARD CLOCK Generator (2) CLK_PCIE_NEWCARD# CLK_REQ_NEWCARD# CLK_PCIE_MINICARD CLK_PCIE_MINICARD# CLK_REQ_MINICARD# NEWCARD MINICARD SMB_CLK SMB_CLK X‟tal 14.318MHz CPU_BSEL0~2 CLK_EN# +3V_CLK depends on CPU type .

59 CLK_PCIE_MINICARD/MINICARD# CLK_REQ_MINICARD# MINICARD NEWCARD 22 23 CLK_PCIE_NEWCARD/NEWCARD# CLK_REQ_NEWCARD# .318MHz LAN RTL 8101 TPM Device FWH 49LF004A CBPCICARDBUS 33 MHz LANPCILAN 33 MHz KBCPCIKBC 33 MHz TPMPCITPM 33 MHz FWHPCIFWH 33 MHz 2.11 21.37.7.50.42 45.13 29.46 53.28.56 BSEL1 52 51 44 43 40 19 20 14 15 9 12 60 39 38 5 8 3 64 4 CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK# CLK_REQ_MCH# CLK_MCH_3GPLL CLK_MCH_3GPLL# DREFCLK DREFCLK# CLK_ICHPCI CLK_USB48 CLK_ICH14 CLK_PCIE_ICH CLK_PCIE_ICH# CLK_CBPCI CLK_LANPCI CLK_KBCPCI CLK_TPMPCI CLK_FWHPCI Yonah-CPU (Dual Core) BCLK 133/166 MHz FSB 533/667 MHz 16 Calistoga GMCH (945GM) MCH_3GPLL 100 MHz for PCIE/DMI DREFCLK 99 MHz for graphics ICHPCI ICH7 PCI Bus 33 MHz USB48 USB 48MHz ICH14 ICH7 14 MHz PCIE_ICH S.6.Generator Distribution-W5F Sample +3VS_CLK ICS 954310BGLFT 1.B PCIE(x1) 100MHz ICH7-M CARDBUS R5C832 KBC M38857 VTT_PWRGD# 10 1 2 57 58 X‟tal 14.

45.6.7.42.8.Generator Distribution-W6A Sample +3VS_CLK ICS 954213 1.12.318MHz .13 22.30 38.S.48 44 43 35 34 CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK# CLK_MCH_3GPLL CLK_MCH_3GPLL# DREFCLK DREFCLK# CLK_ICHPCI CLK_USB48 CLK_ICH14 CLK_PCIE_ICH CLK_PCIE_ICH# CLK_CBPCI CLK_LANPCI CLK_MINIPCI CLK_KBCPCI CLK_FWHPCI Dothan-CPU Alviso GMCH (915GM) BCLK 100/133 MHz F.29.B 400/533 MHz MCH_3GPLL 100 MHz for PCIE/DMI DREFCLK 99 MHz for graphics ICHPCI ICH6-M PCI Bus 33 MHz USB48 USB 控制ler 48MHz ICH14 ICH6-M 14 MHz PCIE_ICH ICH6-M PCIE(x1) 100MHz VTT_PWRGD# 16 32 31 14 15 9 11 53 25 26 56 FSLC R219 680 ohm ICH6-M CARDBUS R5C841 MINIPCI (WLAN) KBC M38857 FWH 49LF004A CBPCICARDBUS 33 MHz 1 2 49 50 2.51 54 55 3 4 LAN RTL 8100CL LANPCI for LAN 控制ler 33 MHz MINIPCI for WLAN Card 33 MHz KBCPCI for Keyboard 控制ler 33 MHz FWHPCI for BIOS CLK 33 MHz X‟tal 14.33 37.

Frequency Programming .

.

.

ICS954213 Datasheet (for Sonoma 平台) .

ICS954213-Block 结构图 .

Pin 描述(1) .

Pin 描述(2) .

ICS954310 Datasheet (for Napa 平台) .

ICS954310-Block 结构图 .

Pin 描述(1) .

Pin 描述(2) .

Pin 描述(3) .

Ordering Information .

Repair Flow Chart Start Visual Inspection check CLK Gen. and related component are no damage Change Defect CLK Gen. Check related trace & resistor. Voltage. Change NG related component fix any trace open NG Check which CLK signal for device is wrong Confirm circuit. Voltage Check CLK Gen. +3V_LAN Change NG RLC Component and fix any trace open NG Measure X‟tal 14.318 MHz Measure & Check X‟tal 14. capacitor Change NG RLC Component /fix any trace open NG OK OK OK OK OK Change CLK Generator Finish . VTT_PWRGD# Confirm circuit.318MHz Change Defect X‟tal or related Capacitor Component NG Measure CLK Gen. Controller Signals Check CLK Gen.G Component Fix any trace open & BAD solder problem NG Measure CLK Gen. Controller Signals.& N.

318MHz CLK Gen.Repair Technique-Visual Inspection Visual Inspection To check Clock Generator and X‟tal and related components are not damaged. . Fix any trace open & BAD solder problem. 1 X‟tal 14.

2 .3V Clock Gen. voltage (+3V_CLK) =3.3V is ok.Repair Technique-Measure Voltage Use Multi-Meter or Oscilloscope to measure : +3V_CLK=3.

3-1 X‟tal CLK=14.318MHz is ok.318MHz 3-2 .Repair Technique-Measure CLK X’TAL Use Oscilloscope to measure : X‟TAL clock =14.

CPU Power IC 4-2 . Control Signal voltage (VTT_PWRGD#) =0V is ok. Ps: (when press power bottom the VTT_PWRGD# signal status is from 3.Repair Technique-Measure Control Signal Use Multi-Meter or Oscilloscope to measure Clock Gen.3V0V) VTT_PWRGD# 4-1 CLK Gen.

5 . If find error please trace the circuit to find it‟s connection.Repair Technique-Check Individual NG signal Use Oscilloscope to measure every individual CLK signal. If related RLC components are ok but CLK still is NG please try to change CLK generator at last.

Chapter 5 HDMI Repair Guide .

Overview  Connector Pin Definition  Block diagram  Schematic  Debug Tips .

Connector Pin Definition PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Description TMDS Data 2+ TMDS Data 2 GND TMDS Data 2TMDS Data 1+ TMDS Data 1 GND TMDS Data 1TMDS Data 0+ TMDS Data 0 GND TMDS Data 0TMDS Clock + TMDS Clock GND TMDS Clock CEC N.C DDC CLOCK DDC DATA DDC/CEC GND +5V Power Hot Plug Detect .

Block diagram • With level shifter MB +3Vs TMDS DATA [2:0] TMDS DATA [2:0] PCH TMDS CLOCK DDC CLK/DAT Level Shifter TMDS CLOCK DDC CLK/DAT Hot Plug Detect Hot Plug Detect HDMI connector .

Level shifter .Schematic HDMI conn.

.

Chapter 6 Touch Pad Repair Guide .

Overview  Diagram  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram +5V +3V LPC SB KBC CLK DATA GND CLK_KBCPCI X‟TAL 33MHz 8MHZ .

Circuit KBC CONNECT .

M38857 Pin Define .

M38857 Pin Describe 1 .

M38857 Pin Describe 2 .

M38857 Pin Describe 3 .

CLK_KBCPCI = 33MHz X‟tal = 8MHz . setting Measure Voltage & Clock Use meter to measure Signal‟s bias voltage value is ok Check T/P signals.Repair Flow Chart Start Visual Inspection Check Connector & RLC components is OK Change Defect Connector & OK damaged RLC components NG Be sure the function is no disable in O. +3V .S NG Check KBC Voltage & CLK. INTCLK_Q3 INTDATA_Q3 Change NG related R.L Component OK or fix trace open problem NG Change KBC Controller Chip OK NG Change South Bridge Finish . Check T/P Connector Voltage. Change NG Component and fix any trace open NG OK OK Check Fun. +5V Trace circuit.

L. components is not miss or damage CID .check TOUCH PAD connector is OK or not 2.C.R.Repair Technique-Visual Inspection 1 Visual Inspection 1.

2-2 .Repair Technique-Function Setting 2-1 Function Setting check TOUCH PAD Function is no disable in OS.

. 3-2 Use multi-meter or Oscilloscope to measure T/P Connector Voltage.Repair Technique-Measure Voltage 3-1 Use multi-meter or Oscilloscope to measure KBC Voltage. +5V is ok. +3V is ok.

Repair Technique-Measure CLK 4-1 Use Oscilloscope to measure KBC CLK. CLK_KBCPCI = 33MHz. X‟tal = 8MHz. 4-2 KCB X‟tal =8MHz .

INTDATA_Q3 are correct 2. If the problem is still existing.if the value is high please check resistor or Inductance and circuit of the trace is no damage and no open.Repair Technique-Measure T/P signals Check T/P Signal 5 GND test point 1. please change Touch Pad Controller K/B Chip . Use multi-meter to measure INTCLK_Q3.

4.5.2.Repair Technique-Diode Value of T/P Pin PIN Signal name +5VS_TP +5VS_TP Diode value 591 591 PIN1.6 6 1 2 3 4 5 6 INDTATA_5S INTCLK_5S GND GND 602 602 0 0 .3.

FFC Cable Pin Define Pin top-top top-bottom metal Top-Top Top_Bottom .

Touchpad Left -Right PS2 Transmit interfaces Touchpad ---TP_CLK TP_DAT Export the normal wave .

Touchpad Left -Right Touchpad Left -Right When the button is going down. the signal reveals the normal response .

Chapter 7 Keyboard Repair Guide .

Overview  Diagram  Circuit  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram-1 +3V KSO0 ~KSO15 KSI0 ~ KSI7 KEYBOARD CONNECTOR Keyboard control IC Ex: M38857M8 LPC SB X‟TAL CLK_KBCPCI 8MHZ KEYDETECT1 KEYDETECT2 33MHz Array resistor +3VS .

. COM Port or Print Port etc. because there are no PS/2 Port. on those model.Diagram-2  Embedded Keyboard controller -Matrix  PS : Maybe there is no Super IO in new NPI model.

Diagram-2 .

Circuit-W6A .

Circuit-W6A .

Check array Resistor & trace is OK Change Defect Component or fix trace open NG OK Check KBC power(+3V) & CLK(8MHz/33MHz) is OK ? Check NG signal connect to which capacitor & resistor & Trace Change Defect Component or fix trace open problem NG OK Change KBC Controller Chip Finish .Repair Flow Chart Start Visual Inspection Check Connector & Resistor component no damage Change Defect Connector & damaged Resistor component NG Check Connector Pin no short & open /change new one KB to testing NG OK OK Check Connector Pin & KB FPC Use meter to measure Signal‟s bias voltage value is ok Confirm the circuit.

Please change New one K/B to Test at first. 1-1 If V.check K/B connector is OK and Fix any trace open. 1-2 .Check KBC and related component are OK. and problem still is exit.Array Resistor are no damage or miss and Fix any trace open.I check is OK. 2. 3.Repair Technique-Visual Inspection Visual Inspection 1.

please trace and confirm the circuit to fix any trace or array resistor problem.O (super I/O) controller. If the value is NG.Repair Technique-Measure K/B signals Use multi-meter to measure K/B connector Pin signal is normal of Diode value. . 测量点 接地 4 If the problem is still existing please change S.I.

Repair Technique-Diode Value of K/B Pin 25 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~24 W6A K/B 26 .

Repair Technique-Diode Value of K/B Pin 30 A3N K/B 29 28~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 .

3V KSO design is Open Drain need pull High by outside Key Board Keyboard function ERROR Keyboard button no clicked feeling .KSI is nature Pull high 3.

Chapter 8 AUDIO Repair Guide .

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

ALC861 .Diagram(1) AC97 Pin1. AD1986 . AD1885 Azalia:ALC660 .Pin38.576MHz 内部 Speaker SB AD1885 外部 Speaker 5-pin serial data transaction : (1) BIT_CLK (2) SYNC (3) RESET (4) SDATA_IN (5) SDATA_OUT Pin25.Pin3 : +3VS_Code 24. ALC880 .Pin9 : Pin2.Pin43 : +5VS_AUDIO AC97:ALC650 .

ALC861 .Pin38 : +5VS_AUDIO AC97:ALC650 . ALC880 . AD1986 .Pin9 : +3VS_Code Internal Speaker SB ALC880 External Speaker (1) BIT_CLK (2) SYNC (3) RESET (4) SDATA_IN (5) SDATA_OUT Pin25.Diagram(2) Azalia Pin1. AD1885 Azalia:ALC660 .

HD Audio Code Circuit-1 sample F50N .

HD Audio Code Circuit-1 sample F50N .

HD Audio Code Circuit-1 sample F50N .

HD Audio Code Circuit-2 sample M51A ALC663 .

HD Audio AMP Circuit-2 sample M51A .

Pin Assignment-(HD-ALC269) .

Signal Description-1(HD-ALC269) .

Signal Description-2(HD-ALC269) .

Signal Description-3(HD-ALC269) .

Pin Assignment-(HD-ALC663) .

Signal Description-1(HD-ALC663) .

Signal Description-2(HD-ALC663) .

Signal Description-3(HD-ALC663) .

Theorem  HD link (Azalia link) .

H/W Architecture AC-Link bus is the pathway that codec communicate with controller .

HD link (Azalia link)  Azalia is an enhanced replacement for AC’97  Designed for a range of audio. and communications functionalities  Targeted for PC’s and other devices like consumer electronics (CE)  Improves on AC’97 design limitations  Provides bandwidth for future audio and communication needs  First Intel product intercept: ICH6 Link Filters Filters Audio Modem Azalia Bus Driver PCI Express Codecs Controller Software Azalia Enables High Quality Integrated Audio . modem.

4 output streams 24 MHz BITCLK is driven by the Intel® ICH6 Dock Dock Codec .Intel® ICH6 Azalia and Legacy AC ’97 Codecs must ALL be either AC ’97 or Azalia ICH6 AC ’97 Legacy AC Link Modem Codec PHY Audio Codec Azalia 控制ler or Azalia Link • AC ’97 & Azalia • 1 Serial Data Out (SDO). 3 Serial Data In (SDI) • • • pins: support up to 3 codecs 8 Independent DMA operations 4 Input.

9Mb  Modem Out: 1 channel.54Mb  Total In: ~14Mb (of about 23Mb available)    Lots of Bandwidth to Support Current and Future Audio . 24bit.5Mb (of about 11. 48kHz = 0.5Mb  Total Out: ~11. 96kHz = 12. 20bit.5Mb available) Azalia designed to support multiple streams With Azalia: Consumer with analog output  High Quality Audio Out: 8 channel.2Mb  Independent Telephony Input: 2 channel. 48kHz = 1.54Mb  Total Out: ~39Mb (of about 46Mb available) With Azalia: Laptop with integrated array microphone  Array Mic Input: 8 channel. 96kHz = 11. 16b. 192kHz stream = 36. 16bit. 16bit. 16b. 48kHz = 1.Audio Band width with Azalia  With AC’97: Consumer with analog output  Multi-channel Out: 6 channel.77Mb  Telephony Out: 2 channel.

stable clock source for synchronization  Single bus driver for more OS stability & base functionality  Support for full audio PnP  Single stream support (in & out)  Clock provided by primary codec  Stability depending on SW provider (IHV’s drivers)  Limited device sensing / jack retasking  2-element (stereo) array mic support  Support for multiple streams (in & out)  Clock provided by the Intel® ICH  Unique Microsoft bus driver  Full device sensing / jack retasking  16-element array mic support  More accurate.5 Mb/s max bandwidth  48 Mb/s per SDO.Azalia improvement Over AC’97 AC’97 Azalia Benefit  More accurate. high-quality. better quality voice input & recognition Azalia Improves on Current AC’97 Spec . 24 Mb/s per SDI  Dynamic bandwidth assignment  Fix bandwidth assignment. better quality sound  Bandwidth for more channels and mic array inputs at higher sample rates  B和width delivered where it’s needed  20-bit. 192 kHz multi-channel  11. fix slot base protocol  Pre-defined DMA use age  General purpose DMA’s  Support for multi-streaming / multiple similar device types can be supported  Support for new Digital Home / Digital Office useage models  Single. 96 kHz multi-channel  32-bit.

The Audio Function must be is UNLOCK NG Measure Audio Code Voltage: +3VS_Code and +5VS_Audio Measure Audio AMP. SPK Con. SPK OK Check Audio Voltage Fix or change any R.B Finished .Repair Flow Chart Start Visual Inspection check Int.Q component related to Voltage NG Change any NG component related to X‟tal.L. SPK .C. component Change damaged component / fix any trace open NG OK Check BIOS setting Check Setting in the BIOS. L: for Ext.&Ext.576MHz (only AC‟97 model) Measure Audio AMP. and damage RLC & AMP. NG OK OK Check Audio Clock Check Audio Control signal Change any NG component related to NG signals NG OK Measure other Audio signals NG Use multi-meter to compare other Audio signal with Good M/B Change any NG component related to NG signals NG OK Change Audio Code chip OK Change S. Voltage: +5VAMP Measure Audio Code CLK: 24. SE/BTL# : H: for Int.

Related R..L.AC‟97/Azalia Code & nearby component is no damage or burn NG CID Case OK 1-1 External Speaker Connector CID Case 接口 Broken 1-2 Internal Speaker Connector .C/AMP .check External/Internal audio connector is OK 2.etc components is not miss or damage 3.Repair Technique-Visual Inspection Visual Inspection 1.

Please check Audio/Modem Interface function is not Locked status.Repair Technique-Check BIOS Setting Check Setting in BIOS 1. 2 .load BIOS default setting 2.Firstly .

Repair Technique-Measure Audio Voltage(1) +3VS_Code +5VS_Audio Measure AC‟97 Code Voltage : Pin 1/9: +3VS_Code Pin 25/38/43: +5VS_Audio Pin 4/7:GND ( Digital ) Pin 26/40/44:GND ( Analog ) 3 .

Repair Technique-Measure Audio Voltage(2) +3VS_Code +5VS_Audio Measure Azalia Code Voltage : Pin 1/9 : +3VS_Code Pin 25/38 : +5VS_Audio Pin 4/7 : GND ( Digital ) Pin 26/42 : GND ( Analog ) 4 .

Repair Technique-Measure AMP Voltage Measure Audio AMP Voltage : Pin 7/18 : +5VAMP 5 .

Repair Technique-Measure Audio CLK Only for AC‟97: Measure AC‟97 Code CLK : Pin 2/3 : 24.576MHz 24.576MHZ 6 .

Repair Technique-Measure Audio Signal Use Multi-Meter to measure other Audio signals‟ bias voltage value. (This method should be compared with good MB) If the symptom is still existing please try to change Audio chip. AC97 Audio chip through link connect to SB. 7 After change Audio chip the problem is still constant please try to change SB at last.S. . AC97 HA Audio chip through Azalia link connect to SB. P.

Audio .

ALC269 To S/PDIF Head Phone From PCH From MIC To Amplifier .

or if there is sound or voice pulled minimal Bar Have the right to set the output of the device . 2.. Include Speaker or Microphone=> Connector=>Cable=>Codec IC .. Check Software environment seting:BIOS Driver version Make sure is the latest version and Device is lock. mute. – Volume settings.Repair skill • General repair rule: – 1. 3. etc.

HP Jack &S/PDIF .

Amplifier • TI----TPA3110 Class D Amplifier INT Left Speaker Close AMP output (Mute) AMP Power INT Right Speaker .

MIC • INT or EXT MIC Schematic: To ALC269 Codec .

Repair skill • EXT MIC & Head Phone detect the way of examining .

Chapter 9 MODEM Repair Guide .

Overview  Diagram  Circuit  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram RJ-11 Azalia BUS RESET# & SYNC TIP & RING BIT_CLK Modem Board CON. Modem SB .

Circuit .

Signal is OK ? 1.Connection RLC component Change Defect Component & Re-solder OK OK Verify Software and Ass‟y problem NG Check Modem Type (by model) OK /Change New one Modem Board NG Check Modem Board is OK ? Check Modem CON.Modem CON.RJ-11 CON.Repair Flow Chart Start Check Driver and Re-Ass‟y and MDM cable NG Visual Inspection Check1. 2.BIT_CLK & SYNC 2. VCC(+3V) And RJ-11 CON. (on the M/B) 3. Resistor and Trace 2.RESET# Change audio Codec or audio controller (S.B) NG OK Finish .Check Power source to Modem CON.Check RJ-11 TIP / RING signal Change Defect Component /Repair open trace NG OK Check AUDIO Link BUS Signal is OK ? (AC97/Azalia) Use multi meter to measure1.SDATA_IN/OUT 3.

2.C.Repair Technique-Visual Inspection RJ-11 1-1 CID Visual Inspection 1. Modem Connector (M/B) 1-2 3.L.Check PCB trace is no open or scratch CID .R. components is not miss or damage 4.check RJ-11 connector is no Damage or Pin bend or Pin bad solder.check Modem connector is no Damage or Pin bend or Pin bad solder.

Check Device is working and software driver is correct.Check Device Setting up is correct 2-2 .check Hardware Device is OK or not. 3. 2.Repair Technique-Software Skill 2-1 Software Skill 1.

Please Check Modem Board is correct for testing model. 3-2 .and Cable is no scratch or damage If problem still exist. 1.change new one to test.Repair Technique-Assemble Problem 3-1 Assemble Problem Check Assemble MDM Board connector to M/B connector is close . 2.

Repair Technique-Measure Modem Signals 4 Use multi-meter to measure Modem signal is normal of Diode value. Please check Audio codec and Audio Controller release circuit. If the value is NG. .

Repair Technique-Diode Value Modem Board CON. Signal Name BIT_CLK SYNC RESET# SDATA_IN SDATA_OUT Diode Value 391 Signal Name 426 391 391 391 RING OL TIP OL Diode Value RJ-11 .

Chapter 10 USB Repair Guide .

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram .

Signal Description Pin Define 1 2 3 4 Signal VSUS DD+ GND Description Power signal Data signal Data signal Ground signal .

B OK Change Defect Component NG Use multi-meter to measure Check USB.& USB+ Signal is OK ? Check USB 48MHz is OK ? Check Resistor and CLK Gen. and Trace OK Change Defect Component NG Change S.Repair Flow Chart Start 1.Visual Inspection 2.Check Connector & Pins is OK ? Change Defect Component & Re-solder NG OK Check USB Vcc(5V) is OK ? OK Check Fuse or Inductor and Trace Change Defect Component NG Check Resistor or Inductor and Capacitor and Trace and S.B Finish .

Repair Technique-Visual Inspection USB Connector Broken •Check USB connector is ok or not 1-1 •Check FERRITE BEAD is open or broken 1-2 .

Repair Technique-Measure Voltage & GND •Check +5V_USB 2-1 Check GND 2-2 .

Repair Technique-Measure USB Signals •Check USBP+ 3-1 •Check USBP- 3-2 .

5 .5 +/.Repair Technique-Diode Value of USB Pin 4 Signal Name 1 +5V_USB USBPUSBP+ GND Diode Value 701 604 605 0 Between +/.3.4 2 3 4 +/.2.5 Pin 1.

Internal USB device Schematic .

0 port .USB port • HM65 has 12 USB2.

USB2.0 Schematic USB Power USB Power To PCH DataData+ GND .

0 Schematic Pin Define 1 2 3 4 VSUS DD+ GND +5V Power Data Data Ground .USB 2.

Check H/W have bad or ok。 – 3.Repair skill • General repair rule: – 1. Check Software first: BIOS Update USB device Lock。 2.H/W include USB Connector=>IO Board Cable=> PCH last .

0 .USB3.

Schematic介紹 CLK & PCIE POWER .

whether caused by power lost . further confirmation. and we have the power part of the measurement. there is another external device provided to the power (+5 V_USB30 also need to confirm. If the device can not see to open the machine to be recognized as a measurement signal can be sure the system clock is normal to provide? If the clock normal. the driver. may be used for confirmation : *External device and cable is the normal state? *Device Manager the device is abnormal? If there is an exclamation point. and use the oscilloscope to confirm that the external device is plugged in. the general line on the road there will be short pad to enable us to confirm that the power system or the device. to re-install the device in the OS.0 DEVICE can not recognize the external. There are problems. including the device itself its own power (+3 V_USB3 / + VCC_12A).If it is found external USB3.

Chapter 11 PCMCIA Repair Guide .

Overview  Diagram  Theorem .

576MHZ .Diagram +3V +5V VCC3_EN VCC5_EN Power 控制芯片 (R5531V002) VCC VPP +3V CCLK# CRESET# SB PCI BUS CAD[0:31] C架构# CLK_CBPCI (33MHZ) X‟TAL 24.

Slot Pinout (F3H) .

CardBus Power Circuit(F3H) .

Chapter 12 IEEE 1394 Repair Guide .

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

576Mhz SB R5C841 SMBus +3V EEPROM 1394 接口 .Diagram +3V PCI Clock:33MHz X‟tal : 24.

Circuit R5C841 .

Pin Define R5C841 .

1394a Connector 6 Pin 4 Pin .

1394b Connector 9 Pin .

EEPROM Pinout AT24C02N .

Repair Flow Chart-(1) Start Visual Inspection Check 1394 Connector/Related Component no damage Can Write 1394 ID ? Check 1394 ID is OK ? PASS NG Re-write 1394 ID Address Check BIOS setting Fail Next Page 1394 ID Error OK OK Change NG Component Check 1394 setting is unlock in the BIOS. Change NG Component /Fix any trace open NG OK Check 1394 +3V Voltage. Measure 1394 Voltage OK Change NG X‟tal /CLK Gen.. Component NG Check 1394 CLK 24.576/33MHz Measure 1394 Clock OK Change NG Component /Fix any trace open NG Finish Check 1394 Signals TPA0+/TPA0. TPB0+/TPB0- Use multi-meter to measure 1394 signals Change IEEE 1394 Controller Chip .

1394_SDA Change NG Component/ Fix any trace open NG OK Change EEPROM Chip Finished .Repair Flow Chart-(2) 1394 ID Address Error Re-write 1394 ID and check ID number is available ? Visual Inspection check EEPROM/Connector/connection components is no damage Change NG Component/ Fix any trace open NG Check EEPORM Voltage. 1394_SCL. +3V Change NG Component/ Fix any trace open NG OK OK Check EEPROM Voltage Use multi-meter to measure EEPROM signal Check EEPORM Signals.

Repair Technique-Visual Inspection CID Visual Inspection to check 1394 connector. 1-1 CID 1-2 . controller & related component is not damaged.

2 .Repair Technique-Check Bios setting Check 1394 setting is Unlock in the Bios.

Repair Technique-Measure Voltage 3 Measure IEEE 1394 controller voltages: (RICOH R5C841) Pin : +3V .

576Mhz 2:33.Repair Technique-Measure 1394 Clock Use Oscilloscope to check 1:1394 X‟TAL 24. 4 .3Mhz (PCI_CLK) are ok.

(Fig.TPB0+/TPB0. 5-2). GND 5-1 If still cannot find any abnormal please try to change 1394 controller and check other device under PCI bus.Repair Technique-Measure 1394 Signals Use Multi-Meter to measure 1394 signals bias voltage value. If the problem is still existing after change 1394 controller. please change SB at last.. TPB0- TPA0- TPB0+ TPA0+ 5-2 . Test Pin TPA0+/TPA0.

Repair Technique-Diode Value 1394 Pin TPB0- TPA0- TPB0+ TPA0+ 6 .

Repair Technique-Diode Value EEPROM 1394_SCL 1394_SDA 7 .

Chapter 13 Card Reader Repair Guide .

Overview  Diagram  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram +3V CD CMD +VCC A SB PCI BUS CE# DA0~DA3 SDCLK/MSCLK CLK_CBPCI (33MHZ) X‟TAL 24.576MHZ CD  Card Detect CMD  Comm和 WE#  Write Enable CE#  Card Enable CLK  Clock PC  Power 控制 WP  Write Protect DA0~3  Data 0~3 .

Circuit-1 .

Circuit-2 .

Repair Flow Chart
Start 1.Visual Inspection 2.Check Connector & Pins is OK ?

Change Defect Component & Re-solder

Confirm the problem Is MMC/SD error or MS/MS-pro error Change Defect Component Measure Voltage, VCCA = +3V is OK (Control signal MCVCC3EN# is Low active) Measure clock, Check related Resister 0 ohm

Check Voltage is OK ?

Change Defect Component

Check MSCLK/SDCLK is OK ?

Change Defect Component

Check Resister and Capacitor and MOS-FET

Use multi-meter to measure Check DATA0~ DATA3(CD) & CMD signal is OK ?

Change Card reader Controller Chip Finish

Repair Technique-Visual Inspection
Pin bend 1 Visual Inspection:
1.check Card Reader connector is no damaged and bend.

2 Check MSCLK & SDCLK:
1.Use multi-meter to measure MSCLK & SDCLK Pin(24) is correct

GND

Repair Technique-Check VCC & CMD
3 Check VCC(3V)
1.Use multi-meter to measure VCCA Pin(14,19,26)is correct

GND

4 Check CMD
1.Use multi-meter to measure CMD Pin(23)is correct

GND

Repair Technique-DATA0~3
5 Check DATA 0~3
1.If memory type is disordered or data transfer fail please Use multi-meter to measure DATA0~ 3 Pin13 -> DATA0 Pin11 -> DATA1 Pin27 -> DATA2 Pin25 -> DATA3

GND

GND

Repair Technique-Diode Value of Card Reader Pin
PIN 6 3 4 1 2 3 4 5 5 6 7 8 8 7 9 10 Signal Name GND GND GND GND GND SD_WP NC NC FUNCSEL0 GND SDDATA1 SMCD3 Diode Value 0 0 0 0 0 OL OL OL 497 0 497 503 PIN 17 18 19 20 21 22 Signal Name SDCLK/MSCLK SMCD1 VCCA MSCD# GND SMCD0 Diode Value 492 503 596 598 0 503

23
24 25 26 27 28

SDCMD
SDCLK/MSCLK SDDATA3 VCCA SDDATA2 GND

496
492 498 596 498 0

2

1

11 12

13
9 28 14 15 16

SDDATA0
VCCA GND SMCD2

497
596 0 503

Card Reader
AU6433

USB Interface

To Connector

N53SV not support XD

CR Schematic
48Mhz Clock to PCH

POWER

Repair Skill
• Check BIOS is locked or not, driver is updated to the latest version. • 2.Check Connector have dirt or bad connection => AU6433 IC • How to check AU6433 IC is normally
– Each POWER’s voltage levels – CLOCK voltage levels and frquence
– Chip Reset pin pusj to HIGH to 3.3Volt

Chapter 14 SATA Repair Guide

Overview
 Diagram  Theorem  Q & A (Repair Experience)

Diagram
Clock GEN
CLK_SATA_ICH

SATA HDD

SATA BUS

SB

Circuit SATA HDD South Bridge .

ODD&HDD架構 • HM65 has total 6 SATA ports – 2 SATA 6 Gb/s (port 0、1) – 4 SATA 3 Gb/s (port 2、3、4、5) SATA Port0 SATA Port2 SATA HDD SATA ODD .

HDD Schematic To PCH +5V POWER .

Repair Flow Chart Start Visual Inspection/ Check Connector & Pins is OK ? Change Defect Component & Re-solder NG Load BIOS set up default/ update bios to latest version Check BIOS set up and Update latest BIOS version NG OK Check SATA VCC is OK ? Check Power+5VS & +3VScircuit Change Defect Component NG OK Check CLK_SATA_ICH is ok? Change Defect Component NG OK Check SATA pin Diode is OK ? Change Defect Component OK OK Finish .

Chapter 15 ODD Repair Guide .

Chapter 15  Diagram  Theorem  Repair Flow Chart  Q & A (Repair Experience) .

Diagram Clock GEN CLK_SATA_ICH S.B IDE BUS SATABUS ODD 接口 ODD M/B SB .

Circuit .

ODD Schematic +5V POWER POWER Enable Low Active To PCH For ZPODD use .

. it will power on the mechanism 。 – Required with BIOS. ODD.ZPODD Introduction • Zero Power ODD (ZPODD): When the ODD idle will automatically power off until the user to use the ODD. and MB H / W can be Support – Default idle 1min after the power was automatically cut – CD-ROM disc or a disc out within the ODD does not cut power.

Repair Skill • 1.Check Connector have dirt or bad connection => 5V Power • 3.Check BIOS have Lock ODD. • 2. BIOS is updated to the latest version.Check SATA signal . SATA Controller Driver for updates to the latest version.

Introduction • SATA Controller driver .

NG Measure ODD Voltage Check ODD Vcc Voltage : Vcc=+5V Confirm the circuit. Soldering is ok. Change NG component NG OK Check CLK_SATA_ICH is ok? Change Defect Component NG OK OK Visual Inspection to check Connector is no damaged. Change S. OK Use multi-meter to measure ODD signal‟s diode value. compare with good MB. re-solder NG soldering point.B Finished .Repair Flow Chart Start Change NG connector. Change new CD/DVD-ROM FPC NG Load set up default in the bios/ update bios to latest version Load setup default and update to latest bios.

Chapter 16 LAN Repair Guide .

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram +2.CLK_LANPCI PCI_BUS SB LAN 控制 IC Transformer 10/100MB RTL 8100CL SMBus +3V_LAN EEPROM .5V_LAN +3V_LAN PCI_Reset # Clock : 1.25MHz 2.

Diagram .

Theorem-EEPROM Pin Pinout 93C46 .

 Each NIC has its unique.What is MAC Address?  Each device connected to a st和ard LAN needs a Data Link Layer address (or called hardware address). hard-coded MAC (Media Access 控制) address. It is a 48 bits (6 bytes) address written in a hexadecimal format. The first 3 bytes represents for vendor ID 和 the remaining 3 bytes are serial number. MAC: 000C6E 7D3D0F Vender ID Serial Number . providing a means of unique identification.

5V_LAN… Confirm the circuit.B Finished . CLK_LanPCI 33MHz .Repair Flow Chart-(1) START Visual Inspection Check LAN Connector and Component is OK ? Check LAN MAC ID address/ BIOS setting up Next Page Change Defect Connector/Component Can Write LAN ID ? Fail LAN ID Error NG Check Lan Voltage.PCI_RST# Use multi-meter. to measure signal is 150 ohm ? LAN_RDP/RDN & LAN_TDP/TDN Use multi-meter to measure PCI_Bus AD signals AD0~AD31 Change NG X‟tal/Clock Gen. NG OK Re-write LAN ID Address /Load BIOS default OK OK OK Measure LAN Voltage Measure LAN Clock & RST# Check Lan X‟tal 25MHz. Change Defect connection R. NG OK Measure LAN Transformer Change NG Transformer /Related R.+2. +3V_LAN.L.C or Transistor Components.C Component Fix any trace open NG OK Measure LAN AD signals Fix any trace open/ Check NG device on PCI_Bus NG OK Change LAN Controller Chip OK NG Change S.

NG OK Use multi-meter to measure SEEDI/SEECLK/SEECS signal Check EEPROM to LAN Controller Trace is open? OK Repair Defect open Trace NG Change EEPROM Chip Finish .Repair Flow Chart-(2) LAN ID Error Re-write LAN ID and check ID number is available ? Visual Inspection the EEPROM and related components is OK ? Change NG Component/ Fix any trace open NG OK Check EEPROM VCC(+3V) is OK ? Check Power to EEPROM VCC pin Connection or Trace is OK .

2.Repair Technique-Visual Inspection CID Visual Inspection to check 1.LAN(RJ-45) Connector/Pin is OK.Related components is no miss and damage or burned 1-1 CID 1-2 .

2 .Repair Technique-Check Bios setting Check LAN port setting is UNLOCKED mode in the BIOS.

check Voltage is OK and then use multi-meter to measure diode value of EEPROM . Please Re-write LAN MAC address first. If the problem still exist.Repair Technique-LAN ID Check LAN MAC ID 3 Check LAN MAC ID address is correct/available (Not 000000 000000) If LAN MAC ID fail.

5V_LAN +3V_LAN PCI_Reset# 4-1 Measure LAN controller voltages & CLK: 1: +3V_LAN 2: +2.Repair Technique-Measure Voltage & CLK +2.5V_LAN LAN 控制 IC Clock : 25MHz & CLK_LANPCI 3: 25MHz 4: PCI_Reset# 5: CLK_LANPCI (33MHz) 4-2 Measure EEPROM voltages: +3V_LAN Pin 8: +3V_LAN Pin 5: GND 93C46 .

to measure Some signals should be connected together (Show as Fig.5-2.Repair Technique-Measure Transformer Signals(1) Use Multi-Meter Transformer signals. please change it . the signals marked Green color) If Transformer NG. 5-1 TDP TDN LAN_TX+ LAN_TX- RDP RDN LAN_RX+ LAN_RX- 5-2 .

TX‟ signals and RX‟ signals should be 150 diode value (Show as Fig.Repair Technique-Measure Transformer Signals(2) Use Multi-Meter to measure Transformer signals. the signals marked black color) 6-1 If NG . Please confirm related Resistor (75 ohm) component.6-2. TDP TDN LAN_TX+ LAN_TX- RDP RDN LAN_RX+ LAN_RX- 6-2 .

Repair Technique-Diode Value EEPROM 93C46 .

Chapter 17 VGA Repair Guide .

Overview  Diagram  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram +3VS RED PIN1 PIN2 NB GREEN PIN3 BLUE DDCDA HSYNC VSYNC DDCCL PIN12 PIN13 PIN14 PIN15 +12VS .

Signal Description 1 6 11 ~ 5 10 ~ 15 .

Repair Flow Chart-(1) Start 1.Visual Inspection 2.Check Connector & Pins is OK ? Change Defect Component & Re-solder NG CRT Color error Confirm the problem Is color error or No display OK Next Page OK Change Defect Component NG OK Change Defect Component NG Check Resister and Capacitor and MOS-FET Use multi-meter to measure Check HSYNC/VSYNC/DDCDA/DDCCL signal is OK ? Clear CMOS and Load Default or Update new Bios NG Check MOS +12VS is OK Check HSYNC/VSYNC(+3.3V)/DDCL(+5V) is OK (plug in CRT Connector) CRT No display/Other problem OK Clear CMOS/ Bios check Check Voltage is OK ? Change North Bridge or Graphics Chip Finish .3V) is OK Check DDCDA(+3.

Visual Inspection 2.Check Connector & Pins is OK ? CRT Color error Confirm the problem Is color error or No display Check diode Voltage is OK ? Check Diode of +3VS is OK OK Change Defect Component NG Use multi-meter to measure Check R/G/B signal is OK ? Change Defect Diode and RLC Component NG OK Change North Bridge/VGA Finish .Repair Flow Chart-(2) Start 1.

2. 1-2 CID .Repair Technique-Visual Inspection CID接口 bend 1-1 Visual Inspection: 1.Be sure VGA connector Pin Solder no open or short.check VGA connector is no damaged and bend.

And then. . please clear CMOS and load Bios default at first.Repair Technique-Clear CMOS / Check Bios 2 If CRT is no display. If problem still exist. please try to change Bios or update Bios.

C.G.C.14.3. Trace the connection to confirm related R.9.B.L.12. is ok.1.Q.6 Pin 15. small components please change NB or Graphics Chip.) signal is error.Q.8.13.L.2. test point (i) RGB color error problem please use multi-meter to measure which color (R.7.4. Trace the connection to confirm related inductor or capacitor is ok.10. If it‟s not caused by R. If all check items are no problem please change NB or Graphics Chip .Repair Technique-Measure VGA signals GND 3-1 Check the problem belongs to (i) RGB color error problem (ii) No display or display error problem. Use the meter to measure Diode value on DDCCL &DDCDA. 3-2 Pin 5. VSYNC & HSYNC.11 (ii) No display or display error (not included color error).

10.3.11 4 .Repair Technique-Diode Value of VGA Pin Pin Name Diode Value Pin Name Diode Value Pin 5.2.1.13.6 Pin 15.4.8.7.9.12.14.

VSYNC .VGA basics (1) • RGB. HSYNC.

) Monitor PCH 150ohm 150ohm 75ohm .) (50ohm) (trace imp.5ohm) (trace imp.VGA basics (2) • CRT monitor detection – RGB R/G/B out (37.

Signal description (PCH) Analog RGB Sync DDC .

Block diagram MB RGB PCH DDC CLK/DAT PIN Description 1 RED GREEN BLUE NC GND GND-R GND-G GND-B NC VGA_HSYNC VGA_VSYNC 2 3 4 D-sub connector 5 6 7 8 9 10 11 12 13 14 15 GND NC DDC DATA H-Sync V-Sync DDC CLOCK .

Schematic DDC R/G/B with PI filter HSYNC/VSYNC with buffer IC D_SUB Conn. .

PCH) – Screen blinking Hsync/Vsync – Overall color abnormal RGB – Abnormal Resolution • Check DDC .Debug Tips • Common issues: – CRT can not be detected (Fn+F8 cannot find the monitor) • Exchange monitor to verify • Check resistance: – RGB connector side (with monitor): 37. beads.5ohm – RGB connector side (without monitor): 75ohm – Abnormal / No display • Check PCH DAC power VccADAC • Check RGB/Hsync/Vsync connection and related components (buffer IC.

Chapter 18 LCD Repair Guide .

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Diagram-1 System Board Side +3Vs Display panel GMCH LCD_ENVDD LCD Module Side LVDS FFC LVDS Bus LCD_ENBACK LCD_BACK_ADJ ADJ_BL LVDS 接口 BACK_OFF# LID_RSM# Cable Inverter Board Inverter board 接口 SB KBC LID Switch AC_BAT_SYS .

Diagram-2 System Board Side +3Vs ATI VGA AGP Bus/ PCI-Express LCD_ENVDD LCD Module Side Display panel LVDS LVDS Bus LVDS 接口 FFC MCH ADJ_BL BACK_OFF# LCD_ENBACK Cable LID_RSM# Inverter Board Inverter board 接口 SB KBC LID Switch AC_BAT_SYS .

Circuit-1 GMCH .

Circuit-2 LVDS 接口 .

Circuit-3 Inverter board 接口 .

Signal Define-1 .

Signal Define-2 .

Signal Define-3 .

G RLC components NG OK Check / Clear CMOS BIOS setting &Fn key problem 1.Check Fn + F5 or F6….etc.Repair Flow Chart(1) Start Visual Inspection Check connector and related component are no damage Change damaged Connector & any N. (depend on model request) NG OK Separate the symptom problem LCD display too Dark LCD No display/turn to white LCD display abnormal 1 2 Finish 3 .Clear CMOS and Load Default 2.

Check “BACK_OFF#” . Change any NG related RLC Component and control IC NG OK Change North Bridge or Graphics Chip Finish . Voltage = 3V 4. Change any NG related L&C Component NG Measure Inverter Connector Control signal 1. Voltage = between 0~3V (from KBC) (depend on model different) Trace the related circuit.Check “LID_RSM#” . Voltage = 3V (from S. Voltage OK Check AC_BAT_SYS signal= is 19V. Voltage = 3V (from N.Check KBC “ADJ_BL” .B) 2.Check “LCD_ENBACK” .Repair Flow Chart(2) Start1 LCD display too Dark Measure Inverter Con.B or Graphic) 3.

+3Vs Change any NG related R&C Component NG Measure LVDS Voltage LCD_VCC Check LVDS Voltage LCD_VCC. LCD_ENVDD = +3V (signal from NB or Graphic IC) Trace LCD_VCC signal‟s related circuit. Voltage OK Check LVDS connector Voltage. Change NG RLC and MOSIC Component NG OK Change North Bridge or Graphics Chip Finish .Repair Flow Chart(3) Start2 LCD No display/turn to white Measure LVDS Con. LCD_VCC =+3V And check control signal voltage.

/ Fix any trace open NG OK Use multi-meter to measure LVDS signal is OK ? Change NG GMCH or Gfx IC/ Fix any trace open NG OK Change North Bridge or Graphics Chip Finish .DREFCLK(#) 96MHz Check LVDS Clock for Gfx. +2.0~1.5V or +1. LACLKP & LACLKN Change any NG related R&C Component NG OK Measure Clock Change any NG RLC Component or CLK Gen.05V / ATi_Vcore 1. 1.CLK_PCIE_PEG(#) 100MHz Check LVDS Data. LADATAP[0:2] & LADATAN[0:2] Check LVDS Clock.2V (depend on RD design request) AGP / PCI-E: Check LVDS Clock for GMCH. +1.CLK_MCH66/AGP66 66MHz 2. 1.DREFCLK(#) 48MHz 2.Repair Flow Chart(4) Start3 LCD display abnormal Measure Voltage Check LVDS Voltage ( GMCH / Gfx ).5V Check VGA Core Voltage ( GMCH / Gfx ).

L.check Inverter/LVDS connector is no NG or BAD solder 2.R. components & Trace is no damage or miss or open LVDS 接口 Inverter 接口 1-1 CID 1-2 .Repair Technique-Visual Inspection Visual Inspection 1.C.

not only CRT mode 2.Repair Technique-Check Bios setting Check BIOS Setting: 1.Check display mode is OK.Load BIOS default setting and test again 2-1 2-2 .

Fn + F7 is LCD Back Light On/Off 4.Fn + F8 is LCD/CRT/TV Mode switching (all function key is depend on designer) + 3-1 + 3-2 .Fn + F6 is brightness Up 3.Fn + F5 is brightness Down 2.Repair Technique-Check Fn Key Check Fn Key Setting: 1.

Repair Technique-Measure Voltage(1) Use Multi-Meter or Oscilloscope to measure Voltage: 1.) signal = 3.) signal = 19V 4-1 2.If problem is LCD too Dark.If problem is LCD No display or turn white Check LCD_VCC (LVDS Con. Check AC_BAT_SYS (on Inverter Con.3V 4-2 .

05V Gfx: ATi_Vcore 1.If problem is LCD display abnormal. .Repair Technique-Measure Voltage(2) Use Multi-Meter or Oscilloscope to measure Voltage: 3.2V 一 5 .Check VGA Core voltage = GMCH: 1.5V 二.5V or 1.Check LVDS voltage = 2.0 ~ 1.

If problem is LCD too Dark Check BACK_OFF# = 3.3V 6 .3V Check ADJ_BL =0~3V 2.Repair Technique-Measure Control Signal Use Multi-Meter or Oscilloscope to measure Control Signal voltage: 1.If problem is LCD No display or turn white Check LCD_ENVDD =3.3V Check LID_RSM# =3.3V Check LCD_ENBACK =3.

Repair Technique-Measure CLK Use Oscilloscope to measure Clock: GMCH platform: DREFCLK(#) = 48MHz (AGP Bus) DREFCLK(#) = 96MHz (PCI-E Bus) Gfx platform: 7-1 CLK_MCH66/AGP66 = 66MHz (AGP Bus) CLK_PCIE_PEG(#) = 100 MHz (PCI-E Bus) 7-2 96MHz .

Check LCDS Data signals. LADATAP[0:2] 8 LADATAN[0:2] Check LCDS Clock signals. Pin signal is correct of Diode value and compare with GOOD M/B. LACLKP / LACLKN .Repair Technique-Measure LCDS signals Use multi-meter to measure LVDS Con.

Repair Technique-Diode of LVDS Signal LVDS Connector Signal Signal Name L1_TX0+ LADATAP[0:2] L1_TX1+ L1_TX2+ L1_TX0LADATAN[0:2] L1_TX1L1_TX2LACLKP LACLKN Ps (short for) : LADATAP[0:2] / LADATAN[0:2] L: LVDS A: LVDS channel A Data output P: positive N: negative L1_TXC+ L1_TXCDiode Value 443 442 443 443 442 443 441 441 .

LVDS basics • LVDS (Low-voltage differential signaling ) – Small current (3.5mA) through 100ohm +/-350mV .

Signal description (PCH) LVDS EDID: read panel information Panel power and backlight control .

Block diagram MB +3Vs LCD panel LVDS PCH EDID CLK/DAT L_BKLTCTL L_VDD_EN L_BKLTEN Cable LCD connector LID_SW# EC LID Switch AC_BAT_SYS .

3V power .Schematic (1) • +LED_VCC: – LED power supply (7~20V) • +3VS_LCD: – LVDS 3.

3V power enable .Schematic (2) • BUF_PLT_RST#: – Platform reset signal from PCH • LCD_BACKEN_PCH: – BL enable from PCH • LCD_BACKOFF#: – BL enable from EC • LID_SW#: – LID switch from HALL sensor IC • L_BKLTCTL_PCH: – BL PWM control signal from PCH • L_VDDEN_PCH: – LVDS 3.

Debug Tips (1) • Keyboard Function key: – – – – Fn + F5: back light ↓ Fn + F6: back light ↑ Fn + F7: back light ON/OFF Fn + F8: LCD/CRT/HDMI mode + + .

no LVDS signal check LVDS » Check PCH VccALVDS and VccTXLVDS » Check +3VS_LCD (power enable circuit) • Black screen: – Check power – No backlight. LID switch) check “backlight enable” circuits – Abnormal Resolution • Check EDID connection . but display is OK (EC.Debug Tips (2) • Common issues: – Check cable and Panel first – Abnormal display • Check LVDS connection and PCH – No display • White screen – Only backlight. PCH.

Chapter 19 BIOS Repair Guide .

Overview  Diagram  Signal Description  Introduction  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

Cloc k BIOS LPC Bus LAD[0~3] SIO PCIRST# INIT# L架构# DIS_SYSBIOS# SB .Diagram +3VS Clock Gen.

Circuit .

Signal Description-(1) .

Signal Description-(2) .

Signal Description-(3) .

Signal Description-(4) .

Introduction  Memory Map  SST 49XXX series Block Diagram  Theorem .

Block Diagram .49xxx .

49xxx – Pin/Signal Names-1 .

49xxx – Pin/Signal Names-2 .

49xxx – Reset-1 FWH Mode .

49xxx – Reset-2 PP Mode .

49xxx – Chip Read .

49xxx – Chip Write .

49xxx – Block Erase .

49xxx – Chip Erase .

Product Ordering Information .

2XX 4MByte 4M BIOS can be burnt Inside the SPIROM of 8m All right! !! But can't start the machine Because can not recognize ME FW .SPI ROM W25Q32BV:32Mbit/4MByte You can use SPIROM BIOS’s MFGID to determine XXXNAS.2XX 2MByte BIOS XXXNF1.

The signal amount is examined for SPI SI/SO at start the boot in the instant SPI_SO SPI_SI Often meet the question . CPU_RST#??? .user update bios to fail and not boot.

Check Resister and Capacitor and MOS-FET Change Defect Component Measure LPC LAD[0~3] signal diode value is OK 1.Confirm PCB Trace Fix any trace open Change BIOS Chip / South Bridge Finish .Check Reset signal RST# 2. Change Defect Component Change Defect Component 1.Use external Bios Boot up 1.Change Defect Component &Re-solder 2. Check Power signal VDD(+3VS) Check connection RLC/diode Components Check CLK signal CLK(33MHZ) 1.Update Bios image file Confirm circuit of Power IC.Repair Flow Chart Start 1.Visual Inspection 2.Check Control signal LFRAME#/INIT# DIS_SYSBIOS# Confirm related circuit.Confirm circuit of CLK Gen.

Update M/B Bios From Debug Card . 2.If External BIOS can Boot up computer . 4. 3.Repair Technique-Visual Inspection 1-1 Visual Inspection 1.we can try to update BIOS image file first Jump Setting : 1. on off on off --.check BIOS pins is open or short 外部 BIOS 1-2 Use External BIOS Boot up 1.Boot from M/B on off off off --.Boot from debug card off off on off --.

Repair Technique-Measure Voltage VDD 1 32 2 27 VDD 25 VDD Check VDD Voltage: Check BIOS VDD(+3VS) Voltage : Pin 1 : +3V Pin 25: +3V Pin 27: +3V Pin 32: +3V CLK 3 Check CLK Frequency Check BIOS CLK Frequency: Pin 31: 33MHZ 31 .

Repair Technique-Measure BIOS Signal RST# Measure BIOS Controller Signal: 4 Pin 2 : RST# Pin 11: DIS_SYSBIOS# 2 DIS_SYSBIOS# 11 24 23 INIT# L架构# Pin 23: LFRAME# Pin 24: INIT# 5 Measure BIOS Pin signal of Diode value is normal or not? Pin 13: LAD[0] Pin 14: LAD[1] LAD[1] LAD[2] 14 15 LAD[3] 17 LAD[0] 13 Pin 15: LAD[2] Pin 17: LAD[3] .

Repair Technique-Diode Value of BIOS Pin PIN 4 3 2 1 32 31 30 1 2 5 6 7 8 9 29 28 27 26 25 24 23 22 21 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 14 15 16 VPP RST# FPG13 FPG12 FPG11 FPG10 WP# TBL# NC NC DIS_SYSBIOS# NC LAD0 LAD1 LAD2 GND Signal Name Diode Value 431 778 OL OL OL OL 807 807 OL OL OL OL 690 690 690 0 PIN 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Signal Name LAD3 NC NC NC NC NC LFRAME# INIT# VCC GND VCC GND IC FPG14 CLK VCC Diode Value 690 OL OL OL OL OL 683 607 431 0 431 0 OL OL 758 431 10 11 12 13 .

Chapter 20 MEMORY Repair Guide .

DDRII 3.Overview  Diagram  Introduction 1.DDR 2.DDR3  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience) .

. DDR Clock Gen.5V ( for DDR ) +1. Main Clock Gen.25Vs (for DDR ) CLK Gen. CLK Gen.Diagram(1) NB Memory Module (DDR) GMCH /MCH Memory Bus MA0~13 MD0~63 +2.

Main Clock Gen.9Vs ( for DDR2 ) +2. . DDR2) GMCH /MCH Memory Bus MA0~13 MD0~63 +1.25Vs (for DDR ) CLK Gen.Diagram(2) N.5V ( for DDR ) +1.B Memory Module (DDR.8V ( for DDR2 ) +0.

DDR Clock Gen. Main Clock Gen.5Vs ( for DDR3 ) CLK Gen. .Diagram(3) N. CLK Gen.B Memory Module (SDR) GMCH /MCH Memory Bus MA0~13 MD0~63 +1.

DDR I vs DDR II .

DDR3 .

Memory Type  200 pins DDR SO-DIMM 200 pins  200 pins DDR2 SO-DIMM 200 pins 204Pin DDR3 1333 SO-DIMM 204Pin  Micro-DIMM  172 pin 214 pin Micro DDR-DIMM 172 pins Micro DDR2-DIMM 214 pins  .

5 1T 400/533/(667) Mbps* 200/266/(333) MHz 100/133/(166) MHz 4 bit 4/8** Differential Strobe: DQS. /DQS*** 3+. DDR II DDR Frequency Specs Data Rate Bus Frequency DRAM Core Frequency Prefetch Size Burst Length Data Strobe CAS Latency Write Latency 200/266/333/400 Mbps* 100/133/166/200 MHz 100/133/166/200 MHz 2 bit 2/4/8 Single DQS 1. 2. 2.DDR vs. 5 Read Latency-1 DDR II .5. 4.

DDR vs.8V) New fearture .8V SSTL_1.5V++ I/O Voltage (VDDQ) SSTL_2 (2. Power Specs Core Voltage (VDD) 2. TBGA FBGA Same as DDR I Same as DDR I Bus Utilization and signal Integrity ODT OCD-calibration Posted CAS Additive Latency+++ Compatibility With DDR I 1.8 (1. DDR II count.5V) Format Packaging Command Set Basic Timing Parameters TSOP (II).

256MB. 256Mb.Dual Channel  The two channels handle memory-processing more efficiently by utilizing the theoretical bandwidth of the two modules. 512MB. Rules to Enable Dual Channel Mode      Matched DIMM configuration in each channel Same Density (128MB. the timing delays that inherently occur with one memory module. or 512Mb) Same DRAM bus width (x8 or x16) All either single-sided or dual-sided . thus reducing system latencies.) Same DRAM technology (128Mb. etc.

8v [JESD 8-15A].DDR2 Electrical Interface  Double Data Rate II IC's use 1.2mA . Higher drive and a maximum current of 15. SSTL-18: Stub Series Terminated Logic for 1. how ever the supply voltage may be higher.8 volt SSTL_18 compatible I/O [class II]. Class II provides for higher power dissipation.

and 150 ohms [ also 50 ohms]. The newest revision adds 50 ohm termination values. Three combinations are allowed. Using ODT. When two modules are loaded into the system the ODT value is exchanged to 75 ohms [150W pull-up and 150W pull-down] for the DIMM not being written to while the DIMM being accessed has its ODT turned off. While DDR1 modules have the necessary resistive termination located on the motherboard. DDR2 are able to reduce the parts count required for mother board while at the same time locate the terminations closer the the signal destination. With one DIMM module the ODT value is set at 150 ohms [300W pull-up and 300W pull-down]. termination disabled. The ODT termination can be turned on or off by the DRAM controller. Writing to the Extended Mode Register [EMR] controls the ODT presence and value. ODT improves the eye-structure over SSTL for either Single-Rank or Dual-Rank modules. The value of the ODT termination is selectable based on the number of modules in the system.DDR2 Termination  DDR2 modules contain the require resistor termination located on the memory chips using a technique called On-Die Termination [ODT]. . 75 ohms. Normally the terminations are turned on for Writes and disable for Reads.

DDR 3 .

The voltage of DDR3 SDRAM DIMM's was lowered from 1. .8V to 1.Higher bandwidth due to increased clock rate 2. as well as enabling more dense memory configurations for higher capacities.5V.Pre-fetch buffer is doubled to 8 bits to further increase performance 4. This reduces power consumption and heat generation.Reduced power consumption due to 90nm fabrication technology 3.DDR 3  DDR3 SDRAM(Double Data Rate Three Synchronous Dynamic Random Access Memory)  DDR3 SDRAM improves on DDR2 SDRAM in several significant ways: 1.

Standard DDR3 SDRAM DIMM's .

DDR 3 Top .

DDR 3 Bottom .

Memory • I7 CPU(2820QM、2720QM) can support 2 pcs 1600Mhz DIMM. • 4 pcs DIMM only support 1333Mhz DIMM. • Qual Core CPU need use A1、B1 ,Dual Core CPU need use A0、B0。 .

Memory POWER +3V Introduction +1.75 Volt .5 Volt +0.75 Volt +0.

Introduction Memory Clock 667Mhz .

Check POWER and CLOCK level and frequency – If it’s Memory issue,use MT420 memory test program to test。 . – Check some slot have problems or not. – Check Connector have dirt or bad soldering (using the macro mode)。 – .Repair skill • General repair rule: – Check the specific DIMM have problem or not.

RAS#.9Vs or 1.5V (depend on Memory type) Check Memory Vtt Voltage.CAS#. 100 / 133 / 166 …MHz Confirm the circuit.5V or 1.B Finish .8V or 2.WE# Use Multi-Meter to measure. Trace NG signals and compare with good MB Fix any trace open or resistor damaged NG OK Change N.Repair Flow Chart Start OK Visual Inspection check memory slot is no bent pin or damaged. 0. Fix any trace open NG OK Measure memory Clock Check Memory Clock.25Vs (depend on Memory type) Fix any voltage regulator IC or related RLC component. Fix any trace or RLC damaged/ change NG CLK Generator NG OK Measure memory Data /Address signals and control signals . Change any damaged memory slot or component/ Fix any bad solder or trace open NG Measure memory Voltage Check Memory Voltage. 1.

CID 2.Check related resistor . capacitor component no damage. 3.Check memory slot / Pin is not damaged or bent pin inside.Repair Technique-Visual Inspection Visual Inspection 1.Fix any trace open or BAD solder 1-1 CID 1-2 .

5V Use Multi-Meter or Oscilloscope to measure Memory Voltage & Vtt Voltage .Repair Technique-Measure Memory Voltage DDR Vtt Voltage =2. Memory Voltage: SDRAM: 3Vs DDR :2.25Vs DDR2: 0.5V DDR2: 1.9Vs 2-1 DDR Vtt Voltage =1.25V 2-2 .8V Memory Vtt Voltage: DDR :1.

133.166Mhz…depends on different chipset & memory) 3-1 Memory CLK= 100.Repair Technique-Measure Memory Clock Use Oscilloscope to measure Memory Clock (100Mhz.133Mhz.166…MHz 3-2 .

Use Multi-Meter to measure memory signals‟ bias voltage value. Diode Mode 4 . Compare with good MB if you find any unusual.Repair Technique-Measure Memory Signals Plug Memory measure card into slot.

Chapter 21 POST CODE Repair Guide .

Overview  What is POST CODE  Using POST Code to Debug  Appendix: (1)BIOS CODE Definition (2)BIOS Beep Code  Q & A (Repair Experience) .

BIOS would output some number through 80ports. and AMI are different. Using I/O access card (debug card). – The POST codes used by Award.What is POST Code  POST : Power On Self Test  The tag thrown out by BIOS – Usually. . – These numbers mean something was executing in the system. user could read those number. Phoenix.

. BIOS Debug Code – These numbers depend on various project.What is POST Code  POST Code as BIOS executing process   Standard POST Code – These numbers were used as standard process.

5v.if no CPU CLK check from CLK gen. if all no CLK.) Vcore .if no 2.) CPU CLK.318MHz. circuit diagram e.S/B voltage is ok or not (2)Check CLK: a. Before must check any open or short .) CLK generator.) 1.change 14. “FF” POST Code “00”.5v.if no 3.POST “00”.) S/B CLK.3v.if no 1.) check for N/B.”FF” or Debug card shows all dots(……) / all 00 (1)Check Voltage: a.3v check from power block circuit diagram e. circuit diagram c.if no N/B CLK check from CLK gen.) 14. circuit diagram b. circuit diagram d.5v check from power block circuit diagram d.5v check from power block circuit diagram c.if no 14.) 2.318MHz.318MHz check from CLK gen.and then change CLK gen.) N/B CLK.if no Vcore check from power block circuit diagram b.) 3.if no S/B CLK check from CLK gen.

(3)Check Power ok & Reset a.BRDY#…) is ok or not b.and above signal d.if low voltage check circuit diagram.if low voltage. normal is capacitor bad b.IRDY#.) PCI reset.if low voltage check above signal and for S/B CLK.) H/W reset.) Check PCI control signal(FRAME#.TRDY#…) is ok or not c.) power supply power ok.) CPU reset.) Check CPU control signal(ADS#.normal is capacitor bad c. (4)Check control signal: a.) CPU power ok.voltage e.) Check others control signal is ok or not .voltage f.) Check boot up sequence.if low voltage check above signal and for N/B CLK.if low voltage check circuit diagram.

HA3~HA31.control signal open or short (2)N/BS/B:PCI BUS(AD0~AD31.CBE0~CBE3) or HUB Link(HL0~HL10) or V_link or LDT BUS open or short (3)S/BBIOS:ISA BIOS(SA0~SA19.00(no data) (1)Change BIOS (2)Check bios voltage (3)Check BIOS CLK (4)Check LAD0~3 (5)Check BIOS control signal (6)Check CPU control signal 00(Have address & data) (1)CPU N/B:HD0~63.SD0~SD7) or LPC BUS (LAD0~LAD3) open or short .

especially 2. “D0” C0 (Award) D0 (AMI) (1)Change BIOS (2)Check HD0~63 signal open or short (3)Check HA3~31 signal open or short (4)Check AD0~31 signal open or short (5)Check SM BUS is ok or not (6)Check all Voltage is ok or not .5V.3VS (7)Check all CLK is ok or not (9)Check SB. especially for Intel ICH4 .POST “C0”.

99.MD.5V.8V . E5. EE. 2. E1. 1. A4 (AMI) EF. Ad (Award) D3. E0. 0. C1.CKE… signal is Open or Short (6)DIMM socket not clean or bad (7)Check HA.AD. “EF”….RAS. “D3”.25Vtt . 28 (Phoenix) (1)Change BIOS (2)Check Memory voltage is ok or not.9Vtt (3)Check Memory CLK is ok or not (4)Check SM BUS is ok or not (5)Check MA.POST “C1”.CAS. D4.CPU control signal is open or Short . 9F. 1. “9F”. especially 3V.

“C5”.control signal is open or short (4)Change KBC .POST “C3”.data. “05” C3 (Award) (1)Change BIOS (2)Check memory problem (3)Check frequency problem C5 (Award) (1)Change BIOS (2)Check memory problem (3)Check HA3~31 is open or short 05 (Award) (1)Check KBC CLK is ok or not (2)Check KBC voltage is ok or not (3)Check KBC address.

“13”.TRDY#.25Vtt or 1. 1.25MHz.5V .318MHz.0.AGP) is open or short 13 (AMI) (1) Check 1.8V .40MHz….POST “0B”.PCI.RADY signal… is open or short (6) Check C/BE0~3 is short or not (7)Check all control signal(CPU.5V to NB 20 (AMI) (1) Check 2.) (4)Check all voltage is ok or not (5)Check INIT. “20” 0B (Award) (1)Change BIOS (2)Check battery is ok or not (3)Check all CLK signal(14.9Vtt (2) Check Memory problems (3) Check AGP signals .

3D (Award) (1)Check KBC CLK is ok or not (2)Check K/B problem (3)Check CPU control signal(HITM#.”3D”.ITIN.MEMW# is open or short (4)Check HA3~31 is open or short .ITNK#…)is open or short (4)Check N/B control signal… is open or short 41 (Award) (1)Change BIOS (2)Check SA0~SA16 is Open or short (3)Check MEMR#.POST ”31”.”41” 31.

“85” 4E (Award) (1)Check TRDY#.DEVSEL# is open or short (2)Check K/B problem 61 (Award) (1)Check Cache problem (2)Check CPU control signal is ok or not (3)Check N/B control signal is ok or not 85 (AMI) (1) Check Bios (2) Check NB (No display problem) . “61”.POST “4E”.

POST CODE Definition  AMI POST Code definition  AWARD POST Code definition  Phoenix POST Code definition .

AMI Bios Code Definition-1 .

AMI Bios Code Definition-2 .

AMI Bios Code Definition-3 .

AMI Bios Code Definition-4 .

AMI Bios Code Definition-5 .

AMI Bios Code Definition-6 .

AMI Bios Code Definition-7 .

AMI Bios Code Definition-8 .

Award Bios Code Definition-1 .

Award Bios Code Definition-2 .

Award Bios Code Definition-3 .

Award Bios Code Definition-4 .

Award Bios Code Definition-5

Award Bios Code Definition-6

Award Bios Code Definition-7

Award Bios Code Definition-8

Award Bios Code Definition-9

Phoenix Bios Code Definition-1

Phoenix Bios Code Definition-2

Phoenix Bios Code Definition-3

Phoenix Bios Code Definition-4

Phoenix Bios Code Definition-5

Phoenix Bios Code Definition-6

Phoenix Bios Code Definition-7 .

Phoenix Bios Code Definition-8 .

Phoenix Bios Code Definition-9 .

BIOS Beep Codes  AMI BIOS Beep Codes  AWARD BIOS Beep Codes  Phoenix BIOS Beep Codes .

8 short 2 short Error Message DRAM refresh failure Memory parity error Base 64K memory failure System timer failure Processor error Gate A20 failure Virtual mode processor exception error Display memory read/write error ROM checksum error CMOS shutdown register read/write error Cache error Failure in video system Memory test failure Display test failure POST Failure Description The programmable interrupt timer or programmable interrupt controller has probably failed A memory parity error has occurred in the first 64K of RAM. The BIOS ROM is probably defective and should be replaced The shutdown for the CMOS has failed The L2 cache is faulty An error was encountered in the video BIOS ROM. Replace the keyboard controller The CPU has generated an exception error because of a fault in the CPU or motherboard circuitry The system video adapter is missing or defective The contents of the system BIOS ROM does not match the expected checksum value. The RAM IC is probably bad A memory failure has occurred in the first 64K of RAM. 2 short 1 long. 3 short 1 long. or a horizontal retrace failure has been encountered A fault has been detected in memory above 64KB The video adapter is either missing or defective One of the hardware testa have failed 1 long POST has passed all tests . The RAM IC is probably bad The system clock/timer IC has failed or there is a memory error in the first bank of memory The system CPU has failed The keyboard controller IC has failed. which is not allowing Gate A20 to switch the processor to protected mode.BIOS Beep Codes for AMI Beeps 1 short 2 short 3 short 4 short 5 short 6 short 7 short 8 short 9 short 10 short 11 short 1 long.

Reseat or replace the video card. 2 short Repeating (endless loop) 1long.BIOS Beep Codes for AWARD Beeps Error Message Description Either video adapter is bad or is not seated properly. 3short High frequency beeeps while running Video adapter error Memory error No video card or bad video RAM Overheated CPU Repeating High/Low CPU . Check the case for proper air flow. check to ensure the monitor cable is connected properly. Check the CPU fan or BIOS settings for proper fan speed. 1long. Also. May also be due to excess heat. Check for improperly seated or missing memory. Either the CPU is not seated properly or the CPU is damaged. Check the CPU fan for proper operation.

Replace the BIOS or upgrade if possible The programmable interrupt timer has failed. Replace the IC if possible The first RAM control logic has failed The address line to the first 64KB RAM has failed The first RAM IC has failed. Replace the CMOS if possible The BIOS ROM has failed. Replace the motherboard The real time clock/CMOS is faulty. Replace the IC if possible The RAM refresh controller has failed The test of the first 64KB RAM has failed to start The first RAM IC has failed. Replace the CMOS if possible The extended portion of the CMOS RAM has failed. Replace the IC if possible .BIOS Beep Codes-1 for Phoenix 1-1-2 Low 1-1-2 1-1-3 Low 1-1-3 1-1-4 1-2-1 1-2-2 1-2-3 1-3-1 1-3-2 1-3-3 1-3-4 1-4-1 1-4-2 1-4-3 1-4-4 2-1-1~4 CPU test failure System board select failure CMOS read/write error Extended CMOS RAM failure BIOS ROM checksum error PIT failure DMA failure DMA read/write failure RAM refresh failure 64KB RAM failure First 64KB RAM failure First 64KB logic failure Address line failure Parity RAM failure EISA fail-safe timer test EISA NMI port 462 test 64KB RAM failure The CPU is faulty. This data bit on the first RAM IC has failed. Replace if possible Replace the motherboard Replace the motherboard Bit 0~3. Replace the CPU The motherboard is having an undetermined fault. Replace the IC if possible The DMA controller has failed. Replace if possible The DMA controller has failed.

Replace the video adapter if possible There is a problem with the video adapter. This data bit on the first RAM IC has failed. Replace the IC if possible Bit 8~11. This data bit on the first RAM IC has failed. Replace the controller if possible The interrupt controller IC has failed The interrupt controller IC has failed The BIOS was unable to load the interrupt vectors into memory. Replace the controller if possible The DMA controller had failed.BIOS Beep Codes-2 for Phoenix 2-2-1~4 2-3-1~4 2-4-1~4 3-1-1 3-1-2 3-1-3 3-1-4 3-2-2 3-2-3 3-2-4 3-3-1 3-3-2 3-3-3 3-3-4 3-4-1 4-2-1 64KB RAM failure 64KB RAM failure 64KB RAM failure Slave DMA register failure Master DMA register failure Master interrupt mask register failure Slave interrupt mask register failure Interrupt vector error Reserved Keyboard controller failure CMOS RAM power bad CMOS configuration error Reserved Video memory failure Video initialization failure Timer failure There is a problem with the video memory. Replace the IC if possible Bit 12~15. This data bit on the first RAM IC has failed. Replace the motherboard The CMOS configuration has failed. Restore the configuration or replace the battery if possible . Reseat the adapter or replace the adapter if possible The system's timer IC has failed. Replace the IC if possible The keyboard controller has failed. Replace the IC if possible Replace the CMOS battery or CMOS RAM if possible Bit 4~7. Replace the IC if possible The DMA controller has failed.

Replace the motherboard The system timer IC has failed. replace the MPU . Replace the IC if possible The real time clock/CMOS has failed. Replace the CPU and retest 4-3-1 4-3-3 4-3-4 4-4-1 4-4-2 4-4-3 RAM test failure Interval timer channel 2 failure Time of day clock failure Serial port failure Parallel port failure Math coprocessor failure System RAM addressing circuitry is faulty. Replace the CMOS if possible A error has occurred in the serial port circuitry A error has occurred in the parallel port circuitry The math coprocessor has failed.BIOS Beep Codes-3 for Phoenix 4-2-2 4-2-3 4-2-4 Shutdown failure Gate A20 failure Unexpected interrupt in protected mode The CMOS has failed. Replace the IC if possible This is a CPU problem. Replace the CMOS IC if possible The keyboard controller has failed. If possible.

Chapter 22 New Card Repair Guide .

Overview Diagram Slot Circuit (G1S) New Card Power Circuit Repair Flow Chart Q & A (Repair Experience) .

Diagram +1.5VS_PE +3VS_PE VSUS_ON SUSB_EC PCIE_TXN3_C PCIE_TXP3_C SB PCIE_RXN3_NEWCARD PCIE_RXP3_NEWCARD CLK_PCIE_NEWCARD Clock Gen CLK_PCIE_NEWCARD# .5VS +3VS +3VSUS +3VSUS_PE Power Controller (R5538V001) +1.

Slot Circuit (G1S) .

New Card Power Circuit .

+3VSUS is OK Check VSUS_ON.Repair Flow Chart Newcard error Measure CLK_PCIE_NEWCARD & CLK_PCIE_NEWCARD# Check CLOCK GEN is OK CLK is OK Change Defect Component NG OK Measure Voltage is OK ? Check +1.+3VS.5VS_PE & +3VS_PE & +3VSUS_PE is OK Check +1.5VS.SUSB_ECis OK Change Defect Component NG OK Use multi-meter to measure Check PCIE Interface signal is OK ? Check Resister and Capacitor and Trace Trace NG signal and Solve defect symptom NG OK Change South Bridge Finish .

Chapter 23 EC .

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Charge/discharge control  SPI BIOS ROM.EC KB3310 Role      Power sequence control with FCH Keyboard Controller/Touchpad Fan control LCD Backlight control SMBUS   Smart battery Temperature monitor ACPI (PC power management): Sleep/hibernate/wake up/Lid switch SCI – System Control Interrupt to FCH  Embedded Controller    GPIO: Control System Power. Firmware (8051)  Watch Dog Timer . AC/DC detect. LED.

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