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Thuan Xuan Nguyen Department of Electronics and Telecommunications University of Science, Ho Chi Minh City Vietnam National University,

Ho Chi Minh City Tel: (+84) 906 834 817 Email: thuannguyen.teaching@gmail.com Site: http://www.thuanxuannguyen.tk/

ASSIGNMENT #3
Edited: Monday, February 20 2012

1. (Use Vietnamese only) a. Write down the Shockley model and the alpha-law model. Explain the shortcomings of the Shockley model and describe the main motivations behind the alpha model. b. Explain some non-ideal effects in CMOS as follows. How did they impact on the 65-nm IC performance? o Velocity saturation o Mobility degradation o Channel length modulation o Leakage current (subthreshold, junction, and tunneling) o Body effect o Process varations o Temperature c. A 90 nm long transistor has a gate oxide thickness of 16 . What is its gate capacitance per micron of width? d. Does the body effect of a process limit the number of the transistors that can be placed in series in a CMOS gate at low frequencies? Explain. e. As temperature rises, does the current through an ON transistor increase or decrease? Does current through an OFF transistor increase or decrease? Will a chip operate faster at high temperature or low temperature? Explain.

2. Show that the current through two transistors in series is equal to the current through a single transistor of twice the length if the transistors are well described by the Shockley model. Specifically show that IDS1 = IDS2 in Figure 2.1 when the transistors are in their linear region: VDS < VDD Vt , VDD > Vt (this is also true in saturation). Hint: Express the currents of the series transistors in term of V1 and solve for V1.

Figure 2.1 3. An nMOS has a threshold voltage of 0.4 V and a supply voltage of VDD = 1.2 V. A circuit designer is evaluating a propasal to reduce Vt by 100 mV to obtain faster transistors. a. By what factor would the saturation current increase (at Vgs = Vds = VDD) if the transistor were ideal? b. By what factor would the subthreshold leakage current increase at room temperature at Vgs = 0? Assume n = 1.4. c. By what factor would the subthreshold leakage current increase at 120oC? Assume the threshold voltage is independent of temperature. d. Use MATLAB to draw the I-V characteristics of this nMOS in ideal model.

4. Give the expression for the output voltage for the pass transistor networks shown in Figure 4.1. Neglect the body effect.

Figure 4.1 Pass transistor networks 5. Use LTSpice to draw the Vin/Vout graph of an inverter with respectively. Give a case in which skewed inverter is used. ,