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LABORATORY EXPERIMENT 6

Analog to Digital Conversion

Purpose: The objective of this experiment is to design example analog to digital converters (ADC or A/D Converter) using: 1) a two-bit flash (parallel) converter; 2) a four-bit counter (servo) type converter, and 3) a monolithic ADC chip (ADC0804). After designing the circuit configurations determine which gives better performance, speed, cost effectiveness, etc.

Pre-laboratory Design: The pre-laboratory design consists of a preliminary design with values calculated using equations found in the ADC Design Notes and the literature. Simulations (MultiSim) for each of the three configurations are required prior to prototyping the circuits.

Part 1: Flash A/D Converter

The first part of this experiment deals with using a flash (parallel) analog to digital converter to illuminate two LEDs in a manner that corresponds to the value of the analog

input. Figure 1 shows the elements of the flash A/D converter.

LABORATORY EXPERIMENT 6 Analog to Digital Conversion Purpose: The objective of this experiment is to design

Figure 1: Two-Bit Flash A/D Converter Configuration.

Implement the comparators with the LM339 Comparators, not a LM741, because the LM741 does not have a rail-to-rail output. The LM339 also has an open-collector output with means it cannot source current directly and therefore requires a pull-up resistor ( like 1 to 10k resistors connected from the LM339 output to the supply rail).

The “code converter” will consist of logic gates that convert the inputs A, B, and C to true binary outputs X and Y. Create a logic table for the code converter and then implement with NAND logic gates. Note that NOT gates can be created by tying the

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input pins of the NAND gate together and having a single input applied to them. Try to use as little real estate (chips, resistors, space, etc.) as possible.

Laboratory Measurements/Calculations:

  • 1. Calibration Curve: Digital Outputs vs. Analog Inputs.

  • 2. Find the Conversion Gain

  • 3. Linearity: Find linear regression line for calibration curve.

  • 4. Resolution: Bit resolution (mV).

  • 5. Zero Offset: The digital output when analog input is set to zero.

  • 6. Step Size: Analog input voltage required to change the digital output one bit.

Part 2: Counter (servo) Type Converter

The next part of this experiment incorporates a four-bit UP/DOWN counter in a analog to

digital converter. Figure 2 shows the configuration for this converter.

input pins of the NAND gate together and having a single input applied to them. Try

Figure 2: Counter (servo) Type Converter Configuration.

When implementing this circuit, R should be at least 10kto limit the current sourced from the CD4050 Buffer device. Also LEDs can be connected to the four bit digital outputs from the five volt power supplies (+Vs) through current limiting resistors (limit current to around 4mA). Note also that the LM339 supply voltage should be higher than the supply voltages of the other chips (greater than 5V) because it does not work with rail-to-rail inputs. The input voltage, V in , can be supplied from a function generator that

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can provide precisely settable DC voltages. Use another function generator to supply the clock input for the 74L191. Make sure to offset the signal appropriately. Eliminate ground loops.

Laboratory Measurements/Calculations:

  • 1. Calibration Curve: Digital Outputs vs. Analog Inputs.

  • 2. Find the Conversion Gain

  • 3. Linearity: Find linear regression line for calibration curve.

  • 4. Resolution: Bit resolution (mV).

  • 5. Zero Offset: The digital output when analog input is set to zero.

  • 6. Step Size: Analog input voltage required to change the digital output one bit.

Part 3: Monolithic A/D Converter Chip

The final part of this experiment is to use a commercially available monolithic A/D

converter chip to produce 8-bit analog to digital conversion. Refer to the ADC0804 specification sheet for performance parameters and design details. Connect the A/D chip to LED indicators that will represent the most significant outputs bits.

R9

VCC 10kΩ 5V C1 U1 150pF 1 20 CS/ Vcc 2 19 RD/ CLKR DGND DGND
VCC
10kΩ
5V
C1
U1
150pF
1
20
CS/
Vcc
2
19
RD/
CLKR
DGND
DGND
LED1
R1
3
18
WR/
DB0
1.2kΩ
LED2
R2
4
17
CLK
DB1
1.2kΩ
LED3
R3
5
16
INTR/
DB2
StartConversion
1.2kΩ
LED4
R4
Analog Input
6
15
Vin+
DB3
Vin
1.2kΩ
LED5
C2
R5
14
7
0.1µF
DB4
Vin-
1.2kΩ
LED6
R6
8
13
AGND
DB5
1.2kΩ
LED7
R7
Vref / 2
9
12
Vref/2
DB6
2.5V
1.2kΩ
LED8
R8
10
11
DGND
DB7
C3
1.2kΩ
0.1µF
ADC0804
DGND
BIEN4390 - Biomedical Instrumentation Design Laboratory
Monolithic Successive Approximation A/D Converter

C4

10µF

DGND

Figure 3: Monolithic Successful Approximation A/D Configuration

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Laboratory Measurements/Calculations:

  • 1. Calibration Curve: Digital Outputs vs. Analog Inputs (for 3 MSB).

  • 2. Find the Conversion Gain

  • 3. Linearity: Find linear regression line for calibration curve.

  • 4. Resolution: Bit resolution (mV).

  • 5. Zero Offset: The digital output when analog input is set to zero.

  • 6. Step Size: Analog input voltage required to change the digital output one bit.

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