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From Wikipedia, the free encyclopedia
The floating-gate MOSFET (FGMOS) is a field-effect transistor, whose structure is similar to a conventional MOSFET. The gate of the FGMOS is electrically isolated, creating a floating node in DC, and a number of secondary gates or inputs are deposited above the floating gate (FG) and are electrically isolated from it. These inputs are only capacitively connected to the FG. Since the FG is completely surrounded by highly resistive material, the charge contained in it remains unchanged for long periods of time. Usually Fowler-Nordheim tunneling and hot-carrier injection mechanisms are used in order to modify the amount of charge stored in the FG. Some applications of the FGMOS are digital storage element in EPROM, EEPROM and flash memories, neuronal computational element in neural networks, analog storage element, e-pots and single-transistor DACs.
1 History 2 Structure 3 Modelling 3.1 Large signal DC 3.2 Small signal 4 Simulation 5 Applications 6 See also 7 References 8 External links
The first report of a floating-gate MOSFET was made by Kahng and Sze, and dates back to 1967. The first application of the FGMOS was to store digital data in EEPROM, EPROM and flash memories. However, the current interest in FGMOS circuits started from developing large-scale computations in neuromorphic systems, which are inherently analog. In 1989 Intel employed the FGMOS as an analog nonvolatile memory element in its ETANN chip, demonstrating the potential of using FGMOS devices for applications other than digital memory. Three research accomplishments laid the groundwork for much of the current FGMOS circuit development: 1. Thomsen and Brooke's demonstration and use of electron tunneling in a standard CMOS double-poly process allowed many researchers to investigate FGMOS circuits concepts without requiring access to specialized fabrication processes. 2. The νMOS, or neuron-MOS, circuit approach by Shibata and Ohmi provided the initial inspiration and framework to use capacitors for linear computations. These researchers concentrated on the FG circuit properties instead of the device properties, and used either UV light to equalize charge, or simulated FG elements by opening and closing MOSFET switches. 3. Carver Mead's adaptive retina gave the first example of using continuously-operating FG programming/erasing techniques, in this case UV light, as the backbone of an adaptive circuit
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the tunneling transistor (and therefore the operating FGMOS) needs to be embedded into a well. Structure An FGMOS can be fabricated by electrically isolating the gate of a standard MOS transistor. and therefore.Wikipedia. The injection transistor is connected normally and specific voltages are applied in order to create hot carriers that are then injected via an electric field into the floating gate. hence the technology dictates the type of FGMOS that can be fabricated. an output transconductance and a bulk transconductance.wikipedia. Small signal An N-input FGMOS device has N−1 more terminals than a MOS transistor. drain and bulk terminals interconnected in order to create a capacitive tunneling structure.Floating-gate MOSFET . Respectively: where is the total capacitance seen by the floating gate. Therefore. For charge modification applications.org/wiki/Floating-gate_MOSFET technology. a pair of small extra transistors are added to each FGMOS transistor in order to conduct the injection and tunneling operations. so that there are no resistive connections to its gate. A number of secondary gates or inputs are then deposited above the floating gate (FG) and are electrically isolated from it. it is then possible to express its drain to source current using standard MOS transistor models. These inputs are only capacitively connected to the FG. If it is possible to determine the voltage at the FG of an FGMOS device. in order to derive a set of equations that model the large signal operation of an FGMOS device. since the FG is completely surrounded by highly resistive material. A cross-section of a floating-gate transistor Modelling Large signal DC The equations modeling the DC operation of the FGMOS can be derived from the equations that describe the operation of the MOS transistor used to build the FGMOS. the free encyclopedia http://en. For applications where the charge of the FG needs to be modified. FGMOS transistor for purely capacitive use can be fabricated on N or P versions. N+2 small signal parameters can be defined: N effective input transconductances. it is necessary to find the relationship between its effective input voltages and the voltage at its FG. These equations show two drawbacks of the FGMOS compared with the MOS transistor: Reduction of the input transconductance Reduction of the output resistance 2 of 4 3/5/2012 12:20 AM . the tunneling transistor has its source. The gates of every transistor are connected together. the FG is a floating node. in terms of its DC operating point. So.
Castro. Analog VLSI Implementation of Neural Systems.C. Kahng and S.M. no. editors. 1992." The Bell System Technical Journal. 1991. The Bell System Technical Journal." IEEE Electron Device Letters. Mead and M. 191-196 3. "An electrically trainable artificial neural network with 10240 'floating gate' synapses. variable threshold inverters. 1967. Among the many solutions proposed for the computer simulation. Norwell. Sze. The values of the FGs can then be extracted and used for posterior small-signal simulations. Low Power and Low Voltage Circuit Design with the FGMOS Transistor D. ^ T.org/wiki/Floating-gate_MOSFET Simulation Under normal conditions. 1989 6. the operation is capacitively coupled." IEEE Transactions on Electron Devices. 1967. ^ A. vol. A transient analysis is then run with the supply voltages set to their final values. one of the most promising methods is an Initial Transient Analysis (ITA) proposed by Rodriguez-Villegas.com/bstj/vol46-1967/articles/bstj46-6-1288. ^ Rodriguez-Villegas.A. 6. "A floating-gate and its application to memory devices. H. pp. Using the FGMOS as a programmable charge element." Proceeding of the International Joint Conference on Neural Networks. See also IGBT MOSFET References 1. 111-113 4. This generates two problems: first. 1989. no. multipliers and logic functions. DACs.. Kluwer Academic Publishers. the free encyclopedia http://en. Brooke. Ohmi. a floating node in a circuit represents an error due to the fact that the initial condition is unknown unless it is somehow fixed. 46. pp. 46.A. vol. where the FGs are set to zero volts or a previously known voltage based on the measurement of the charge trapped in the FG after the fabrication process. ^ M. pp. it is commonly used for non-volatile storage such as flash. Shibata and T. 1288–1295 3 of 4 3/5/2012 12:20 AM . floating-gate MOSFETs are useful because of their ability to store an electrical charge for extended periods of time without a connection to a power supply. 39. no. vol.alcatellucent. Thomsen and M. Kahng and S. Tam. "A floating-gate MOSFET with tunneling injector fabricated using a standard double-polysilicon CMOS process. 12. Holler. pp. Applications The usage and applications of the FGMOS can be broadly classified in two cases. is not straight forward to simulate these circuits. pp.M. an unknown amount of charge might stay trapped at the floating gate during the fabrication process which will result in an unknown initial condition for the FG voltage.Floating-gate MOSFET . ^ C. vol. and second. 4. EPROM and EEPROM memory. In this context. Ismail. 1288-1295 2. If the charge in the floating gate is not modified during the circuit usage. vol. S. II. ^ D. Benson. letting the outputs evolve normally. 6. Examples of application for this regime are single transistor adders. connecting a voltage supply with the initial FG value to the floating gate using a very-high-value inductor. and R. "A functional MOS transistor featuring gate-level weighted sum and threshold operations. "A floating-gate and its application to memory devices" (http://www. MA. 1444-1455 5. D. the net charge in the floating gate is not modified.pdf) . Sze. In the capacitively coupled regime of operation.wikipedia.Wikipedia. analog storage element and e-pots. Other applications of the FGMOS are neuronal computational element in neural networks. Washington. Esther.
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