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Course Code: Course Objective:
Processing color and grayscale images or other two-dimensional signals has become an important tool for research and investigation in many areas of science and engineering. Digital Image Processing is designed to give professionals and students a powerful collection of fundamental and advanced image processing tools on the desktop. Digital Image Processing takes full advantage of the computational technology of Mathematica.
Credit Units: 03
Module I: Introduction and Digital Image Fundamentals The origins of Digital Image Processing, Examples of Fields that Use Digital Image Processing, Fundamentals Steps in Image Processing, Elements of Digital Image Processing Systems, Image Sampling and Quantization, Some basic relationships like Neighbours, Connectivity, Distance Measures between pixels, Linear and Non Linear Operations. Module II: Image Enhancement in the Spatial Domain Some basic Gray Level Transformations, Histogram Processing, Enhancement Using Arithmetic and Logic operations, Basics of Spatial Filters, Smoothening and Sharpening Spatial Filters, Combining Spatial Enhancement Methods. Module III: Image Enhancement in the Frequency Domain: Introduction to Fourier Transform and the frequency Domain, Smoothing and Sharpening Frequency Domain Filters, Homomorphic Filtering. Image Restoration A model of The Image Degradation / Restoration Process, Noise Models, Restoration in the presence of Noise Only Spatial Filtering, Pereodic Noise Reduction by Frequency Domain Filtering, Linear Position-Invarient Dedradations, Estimation of Degradation Function, Inverse filtering, Wiener filtering, Constrained Least Square Filtering, Geometric Mean Filter, Geometric Transformations. Module IV: Image Compression Coding, Interpixel and Psychovisual Redundancy, Image Compression models, Elements of Information Theory, Error free comparison, Lossy compression, Image compression standards. Image Segmentation Detection of Discontinuities, Edge linking and boundary detection, Threshold, Region Oriented Segmentation, Motion based segmentation. Module V: Representation and Description Representation, Boundary Descriptors, Regional Descriptors, Use of Principal Components for Description, Introduction to Morphology, Some basic Morphological Algorithms. Object Recognition Patterns and Pattern Classes, Decision-Theoretic Methods, Structural Methods.
Components A CT S/V/Q HA EE 5 10 8 7 70 Weightage (%) CT: Class Test, HA: Home Assignment, S/V/Q: Seminar/Viva/Quiz, EE: End Semester Examination; Att: Attendance
Text & References:
Text: Rafael C. Conzalez & Richard E. Woods, “Digital Image Processing”, 2 nd edition, Pearson Education. A. K. Jain, “Fundamental of Digital Image Processing”, PHI. References: Rosefield Kak, “Digital Picture Processing”, W.K. Pratt, “Digital Image Processing”,
CISC Scalar Processors. Branch handling techniques. Computer arithmetic principles. SIMD Computers and Performance Enhancement Examination Scheme: Components A CT S/V/Q HA EE 5 10 8 7 70 Weightage (%) CT: Class Test. Mechanisms for instruction pipelining. Multivector and SIMD computers.P. Demand driven mechanisms. Architectural development tracks Program and network properties: Conditions of parallelism.ADVANCED COMPUTER ARCHITECTURE Course Code: Course Objective: With increase in availability of system resources. Hierarchical bus systems. Pipelined and Parallel Processor Design”. . TMH. EE: End Semester Examination. Instruction-set Architectures. S/V/Q: Seminar/Viva/Quiz. Data and resource dependences. Pipelining: Linear pipeline processor. “Advanced computer architecture”. Dynamic interconnection Networks. Module III: Processors and Memory Hierarchy Advanced processor technology. “Computer Architecture and Parallel Processing”. Narosa Publishing. MGH. Arbitration transaction and interrupt. Vector-access memory schemes. Patterson. Dynamic instruction scheduling. References: J. Data flow architecture. technology.L. Static arithmetic pipeline.A. Virtual Memory Technology Module IV: Backplane Bus System Backplane bus specification. 1998. Comparisons of flow mechanisms Module II: System Interconnect Architectures Network properties and routing. Arithmetic Pipeline Design. Crossbar switch and multiport memory. BTC 802 Credit Units: 03 Course Contents: Module I: Parallel computer models The state of computing. This course provides a comprehensive study of scalable and parallel computer architectures for achieving a proportional increase in performance with increasing system resources. Att: Attendance Text & References: Text: Kai Hwang. Control flow versus data flow. Hayes. architecture (hardware) and software aspects of parallel computer and Vector computers. Direct mapping and associative caches. Synchronous Parallel Processing: SIMD Architecture and Programming Principles.J Flynn. Program partitioning and scheduling. M. “Computer Architecture: A quantitative approach”. Multifunctional arithmetic pipelines Module V: Vector Processing Principles Vector instruction types. Multiprocessor system interconnects. Multiprocessors and multicomputers. concept of parallel architecture has obtained immense popularity. Hardware and software parallelism. Vector and Symbolic processors Memory Technology: Hierarchical memory technology. Grain size and latency. 2000. Inclusion. In this course we have discussed the theory. Instruction pipeline design. “computer Architecture and organization”. 1998. Multistage and combining network. 2002. Hwang and Briggs. Hennessy. Coherence and Locality. Addressing and timing protocols. HA: Home Assignment. SIMD Parallel Algorithms. Program flow mechanisms. D. “Computer Architecture. 2000. MGH. Superscalar Processors. Nonlinear pipeline processor.VLIW Architectures. RISC Scalar Processors. Morgan Kauffmann. Static interconnection networks. Cache addressing models. Memory capacity planning. J.
Bruce Schiener . Examination Scheme: Components A CT S/V/Q HA EE 5 10 8 7 70 Weightage (%) CT: Class Test. Web security: Secure Socket Layer & Transport Layer security. modes of use of DES. established systems. Block Ciphers – DES and variant. Att: Attendance Text & References: William Stallings” Cryptography and Network Security: Principles and Practices” PHI “Applied Cryptography”. Secure electronics transactions. Firewalls Design principle. Threat and compromise /Breach potentially increased with the introduction of the end user involment. Encapsulating security Payload – Key Management. Module II Public key systems – Knacksack systems – RSK – Diffie Hellman Exchange – Authentication and Digital signatures. Structure of management information and TMN information model. Block ciphers. Module III Network Security: Hash function – Authentication: Protocols – Digital Signature standards. EE: End Semester Examination. TMN management layers. Electronics Mail Security – PGP (Pretty Good Privacy) MIME. data Compression technique.CRYPTOGRAPHY AND NETWORK SECURITY Course Code: Course Objective: Network Security was always important. Management information Model. Authentication Leader. Stream Ciphers: Rotor based system – shift register based systems – Design considerations for stream ciphers – Cryptanalysis of stream ciphers – Combined encryption and encoding.Thus the course is introduced to make the student acquainted with the concepts and practices to make the network environment secure. but has gained significance with the increase of application of Internet associated e-commerce. Module IV IP Security: Architecture. Management servicing and functions. Elliptic curve based systems. HA: Home Assignment. Module V Telecommunication Network architecture. S/V/Q: Seminar/Viva/Quiz.communication and networking . BTC 803 Credit Units: 02 Course Contents: Module I Codes and Ciphers – Some Classifical systems – Statistical theory of cipher systems-Complexity theory of crypto systems – Stream ciphers.
Edge Detection. Examination Scheme: IA EE A PR LR V PR V 5 10 10 5 35 35 Note: IA –Internal Assessment. V – Viva. EE. LR – Lab Record.Performance. Image Enhancements.DIGITAL IMAGE PROCESSING LAB Course Code: BTC 820 Credit Units: 01 Software Required: Java List of Assignements: Experiments will be based on Image Representation. Image transformation.External Exam. PR. . Morphological Image processing and Segmentation.
Module III: Effective Public Speaking Types Essentials Success in Public Speaking Dos and Don’ts Examination Scheme: Components Weightage (%) CT1 20 CT2 20 CAF 25 V 10 GD 10 GP 10 A 5 CAF – Communication Assessment File GD – Group Discussion GP – Group Presentation Text & References: Jermy Comfort. Methodology Role Functions Mannerism Guidelines Module II: Communication through Electronic Channels Introduction Technology based Communication Tools Video Conferencing Web Conferencing Selection of the Effective Tool E-mails. Cambridge Krishnaswamy. Speaking Effectively.VI Course Code: Course Objective: The modules are designed to enhance the communicative competence of the learners to equip them with efficient interpersonal communication. Business Communication.COMMUNICATION SKILLS . . Taylor. Oxford. Conversation in Practice. BTC 841 Credit Units: 01 Course Contents: Module I: Dynamics of Group Discussion Introduction. Macmillan Raman Prakash. Fax etc. N. Creative English for Communication.al. et.
extracurricular activities. openness to feedback and perceptiveness) Integration of personal and organizational vision for effectiveness A healthy balance of work and play Managing Stress creatively and productively Module III: Personal Success Strategy Time management Handling criticism and interruptions Dealing with difficult people Mapping and evaluating the situations Identifying long-term goals Module IV: Positive Personal Growth Understanding & Developing positive emotions Positive approach towards future Resilience during loss and challenge Module V: Professional Success Building independence & interdependence Reducing resistance to change Continued reflection (Placements. seminars. conference. events. projects extracurricular Activities etc. strength & style Analyzing choke points in your personal processes by analysis in area of placements.BEHAVIOURAL SCIENCE . seminars. projects etc. Module II: Managing Personal Effectiveness Setting goals to maintain focus Dimensions of personal effectiveness (self disclosure. conferences.) Module VI: End-of-Semester Appraisal Viva based on personal journal Assessment of Behavioural change as a result of training Exit Level Rating by Self and Observer Examination Scheme: Components Weightage (%) SAP 20 A 05 Mid Term Test (CT) 20 VIVA 30 Journal for Success (JOS) 25 .VIII (PERSONAL AND PROFESSIONAL EXCELLENCE) Course Code: Course Objective: Importance of Personal and Professional excellence Inculcating the components of excellence BTC 843 Credit Units: 01 Course Contents: Module I: Components of Excellence Personal Excellence: Identifying long-term choices and goals Uncovering the talent. events.
Any problems that have arisen that may be useful to document for future reference. a variety of experimental techniques. Any activities planned but not yet completed as part of the project. the File should be comprehensive and include A short account of the activities that were undertaken as part of the project. A statement about the extent to which the project has achieved its stated goals. Introduction Here a brief introduction to the problem that is central to the project and an outline of the structure of the rest of the report should be provided. and given appropriate titles or captions. in the same orientation as the main text. An opening and closing paragraph in every chapter could be included to aid in smooth flow. Note that in writing the various secions. Research is genuine exploration of the unknown that leads to new knowledge which often warrants publication. taking into account that initial drafts should be critiqued by the faculty guide and corrected by the student at each stage. First paragraph should state what was accomplished with regard to the objectives. Acknowledgements (optional) Acknowledgment to any advisory or financial assistance received in the course of work may be given. The introduction should aim to catch the imagination of the reader. Sufficient time should be allowed for satisfactory completion of reports. Methodology should be mentioned in details including modifications if any. Conclusion A conclusion should be the final section in which the outcome of the work is mentioned briefly. Year. emphasis should be given on what has been performed and achieved in the course of the work.project GUIDELINES FOR PROJECT FILE Research experience is as close to a professional problem-solving activity as anything in the curriculum. Materials and Methods This section should aim at experimental designs. rather than discuss in detail what is readily available in text books. Student’s Name. The abstract does not have to be an entire summary of the project. numbered. In writing these section. Future prospects Appendices . or as a future initiative directly resulting from the project. Course. All major equations should also be numbered and unless it is really necessary never write in “point” form. Report Layout The report should contain the following components: Title or Cover Page The title page should contain the following information: Project Title. Supervisor’s Name. A statement about the outcomes of the evaluation and dissemination processes engaged in as part of the project. discuss and compare these with those from other workers. etc. In general. Avoid abrupt changes in contents from section to section and maintain a lucid flow throughout the thesis. so excessive details should be avoided. all figures and tables should as far as possible be next to the associated text. Abstract A good "Abstract" should be straight to the point. It provides exposure to research methodology and an opportunity to work closely with a faculty guide. materials used. but rather a concise summary of the scope and results of the project Table of Contents Titles and subtitles are to correspond exactly with those in the text. and state-of-the-art instrumentation. not too descriptive but fully informative. But whether or not the results of a research project are publishable. Results and Discussion Present results. the project should be communicated in the form of a research report written by the student. The File is the principal means by which the work carried out will be assessed and therefore great care should be taken in its preparation. It usually requires the use of advanced concepts.
marking will be based on the following criteria: the quality of the report.M. Technical merit attempts to assess the quality and depth of the intellectual efforts put into the project. Popaya W. the technical merit of the project and the project execution. Lortheeranuwat A. if they are. For book Kowalski. References / Bibliography This should include papers and books referred to in the body of the report.S.The Appendix contains material which is of interest to the reader but not an integral part of the thesis and any problem that have arisen that may be useful to document for future reference. 7: 63-67 ASSESSMENT OF THE PROJECT FILE Essentially. Nutman IBP). Clin Microbiol Infect. abbreviations must comply with an internationally recognised system. Examples For research article Voravuthikunchai SP.(1976) Transduction of effectiveness in Rhizobium meliloti. The File should fulfill the following assessment objectives: Range of Research Methods used to obtain information Execution of Research Data Analysis Analyse Quantitative/ Qualitative information Control Quality Draw Conclusions Examination Scheme: Dissertation Viva Voce Total 50 50 100 . Project execution is concerned with assessing how much work has been put in. Supawita T. These should be ordered alphabetically on the author's surname. SYMBIOTIC NITROGEN FIXATION PLANTS (editor P. 8 (suppl 1): 116–117. Pongpaichit S. The titles of journals preferably should not be abbreviated. (2002) Antibacterial activity of Thai medicinal plants against enterohaemorrhagic Escherichia coli O157: H7. Ninrprom T.
Consistency. 1999. That is. Binder. Necessity. Implementations. 2002 Robert V. Testing Techniques and their Applicability. “Black-Box Testing – Techniques for Functional Testing of Software and Systems”. 2003 Boris Beizer. validation and testing techniques. Failure Analysis.. Selection of V & V Techniques: Requirements. V & V Standards. Software Testing: Levels of Testing. “Software Engineering”. Module. Structural Testing and Analysis. S/V/Q: Seminar/Viva/Quiz. 1995. “Software Testing”. Error-Oriented Testing and Analysis. New Age International Publishers. Assessment. Problem Tracking. Concurrency Analysis. Organizational Responsibilities. Impracticality of Testing All Paths. 1995. Integration Strategies. Performance Analysis. Designs. New York. Validation is the process of evaluating software at the end of the software development to ensure compliance with the software requirements. Specifications. The aim of the course is to provide clear understanding of verification. Changes. Wiley-Dreamtech India. which can be executed by a computer and that performs the computation specified by the design. Tracking Test Activities. Development Organization. Independent Test Organization. Impracticality of Testing All data. Functional Testing and Analysis. Proof of Correctness. New York. V & V Objectives. “Software Testing Techniques”. Requirements Tracing. Addison Wesley. Designs. Examination Scheme: Components A CT S/V/Q HA EE 5 10 8 7 70 Weightage (%) CT: Class Test. Louise Tamres. Simulation and Prototyping. Integration. Sufficiency. Specifications. Module V: Software V & V Planning Identification of V & V Goals. No Absolute Proof of Correctness Module III: The Role of V & V in Software Evolution Types of Products. John Wiley & Sons Inc. Second Edition. Evolving Nature of Area Module II: V & V Limitations Theoretical Foundations. Regression. John Wiley & Sons. 2005 Boris Beizer.. Verification of the output of the coding phase is primarily indended for detecting errors introduced during this phase. Integrating V & V Approaches. Stress Analysis. Transaction Flow Analysis. Aggarwal & Yogesh Singh. References: Cem Kaner. System. EE: End Semester Examination. New Delhi. Att: Attendance Text & References: Text: William Perry. Hybrid Approaches. “Testing Object-Oriented Systems-Models. “Testing Computer Software”. Requirements. Software Quality Assurance. New Delhi. Performance. Nguyen Quoc. Changes. “Effective Methods for Software Testing”. the goal of verification of the code produced is to show that the code is consistent with the design it is supposed to implement. Correctness. HA: Home Assignment. Jack Falk. K. 1993.SOFTWARE TESTING AND QUALITY ASSURANCE Course Code: Course Objective: The goal of the coding or programming phase is to translate the design of the system produced during the design phase into code in a given programming language. 2 nd Ed. Pearson Education Asia.K. BTC 806 Credit Units: 03 Course Contents: Module I: Introduction Terminology. Patterns and Tools”. Van Nostrand Reinhold. New York. Second Edition. Implementations. . Independent V & V Contractor. Module IV: Software V & V Approaches and their Applicability Software Technical Reviews.
Pearson Education Jason Pritchard. Examination Scheme: Components A CT S/V/Q HA EE 5 10 8 7 70 Weightage (%) CT: Class Test. interface with C/C++. VC++. “Essential COM”. Web Technologies interfacing with distributed objects over client/server & distributed Architecture. using COM interface pointers. reasons to distribute for centralized objects. separating interface & COM implementation. query interface types & properties. CORBA components. code sharing & reuse. Enterprise Java beans. CORBA interface repository. structure of CORBA-IDL. Object oriented system Architecture. introduction to DCOM. static & dynamic. class emulation. Module II: Introduction to distributed objects Computing standards. Dynamic linking. Interface definition language (IDL). IDL models & interfaces. Design of object oriented systems architecture and component technology compound document. Interface & IDL. Pearson Education Don Box.INTERFACE PROGRAMMING Course Code: Course Objective: To understand the fundamentals of programming constructs. Overview of Java. Module III: Component Object Model (COM) introduction Com as better C++ software distribution. Learn basic user interface principles through applications and be able to conduct requirements analysis and design implementation. runtime polymorphism. Architectural features. “Essential COM”. distributed objects in CORBA. Pearson Education References: Ton. Pearson Education. Overview of COM/DCOM and of an open doc. classes & IDL. . Make Program using graphical components in code libraries (SWING). client server system architecture. optimization. object Web. multi tier system architecture. S/V/Q: Seminar/Viva/Quiz. “COM & CORBA side by side”. Att: Attendance Text & References: Text: Booch. concepts of distributed object systems. Module V: Java Interface JINI. Perform usability examination and redesign and become familiarized with interactive design using multimedia. CORBA: Introduction & concepts. networking and other advanced feature. HA: Home Assignment. BTC 807 Credit Units: 03 Course Contents: Module I: Introduction to object oriented systems Preview of Object orientation. Rumbaugh. OMG. classes & servers. Overview of Object Web. Interface in COM-DCOM: Introduction to interfaces. object services & dynamic composition. mapping objects to locations. “Enterprise Java Beans”. Module IV: Classes & Objects in COM-DCOM Introduction. EE: End Semester Examination. CORBA’s self describing data. Jacobson. method invocation. Overview of CORBA. Valesky. optimizing query interface.
XNOR and implementation of general functions like AB+AB*C+A*C*. sizing a chain of inverters for minimum delay. depletion and enhancement device DYNAMIC BEHAVIOUR: Channel capacitance in different regions of operation. tristate inverter. analysis from a design perspective. 2 input Multiplexer. Introduction to DSVCL logic. VTC of CMOS inverter: PMOS AND NMOS operation in various regions including velocity saturation. capacitance and Inductance. channel length modulation. example of master slave flip flop. C2MOS register. Examples of sizing Combinational logic chains for minimum delay. Model for manual analysis. (W/L)p/(W/L)n ratio for setting desired V M with and without velocity saturation. and stick diagrams for functions like (AB+E+CD)* Examination Scheme: Components Weightage (%) A 5 CT 10 S/V/Q 8 HA 7 EE 70 . At the same time. clock overlap. Transistor sizing in CMOS logic for optimal delay. power and delay trade off. Pipelining and NORA CMOS Module V: Layout Design Rules Introduction to CMOS Process technology. non ideal clocks. Switching threshold. buffer Ratioed logic: Pseudo NMOS inverter and PMOS to NMOS ratio for performance. CPL AND/NAND. MOSFET STATIC BEHAVIOUR: Threshold voltage and its dependence on V SB MOSFET Operation in resistive and saturation region. Goo1 and poor 1. Static power. Since this course takes the latest trends in the industry into account. Improving delay calculation with input slope. This course along with the course of Digital Circuits and Systems II and Analog CMOS IC design will give you many of the basic essentials to work in the area of Circuit Design. TSPCR Register. NAND and NOR based SR latch. DOMINO Logic. simple example circuit implementations of DOMINO logic Module IV: Sequential Logic circuits Principle of Bistability. this plunge into deep submicron space causes devices to behave differently and brings challenging issues to forefront. Cascading Dynamic Gates. Velocity saturation and its impact on sub micron devices. charge sharing. comparison of equations for PMOS and NMOS. This scaling has a double impact on the design of ICs. Pseudo NMOS NAND NOR and other gates and the transistor sizing. Layout of CMOS inverter. Glitches and power dissipation due to direct path currents. Pass-transistor logic. CMOS NAND and NOR gates. charge leakage. Level 1 SPICE MODELS for MOS transistors The Wire: Interconnect parameters: resistance. dynamic and transient behaviour-diffusion capacitance. Switching Model of the CMOS inverter: nMOS /pMOS discharge and charge. SPICE diode model. Optimization of Domino Logic Gates. MUX based Latches. Noise Margins. you will find yourself at a definite edge. bootstrapping. Propagation delay: first order analysis. Elmore Delay Module II: CMOS Inverter VTC of an ideal inverter. Transistor sizing for energy minimization Module III: Combinational circuits CMOS LOGIC: Good 0 and poor 0. self capacitance calculations: Miller effect. Functions of the type (AB+C(D+E)) and their complements. OR/NOR. junction capacitance. IC manufacturing technology has gone through dramatic evolution and changes. XOR and XNOR gates. Robust and Efficient PTL Design. Lumped RC model. BTC 808 Credit Units: 03 Course Contents: Module I: Devices and the wire Diode. Electrical Effort. Schmitt Trigger. 2 and Higher input NAND and NOR gates. Delay of Transmission Gate chain Dynamic CMOS design: Precharge and Evaluation. wire capacitance. Resistive load inverter. master slave edge triggered register. XOR/XNOR gates Logical effort. JK latch. pass gate configurations for nmos and pmos. continuously scaling to ever smatter dimensions. Full Adder. Concept of Euler path. First. series and parallel N and P switches. 2 input and 4 input MUX. CMOS D latch. sub threshold conduction. the complexity of the designs that can be put on a single die has increased dramatically which led to new design methodologies. Branching effort. and clocked SR Latch. Equivalent resistance for MOSFET in (velocity) saturated region. Energy and Energy Delay: Dynamic power consumption. choosing optimum number of stages Power. Load Capacitance calculations: fan out capacitance.VLSI DESIGN Course Code: Course Objective: In the recent years. XOR.
HA: Home Assignment. EE: End Semester Examination.CT: Class Test. Att: Attendance Text & References: Jan M Rabaey: Digital Integrated Circuits David Hodges et al: Analysis and Design of Digital ICs Kang: CMOS Digital ICs Weste and Harris: CMOS VLSI design Weste and Eshragian: Principles of CMOS VLSI Design . S/V/Q: Seminar/Viva/Quiz.
8.External Exam. 5. Examination Scheme: IA EE A PR LR V PR V 5 10 10 5 35 35 Note: IA –Internal Assessment. 4. Attaching menus Attaching controls to the windows (i)Push buttons (ii)Tool bars (iii)Status bars 6. Adding text and graphics to the window. Creation of a window of size 100*200 with title “Hello world”. LR – Lab Record.Performance. EE. Handelling Dialog boxes. 3. V – Viva. . File Handelling. PR. Handelling Common Controls.WINDOWS PROGRAMMING USING VC++ LAB Course Code: BTC 821 Credit Units: 01 Programming Language: VC++ List of Experiments: 1. 7. Handling Input. 2.
Examination Scheme: IA EE A PR LR V PR V 5 10 10 5 35 35 Note: IA –Internal Assessment. LR – Lab Record. PR.Performance. V – Viva. .NETWORK OPERATING SYSTEM LAB Course Code: BTC 822 Credit Units: 01 Lab assignment will be based on the following Studying the functionality of Windows NT Server.External Exam. EE.
7. LR – Lab Record. EE. 15. 9. 12. 5.External Exam. PR. V – Viva. . 8. 13. 10. Write a test case to test login window using manual testing Write a test case to test triangle using manual testing Write a test case to test valid mobile no using manual testing Write a test case to test ATM machine no using manual testing Write the script to test the “save” functionality of notepad using rational robot Write the script to test “find” functionality of notepad using rational robot Write the script to test “replace” functionality of notepad using rational robot Write the script to test “+” functionality of window calculator using rational robot Write the script to test “*” functionality of window calculator using rational robot Write the script to test “%” functionality of window calculator using rational robot Write the script to test “/” functionality of window calculator using rational robot Write the script to test login page of window using rational robot Write the script to test Date field of window using rational robot Write the script to test drop drown field of window using rational robot Write the script to test hyperlink of web site using rational robot Examination Scheme: IA EE A PR LR V PR V 5 10 10 5 35 35 Note: IA –Internal Assessment.Performance. 6. 14. 2. 11. 3.SOFTWARE TESTING AND QUALITY ASSURANCE LAB Course Code: BTC 823 Credit Units: 01 *Practical list for software testing and quality assurance List of experiments: 1. 4.
Write a client program for COM (client-server architecture) Write a server program for COM (client-server architecture).Performance. V – Viva. 2. Write a program in component object model using abstract base class. 3. . LR – Lab Record. Write a class-factory program in COM architecture. Examination Scheme: IA EE A PR LR V PR V 5 10 10 5 35 35 Note: IA –Internal Assessment. 4. Generate a GUIID for COM interface. PR. 5. Write a program in component object model using polymorphism (virtual function). 6. Write a program in component object model using inheritance.External Exam.INTERFACE PROGRAMMING LAB Course Code: Lab Assignments: 1. EE. BTC 824 Credit Units: 01 7.
V – Viva. 2. 4.Performance. 7. LR – Lab Record. 10. 6. EE. Design and Simulation for general CMOS functions One bit full adder simulation 2:1 MUX using pass transistor logic Other functions using pass transistor logic Layout of CMOS inverter Layout of NAND and NOR gates Design and Simulation SR latch using NAND and NOR representations Design and simulate D flip flop BTC 825 Credit Units: 01 Examination Scheme: IA EE A PR LR V PR V 5 10 10 5 35 35 Note: IA –Internal Assessment. Design and simulate again by Sizing PMOS to NMOS appropriately and repeat experiment 1 Design and simulate V vs t for 2 input NAND and Nor gates. PR.External Exam. Using Design architect and simulate V vs time for CMOS inverter using same W/L ratio for PMOS and NMOS.VLSI DESIGN LAB Course Code: Course Contents: 1. 5. 3. 11. . 8. 9.
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