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P170HM SERVICE MANUAL

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Notebook Computer P170HM Service Manual


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Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 1.0 January 2011

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Trademarks
Intel and Intel Core are trademarks of Intel Corporation. Windows is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and/or registered trademarks of their respective companies.

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About this Manual


This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the P170HM series notebook PC. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Appendix A, Part Lists Appendix B, Schematic Diagrams Appendix C, Updating the FLASH ROM BIOS

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IMPORTANT SAFETY INSTRUCTIONS


Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 11.57A (220 Watts) minimum AC/DC Adapter.

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CAUTION This Computers Optical Device is a Laser Class 1 Product

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Instructions for Care and Operation


The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Dont drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer to any shock or vibration. Do not place it on an unstable surface. Do not place anything heavy on the computer.

2.

Keep it dry, and dont overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive heat or direct sunlight. Do not leave it in a place where foreign matter or moisture may affect the system. Dont use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents.

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3.

Follow the proper working procedures for the computer. Shut the computer down properly and dont forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer.

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4. 5. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. Take care when using peripheral devices.
Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices.

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Power Safety
The computer has specific power requirements:
Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord.

Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on.

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Battery Precautions
Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. Recharge the batteries using the notebooks system. Incorrect recharging may make the battery explode. Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. Keep the battery away from metal appliances. Affix tape to the battery contacts before disposing of the battery. Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines
The following can also apply to any backup batteries you may have. If you do not use the battery for an extended period, then remove the battery from the computer for storage. Before removing the battery for storage charge it to 60% - 70%. Check stored batteries at least every 3 months and charge them to 60% - 70%.

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Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturers instructions.

Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

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Related Documents
You may also need to consult the following manual for additional information: Users Manual on Disc This describes the notebook PCs features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.

System Startup
1. 2. 3. 4. Remove all packing materials. Place the computer on a stable surface. Insert the battery and tighten the screws. Securely attach any peripherals you want to use with the computer (e.g. keyboard and mouse) to their ports. Attach the AC/DC adapter to the DC-In jack at the rear of the computer, then plug the AC power cord into an outlet, and connect the AC power cord to the AC/ DC adapter. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not to exceed 130 degrees); use the other hand (as illustrated in <Hyperlink B n I>Figure 1) to support the base of the computer (Note: Never lift the computer by the lid/LCD). Press the power button to turn the computer on.

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5.

130

6.

7.

Figure 1
Opening the Lid/LCD/ Computer with AC/DC Adapter Plugged-In

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Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1 External Locator - Top View with LCD Panel Open ......................1-4 External Locator - Front & Right side Views .................................1-5 External Locator - Left Side & Rear View .....................................1-6 External Locator - Bottom View .....................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11

Part Lists ..................................................A-1


Part List Illustration Location ........................................................ A-2 Top with Fingerprint ...................................................................... A-3 Top without Fingerprint ................................................................. A-4 Bottom .......................................................................................... A-5 LCD ............................................................................................... A-6 HDD .............................................................................................. A-7 COMBO ......................................................................................... A-8 DVD-Dual Drive ............................................................................ A-9

Disassembly ...............................................2-1
Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Inserting the Hard Disk Into the HDD Bay .....................................2-8 Removing the Optical (CD/DVD) Device ......................................2-9 Removing the Hard Disk from the Secondary HDD Bay .............2-10 Removing the Primary System Memory (RAM) .........................2-12 Removing the System Memory (RAM) from Under the Keyboard .......................................................................................2-14 Removing the Wireless LAN Module ...........................................2-16 Removing and Installing the Processor .........................................2-17 Removing and Installing the Video Card ......................................2-20 Removing and Installing the TV Tuner Module ...........................2-22 Removing the Microphone ............................................................2-24

Schematic Diagrams................................. B-1


System Block Diagram ...................................................................B-2 Clock Generator ..............................................................................B-3 Processor 1/7 ...................................................................................B-4 Processor 2/7 ...................................................................................B-5 Processor 3/7 ...................................................................................B-6 Processor 4/7 ...................................................................................B-7 Processor 5/7 ...................................................................................B-8 Processor 6/7 ...................................................................................B-9 Processor 7/7 .................................................................................B-10 DDRIII CHA SO-DIMM_0 ..........................................................B-11 DDRIII CHA SO-DIMM_1 ..........................................................B-12 DDRIII CHB SO-DIMM_0 ..........................................................B-13 DDRIII CHB SO-DIMM_1 ..........................................................B-14 MXM PCI-E .................................................................................B-15 Panel, Inverter, CRT .....................................................................B-16 1394_JMB380C ............................................................................B-17 DVI ...............................................................................................B-18 HDMI ............................................................................................B-19 CougarPoint - M 1/9 .....................................................................B-20 IX

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Preface CougarPoint - M 2/9 ..................................................................... B-21 CougarPoint - M 3/9 ..................................................................... B-22 CougarPoint - M 4/9 ..................................................................... B-23 CougarPoint - M 5/9 ..................................................................... B-24 CougarPoint - M 6/9 ..................................................................... B-25 CougarPoint - M 7/9 ..................................................................... B-26 CougarPoint - M 8/9 ..................................................................... B-27 CougarPoint - M 9/9 ..................................................................... B-28 3G, CCD ....................................................................................... B-29 Mini PCIE, LID ............................................................................ B-30 LED, Hotkey, LID SW, Fan ......................................................... B-31 RJ45 .............................................................................................. B-32 Codec Realtek ALC892 ............................................................... B-33 APA2010D1-TPA2008D2 ........................................................... B-34 KBC-ITE IT8519 ......................................................................... B-35 USB, TP, FP, MULTI-CONN ...................................................... B-36 Card Reader (JMC 251C) ............................................................. B-37 USB 3.0 ........................................................................................ B-38 VDD3, VDD5 ............................................................................... B-39 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1 .............................................. B-40 Power 1.05VS, 1.05VS_VTT ....................................................... B-41 Power 1.5V/VTT_MEM .............................................................. B-42 Power 1.8VS ................................................................................. B-43 Power V-Core 1 ............................................................................ B-44 Power V-Core 2 ............................................................................ B-45 AC_In, Charger ............................................................................ B-46 Power 0.85VS ............................................................................... B-47 Audio Jack .................................................................................... B-48 X5100 ODD Board ....................................................................... B-49 X5100 Click Board ....................................................................... B-50 X5100 LED 1 Board .................................................................... B-51 X5100 LED 2 Board .................................................................... B-52 X X5100 LED 3 Board .....................................................................B-53 X7100 HDD & ODD Board .........................................................B-54 X7100 CIR ....................................................................................B-55 X7100 LED Board ........................................................................B-56 X7100 Click Board .......................................................................B-57 X7100 Fingerprint Board ..............................................................B-58

Updating the FLASH ROM BIOS......... C-1


To update the FLASH ROM BIOS you must: C-1 Download the BIOS ........................................................................C-1 Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive ................................................................................................C-1 Set the computer to boot from the external drive ...........................C-1 Use the flash tools to update the BIOS ...........................................C-2 Restart the computer (booting from the HDD) ...............................C-2

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Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the P170HM series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the Users Manual. Information about drivers (e.g. VGA & audio) is also found in Users Manual. That manual is shipped with the computer. Operating systems (e.g. Windows Vista, Windows 7, etc.) have their own manuals as do application software (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. The P170HM series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the symbol. The balance of this chapter reviews the computers technical specifications and features.

1.Introduction

Overview 1 - 1

Introduction

Specifications

Latest Specification Information The specifications listed here are correct at the time of sending them to the press. Certain items (particularly processor types/speeds) may be changed, delayed or updated due to the manufacturer's release schedule. Check with your service center for more details.

Processor Options
Intel Core i7 Processor Extreme Edition i7-2920XM (2.50GHz) 8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 55W Intel Core i7 Processor i7-2820QM (2.30GHz) 8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2720QM (2.20GHz) , i7-2630QM (2.0GHz) 6MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2520M (2.50GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W

Video Adapter
nVIDIA GeForce GTX 485M PCIe Video Card 2GB GDDR5 Video RAM on board Microsoft DirectX 11 Compatible nVIDIA GeForce GTX 470M PCIe Video Card 1.5GB GDDR5 Video RAM on board Microsoft DirectX 11 Compatible nVIDIA GeForce GTX 460M PCIe Video Card 1.5GB GDDR5 Video RAM on board Microsoft DirectX 11 Compatible

Audio
High Definition Audio Compliant Interface THX TruStudio Pro S/PDIF Digital Output One (3W) Sub Woofer Built-In Microphone 5 Speakers

Memory
*Four 204 Pin SO-DIMM Sockets Supporting DDR3 1333/ 1600** MHz Memory Modules Memory Expandable up to 16GB Compatible with 2GB or 4GB Modules
*Note: Four SO-DIMMs are only supported by Quad-Core CPUs; Dual-Core CPUs support two SO-DIMMs maximum **Note: 1600 MHz Memory Modules are only supported by Quad-Core CPUs to a maximum of two SO-DIMMs

1.Introduction

CPU The CPU is not a user serviceable part. Accessing the CPU in any way may violate your warranty.

Pointing Device
Built-in TouchPad (scrolling key functionality integrated)

Keyboard
Full-size WinKey keyboard with numeric keypad

LCD
17.3" (43.94cm) FHD (1920 * 1080)

Communication
Built-In Giga Base-TX Ethernet LAN 2.0M Pixel USB PC Camera Module (Factory Option) TV Tuner Mini-Card Module (Model C Only) (Factory Option) Intel WiFi Link 6230 (802.11a/g/n) Wireless LAN + Bluetooth 3.0 Half Mini-Card Combo Module (Factory Option) Intel WiFi Link 6300 (802.11a/g/n) Wireless LAN Half Mini-Card Module (Factory Option) Third-Party Wireless LAN (802.11b/g/n) + Bluetooth 3.0 Half Mini-Card Combo Module (Factory Option) Third-Party 802.11b/g/n Wireless LAN Half Mini-Card Module

BIOS
AMI BIOS (32Mb SPI Flash-ROM)

Storage
(Factory Option) One Changeable 12.7mm(h) Optical Device Type Drive (Super Multi Drive Module or Blu-Ray Combo Drive Module) Two Changeable 2.5" 9.5 mm (h) SATA (Serial) Hard Disk Drives supporting RAID level 0/1/Recovery

Security
Security (Kensington Type) Lock Slot BIOS Password (Factory Option) Fingerprint Reader Module

Card Reader
Embedded Multi-In-1 Card Reader MMC (MultiMedia Card) / RS MMC SD (Secure Digital) / Mini SD / SDHC/ SDXC MS (Memory Stick) / MS Pro / MS Duo

Core Logic
Intel HM67 Chipset

1 - 2 Overview

Introduction
Interface
Two USB 3.0 Ports Two USB 2.0 Ports (Note one USB 2.0 port can supply power when the system is off but still powered by the AC/DC adapter - see page 11.) One eSATA & USB 2.0 Combo Port One HDMI-Out Port One DVI-Out Port One IEEE1394a Port One S/PDIF-Out & Surround-Out Combo Jack One Headphone/Speaker-Out Jack One Microphone-In Jack One Line-In Jack One RJ-45 LAN Jack One DC-In Jack One Infrared Receiver for Optional TV Tuner Remote Control One CATV Antenna Jack (for Optional TV Tuner) Note: External 7.1CH Audio Output Supported by Headphone, Microphone, Line-In and Surround-Out Jacks

1.Introduction

Mini Card Slots


Slot 1 for WLAN Module or Combo WLAN and Bluetooth Module (Factory Option) Slot 2 for TV Tuner Module

Environmental Spec
Temperature Operating: 5C - 35C Non-Operating: -20C - 60C Relative Humidity Operating: 20% - 80% Non-Operating: 10% - 90%

Power
Removable 8-cell cylinder battery, 76.96Wh (5200mAh) Full Range AC/DC Adapter AC Input: 100 - 240V, 50 - 60Hz DC Output: 19V, 11.57A (220W)

Dimensions & Weight


412mm (w) * 276mm (d) * 41.8-45.4mm (h) Around 3.9kg with Battery and ODD

Overview 1 - 3

Introduction Figure 1
Top View 1. PC Camera 2. LCD 3. LED Status Indicators 4. Power Button 5. Speakers 6. Keyboard 7. Built-In Microphone 8. TouchPad and Buttons 9. Fingerprint Reader (Optional) 5 3 3 6 1

External Locator - Top View with LCD Panel Open

1.Introduction

5 4

1 - 4 External Locator - Top View with LCD Panel Open

Introduction

External Locator - Front & Right side Views

Figure 2
Front Views 1. Consumer Infrared Receiver 2. LED Indicators

1.Introduction

Figure 3
Right Side Views 1. Optical Device Drive Bay 2. Headphone Jack 3. Microphone Jack 4. S/PDIF-Out Jack 5. Line-In Jack 6. 1 * USB 2.0 Port

Right

External Locator - Front & Right side Views 1 - 5

Introduction

External Locator - Left Side & Rear View


Figure 4
Left Side View 1. 2. 3. 4. RJ-45 LAN Jack 2 * USB 3.0 Ports 1 * USB 2.0 Port Mini-IEEE 1394a Port 5. Multi-in-1 Card Reader 6. CATV Antenna Jack

1.Introduction

Figure 5
Rear View 1. Vent/Fan Intake 2. eSATA/USB 2.0 Combo Port 3. HDMI-Out Port 4. DVI-Out Port 5. DC-In Jack 6. Security Lock Slot

1 - 6 External Locator - Left Side & Rear View

Introduction

External Locator - Bottom View

Figure 6
Bottom View 1. Sub Woofer 2. Fan Outlet/Intake 3. Component Bay Cover 4. Primary HDD Bay 5. Secondary HDD Bay 6. Battery 7. Speakers

2 3

2 4 5 7 6 6

1.Introduction

Overheating To prevent your computer from overheating make sure nothing blocks the vent/fan intakes while the computer is in use.

External Locator - Bottom View 1 - 7

Introduction Figure 7
Mainboard Top Key Parts 1. Platform Controller Hub 2. Audio Codec 3. KBC ITE IT8519E

Mainboard Overview - Top (Key Parts)

1.Introduction

1 - 8 Mainboard Overview - Top (Key Parts)

Introduction

Mainboard Overview - Bottom (Key Parts)

Figure 8
Mainboard Bottom Key Parts 1. VGA-Card Connector 2. CPU Socket (no CPU installed) 3. Memory Slots DDR3 SO-DIMM 4. Hard Disk Connector 5. Mini-Card Connector (3G Module) 6. JMC 251C

1.Introduction

5 6

Mainboard Overview - Bottom (Key Parts) 1 - 9

Introduction Figure 9
Mainboard Top Connectors 1. CCD Connector 2. USB 2.0 Port 3. Mini-IEEE 1394a Port 4. Multi-in-1 Card Reader 5. TouchPad Cable Connector 6. Microphone Cable Connector 7. Keyboard Cable Connector 8. CMOS Battery Connector 9. Audio Cable Connector 10. LCD Cable Connector 2 11. LCD Cable Connector 1

Mainboard Overview - Top (Connectors)

11

1
10

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2 3 8

7 5 6

1 - 10 Mainboard Overview - Top (Connectors)

Introduction

Mainboard Overview - Bottom (Connectors)


4 3 2 1. 2. 3. 4. 9 5. 6. 8 7. 8. 9.

Figure 10
Mainboard Bottom Connectors

DC-In Jack DVI-Out Port HDMI-Out Port eSATA/USB 2.0 Combo Port VGA Fan Cable Connector Sub Woofer Cable Connector CPU Fan Cable Connector USB 3.0 Ports RJ-45 LAN Jack

1.Introduction

5 6

Mainboard Overview - Bottom (Connectors) 1 - 11

Introduction

1.Introduction
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Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the P170HM series notebooks parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the Users Manual but are repeated here for your convenience. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar.

2.Disassembly

Information

Warning

Overview 2 - 1

Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:
M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap

2.Disassembly

Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start.

Pressure sockets for multi-wire connectors

Pressure sockets for ribbon connectors

Board-to-board or multi-pin sockets

2 - 2 Overview

Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions. Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. 6. Peripherals Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer.

Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on.

2.Disassembly

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3

Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery:


1. Remove the battery 1. Remove the battery 2. Remove the HDD
page 2 - 5

3. Remove the wireless LAN 1. Remove the battery 2. Remove the processor 3. Install the processor 1. Remove the battery 2. Remove the video card 3. Install the video card

page 2 - 16

To remove and install a Processor:


page 2 - 5 page 2 - 17 page 2 - 19

To remove the HDD from the Primary Bay:


page 2 - 5 page 2 - 6

2.Disassembly

To remove the Optical Device:


1. Remove the battery 2. Remove the Optical device 1. Remove the battery 2. Remove the HDD 1. Remove the battery 2. Remove the system memory
page 2 - 5 page 2 - 9

To remove and install a Video Card:


page 2 - 5 page 2 - 20 page 2 - 21

To remove the HDD from the Secondary Bay:


page 2 - 5 page 2 - 10

To remove the TV Tuner:


1. Remove the battery 2. Remove the TV tuner 3. Install the TV tuner
page 2 - 5 page 2 - 22 page 2 - 23

To remove the Primary System Memory:


page 2 - 5 page 2 - 12

To remove the Microphone:


1. 2. 3. 4. 5. 6. 7. 8. 9. Remove the battery Remove the HDD Remove the Optical device Remove the HDD Remove the system memory Remove the processor Remove the video card Remove the TV tuner Remove the microphone
page 2 - 5 page 2 - 6 page 2 - 9 page 2 - 10 page 2 - 12 page 2 - 17 page 2 - 20 page 2 - 229. page 2 - 24

To remove the System Memory Under the Keyboard:


1. Remove the battery 2. Remove the keyboard 3. Remove the system memory
page 2 - 5 page 2 - 14 page 2 - 15

To remove the WLAN Module:


1. Remove the battery 2. Remove the keyboard
page 2 - 5 page 2 - 14

2 - 4 Disassembly Steps

Disassembly

Removing the Battery


1. 2. 3. 4. Turn the computer off, and turn it over. Slide the latch 1 in the direction of the arrow (Figure 1a). Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a). 3 Lift the battery 6 out in the direction of the arrow 4 (Figure 1b & Figure 1c).

Figure 1
Battery Removal
a. Slide the latch and hold in place. b. Slide the battery in the direction of the arrow. c. Lift the battery out in the direction of the arrow.

a.

c.

2.Disassembly

b.

3. Battery

Removing the Battery 2 - 5

Disassembly

Figure 2
HDD Assembly Removal
a. Locate the HDD bay cover and remove the screws. b. Remove the hard disk bay cover by levering the cover at point 3 .

Removing the Hard Disk Drive


The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating systems installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the Users Manual) when setting up a new hard disk.

Hard Disk Upgrade Process


1. Turn off the computer, and remove the battery (page 2 - 5). 2. Locate the hard disk bay cover and remove screws 1 - 2 (Figure 2a). 4 3. Remove the hard disk bay cover 6 by levering the cover at point 3 (Figure 2b). a. b.

2.Disassembly

1 3 2 4


4.Hard Disk Bay Cover HDD System Warning New HDDs are blank. Before you begin make sure: You have backed up any data you want to keep from your old HDD. You have all the CD-ROMs and FDDs required to install your operating system and programs. If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium.

2 Screws

2 - 6 Removing the Hard Disk Drive

Disassembly
4. 5. 6. 7. c. Slide the HDD assembly in the direction of the arrow 4 (Figure 3c). 5 Remove the hard disk assembly 6 (Figure 3d). Remove screws 6 & 7 and the insulation plate 6 (Figure 3e). 8 Reverse the process to install a new hard disk (do not forget to replace all the screws and covers). d. e.

Figure 3
HDD Assembly Removal (contd.)
c. Slide the HDD assembly in the direction of the arrow. d. Remove the hard disk assembly. e. Remove the screws and the insulation plate.

4 8

2.Disassembly

5. HDD 8. HDD Insulation Plate

2 Screws

Removing the Hard Disk Drive 2 - 7

Disassembly

Figure 4
Inserting the Hard Disk Into the HDD Bay
a. Make sure the HDD assembly is aligned with the black taped area. When aligned, carefully insert the HDD assembly into the case so that the connectors line up.

Inserting the Hard Disk Into the HDD Bay


1. Make sure the HDD assembly is aligned with the black taped area 1 (Figure 4a). 2 2. When aligned, carefully insert the HDD assembly 6 into the case so that the connectors line up (Figure 4a). 3. Replace the hard disk bay covers and screws. a.

2.Disassembly

2. HDD

2 - 8 Inserting the Hard Disk Into the HDD Bay

Disassembly

Removing the Optical (CD/DVD) Device


1. 2. 3. 4. Turn off the computer, and remove the battery (page 2 - 5). Locate the secondary hard disk bay cover and remove screws 1 & 2 (Figure 5a). 3 Remove the hard disk bay cover 6 (Figure 5b). 5 Remove the screw at point 4 (Figure 5c), and use a screwdriver to carefully push out the optical device 6 out of the bay at point 6 (Figure 5d). 5. Reverse the process to install any new optical (CD/DVD) device. a. c.

Figure 5
Optical Device Removal
a. Locate the secondary hard disk bay cover and remove the screws. b. Remove the cover. c. Remove the screw. d. Push the optical device out off the computer at point 6.

2.Disassembly

1 2

b.

d.

6
3. Secondary HDD Bay Cover 5. Optical Device

3 Screws 3

Removing the Optical (CD/DVD) Device 2 - 9

Disassembly

Figure 6
Secondary HDD Assembly Removal
a. Remove the screws from the secondary HDD assembly. b. Slide the secondary HDD assembly in the direction of the arrow. c. Lift the secondary HDD assembly up and out of the bay.

Removing the Hard Disk from the Secondary HDD Bay


Note that the secondary hard disk (if installed) is located under the optical device bay (CD/DVD). 1. Turn off the computer, and turn it over, remove the battery (page 2 - 5) and optical device (page 2 - 9). 2. Remove screws 1 - 3 from the secondary HDD assembly (Figure 6a). 3. Slide the secondary HDD assembly in the direction of the arrow 4 (it will not move fully out of the bay Figure 6a). 5 4. Lift the secondary HDD assembly 6 up and out of the bay (in the reverse direction of the arrow 4 Figure 6c).
a. c.

5 1 2

2.Disassembly

b.

5. Hard Disk Assembly

3 Screws 4 5

2 - 10 Removing the Hard Disk from the Secondary HDD Bay

Disassembly
5.

Remove screws 6 - 9 and the insulation plate 10 (Figure 7d). d. 9 8 10 6

Figure 7
Secondary HDD Assembly Removal
d. Remove the screws and the insulation plate.

7 6. Reverse the process to install a new disk (make sure you install the insulation plate). 7. Slide the HDD assembly into the bay at an angle as illustrated. 8. Make sure the insulation plate slides under the HDD bay guide at point 11 . 9. Slide the assembly in the direction of the arrow 12 and secure the assembly with the screws.

2.Disassembly

9 8
12

10. HDD Insulation Plate

7
11

4 Screws

Removing the Hard Disk from the Secondary HDD Bay 2 - 11

Disassembly Figure 8
RAM Module Removal
a. Remove the screws. b. Slide the bottom cover until the cover and case indicators are aligned.

Removing the Primary System Memory (RAM)


The computer has four memory sockets for 204 pin Small Outline Dual In-line (SO-DIMM) DDR III (DDR3) type memory modules (see Memory on page C - 2). The total memory size is automatically detected by the POST routine once you turn on your computer. Note that four SO-DIMMs are only supported by Quad-Core CPUs; Dual-Core CPUs support two SO-DIMMs maximum (see Memory on page C - 2 for full details). Two primary memory sockets are located under component bay cover (the bottom case cover), and two secondary memory sockets are located under the keyboard (not user upgradable). If you are installing only two RAM modules then they should be installed in the primary memory sockets under the component bay cover.

2.Disassembly

Note that the RAM located under the keyboard is not user upgradable. Contact your service center for more information if you wish to upgrade the memory in the secondary memory sockets.

Memory Upgrade Process


1. Turn off the computer, and turn it over, remove the battery (page 2 - 5). 2. Remove screws 1 - 4 (Figure 8a). 3. Slide the bottom cover until the cover and case indicators 5 are aligned (Figure 8b). a. 2 1 3 5 4 b.

4 Screws

2 - 12 Removing the Primary System Memory (RAM)

Disassembly
4. Lift the component bay cover 6 off the computer case. The modules will be visible at point 7 (Figure 9c). 5. Gently pull the two release latches ( 8 & 9 ) on the sides of the memory socket(s) in the direction indicated below (Figure 9d). 6. The RAM module 10 will pop-up, and you can remove it (Figure 9e). 7. Pull the latches to release the second module if necessary. 8. Insert a new module holding it at about a 30 angle and fit the connectors firmly into the memory slot. 9. The modules pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE the module; it should fit without much pressure. 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 11. Replace the bay cover and screws. 12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. c. 6 10 e.

Figure 9
RAM Module Removal (contd.)
c. Lift the component bay cover off the computer case. The modules will be visible at point 7 . d. Gently pull the two release latches on the sides of the memory socket(s) in the direction indicated below. e. The RAM module will pop-up, and you can remove it.

2.Disassembly

d.

Contact Warning

6. Component Bay Cover 10. RAM Module

Be careful not to touch the metal pins on the modules connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the modules performance.

Removing the Primary System Memory (RAM) 2 - 13

Disassembly Figure 10
RAM Module Removal
a. Remove the top cover module. b. Remove the screws. c. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable.

Removing the System Memory (RAM) from Under the Keyboard


Memory Upgrade Process
1. 2. 3. 4. Turn off the computer, and turn it over, remove the battery (page 2 - 5) and the component bay cover. Remove the top cover module A (Figure 10a). Remove screws 1 - 5 (Figure 10a). Carefully lift the keyboard B up, being careful not to bend the keyboard ribbon cable 6 (Figure 10c).

2.Disassembly

a. A 4 5

b. B 6

A. Top Cover Module B. Keyboard

5 Screws

2 - 14 Removing the System Memory (RAM) from Under the Keyboard

Disassembly
5. Disconnect the keyboard ribbon cable 6 from the locking collar socket 7 by using a small flat-head screwdriver to pry the locking collar pins 8 away from the base. (Figure 11e). 6. Remove the keyboard and the memory sockets 9 & 10 will be visible (Figure 11f). 7. Gently pull the two release latches ( 11 & 12 ) on the sides of the memory socket(s) in the direction indicated below (Figure 11g). 8. The RAM module 13 will pop-up, and you can remove it. 9. Pull the latches to release the second module if necessary. 10. Insert a new module holding it at about a 30 angle and fit the connectors firmly into the memory slot. 11. The modules pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE the module; it should fit without much pressure. 12. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 13. Replace the bay cover and screws. 14. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. g. e.
11

Figure 11
RAM Module Removal (contd.)
e. Disconnect the keyboard ribbon cable from the locking collar socket by using a small flat-head screwdriver to pry the locking collar pins away from the base. f. Remove the keyboard and the memory sockets will be visible. g. Gently pull the two release latches on the sides of the memory socket(s) in the direction indicated below.

2.Disassembly

6 8 8

13

12

11

13

12

f.

Contact Warning

9
10

Be careful not to touch the metal pins on the modules connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the modules performance.

13. RAM Modules

Removing the System Memory (RAM) from Under the Keyboard 2 - 15

Disassembly

Figure 12
Wireless LAN Module Removal
a. The Wireless LAN module will be visible at point 1 under the keyboard b. Disconnect the cables and remove the screw. c. The WLAN module will pop up. d. Lift the WLAN module out.

Removing the Wireless LAN Module


1. 2. 3. 4. 5. a. Turn off the computer, remove the battery (page 2 - 5) and the keyboard (page 2 - 10). The Wireless LAN module will be visible at point 1 under the keyboard (Figure 12a). Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket (Figure 12b). The Wireless LAN module 5 will pop-up (Figure 12c). Lift the Wireless LAN module (Figure 12d) up and off the computer. c.

2.Disassembly

b.

d.

4 3 5

5. WLAN Module

2 1 Screw

2 - 16 Removing the Wireless LAN Module

Disassembly

Removing and Installing the Processor


Processor Removal Procedure
1. Turn off the computer, remove the battery (page 2 - 5), and component bay cover (page 2 - 10). 2. Remove screws 1 - 4 from the heat sink unit in the order indicated on the label (i.e screw 4 first through to screw 1 last Figure 13a). 3. Carefully (it may be hot) remove the heat sink unit 5 (Figure 13b).
a.

Figure 13
Processor Removal Procedure
a. Remove the screws in the correct order. b. Carefully remove the heat sink unit.

Note: Loosen the screws in the reverse order 4-3-2-1 as indicated on the label.

2.Disassembly

4
b.

CPU Warning In order to prevent damaging the contact pins when removing the CPU, it is necessary to first remove the WLAN module from the computer.

5. Heat Sink Unit

4 Screws

Removing and Installing the Processor 2 - 17

Disassembly
4. 5. 6. 7. Turn the release latch 6 towards the unlock symbol , to release the CPU (Figure 14c). Carefully (it may be hot) lift the CPU A up out of the socket (Figure 14d). See page 2 - 19 for information on inserting a new CPU. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). c.

Figure 14
Processor Removal (contd)
c. Turn the release latch to unlock the CPU. d. Lift the CPU out of the socket.

2.Disassembly

Unlock d.

Lock

Caution The heat sink, and CPU area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts.

A. CPU

2 - 18 Removing and Installing the Processor

Disassembly

Processor Installation Procedure


1. Insert the CPU A , pay careful attention to the pin alignment (Figure 15a), it will fit only one way (DO NOT FORCE IT!), and turn the release latch B towards the lock symbol (Figure 15b). 2. Remove the sticker C (Figure 15c) from the heat sink unit. 3. Insert the heat sink unit D as indicated in Figure 15c. 4. Tighten the CPU heat sink screws in the order 1 , 2 , 3 & 4 (the order as indicated on the label and Figure 15d). 5. Replace the CPU fan, component bay cover and tighten the screws (page 2 - 17). a. c. C A D

Figure 15
Processor Installation
a. Insert the CPU. b. Turn the release latch towards the lock symbol. c. Remove the sticker from the heat sink unit and insert the heat sink. d. Tighten the screws.

2.Disassembly

Note: Tighten the screws in the order 1-23-4 as indicated on the label.
b. d.

A. CPU D. Heat Sink

2 B

1 4 Screws

Removing and Installing the Processor 2 - 19

Disassembly

Figure 16
Video Card Removal Procedure
a. Remove the screws in the correct order. b. Carefully remove the heat sink units. c. Remove the video card screws. The video card will pop up. d. Remove the video card.

Removing and Installing the Video Card


Video Card Removal Procedure
1. 2.

Turn off the computer, turn it over and remove the battery (page 2 - 5) and component cover (page 2 - 10). Remove screws 1 - 7 from the heat sink unit in the order indicated on the label (i.e screw 7 first through to screw 1 last) (Figure 16a). 3. Carefully (they may be hot) remove the heat sink units 8 & 9 (Figure 16b). 4. Remove screws 10 & 11 from the video card and the video card 12 will pop up (Figure 16c). 5. Remove the video card 12 (Figure 16d). a. c.
c.

2.Disassembly

2 10 9 11

12

Caution The heat sink, and video card area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts.

1 6

4 7 5

Note: Please use a flat head screwdriver to remove screws 10 & 11 .


d.

d.

b.

9 8 15
Heat Sink Screw Removal and Insertion
Remove the screws from the heat sink in the order indicated here: 7-6-5-4-3-2-1. When tightening the screws, make sure that they are tightened in the order: 1-2-3-4-5-6-7.

8 & 9.Heat Sink Units 12. Video Card

9 Screws

12

2 - 20 Removing and Installing the Video Card

Disassembly

Installing a New Video Card


1. 2. 3.

Figure 17
Installing a New Video Card
e. Insert the video card at a 30 degree angle. f. Fit the connectors straight and even.

Prepare to fit the video card 12 into the slot by holding it at about a 30 angle (Figure 17e). The card needs to be fully into the slot, and the video card and socket have a guide-key and pin which align to allow the card to fit securely (Figure 17f). Fit the connectors firmly into the socket, straight and evenly.
e. f.

10 12

2.Disassembly

11

Caution The heat sink, and video card area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts.

4. DO NOT attempt to push one end of the card in ahead of the other. 5. The cards pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket as it will go (none of the gold colored contact should be showing). DO NOT FORCE the card; it should fit without much pressure. 6. Secure the card with screws 10 & 11 (Figure 17 on page 2 - 21). 7. Place the heat sink back on the card, and secure the screws in the order indicated in Figure 17 on page 2 - 21. 8. Attach the video card fan and secure with the screws as indicated in Figure 16 on page 2 - 20. 9. Reinsert the component bay cover, and secure with the screws as indicated in Figure 10 on page 2 - 14.

12. Video Card

2 Screws

Removing and Installing the Video Card 2 - 21

Disassembly Figure 18
TV Tuner Module Removal

Removing and Installing the TV Tuner Module


TV Tuner Removal Procedure
Turn off the computer, turn it over and remove the battery (page 2 - 5) and component cover (page 2 - 10). The TV Tuner module will be visible at point 1 (Figure 18a). Carefully disconnect the cable 2 and remove the screw 3 from the TV Tuner module (Figure 18b). The TV Tuner module 4 will pop up (Figure 18c). Lift the TV Tuner module 4 up and off the computer (Figure 18d). c.

a. The TV Tuner module will 1. 2. be visible at point 1 . b. Carefully disconnect the 3. cable and remove the 4. screw from the TV Tuner 5. module. c. The TV Tuner module will a. pop up. d. Lift the TV Tuner module up and off the computer.

2.Disassembly

1 b. 3 4 d.

4. TV Tuner Module

1 Screw

2 - 22 Removing and Installing the TV Tuner Module

Disassembly

TV Tuner Installation Procedure


1. Before installation, make sure that the other end of the cable is locked in place as illustrated below (Figure 19a). 2. Insert the TV Tuner module 1 as indicated in Figure 19b. 3. Tighten screw 2 & connect cable 3 (Figure 19c). a. D c. A B C E b. 1

Figure 19
TV Tuner Installation
a. Make sure that the cable is locked in place. b. Insert the TV Tuner module. c. Tighten the screw & connect the cable.

2.Disassembly

Note: Before installation, make sure that the TV Tuner cable is placed in the following position: 1. Connect one end of the cable at point A. 2. Lock the cable with the plastic cover under point B . 3. Lock the cable in place with the hook provided at point C . 4. Run the remaining part of the cable through points D & E .
c. 2

3
1. TV Tuner Module

1 Screw

Removing and Installing the TV Tuner Module 2 - 23

Disassembly Figure 20
Microphone Removal

Removing the Microphone

1. Turn off the computer, and remove the battery (page 2 - 5), component bay cover (page 2 - 10), processor (page 2 - 17), hard disk (page 2 - 6) (page 2 - 10), optical device (page 2 - 9), video card (page 2 - 20), and tv tuner a. Remove the screws. b. Lift the top case up, keep(page 2 - 22). ing it level (do not tilt it). 2. Remove screws 1 - 19 and carefully push the bottom of the top case at point 20 (Figure 20a) c. Disconnect the micro- 3. Lift the top case 21 up, keeping it level (do not tilt it) Figure 20b. phone cable. 4. Disconnect the microphone cable 22 (Figure 20c). d. Remove the microphone. 5. Remove the microphone 23 (Figure 20d). a. 1 2 3 4 b. 5 6 21

2.Disassembly

13 19 14

12

11 15

10

20

c.

d.

18

17

16

8 22

21. Top Case 23. Microphone 19 Screws

Note: Carefully push the bottom of the top case at point 20 .

23

2 - 24 Removing the Microphone

Part Lists

Appendix A: Part Lists


This appendix breaks down the P170HM series notebooks construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturers part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A.Part Lists

A - 1

Part Lists

Part List Illustration Location


The following table indicates where to find the appropriate part list illustration. Table A- 1
Part List Illustration Location
Parts Top with Fingerprint Top without Fingerprint W870CU page A - 3 page A - 4 page A - 5 page A - 6 page A - 7 page A - 8 page A - 9

A.Part Lists

Bottom LCD HDD COMBO DVD-Dual Drive

A - 2 Part List Illustration Location

Part Lists

Top with Fingerprint

Figure A - 1
Top with Fingerprint

A.Part Lists

Top with Fingerprint A - 3

Part Lists

Top without Fingerprint

Figure A - 2

A.Part Lists

Top without Fingerprint

A - 4 Top without Fingerprint

Part Lists

Bottom

Figure A - 3
Bottom

A.Part Lists

Bottom A - 5

Part Lists

LCD

Figure A - 4

A.Part Lists

LCD

A - 6 LCD

Part Lists

HDD

Figure A - 5
HDD

A.Part Lists

( )

HDD A - 7

Part Lists

COMBO

Figure A - 6

A.Part Lists

COMBO

A - 8 COMBO

Part Lists

DVD-Dual Drive

Figure A - 7
DVD-Dual Drive

A.Part Lists

DVD-Dual Drive A - 9

Part Lists

A.Part Lists
A - 10

Schematic Diagrams

Appendix B: Schematic Diagrams


This appendix has circuit diagrams of the P170HM notebooks PCBs. The following table indicates where to find the appropriate schematic diagram.
Diagram - Page
System Block Diagram - Page B - 2 Clock Generator - Page B - 3 Processor 1/7 - Page B - 4 Processor 2/7 - Page B - 5 Processor 3/7 - Page B - 6 Processor 4/7 - Page B - 7 Processor 5/7 - Page B - 8 Processor 6/7 - Page B - 9 Processor 7/7 - Page B - 10 DDRIII CHA SO-DIMM_0 - Page B - 11 DDRIII CHA SO-DIMM_1 - Page B - 12 DDRIII CHB SO-DIMM_0 - Page B - 13 DDRIII CHB SO-DIMM_1 - Page B - 14 MXM PCI-E - Page B - 15 Panel, Inverter, CRT - Page B - 16 1394_JMB380C - Page B - 17 DVI - Page B - 18 HDMI - Page B - 19 CougarPoint - M 1/9 - Page B - 20

Diagram - Page
CougarPoint - M 2/9 - Page B - 21 CougarPoint - M 3/9 - Page B - 22 CougarPoint - M 4/9 - Page B - 23 CougarPoint - M 5/9 - Page B - 24 CougarPoint - M 6/9 - Page B - 25 CougarPoint - M 7/9 - Page B - 26 CougarPoint - M 8/9 - Page B - 27 CougarPoint - M 9/9 - Page B - 28 3G, CCD - Page B - 29 Mini PCIE, LID - Page B - 30 LED, Hotkey, LID SW, Fan - Page B - 31 RJ45 - Page B - 32 Codec Realtek ALC892 - Page B - 33 APA2010D1-TPA2008D2 - Page B - 34 KBC-ITE IT8519 - Page B - 35 USB, TP, FP, MULTI-CONN - Page B - 36 Card Reader (JMC 251C) - Page B - 37 USB 3.0 - Page B - 38 VDD3, VDD5 - Page B - 39

Diagram - Page
5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1 - Page B - 40 Power 1.05VS, 1.05VS_VTT - Page B - 41 Power 1.5V/VTT_MEM - Page B - 42 Power 1.8VS - Page B - 43 Power V-Core 1 - Page B - 44 Power V-Core 2 - Page B - 45 AC_In, Charger - Page B - 46 Power 0.85VS - Page B - 47 Audio Jack - Page B - 48 X5100 ODD Board - Page B - 49 X5100 Click Board - Page B - 50 X5100 LED 1 Board - Page B - 51 X5100 LED 2 Board - Page B - 52 X5100 LED 3 Board - Page B - 53 X7100 HDD & ODD Board - Page B - 54 X7100 CIR - Page B - 55 X7100 LED Board - Page B - 56 X7100 Click Board - Page B - 57 X7100 Fingerprint Board - Page B - 58

Table B - 1
Schematic Diagrams

B.Schematic Diagrams

Version Note The schematic diagrams in this chapter are based upon version 6-7P-X510C-002. If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required).

B - 1

Schematic Diagrams

System Block Diagram


AUDIO BOARD
PHONE JACK x4, USB x1

Huron River System Block Diagram


PCIE*16 800/1067/1333 MHz DDR3 / 1.5V

14.318 MHz

VDD3,VDD5 1.05VS,1.05VS_VTT 5V,3.3V,5VS,3VS, 1.5VS,VIN1

X5100M Audio BOARD CLICK & FINGER PRINTER BOARD MXM 3.0 POWER LED BOARD Function LED BOARD

Clock Generator SLG8SP585

Sandy Bridge PROCESSOR


rPGA989/988

(RESERVE)

SYSTEM SMBUS
LCD CON NECTOR

0.1"~13

1.8VS DDRIII SO-DIMM*4 1.5V,(VTT_MEM) FBVDDQ VCORE, VGFX_CORE AC_IN,CHARGER

B.Schematic Diagrams

Indicatory

LED BOARD
DVII CONNECTOR HDMI Connector <15"

FDI
0.5"~5.5"

DMI*4
<=8"

Sheet 1 of 57 System Block Diagram

X7100 ODD & 2nd HDD BOARD CIR BOARD


(RESERVE) SPI

USB PORT

LINE IN

SPDIF OUT

MIC IN

HP OUT

TOUCH PAD

CougarPoint Controller Hub (PCH)


27x27mm 989 Ball FCBGA

0.85VS
AUDIO BOARD

32.768 KHz

INT MIC

EC ITE 8519BX

LPC
0.5"~11"

33 MHz
BIOS SPI

Azalia Codec REALTEK ALC892

AMP TI TPA2008D2 AMP TI TPA2008D2 AMP TI TPA2010 AMP TI TPA2010

INT SPKER Front L Front R SURR L SURR R CENTER SUBWOOFER

24 MHz PCIE

AZALIA LINK 100 MHz


<12"

INT. K/B

EC SMBUS
THERMAL SENSOR
G711

SMART FANx2

SMART BATTERY AC-IN

32.768KHz

SATA I/II 3.0Gb/s

<12"

USB2.0 480 Mbps


1"~16"

Mini PCIE SOCKET 3G CARD (USB2)

Mini PCIE SOCKET

WLAN
(USB3)

USB3.0 uPD720200

JMICRO

JMC251C CARD LAN READER

JMICRO JMB380C 25 MHz 1394 PORT

SATA HDD

eSATA USB PORT USB PORT CCD (USB9) (USB1) (USB5)

3D IR (USB6)

X5100M(USB0) Audio BOARD

X5100M FINGER PRINTER(USB4) ON CLICK BOARD

USB3.0 USB3.0 PORT PORT

RJ-45

7IN1 SOCKET

FingerPrint X7100M ODD& 2nd HDD BOARD X5100M ODD BOARD


(Optional) 12 MHz

B - 2 System Block Diagram

Schematic Diagrams

Clock Generator
Crysta l 804 5 & 3225 Co -lay
X1 4 1 3 2 1 5 17 24 29 CL K _ V CC1 U2 0 15 18 C2 5 9 3 4 6 7 10 11 13 14 C L K _B U F _ D OT 9 6 _P 2 0 C L K _B U F _ D OT 9 6 _N 20 *0 . 1 u_ 1 6 V _Y 5V _ 0 4 C2 7 7 *0 . 1 u _1 6 V _Y 5 V _0 4 C 25 7 * 1u _ 6. 3 V _ Y 5 V _ 04

CLOCK GENERATOR
C LK _ V C C 2

CLKG P EN OWER

3 . 3V S C L K _V C C 1 L 37 *1 5 m li _ sh o rt _0 6

*H S X3 2 1 S _1 4 . 3 18 MH Z X2 *F S X 8 L_ 1 4. 3 1 8 18 MH z XI N C 2 64 *3 3p _ 50 V _ N P O _0 4 2 1 X OU T C 25 6 * 33 p _5 0 V _ N P O_ 0 4 X O UT XIN

V DD V DD V DD V DD V DD

_ D OT _ 27 _ S RC _ CP U _ RE F

V DD _ S RC_ I/O V DD _ CP U_ I/O D O T_ 9 6 D OT _9 6 # 27 M 2 7M _S S

27 28

X TA L _ OU T X TA L _ I N S R C _ 1 / S A TA S R C _ 1# / S A T A # S R C_ 2 S RC_ 2 #

0.1uF near the every power pin


C L K _B C L K _B C L K _P C L K _P UF _ CK S S C D_ P 2 0 UF _ CK S S C D_ N 2 0 CIE _ ICH_ P 2 0 C I E _ I C H _ N 20

20 C LK _ B U F _ R E F 14

R1 8 9

*3 3_ 0 4

R E F _ 0/ C P U _ S E L

30 R E F _0 / C P U _ S E L

C L K _S D A TA C L K _S C LK

31 32 2 8 9 12 21 26 33

B.Schematic Diagrams

S DA S CL V SS_ DO T VSS_ 2 7 VSS_ SATA V S S _ S RC V SS_ CPU V SS_ REF GN D *S L G 8S P 5 8 5

16 C P U _ S TO P # C P U_ 1 CP U_ 1 # C P U_ 0 CP U_ 0 # C K P W R GD / P D # 20 19 23 22 25

C P U _ S TO P #

R1 8 5

*2 . 2 1K _ 1 %_ 0 4

3. 3 V S C LK _ V C C 2 L32 C 2 67 C2 5 8 *1 u _6 . 3 V _Y 5 V _0 4 *1 5m i l_ s h ort _ 0 6

1. 0 5 V S _ V TT

C LK _ P W R GD *0 . 1u _ 16 V _ Y 5 V _ 0 4 3 .3 V

VDD_I/O can be ranging from 1.05V to 3.3V

Sheet 2 of 57 Clock Generator

ICS 9LRS3197 Realtek RTM875N632-VB


5

C2 3 6

0.1uF near the every power pin


*3 3 p _5 0 V _N P O_ 0 4 1 U1 8 *M C 7 4 V H C 1 G 08 D F T 1 G 4 2 3

14 , 1 5, 2 1 , 3 4, 4 3 A L L_ S Y S _P W R GD

SMBu s
Q1 7A *MT D N 7 00 2 Z H S 6 R D 2 S CL K _ S CL K 1 3 .3 VS 10 , 1 1 , 12 , 1 3, 20 S MB _ C LK 6 G

2 4 , 41

ICC_ E N# R 1 84 *1 K _0 4

EMI

5 VS

R 19 3 R 19 1 3 G 4

* 2. 2 K _ 0 4 * 2. 2 K _ 0 4 CL K _ S DA T A

R E F _0 / C P U _ S E L

C2 7 0

* 1 0p _ 50 V _ N P O _0 6

10 , 1 1 , 12 , 1 3, 20 S MB _ D A TA D 5 S

EMI Capactior

Q1 7B *MT D N 7 00 2 Z H S 6 R

CPU _SEL _Dur ing CK_ PEWG Lat P D ch inl


3 . 3V S

R1 9 2

*4 . 7K _ 0 4

R E F _ 0 / C P U _S E L

R1 9 0

*1 0K _ 0 4 5 VS 1 4, 1 5 , 17 , 1 8 , 19 , 2 5, 2 6 , 3 0, 3 2 , 3 3, 3 5 , 39 , 4 3 , 44 3 .3 V 3 , 4, 9 , 1 4, 1 5 , 1 9, 2 0 , 21 , 2 3 , 24 , 2 5 , 26 , 2 8, 2 9 , 3 0, 3 5 , 36 , 3 7 , 39 , 4 0 , 41 , 4 2 3 .3 VS 4 , 10 , 1 1, 1 2 , 1 3, 1 4 , 15 , 1 6 , 17 , 1 8 , 19 , 2 0, 2 1 , 2 3, 2 4 , 25 , 2 6 , 29 , 3 0, 32 , 3 3, 3 4 , 3 5, 3 6 , 39 , 4 0 , 43 1 . 0 5 V S _V T T 3 , 4, 6 , 2 4 , 25 , 2 6, 4 0 , 4 3

PIN_30 0(default) 1(0.7V-1.5V)

CPU_0 133MHz 100MHz

CPU_1 133MHz 100MHz

Clock Generator B - 3

Schematic Diagrams

Processor 1/7
Sandy Bridge Processor 1/7 ( DMI,PEG,FDI )
1. 0 5 V S _ V T T U 3 2A B2 7 B2 5 A2 5 B2 4 B2 8 B2 6 A2 4 B2 3 G2 1 E2 2 F21 D2 1 G2 2 D2 2 F20 C2 1 P E G _I C OM P I P E G_ I C OM P O P E G _ R C OM P O J22 J21 H 22 K3 3 M 35 L34 J35 J32 H 34 H 31 G 33 G 30 F35 E3 4 E3 2 D 33 D 31 B3 3 C 32 J33 L35 K3 4 H 35 H 32 G 34 G 31 F33 F30 E3 5 E3 3 F32 D 34 E3 1 C 33 B3 2 M 29 M 32 M 31 L32 L29 K3 1 K2 8 J30 J28 H 29 G 27 E2 9 F27 D 28 F26 E2 5 M 28 M 33 M 30 L31 L28 K3 0 K2 7 J29 J27 H 28 G 28 E2 8 F28 D 27 E2 6 D 25

20 mil

P E G _ I R C OM P _R

R 95

2 4. 9 _ 1 %_ 0 4

21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21

DM DM DM DM DM DM DM DM

I _T X N 0 I _T X N 1 I _T X N 2 I _T X N 3 I _T X P 0 I _T X P 1 I _T X P 2 I _T X P 3

D D D D D D D D D D D D D D D D

MI _ R X # [ 0 ] MI _ R X # [ 1 ] MI _ R X # [ 2 ] MI _ R X # [ 3 ] MI _ R X [ 0 ] MI _ R X [ 1 ] MI _ R X [ 2 ] MI _ R X [ 3 ] MI _ T X# [ 0 ] MI _ T X# [ 1 ] MI _ T X# [ 2 ] MI _ T X# [ 3 ] MI _ T X[ 0 ] MI _ T X[ 1 ] MI _ T X[ 2 ] MI _ T X[ 3 ]

D MI _ R XN 0 D MI _ R XN 1 D MI _ R XN 2 D MI _ R XN 3 D D D D MI _ R MI _ R MI _ R MI _ R XP 0 XP 1 XP 2 XP 3

B.Schematic Diagrams

PCI EXPRESS* - GRAPHICS

P E G_ R X# [ 0 ] P E G_ R X# [ 1 ] P E G_ R X# [ 2 ] P E G_ R X# [ 3 ] P E G_ R X# [ 4 ] P E G_ R X# [ 5 ] P E G_ R X# [ 6 ] P E G_ R X# [ 7 ] P E G_ R X# [ 8 ] P E G_ R X# [ 9 ] P E G _R X #[ 10 ] P E G _R X #[ 11 ] P E G _R X #[ 12 ] P E G _R X #[ 13 ] P E G _R X #[ 14 ] P E G _R X #[ 15 ] P E G_ R X [ 0 ] P E G_ R X [ 1 ] P E G_ R X [ 2 ] P E G_ R X [ 3 ] P E G_ R X [ 4 ] P E G_ R X [ 5 ] P E G_ R X [ 6 ] P E G_ R X [ 7 ] P E G_ R X [ 8 ] P E G_ R X [ 9 ] P E G_ R X[ 10 ] P E G_ R X[ 11 ] P E G_ R X[ 12 ] P E G_ R X[ 13 ] P E G_ R X[ 14 ] P E G_ R X[ 15 ] P E G_ T X# [ 0 ] P E G_ T X# [ 1 ] P E G_ T X# [ 2 ] P E G_ T X# [ 3 ] P E G_ T X# [ 4 ] P E G_ T X# [ 5 ] P E G_ T X# [ 6 ] P E G_ T X# [ 7 ] P E G_ T X# [ 8 ] P E G_ T X# [ 9 ] P E G_ T X #[ 10 ] P E G_ T X #[ 11 ] P E G_ T X #[ 12 ] P E G_ T X #[ 13 ] P E G_ T X #[ 14 ] P E G_ T X #[ 15 ] P E G _ TX [ 0 ] P E G _ TX [ 1 ] P E G _ TX [ 2 ] P E G _ TX [ 3 ] P E G _ TX [ 4 ] P E G _ TX [ 5 ] P E G _ TX [ 6 ] P E G _ TX [ 7 ] P E G _ TX [ 8 ] P E G _ TX [ 9 ] P E G_ T X[ 10 ] P E G_ T X[ 11 ] P E G_ T X[ 12 ] P E G_ T X[ 13 ] P E G_ T X[ 14 ] P E G_ T X[ 15 ]

PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG

_ R X # _0 _ R X # _1 _ R X # _2 _ R X # _3 _ R X # _4 _ R X # _5 _ R X # _6 _ R X # _7 _ R X # _8 _ R X # _9 _ R X # _1 0 _ R X # _1 1 _ R X # _1 2 _ R X # _1 3 _ R X # _1 4 _ R X # _1 5 _ RX _ 0 _ RX _ 1 _ RX _ 2 _ RX _ 3 _ RX _ 4 _ RX _ 5 _ RX _ 6 _ RX _ 7 _ RX _ 8 _ RX _ 9 _ R X _ 10 _ R X _ 11 _ R X _ 12 _ R X _ 13 _ R X _ 14 _ R X _ 15 _ TX # _ 0 _ TX # _ 1 _ TX # _ 2 _ TX # _ 3 _ TX # _ 4 _ TX # _ 5 _ TX # _ 6 _ TX # _ 7 _ TX # _ 8 _ TX # _ 9 _ TX # _ 10 _ TX # _ 11 _ TX # _ 12 _ TX # _ 13 _ TX # _ 14 _ TX # _ 15 _ TX _ 0 _ TX _ 1 _ TX _ 2 _ TX _ 3 _ TX _ 4 _ TX _ 5 _ TX _ 6 _ TX _ 7 _ TX _ 8 _ TX _ 9 _ TX _ 1 0 _ TX _ 1 1 _ TX _ 1 2 _ TX _ 1 3 _ TX _ 1 4 _ TX _ 1 5

C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C

43 3 46 7 43 1 46 5 44 7 46 3 44 5 46 1 44 3 45 9 44 1 45 7 43 9 45 5 43 7 45 3 43 4 46 8 43 2 46 6 44 8 46 4 44 6 46 2 44 4 46 0 44 2 45 8 44 0 45 6 43 8 45 4 64 86 66 68 88 70 90 72 92 74 94 76 96 78 98 80 63 85 65 67 87 69 89 71 91 73 93 75 95 77 97 79

0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R 0. 2 2 u _1 0 V _ X 5R

_ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04

PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG PEG

_ RX N0 1 4 _ RX N1 1 4 _ RX N2 1 4 _ RX N3 1 4 _ RX N4 1 4 _ RX N5 1 4 _ RX N6 1 4 _ RX N7 1 4 _ RX N8 1 4 _ RX N9 1 4 _ RX N1 0 1 4 _ RX N1 1 1 4 _ RX N1 2 1 4 _ RX N1 3 1 4 _ RX N1 4 1 4 _ RX N1 5 1 4 _ RX P 0 1 4 _ RX P 1 1 4 _ RX P 2 1 4 _ RX P 3 1 4 _ RX P 4 1 4 _ RX P 5 1 4 _ RX P 6 1 4 _ RX P 7 1 4 _ RX P 8 1 4 _ RX P 9 1 4 _ R X P 1 0 14 _ R X P 1 1 14 _ R X P 1 2 14 _ R X P 1 3 14 _ R X P 1 4 14 _ R X P 1 5 14 _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N _ TX N 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14

Intel(R) FDI

Sheet 3 of 57 Processor 1/7

A2 1 H1 9 E1 9 F18 B2 1 C2 0 D1 8 E1 7

FD FD FD FD FD FD FD FD

I 0 _T X # [ 0] I 0 _T X # [ 1] I 0 _T X # [ 2] I 0 _T X # [ 3] I 1 _T X # [ 0] I 1 _T X # [ 1] I 1 _T X # [ 2] I 1 _T X # [ 3]

DMI

PEG Compen satio Sig n nal CAD NOTE: PEG_I COMPI and RCOMPO sign als shou be short an rou ld ed d ted wi th - ma len x gth = 500 m ils - ty pical imped ance = 43 mohms PEG_ ICOMP sign O als s hould be ro uted with - ma len x gth = 500 m ils - ty pical imped ance = 14. mohm 5 s

A2 2 G1 9 E2 0 G1 8 B2 0 C1 9 D1 9 F17 1. 0 5 V S _ V T T R 42 0 1 K_ 0 4 J1 8 J1 7 H2 0

FD FD FD FD FD FD FD FD

I 0 _T X [ 0 ] I 0 _T X [ 1 ] I 0 _T X [ 2 ] I 0 _T X [ 3 ] I 1 _T X [ 0 ] I 1 _T X [ 1 ] I 1 _T X [ 2 ] I 1 _T X [ 3 ]

F D I 0 _F S Y N C F D I 1 _F S Y N C F D I_ INT

R 31 5 2 4 . 9_ 1 % _0 4

J1 9 H1 7

F D I 0 _L S Y N C F D I 1 _L S Y N C

DP Com pensa tion Signal


R 31 8 *0 _ 04

A1 8 A1 7 B1 6 C1 5 D1 5 C1 7 F16 C1 6 G1 5 C1 8 E1 6 D1 6 F15

e D P _C OM P I O e D P _I C OM P O e D P _H P D

e D P _A U X e D P _A U X #

C NOT DP AD E: _COMPI and ICOM sig O PO nals s hould be sh orted near balls and r outed with - typic im al pedanc < 2 moh e 5 ms

e D P _T X [ 0 ] e D P _T X [ 1 ] e D P _T X [ 2 ] e D P _T X [ 3 ] e DP e DP e DP e DP _T X # [ 0] _T X # [ 1] _T X # [ 2] _T X # [ 3]

_ TX P 0 1 4 _ TX P 1 1 4 _ TX P 2 1 4 _ TX P 3 1 4 _ TX P 4 1 4 _ TX P 5 1 4 _ TX P 6 1 4 _ TX P 7 1 4 _ TX P 8 1 4 _ TX P 9 1 4 _ TX P 1 0 1 4 _ TX P 1 1 1 4 _ TX P 1 2 1 4 _ TX P 1 3 1 4 _ TX P 1 4 1 4 _ TX P 1 5 1 4

eDP

S an d y B ri d ge _ rP G A _R e v 0p 6 1

Analog Thermal Sensor


Q 41 5 4 V CC T MP 2 0 VO GN D N C GN D 1 2 3

SC70-5 & SC70-3 Co Lay

3 .3 V 2 Q2 0 VC C C 4 52 0 . 1 u _1 0 V _ X 7R _ 04 3 G ND G 71 1 S T 9U O UT 1

1 :2 ( 4mi ls :8 mi ls )
C4 5 1 0. 1u _ 1 0V _ X 7 R _ 0 4

T H E R M_ V O L T 3 4

2 , 4 , 6, 24 , 2 5 , 26 , 4 0 , 4 3 1 . 0 5 V S _ V T T 2, 4 , 9 , 1 4 , 15 , 1 9 , 2 0, 2 1 , 2 3, 24 , 2 5 , 26 , 2 8 , 2 9, 3 0 , 3 5, 36 , 3 7 , 39 , 4 0 , 4 1, 4 2 3 . 3 V

1 3

PLACE NEAR U3

B - 4 Processor 1/7

Schematic Diagrams

Processor 2/7
Sandy Bridge Processor 2/7 ( CLK,MISC,JTAG )
U3 2 B

PU /P D fo r JT AG si gn al s
1 .0 5 V S _V TT XD XD XD XD XD XD P _T M P _T D P _P R P _T D P _T C P _T R S I _R E Q# O_ R LK S T# R R R R R R 82 76 84 30 8 30 9 67 51 _ 04 51 _ 04 *5 1_ 0 4 51 _ 04 51 _ 04 51 _ 04

MISC

2 4 P RO C_ S E L E T

S N B _ IV B #

CLOCKS

P RO C_ S E L E T

C2 6 A N3 4

B CL K B CL K #

A2 8 A2 7

CL K _ E X P _ P 2 0 CL K _ E X P _ N 2 0 1.0 5 V S _ V T T

S K T OC C #

D P L L_ R E F _S S C L K D P L L _R E F _ S S C L K #

A1 6 A1 5

R 3 22 R 3 25

1 K _ 04 1 K _ 04

DD R3 C om pe ns at io n S ig na ls
S M_ R C OM P _ 0 R 4 0 9 S M_ R C OM P _ 1 R 3 3 3 1 40 _ 1 % _0 4 2 5. 5_ 1 % _0 4 2 00 _ 1 % _0 4

H _ C A TE R R #

AL 3 3

CA T E R R#

2 4,3 4 H _ P E C I Add to conn ect to E C 4 3 H _ P R O C H OT #

R 50

* 10 m i _ s h ort l

THERMAL

A N3 3

PECI

S M _D R A M R S T #

R 8

C P UD RA M RS T #

S M_ R C OM P _ 2 R 3 3 4

DDR3 MISC

B.Schematic Diagrams

R5 2

5 6 _0 4

H _ P R O C H O T #_ D

AL 3 2

P R O C H OT #

S M_ R C O MP [ 0 ] S M_ R C O MP [ 1 ] S M_ R C O MP [ 2 ]

AK1 A5 A4

S M _ R C O MP _ 0 S M _ R C O MP _ 1 S M _ R C O MP _ 2

2 4 H _ T H R MT R I P #

R 51

* 10 m i _ s h ort l

A N3 2

TH E R M T R I P #

Pr oc es so r Pu ll up s/ Pul l do wn s
P RD Y # P R E Q# AP2 9 AP2 7 A R 26 A R 27 AP3 0 A R 28 AP2 6 X D P _P R D Y # X D P _P R E Q# X D P _T C L K X D P _T MS X D P _T R S T# X D P _T D I _R X D P _T D O _ R H _ P RO CHO T # 1. 0 5 V S _ V T T

Sheet 4 of 57 Processor 2/7

PWR MANAGEMENT

2 1 H _ P M_ S Y N C

R 3 02

* 10 m i _ s h ort l

A M3 4 P M_ S Y N C

JTAG & BPM

TC K TM S T RS T # TD I T DO

6 2 _ 04 1 0 K _1 % _ 04

R4 2 R4 9

H _ CP U P W RG D_ R

2 4 H _ C P U P W R GD

R 41

* 10 m i _ s h ort l

H _ C P U P W R GD _R

AP3 3 U N C OR E P W R GO OD

TRA W CE IDTH 10M IL, LENG < TH 500M ILS AL 3 5 D BR# B P M# [ 0 ] B P M# [ 1 ] B P M# [ 2 ] B P M# [ 3 ] B P M# [ 4 ] B P M# [ 5 ] B P M# [ 6 ] B P M# [ 7 ] AT2 8 A R 29 A R 30 AT3 0 AP3 2 A R 31 AT3 1 A R 32 3. 3 V S X D P _D B R _ R

V D D P W R GO OD _ R

V8 S M_ D R A MP W R O K

B uf fe re d re se t t o CP U
3 .3 VS 1 . 0 5V S _V T T B U F _ C P U _R S T # A R3 3

X DP _ DB R _ R

RE S E T # R 97 R3 9 1 0K _0 4 D 1 4 , 23 P L T _ R S T # G D R 40 M T N 7 0 02 Z H S 3 R 38 G 10 0 K _ 04 C6 0 68 P _ 5 0V _ 0 4 M T N 7 0 02 Z H S 3 R4 8 *7 5 0_ 1 % _0 4 3 4 H _ P R O C H OT # _E C R 34 G S 4 3 .2 _1 % _ 04U F _C P U _ R S T# B Q3 8 7 5_ 0 4

1 K _0 4

R 30 1

S 3 ci rc ui t: - DR AM _R ST # to m em or y s ho ul d be h ig h du ri ng S 3 1 .5V
R3 2 9 1K _0 4 R3 2 7 * 0_ 0 4

S a n d y B ri dg e _ rP GA _ R ev 0 p 6 1 H _ P R O C H OT # D Q6 C8 2 6 8 P _ 50 V _ 0 4 BS 8 ( VGS 1.5V ) S13 Q2 4 R J U 0 0 3 N 0 3 T1 0 6 S D S

R 51 1

Q 37 * 1. 5 K _ 1 % _0 4

M T N 7 00 2 Z H S 3 C P U D R A MR S T # R 3 31 S

R 32 8 G 1 00 K _ 0 4 1 .5V S _C P U 3 .3 V 3. 3 V R1 3 2 P M _ D R A M_ P W R G D R1 0 7 P M _D R A M _ P W R G D R1 1 5 G *1 0 0K _0 4 3 9, 41 + 1 . 5S _ C P U _ P W R GD D R1 0 3 G S *1 0 0K _0 4 * MT N 7 0 02 Z H S 3 Q8 G 2 5 , 3 9, 4 0 , 4 1,4 2 S U S B S *M TN 70 0 2 Z H S 3 S * MT N 7 0 02 Z H S 3 G * MT N 70 0 2Z H S 3 D S Q1 3 D Q 10 *3 9 _0 4 *2 0 0_ 0 4 D D R A MP W R G D _ C P U Q 11 R 12 8 R 11 8 * 10 K _ 0 4 21 P M _D R A M _ P W R G D 0 _0 4 20 0 _ 04 R1 2 7 13 0 _ 04 V D D P W R G OO D _ R *4 7 n_ 5 0 V _0 4 R 11 7 C4 9 4 4 .9 9 K _1 % _ 0 4

1K _ 0 4 D D R 3 _D R A M R S T # 1 0,1 1 ,1 2, 1 3

D RA M RS T _ CNT R L 9 ,2 0

3 .3 VS 2 ,10 , 1 1 , 1 2, 1 3 , 1 4,1 5 ,1 6, 1 7 , 1 8, 19 ,2 0 ,21 , 2 3 , 24 , 2 5 , 26 ,2 9 ,3 0, 3 2 , 3 3,3 4 ,3 5, 3 6 , 3 9 , 40 , 4 3 3 . 3V 2 ,3,9 ,1 4 ,1 5, 1 9 , 2 0, 2 1 , 2 3, 24 ,2 5 ,26 , 2 8 , 29 ,3 0 ,35 , 3 6 , 3 7, 3 9 , 4 0,4 1 ,4 2 1 . 5V 9 ,10 , 1 1 , 1 2, 1 3 , 2 6,3 0 ,3 7, 3 9 , 4 1 1 . 5V S _C P U 7 ,3 9 1 . 05 V S _ V T T 2 , 3, 6 , 2 4 , 2 5,2 6 ,4 0, 4 3

Processor 2/7 B - 5

Schematic Diagrams

Processor 3/7
Sandy Bridge Processor 3/7 ( DDR3 )
U 32C U32 D

10,11 M _DQ 63 0 _A [ : ] M _DQ _A 0 M _DQ _A 1 M _DQ _A 2 M _DQ _A 3 M _DQ _A 4 M _DQ _A 5 M _DQ _A 6 M _DQ _A 7 M _DQ _A 8 M _DQ _A 9 M _DQ _A 10 M _DQ _A 11 M _DQ _A 12 M _DQ _A 13 M _DQ _A 14 M _DQ _A 15 M _DQ _A 16 M _DQ _A 17 M _DQ _A 18 M _DQ _A 19 M _DQ _A 20 M _DQ _A 21 M _DQ _A 22 M _DQ _A 23 M _DQ _A 24 M _DQ _A 25 M _DQ _A 26 M _DQ _A 27 M _DQ _A 28 M _DQ _A 29 M _DQ _A 30 M _DQ _A 31 M _DQ _A 32 M _DQ _A 33 M _DQ _A 34 M _DQ _A 35 M _DQ _A 36 M _DQ _A 37 M _DQ _A 38 M _DQ _A 39 M _DQ _A 40 M _DQ _A 41 M _DQ _A 42 M _DQ _A 43 M _DQ _A 44 M _DQ _A 45 M _DQ _A 46 M _DQ _A 47 M _DQ _A 48 M _DQ _A 49 M _DQ _A 50 M _DQ _A 51 M _DQ _A 52 M _DQ _A 53 M _DQ _A 54 M _DQ _A 55 M _DQ _A 56 M _DQ _A 57 M _DQ _A 58 M _DQ _A 59 M _DQ _A 60 M _DQ _A 61 M _DQ _A 62 M _DQ _A 63 C5 D5 D3 D2 D6 C6 C2 C3 F 10 F 8 G 10 G9 F 9 F 7 G8 G7 K 4 K 5 K 1 J1 J5 J4 J2 K 2 M 8 N 10 N8 N7 M 10 M 9 N9 M 7 A G6 A G5 A6 K A5 K A H5 A H6 A J5 A J6 A J8 A8 K A J9 A9 K A H8 A H9 A L9 A L8 A 11 P AN 11 A L12 AM 12 AM 11 A L11 A 12 P AN 12 A J14 AH 14 A L15 A 15 K A L14 A 14 K A J15 AH 15 S _DQ 0 A [ ] S _DQ 1 A [ ] S _DQ 2 A [ ] S _DQ 3 A [ ] S _DQ 4 A [ ] S _DQ 5 A [ ] S _DQ 6 A [ ] S _DQ 7 A [ ] S _DQ 8 A [ ] S _DQ 9 A [ ] S _DQ 1 A [ 0] S _DQ 1 A [ 1] S _DQ 1 A [ 2] S _DQ 1 A [ 3] S _DQ 1 A [ 4] S _DQ 1 A [ 5] S _DQ 1 A [ 6] S _DQ 1 A [ 7] S _DQ 1 A [ 8] S _DQ 1 A [ 9] S _DQ 2 A [ 0] S _DQ 2 A [ 1] S _DQ 2 A [ 2] S _DQ 2 A [ 3] S _DQ 2 A [ 4] S _DQ 2 A [ 5] S _DQ 2 A [ 6] S _DQ 2 A [ 7] S _DQ 2 A [ 8] S _DQ 2 A [ 9] S _DQ 3 A [ 0] S _DQ 3 A [ 1] S _DQ 3 A [ 2] S _DQ 3 A [ 3] S _DQ 3 A [ 4] S _DQ 3 A [ 5] S _DQ 3 A [ 6] S _DQ 3 A [ 7] S _DQ 3 A [ 8] S _DQ 3 A [ 9] S _DQ 4 A [ 0] S _DQ 4 A [ 1] S _DQ 4 A [ 2] S _DQ 4 A [ 3] S _DQ 4 A [ 4] S _DQ 4 A [ 5] S _DQ 4 A [ 6] S _DQ 4 A [ 7] S _DQ 4 A [ 8] S _DQ 4 A [ 9] S _DQ 5 A [ 0] S _DQ 5 A [ 1] S _DQ 5 A [ 2] S _DQ 5 A [ 3] S _DQ 5 A [ 4] S _DQ 5 A [ 5] S _DQ 5 A [ 6] S _DQ 5 A [ 7] S _DQ 5 A [ 8] S _DQ 5 A [ 9] S _DQ 6 A [ 0] S _DQ 6 A [ 1] S _DQ 6 A [ 2] S _DQ 6 A [ 3]

S _CLK A [0] S _CLK A #[0] SA KE _C [0]

A6 B A6 A V 9

M _CL _A K_D DR0 10 M _CL _A K_D DR# 10 0 M _CK 0 10 _A E

12,13 M DQ[63:0] _B_ M _DQ0 _B M _DQ1 _B M _DQ2 _B M _DQ3 _B M _DQ4 _B M _DQ5 _B M _DQ6 _B M _DQ7 _B M _DQ8 _B M _DQ9 _B M _DQ10 _B M _DQ11 _B M _DQ12 _B M _DQ13 _B M _DQ14 _B M _DQ15 _B M _DQ16 _B M _DQ17 _B M _DQ18 _B M _DQ19 _B M _DQ20 _B M _DQ21 _B M _DQ22 _B M _DQ23 _B M _DQ24 _B M _DQ25 _B M _DQ26 _B M _DQ27 _B M _DQ28 _B M _DQ29 _B M _DQ30 _B M _DQ31 _B M _DQ32 _B M _DQ33 _B M _DQ34 _B M _DQ35 _B M _DQ36 _B M _DQ37 _B M _DQ38 _B M _DQ39 _B M _DQ40 _B M _DQ41 _B M _DQ42 _B M _DQ43 _B M _DQ44 _B M _DQ45 _B M _DQ46 _B M _DQ47 _B M _DQ48 _B M _DQ49 _B M _DQ50 _B M _DQ51 _B M _DQ52 _B M _DQ53 _B M _DQ54 _B M _DQ55 _B M _DQ56 _B M _DQ57 _B M _DQ58 _B M _DQ59 _B M _DQ60 _B M _DQ61 _B M _DQ62 _B M _DQ63 _B C 9 A 7 D1 0 C 8 A 9 A 8 D 9 D 8 G 4 F 4 F 1 G 1 G 5 F 5 F 2 G 2 J 7 J 8 K1 0 K 9 J 9 J1 0 K 8 K 7 M 5 N 4 N 2 N 1 M 4 N 5 M 2 M 1 AM 5 AM 6 AR 3 A3 P AN 3 AN 2 AN 1 A2 P A5 P AN 9 AT 5 AT 6 A6 P AN 8 AR 6 AR 5 AR 9 AJ1 1 AT 8 AT 9 A 1 H1 AR 8 AJ1 2 A 2 H1 AT 1 1 A 4 N1 A 4 R1 AT 4 1 AT 2 1 A 5 N1 A 5 R1 AT 5 1 S _DQ[0] B S _DQ[1] B S _DQ[2] B S _DQ[3] B S _DQ[4] B S _DQ[5] B S _DQ[6] B S _DQ[7] B S _DQ[8] B S _DQ[9] B S _DQ[10] B S _DQ[11] B S _DQ[12] B S _DQ[13] B S _DQ[14] B S _DQ[15] B S _DQ[16] B S _DQ[17] B S _DQ[18] B S _DQ[19] B S _DQ[20] B S _DQ[21] B S _DQ[22] B S _DQ[23] B S _DQ[24] B S _DQ[25] B S _DQ[26] B S _DQ[27] B S _DQ[28] B S _DQ[29] B S _DQ[30] B S _DQ[31] B S _DQ[32] B S _DQ[33] B S _DQ[34] B S _DQ[35] B S _DQ[36] B S _DQ[37] B S _DQ[38] B S _DQ[39] B S _DQ[40] B S _DQ[41] B S _DQ[42] B S _DQ[43] B S _DQ[44] B S _DQ[45] B S _DQ[46] B S _DQ[47] B S _DQ[48] B S _DQ[49] B S _DQ[50] B S _DQ[51] B S _DQ[52] B S _DQ[53] B S _DQ[54] B S _DQ[55] B S _DQ[56] B S _DQ[57] B S _DQ[58] B S _DQ[59] B S _DQ[60] B S _DQ[61] B S _DQ[62] B S _DQ[63] B

S _CLK B [0] S CLK B_ #[0] S _CK [0] B E

A2 E A D2 R9

M _CLK _B _DD R0 13 M _CLK _B _DD R#0 13 M _CK 0 1 _B E 3

B.Schematic Diagrams

S _CLK A [1] S _CLK A #[1] SA KE _C [1]

A5 A A5 B V 10

M _CL _A K_D DR1 10 M _CL _A K_D DR# 10 1 M _CK 1 10 _A E

S _CLK B [1] S CLK B_ #[1] S _CK [1] B E

A1 E A D1 R1 0

M _CLK _B _DD R1 13 M _CLK _B _DD R#1 13 M _CK 1 1 _B E 3

S _CLK A [2] S _CLK A #[2] SA KE _C [2]

A4 B A4 A W 9

M _CL _A K_D DR2 11 M _CL _A K_D DR# 11 2 M _CK 2 11 _A E

S _CLK B [2] S CLK B_ #[2] S _CK [2] B E

A2 B A2 A T 9

M _CLK _B _DD R2 12 M _CLK _B _DD R#2 12 M _CK 2 1 _B E 2

Sheet 5 of 57 Processor 3/7

S _CLK A [3] S _CLK A #[3] SA KE _C [3]

A3 B A3 A W 10

M _CL _A K_D DR3 11 M _CL _A K_D DR# 11 3 M _CK 3 11 _A E

S _CLK B [3] S CLK B_ #[3] S _CK [3] B E

A1 A A1 B T 10

M _CLK _B _DD R3 12 M _CLK _B _DD R#3 12 M _CK 3 1 _B E 2

S _CS A #[0] S _CS A #[1] S _CS A #[2] S _CS A #[3]

A3 K A L3 A G1 A H1

M _CS _A #0 10 M _CS _A #1 10 M _CS _A #2 11 M _CS _A #3 11

S _CS B #[0] S _CS B #[1] S _CS B #[2] S _CS B #[3]

A D3 A3 E A D6 A6 E

M _CS _B #0 13 M _CS _B #1 13 M _CS _B #2 12 M _CS _B #3 12

DDR SYSTEM MEMORY A

S DQS A_ #[0] S DQS A_ #[1] S DQS A_ #[2] S DQS A_ #[3] S DQS A_ #[4] S DQS A_ #[5] S DQS A_ #[6] S DQS A_ #[7]

C 4 G 6 J3 M 6 A L6 A 8 M A 2 R1 A 1 M5

M DQS _A_ #0 M DQS _A_ #1 M DQS _A_ #2 M DQS _A_ #3 M DQS _A_ #4 M DQS _A_ #5 M DQS _A_ #6 M DQS _A_ #7

M _D #[7:0] 10,11 _A QS

DDR SYSTEM MEMORY B

SA DT _O [0] SA DT _O [1] SA DT _O [2] SA DT _O [3]

A H3 A G3 A G2 A H2

M _OD 0 _A T M _OD 1 _A T M _OD 2 _A T M _OD 3 _A T

10 10 11 11

S _OD [0] B T S _OD [1] B T S _OD [2] B T S _OD [3] B T

A4 E A D4 A D5 A5 E

M _OD 0 _B T M _OD 1 _B T M _OD 2 _B T M _OD 3 _B T

1 3 1 3 1 2 1 2

SB QS _D #[0] SB QS _D #[1] SB QS _D #[2] SB QS _D #[3] SB QS _D #[4] SB QS _D #[5] SB QS _D #[6] SB QS _D #[7]

D7 F 3 K 6 N3 A N5 A9 P A 12 K A 15 P

M _D #0 _B QS M _D #1 _B QS M _D #2 _B QS M _D #3 _B QS M _D #4 _B QS M _D #5 _B QS M _D #6 _B QS M _D #7 _B QS

M _DQ _B S#[7:0] 12,13

S _DQS A [0] S _DQS A [1] S _DQS A [2] S _DQS A [3] S _DQS A [4] S _DQS A [5] S _DQS A [6] S _DQS A [7]

D 4 F 6 K 3 N 6 A L5 A 9 M A 1 R1 A 1 M4

M DQS _A_ 0 M DQS _A_ 1 M DQS _A_ 2 M DQS _A_ 3 M DQS _A_ 4 M DQS _A_ 5 M DQS _A_ 6 M DQS _A_ 7

M _D [ 7 0 10,11 _A QS : ]

S B_D [0] QS S B_D [1] QS S B_D [2] QS S B_D [3] QS S B_D [4] QS S B_D [5] QS S B_D [6] QS S B_D [7] QS

C7 G3 J6 M 3 A N6 A8 P A 11 K A 14 P

M _D 0 _B QS M _D 1 _B QS M _D 2 _B QS M _D 3 _B QS M _D 4 _B QS M _D 5 _B QS M _D 6 _B QS M _D 7 _B QS

M _DQ _B S[7:0] 12,13

10,11 M _B _A S0 10,11 M _B _A S1 10,11 M _B _A S2

A 10 E A 10 F V 6

S _B A S[0] S _B A S[1] S _B A S[2]

10,11 M _CA # _A S 10,11 M _RA # _A S 10,11 M _W _A E#

A8 E A D9 A9 F

S _CA # A S S _RA # A S S _W A E#

S _M [0] A A S _M [1] A A S _M [2] A A S _M [3] A A S _M [4] A A S _M [5] A A S _M [6] A A S _M [7] A A S _M [8] A A S _M [9] A A S _M [10] A A S _M [11] A A S _M [12] A A S _M [13] A A S _M [14] A A S _M [15] A A

A 0 D1 W 1 W 2 W 7 V 3 V 2 W 3 W 6 V 1 W 5 A D8 V 4 W 4 A8 F V 5 V 7

M A0 _A_ M A1 _A_ M A2 _A_ M A3 _A_ M A4 _A_ M A5 _A_ M A6 _A_ M A7 _A_ M A8 _A_ M A9 _A_ M A10 _A_ M A11 _A_ M A12 _A_ M A13 _A_ M A14 _A_ M A15 _A_

M _A _A [15:0] 1 0,11

12,13 M _B _B S0 12,13 M _B _B S1 12,13 M _B _B S2

A9 A A7 A R 6

S _BS B [0] S _BS B [1] S _BS B [2]

12,13 M _CA # _B S 12,13 M _RA # _B S 12,13 M _W _B E#

A 0 A1 A8 B A9 B

S _CA B S# S _RA B S# S _WE B #

S _M [0] B A S _M [1] B A S _M [2] B A S _M [3] B A S _M [4] B A S _M [5] B A S _M [6] B A S _M [7] B A S _M [8] B A S _M [9] B A S _M [10] B A S _M [11] B A S _M [12] B A S _M [13] B A S _M [14] B A S _M [15] B A

A8 A T 7 R7 T 6 T 2 T 4 T 3 R2 T 5 R3 A7 B R1 T 1 A 10 B R5 R4

M _B _B 0 M _B _B 1 M _B _B 2 M _B _B 3 M _B _B 4 M _B _B 5 M _B _B 6 M _B _B 7 M _B _B 8 M _B _B 9 M _B _B 10 M _B _B 11 M _B _B 12 M _B _B 13 M _B _B 14 M _B _B 15

M _B 1 _B [ 5:0] 12,13

Sand B y ridge_rP _Re 0p6 GA v 1

S andy B dge_rP _Rev0p61 ri GA

B - 6 Processor 3/7

Schematic Diagrams

Processor 4/7
San dy B ri dg e Pro ce ss or 4 /7 ( PO WE R )
U 2F 3

POWER
P ROCES SOR UNCO RE PO WER
1.05 VS T _V T

PROC ESSO R CO RE PO WER


VC RE O

48A
AG 5 3 AG 4 3 AG 3 3 AG 2 3 AG 1 3 AG 0 3 AG 9 2 AG 8 2 AG 7 2 AG 6 2 A3 F 5 A3 F 4 A3 F 3 A3 F 2 A3 F 1 A3 F 0 A2 F 9 A2 F 8 A2 F 7 A2 F 6 AD 5 3 AD 4 3 AD 3 3 AD 2 3 AD 1 3 AD 0 3 AD 9 2 AD 8 2 AD 7 2 AD 6 2 AC 5 3 AC 4 3 AC 3 3 AC 2 3 AC 1 3 AC 0 3 AC 9 2 AC 8 2 AC 7 2 AC 6 2 A3 A5 A3 A4 A3 A3 A3 A2 A3 A1 A3 A0 A2 A9 A2 A8 A2 A7 A2 A6 Y5 3 Y4 3 Y3 3 Y2 3 Y1 3 Y0 3 Y9 2 Y8 2 Y7 2 Y6 2 V5 3 V4 3 V3 3 V2 3 V1 3 V0 3 V9 2 V8 2 V7 2 V6 2 U5 3 U4 3 U3 3 U2 3 U1 3 U0 3 U9 2 U8 2 U7 2 U6 2 R5 3 R4 3 R3 3 R2 3 R1 3 R0 3 R9 2 R8 2 R7 2 R6 2 P5 3 P4 3 P3 3 P2 3 P1 3 P0 3 P9 2 P8 2 P7 2 P6 2 V CC 1 V CC 2 V CC 3 V CC 4 V CC 5 V CC 6 V CC 7 V CC 8 V CC 9 V CC 0 1 V CC 1 1 V CC 2 1 V CC 3 1 V CC 4 1 V CC 5 1 V CC 6 1 V CC 7 1 V CC 8 1 V CC 9 1 V CC 0 2 V CC 1 2 V CC 2 2 V CC 3 2 V CC 4 2 V CC 5 2 V CC 6 2 V CC 7 2 V CC 8 2 V CC 9 2 V CC 0 3 V CC 1 3 V CC 2 3 V CC 3 3 V CC 4 3 V CC 5 3 V CC 6 3 V CC 7 3 V CC 8 3 V CC 9 3 V CC 0 4 V CC 1 4 V CC 2 4 V CC 3 4 V CC 4 4 V CC 5 4 V CC 6 4 V CC 7 4 V CC 8 4 V CC 9 4 V CC 0 5 V CC 1 5 V CC 2 5 V CC 3 5 V CC 4 5 V CC 5 5 V CC 6 5 V CC 7 5 V CC 8 5 V CC 9 5 V CC 0 6 V CC 1 6 V CC 2 6 V CC 3 6 V CC 4 6 V CC 5 6 V CC 6 6 V CC 7 6 V CC 8 6 V CC 9 6 V CC 0 7 V CC 1 7 V CC 2 7 V CC 3 7 V CC 4 7 V CC 5 7 V CC 6 7 V CC 7 7 V CC 8 7 V CC 9 7 V CC 0 8 V CC 1 8 V CC 2 8 V CC 3 8 V CC 4 8 V CC 5 8 V CC 6 8 V CC 7 8 V CC 8 8 V CC 9 8 V CC 0 9 V CC 1 9 V CC 2 9 V CC 3 9 V CC 4 9 V CC 5 9 V CC 6 9 V CC 7 9 V CC 8 9 V CC 9 9 V CC 00 1 VC CIO 1 VC CIO 2 VC CIO 3 VC CIO 4 VC CIO 5 VC CIO 6 VC CIO 7 VC CIO 8 VC CIO 9 VC CIO 0 1 VC CIO 1 1 VC CIO 2 1 VC CIO 3 1 VC CIO 4 1 VC CIO 5 1 VC CIO 6 1 VC CIO 7 1 VC CIO 8 1 VC CIO 9 1 VC CIO 0 2 VC CIO 1 2 VC CIO 2 2 VC CIO 3 2 VC CIO 4 2 VC CIO 5 2 VC CIO 6 2 VC CIO 7 2 VC CIO 8 2 VC CIO 9 2 VC CIO 0 3 VC CIO 1 3 VC CIO 2 3 VC CIO 3 3 VC CIO 4 3 VC CIO 5 3 VC CIO 6 3 VC CIO 7 3 VC CIO 8 3 VC CIO 9 3 VC CIO 0 4 AH 3 1 AH 0 1 AG 0 1 AC 0 1 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G 14 G 13 G 12 F14 F13 F12 F11 E14 E12 E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 J23

8. 5A
C1 93 2 2u_ 6.3V 5 _X R_0 8 C1 75 2 2u_ . 3V 5 _ 6 _X R 08 C188 22u .3 _X _6 V 5R_ 08 C 2 19 22u 6. 3 _ V_X _08 5R C1 86

1 5V .0 S_V T T

ICCMAX Maximum Processor


VC RE O

SV 48

C1 0 8 + * 0u 33 _6.3V _D

22 6.3V X R_08 u_ _ 5

C 6 13 2u 6 V_ R 0 2 _ .3 X5 _ 8

C47 2 2 u 6 VXR 0 2 _ .3 _ 5 _ 8

C1 67 *2 u 63 _ 5 _ 8 2 _. V X R 0

C 6 47 2 u6 V_ 5 _8 2_ .3 X R 0

C14 4 2 u 6 VXR 0 2 _ .3 _ 5 _ 8

C1 89 2 2u_ 6.3V 5 _X R_0 8

C1 91 2 2u_ . 3V 5 _ 6 _X R 08

C187 22u .3 _X _6 V 5R_ 08

C 3 49 22u 6. 3 _ V_X _08 5R

C4 91 + 22 6.3V X R_08 u_ _ 5

C1 1 8 * 0u 33 _6.3V _D

B.Schematic Diagrams

C4 92 2 2u_ 6.3V 5 _X R_0 8

C4 90 2 2u_ . 3V 5 _ 6 _X R 08

C168 22u .3 _X _6 V 5R_ 08

C 5 18 22u 6. 3 _ V_X _08 5R

C 4 48 * 2 _ .3 _ 5 _ 8 2 u 6 VXR 0

C13 5 2 u 6 VXR 0 2 _ .3 _ 5 _ 8

C4 78 *2 u 63 _ 5 _ 8 2 _. V X R 0

C 3 47 2 u6 V_ 5 _ 8 2 _ .3 X R 0

C47 1 2 u 6 VXR 0 2 _ .3 _ 5 _ 8

PEG AND DDR

C2 08 2 2u_ 6.3V 5 _X R_0 8

C4 88 2 2u_ . 3V 5 _ 6 _X R 08

C169 22u .3 _X _6 V 5R_ 08

C 0 19 22u 6. 3 _ V_X _08 5R

C1 76 22 6.3V X R_08 u_ _ 5

Sheet 6 of 57 Processor 4/7

C4 87 2 2u_ . 3V 5 _ 6 _X R 08

C198 22u .3 _X _6 V 5R_ 08

C 9 48 22u 6. 3 _ V_X _08 5R

C4 81 22 6.3V X R_08 u_ _ 5

C 9 47 2u 6 V_ R 0 2 _ .3 X5 _ 8

C16 5 2 u 6 VXR 0 2 _ .3 _ 5 _ 8

C4 83 *2 u 63 _ 5 _ 8 2 _. V X R 0

C 5 14 * 2 _ .3 _ 5 _ 8 2 u 6 VXR 0

C13 4 2 u 6 VXR 0 2 _ .3 _ 5 _ 8

+ 1 V .05S _VC _F R8 CP 8

* 0m sh t 1 il_ or

1 5V VT .0 S_ T

VC RE O

CORE SUPPLY

SVID Signals
1 5V _VT .0 S T

C 1 15 * 0 _ .3 _ 5 _ 6 1 u 6 VXR 0

C47 5 * 0 _ .3 _ R 0 1 u 6 V X5 _ 6

C4 70 1 u 6 V X5 _ 8 0 _ .3 _ R 0

C 4 47 1 u 6 V_ 5 _8 0_ .3 X R 0

C14 3 1 u 6 VXR 0 0 _ .3 _ 5 _ 8

SVID

VIDA E L RT # VID L SC K V IDS OUT

AJ2 9 AJ3 0 AJ2 8

H_ CP U_ V S IDA LRT #_R H_ CP U_ V S IDCL K H_ CP U_ V S IDDA _ T R

43 _1% .2 _04 0_ 04

R5 5 R5 4

H_ PU C _SV IDA LRT 4 # 3 H_ PU C _SV IDCL 43 K H_ PU C _SV IDDA 43 T

H_CP U_S IDDA _R V T

130 4 _0

R 53

V CO RE

C 6 14 1u 6 V_ R 0 0 _ .3 X5 _ 8

C48 2 * 0 _ .3 _ R 0 1 u 6 V X5 _ 6

C1 28 *1 u 6 3 _ 5 _ 6 0 _. V X R 0

C 6 16 1 u6 V_ 5 _8 0_ .3 X R 0

C16 4 1 u 6 VXR 0 0 _ .3 _ 5 _ 8

R 300 1 _04 00

VC RE CC_S NS O _V E E 43 VC ORE SS S _V _ EN SE 4 3 R 68 1 _04 00 1 0 . 5VS T _V T

SENSE LINES

V CC_ E S NS E V SS S NS _ E E

AJ3 5 AJ3 4

R32 6 10 _04

VC CIO_ E S NS E V SS IO_ E S NS E

B10 A10

V CC O SE I _ NS 4 E 0 V SIO_ NS S SE E 4 0 V CO E 43 4 R ,4 1.05V VT 2,3,4,24 S_ T ,25,26 ,40,43

R33 0 10 _04

S ndy Bri ge_ PG a d r A_R ev0p6 1

Processor 4/7 B - 7

Schematic Diagrams

Processor 5/7
Sandy Bridge Processor 5/7 ( GRAPHICS POWER )
1 .5V S_CPU U32G A T24 A T23 A T21 A T20 A T18 A T17 AR24 AR23 AR21 AR20 AR18 AR17 A P24 A P23 A P21 A P20 A P18 A P17 AN24 AN23 AN21 AN20 AN18 AN17 AM 24 AM 23 AM 21 AM 20 AM 18 AM 17 A 24 L A 23 L A 21 L A 20 L A 18 L A 17 L A K24 A K23 A K21 A K20 A K18 A K17 A 24 J A 23 J A 21 J A 20 J A 18 J A 17 J AH24 AH23 AH21 AH20 AH18 AH17

POWER
SENSE LINES
VA G_SE X NSE VS X SA G_SE NSE AK 5 3 AK 4 3

R177 V S _VRE _ M F

*0_04

R175 100_0 4

D 02
R 21 3 0_04

DDR3 -1.5V RAILS

GRAPHICS

Sheet 7 of 57 Processor 5/7

SA RAIL

V G1 AX V G2 AX V G3 AX V G4 AX V G5 AX V G6 AX V G7 AX V G8 AX V G9 AX V G10 AX V G11 AX V G12 AX V G13 AX V G14 AX V G15 AX V G16 AX V G17 AX V G18 AX V G19 AX V G20 AX V G21 AX V G22 AX V G23 AX V G24 AX V G25 AX V G26 AX V G27 AX V G28 AX V G29 AX V G30 AX V G31 AX V G32 AX V G33 AX V G34 AX V G35 AX V G36 AX V G37 AX V G38 AX V G39 AX V G40 AX V G41 AX V G42 AX V G43 AX V G44 AX V G45 AX V G46 AX V G47 AX V G48 AX V G49 AX V G50 AX V G51 AX V G52 AX V G53 AX V G54 AX

Q15 AO3402L S D

V _SM REF CN _V _ T C245 0.1u_ 10V _X5R_04 R178 100_0 4

VREF

B.Schematic Diagrams

R410 SM REF _V AL1 V_S _VRE M F

0_04 V_SM V _ REF _CNT P S_S3CNT RL_1.5S 39

CAD No te: + V_S M_V RE F s hou ld hav e 1 0 m il tr ace w idt h

1.5 V S_CP U V DDQ1 V DDQ2 V DDQ3 V DDQ4 V DDQ5 V DDQ6 V DDQ7 V DDQ8 V DDQ9 V DDQ10 V DDQ11 V DDQ12 V DDQ13 V DDQ14 V DDQ15 AF 7 AF 4 AF 1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

VDDQ 10A
C242 10u_6.3 V 5R_0 8 _X C241 10u_6.3V_X 5R_08 C2 40 1 0u_6.3V_X 5R_08
+

G C502 3 30u_6.3V_D C243 10u _6.3V_X 5R_08 C203 0. 1u_10V_X 5R_04 C210 0.1 u_10V X _ 5R_04 C206 0. 1u_10V_X 5R_04

C209 0. 1u_10V_X 5R_04

0.8 5V S V CCSA 1 V CCSA 2 V CCSA 3 V CCSA 4 V CCSA 5 V CCSA 6 V CCSA 7 V CCSA 8 M 27 M 26 L 26 J 26 J 25 J 24 H26 H25

VCCSA 6A

C139 10u_6.3 V 5R_0 8 _X

C469 10u_6.3V_X 5R_08

C1 38 1 0u_6.3V_X 5R_08

C126 *33 0u_6.3V_D

1. 8V S

VCC PLL 1.2A


+

C239 330u_6 .3V D _

C20 5

C 12 2 10u_6 .3V X _ 5R_08

C21 3 1u_6. 3V _Y5V_04

MISC

B6 A6 A2 1u_6. 3V _Y5 V _04

1.8V RAIL

V CCPLL1 V CCPLL2 V CCPLL3

V CCSA _SE NSE

H23

V CCSA _SE NSE 46 VCC SA_V ID0 46 VCC SA_V ID1 46 R 17 3 10K_04

F C_C22 V CCSA V _ ID1

C22 C24

R 10 3

*0 _04 R31 1

10K 04 _

S and y Bridge_r P GA_Rev0p 61

0.85VS 46 1.5VS C _ PU 4 ,39 1.8VS 16,25, 42 1.05VS_V T 2,3, 4,6,2 4,25,26 ,40,43 T 1.5V 4,9,1 0,11,1 2,13,2 6,30,37 ,39,41

B - 8 Processor 5/7

Schematic Diagrams

Processor 6/7
Sandy Bridge Processor 6/7 ( GND )
U 3 2H AT 3 5 AT 3 2 AT 2 9 AT 2 7 AT 2 5 AT 2 2 AT 1 9 AT 1 6 AT 1 3 AT 1 0 AT7 AT4 AT3 AR 2 5 AR 2 2 AR 1 9 AR 1 6 AR 1 3 AR 1 0 AR 7 AR 4 AR 2 AP3 4 AP3 1 AP2 8 AP2 5 AP2 2 AP1 9 AP1 6 AP1 3 AP1 0 A P7 A P4 A P1 AN 3 0 AN 2 7 AN 2 5 AN 2 2 AN 1 9 AN 1 6 AN 1 3 AN 1 0 AN 7 AN 4 AM 2 9 AM 2 5 AM 2 2 AM 1 9 AM 1 6 AM 1 3 AM 1 0 AM 7 AM 4 AM 3 AM 2 AM 1 AL 3 4 AL 3 1 AL 2 8 AL 2 5 AL 2 2 AL 1 9 AL 1 6 AL 1 3 AL 1 0 AL 7 AL 4 AL 2 AK3 3 AK3 0 AK2 7 AK2 5 AK2 2 AK1 9 AK1 6 AK1 3 AK1 0 A K7 A K4 AJ 2 5 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 V S S 81 V S S 82 V S S 83 V S S 84 V S S 85 V S S 86 V S S 87 V S S 88 V S S 89 V S S 90 V S S 91 V S S 92 V S S 93 V S S 94 V S S 95 V S S 96 V S S 97 V S S 98 V S S 99 V S S 1 00 V S S 1 01 V S S 1 02 V S S 1 03 V S S 1 04 V S S 1 05 V S S 1 06 V S S 1 07 V S S 1 08 V S S 1 09 V S S 1 10 V S S 1 11 V S S 1 12 V S S 1 13 V S S 1 14 V S S 1 15 V S S 1 16 V S S 1 17 V S S 1 18 V S S 1 19 V S S 1 20 V S S 1 21 V S S 1 22 V S S 1 23 V S S 1 24 V S S 1 25 V S S 1 26 V S S 1 27 V S S 1 28 V S S 1 29 V S S 1 30 V S S 1 31 V S S 1 32 V S S 1 33 V S S 1 34 V S S 1 35 V S S 1 36 V S S 1 37 V S S 1 38 V S S 1 39 V S S 1 40 V S S 1 41 V S S 1 42 V S S 1 43 V S S 1 44 V S S 1 45 V S S 1 46 V S S 1 47 V S S 1 48 V S S 1 49 V S S 1 50 V S S 1 51 V S S 1 52 V S S 1 53 V S S 1 54 V S S 1 55 V S S 1 56 V S S 1 57 V S S 1 58 V S S 1 59 V S S 1 60 A J 22 A J 19 A J 16 A J 13 A J 10 AJ 7 AJ 4 AJ 3 AJ 2 AJ 1 AH3 5 AH3 4 AH3 2 AH3 0 AH2 9 AH2 8 AH2 6 AH2 5 AH2 2 AH1 9 AH1 6 AH7 AH4 A G9 A G8 A G4 AF 6 AF 5 AF 3 AF 2 AE3 5 AE3 4 AE3 3 AE3 2 AE3 1 AE3 0 AE2 9 AE2 8 AE2 7 AE2 6 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB3 5 AB3 4 AB3 3 AB3 2 AB3 1 AB3 0 AB2 9 AB2 8 AB2 7 AB2 6 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2 U3 2 I T3 5 T3 4 T3 3 T3 2 T3 1 T3 0 T2 9 T2 8 T2 7 T2 6 P9 P8 P6 P5 P3 P2 N3 5 N3 4 N3 3 N3 2 N3 1 N3 0 N2 9 N2 8 N2 7 N2 6 M3 4 L3 3 L3 0 L2 7 L9 L8 L6 L5 L4 L3 L2 L1 K3 5 K3 2 K2 9 K2 6 J3 4 J3 1 H3 3 H3 0 H2 7 H2 4 H2 1 H1 8 H1 5 H1 3 H1 0 H9 H8 H7 H6 H5 H4 H3 H2 H1 G3 5 G3 2 G2 9 G2 6 G2 3 G2 0 G1 7 G1 1 F3 4 F3 1 F2 9 V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V SS1 6 1 SS1 6 2 SS1 6 3 SS1 6 4 SS1 6 5 SS1 6 6 SS1 6 7 SS1 6 8 SS1 6 9 SS1 7 0 SS1 7 1 SS1 7 2 SS1 7 3 SS1 7 4 SS1 7 5 SS1 7 6 SS1 7 7 SS1 7 8 SS1 7 9 SS1 8 0 SS1 8 1 SS1 8 2 SS1 8 3 SS1 8 4 SS1 8 5 SS1 8 6 SS1 8 7 SS1 8 8 SS1 8 9 SS1 9 0 SS1 9 1 SS1 9 2 SS1 9 3 SS1 9 4 SS1 9 5 SS1 9 6 SS1 9 7 SS1 9 8 SS1 9 9 SS2 0 0 SS2 0 1 SS2 0 2 SS2 0 3 SS2 0 4 SS2 0 5 SS2 0 6 SS2 0 7 SS2 0 8 SS2 0 9 SS2 1 0 SS2 1 1 SS2 1 2 SS2 1 3 SS2 1 4 SS2 1 5 SS2 1 6 SS2 1 7 SS2 1 8 SS2 1 9 SS2 2 0 SS2 2 1 SS2 2 2 SS2 2 3 SS2 2 4 SS2 2 5 SS2 2 6 SS2 2 7 SS2 2 8 SS2 2 9 SS2 3 0 SS2 3 1 SS2 3 2 SS2 3 3 VSS2 3 4 VSS2 3 5 VSS2 3 6 VSS2 3 7 VSS2 3 8 VSS2 3 9 VSS2 4 0 VSS2 4 1 VSS2 4 2 VSS2 4 3 VSS2 4 4 VSS2 4 5 VSS2 4 6 VSS2 4 7 VSS2 4 8 VSS2 4 9 VSS2 5 0 VSS2 5 1 VSS2 5 2 VSS2 5 3 VSS2 5 4 VSS2 5 5 VSS2 5 6 VSS2 5 7 VSS2 5 8 VSS2 5 9 VSS2 6 0 VSS2 6 1 VSS2 6 2 VSS2 6 3 VSS2 6 4 VSS2 6 5 VSS2 6 6 VSS2 6 7 VSS2 6 8 VSS2 6 9 VSS2 7 0 VSS2 7 1 VSS2 7 2 VSS2 7 3 VSS2 7 4 VSS2 7 5 VSS2 7 6 VSS2 7 7 VSS2 7 8 VSS2 7 9 VSS2 8 0 VSS2 8 1 VSS2 8 2 VSS2 8 3 VSS2 8 4 VSS2 8 5 F2 2 F1 9 E3 0 E2 7 E2 4 E2 1 E1 8 E1 5 E1 3 E1 0 E9 E8 E7 E6 E5 E4 E3 E2 E1 D 35 D 32 D 29 D 26 D 20 D 17 C 34 C 31 C 28 C 27 C 25 C 23 C 10 C 1 B2 2 B1 9 B1 7 B1 5 B1 3 B1 1 B9 B8 B7 B5 B3 B2 A3 5 A3 2 A2 9 A2 6 A2 3 A2 0 A3

B.Schematic Diagrams

Sheet 8 of 57 Processor 6/7

VSS

VSS

S a n d y B ri d g e _rP GA _ R e v 0 p6 1

S a nd y B ri dg e _ rP G A _ Re v 0 p 6 1 2 5, 3 9 1 .5 VS

2 , 4 , 1 0, 11 , 1 2 , 1 3 , 1 4, 15 , 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 2 1 , 2 3, 2 4 , 2 5 , 2 6 , 29 , 3 0 , 3 2 , 3 3 , 34 , 3 5 , 3 6 , 3 9, 40 , 4 3 3 . 3 V S

Processor 6/7 B - 9

Schematic Diagrams

Processor 7/7
Sandy Bridge Processor 7/7 ( RESERVED )
CFG Straps for Processor
PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

1:(Default) Normal Operation; Lane # definition matches socket pin map definition 0:Lane Reversed
C F G2 A K 28 A K 29 A L 26 A L 27 A K 26 A L 29 A L 30 A M 31 A M 32 A M 30 A M 28 A M 26 A N 28 A N 31 A N 26 A M 27 A K 31 A N 29

U3 2 E L7 A G7 A E7 A K2 W 8

CF G 2

R 83

*1 K _ 0 4 C C C C F G4 F G5 F G6 F G7

B.Schematic Diagrams

Display Port Presence Strap 1:(Default) Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG4

Sheet 9 of 57 Processor 7/7

CF G 4

R 81

*1 K _ 0 4

C C C C C C C C C C C C C C C C C C

FG FG FG FG FG FG FG FG FG FG FG FG FG FG FG FG FG FG

[0 ] [1 ] [2 ] [3 ] [4 ] [5 ] [6 ] [7 ] [8 ] [9 ] [ 1 0] [ 1 1] [ 1 2] [ 1 3] [ 1 4] [ 1 5] [ 1 6] [ 1 7]

R R R R R

SVD SVD SVD SVD SVD

28 29 30 31 32

R S V D 33 R S V D 34 R S V D 35

A T2 6 A M3 3 A J2 7

R S V D 37 R S V D 38 R S V D 39 R S V D 40

T8 J16 H 16 G 16

3 .3 V

PCIE Port Bifurcation Straps


R3 1 2 1 00 K _ 0 4

RESERVED

CFG[6:5]

11: 10: 01: 00:

(Default) x16 - Device 1 functions 1 and 2 disabled x8, x8 - Devi ce 1 function 1 enabled ; function 2 disabled Reserved - (D evice 1 function 1 disabled ; function 2 enabled) x8,x4,x4 - De vice 1 functions 1 and 2 enabled
H_ C P U_ R S V D 6 H_ C P U_ R S V D 7

A J 31 A H 31 A J 33 A H 33

R SVD 1 R SVD 2 R SVD 3 R SVD 4

R R R R R

SVD SVD SVD SVD SVD

41 42 43 44 45

A A A A A

R3 5 T3 4 T3 3 P3 5 R3 4

A J 26 R SVD 5 B A A B C 34 33 34 35 35

B4 D1

R SVD 6 R SVD 7

H _S N B _ I V B #_ P W R C T R L CF G 5 R 77 *1 K _ 0 4 F F F D G G E D C A B B D B A C 25 24 23 24 25 24 23 23 30 31 30 29 30 31 30 29 R R R R R R R R R R R R R R R R SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD SVD 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

R R R R R

SVD SVD SVD SVD SVD

46 47 48 49 50

R S V D 51 R S V D 52

A J3 2 A K3 2

CF G 6

R 74

*1 K _ 0 4

A H2 7 R S V D 53

PEG DEFER TRAINING 1: (Default) PEG Train immediately following xxRESETB de assertion 0: PEG Wait for BIOS for training

CFG7
CF G 7

R S V D 54 R S V D 55

A N3 5 A M3 5

R 73

*1 K _ 0 4 H_ S N B _ IV B # _ P W R CT R L R3 1 3 0_ 0 4

J 20 B 18 A 19 J 15

R SVD 2 4 R SVD 2 5 R SVD 2 6

R S V D 56 R S V D 57 R S V D 58

A T2 A T1 A R1

1 . 5V

R3 5 3

* 0_ 0 4 R3 6 2

On CRB H_SNB_IVB#_PWRCTRL = low, 1.0V H_SNB_IVB#_PWRCTRL = high/NC, 1.05V


R 352 R 360 0 _0 4 *0 _ 0 4 M V R E F _D Q _D I MM A 1 0 , 1 1 M V R E F _C A _ D I MM A 1 0

R SVD 2 7 B 1 KE Y

H_ C P U_ R S V D 6

Q 25 * A O3 4 0 2 L S D

1K _1 % _ 0 4

S a nd y B ri dg e _ rP G A _ R e v 0 p 61

R3 3 9 *1 K _ 0 4

R3 3 2 1K _1 % _ 0 4 DR A M RS T _ C NT RL 4 ,2 0

1 .5 V

R 375

*0 _ 0 4 R 36 9 3 .3 V 1 .5 V R 3 80 R 3 74 0_ 0 4 *0 _ 0 4 2 , 3 , 4, 14 , 1 5 , 1 9 , 20 , 2 1 , 2 3 , 2 4, 2 5 , 2 6 , 2 8 , 29 , 3 0 , 3 5 , 3 6, 3 7 , 3 9 , 4 0, 41 , 4 2 4 , 1 0, 1 1 , 1 2 , 1 3, 26 , 3 0 , 3 7 , 3 9, 4 1

H _ CP U _ RS V D 7

Q 26 *A O3 4 0 2L S D

1 K _ 1 % _0 4 M V R E F _ D Q _ D I M MB 1 2, 13

R 3 70 * 1 K _ 04

R 38 2 1 K _ 1 % _0 4 DR A M RS T _ CN T RL 4 , 2 0

M V R E F _ C A _D I M MB 1 2

B - 10 Processor 7/7

Schematic Diagrams

DDRIII CHA SO-DIMM_0


Channel A SO-DIMM 0
CHANGE TO STANDARD
5, 1 1 M _ A _ A [ 1 5 : 0 ] JD I M M3 A M_ A _ A 0 M_ A _ A 1 M_ A _ A 2 M_ A _ A 3 M_ A _ A 4 M_ A _ A 5 M_ A _ A 6 M_ A _ A 7 M_ A _ A 8 M_ A _ A 9 M_ A _ A 1 0 M_ A _ A 1 1 M_ A _ A 1 2 M_ A _ A 1 3 M_ A _ A 1 4 M_ A _ A 1 5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A A A A A A A A A A A A A A A A 0 1 2 3 4 5 6 7 8 9 10 / A P 11 12 / B C # 13 14 15 DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 D Q1 0 D Q1 1 D Q1 2 D Q1 3 D Q1 4 D Q1 5 D Q1 6 D Q1 7 D Q1 8 D Q1 9 D Q2 0 D Q2 1 D Q2 2 D Q2 3 D Q2 4 D Q2 5 D Q2 6 D Q2 7 D Q2 8 D Q2 9 D Q3 0 D Q3 1 D Q3 2 D Q3 3 D Q3 4 D Q3 5 D Q3 6 D Q3 7 D Q3 8 D Q3 9 D Q4 0 D Q4 1 D Q4 2 D Q4 3 D Q4 4 D Q4 5 D Q4 6 D Q4 7 D Q4 8 D Q4 9 D Q5 0 D Q5 1 D Q5 2 D Q5 3 D Q5 4 D Q5 5 D Q5 6 D Q5 7 D Q5 8 D Q5 9 D Q6 0 D Q6 1 D Q6 2 D Q6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 0 Q1 1 Q1 2 Q1 3 Q1 4 Q1 5 Q1 6 Q1 7 Q1 8 Q1 9 Q2 0 Q2 1 Q2 2 Q2 3 Q2 4 Q2 5 Q2 6 Q2 7 Q2 8 Q2 9 Q3 0 Q3 1 Q3 2 Q3 3 Q3 4 Q3 5 Q3 6 Q3 7 Q3 8 Q3 9 Q4 0 Q4 1 Q4 2 Q4 3 Q4 4 Q4 5 Q4 6 Q4 7 Q4 8 Q4 9 Q5 0 Q5 1 Q5 2 Q5 3 Q5 4 Q5 5 Q5 6 Q5 7 Q5 8 Q5 9 Q6 0 Q6 1 Q6 2 Q6 3 M _ A _ D Q [ 6 3: 0] 5 , 11 J D I MM 3 B 1 .5 V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 199 VD D SPD 3 .3 V S R4 4 2 1 1 , 1 2 , 1 3 TS #_ D I MM 0 _ 1 4 ,1 1 ,1 2 ,1 3 DD R3 _ DR A M RS T # C 32 5 C 33 0 2 . 2 u _ 6 . 3V _Y 5 V _ 0 6 0 . 1 u _ 1 6V _Y 5 V _ 0 4 * 1 0K _0 4 77 122 125 198 30 N C1 N C2 N CT ES T E V E NT # R ESET # VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D D D D D D D D D D D D D D D D D D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

La yout Not e : signa l /spa c e /si gna l: 8/4/8

3 .3 VS

20mils
C 57 5 C 57 4 2 . 2 U _6 . 3 V _ Y 5 V _ 06 0 . 1 u _1 6 V _ Y 5V _ 04

B.Schematic Diagrams

5 , 1 1 M_ A _ B S 0 5 , 1 1 M_ A _ B S 1 5 , 1 1 M_ A _ B S 2 5 M_ A _ C S # 0 5 M_ A _ C S # 1 5 M _ A _ CL K _ D DR 0 5 M _ A _ CL K _ D DR # 0 5 M _ A _ CL K _ D DR 1 5 M _ A _ CL K _ D DR # 1 5 M_ A _ C K E 0 5 M_ A _ C K E 1 5 , 1 1 M_ A _ C A S # 5 , 1 1 M_ A _ R A S # 5 , 1 1 M_ A _ W E #

2 , 1 1 , 1 2 , 13 , 2 0 S M B _ C LK 2 , 1 1 , 1 2 , 13 , 2 0 S M B _ D A T A 5 5 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ O D T 0 M_ A _ O D T 1 M0 M1 M2 M3 M4 M5 M6 M7

109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 C H A _ S A 0 _ D I M0 C H A _ S A 1 _ D I M0 2 0 1 202 200 116 120 11 28 46 63 136 153 170 187 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

B A0 B A1 B A2 S 0# S 1# C K0 C K0 # C K1 C K1 # C KE0 C KE1 C AS# R AS# W E# S A0 S A1 S CL S DA O DT 0 O DT 1 D D D D D D D D D D D D D D D D D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 QS QS QS QS QS QS QS QS QS QS QS QS QS QS QS QS 0 1 2 3 4 5 6 7 0# 1# 2# 3# 4# 5# 6# 7#

20 mils

Sheet 10 of 57 DDRIII CHA SODIMM _0

9 , 1 1 M V R E F _ D Q _D I M MA

1 126

VR EF_ D Q VR EF_ C A

9 M V R E F _ C A _ D I MM A

R 4 41

*0 _ 0 4

M V R E F _ C A _ D I M MA _R C 57 2 2 . 2 u _ 6 . 3V _0 6 C 59 2 0 . 1 u _ 1 6V _Y 5 V _ 0 4

5, 11 M _ A _ D Q S [ 7 : 0 ]

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS

S1 S2 S3 S4 S5 S6 S7 S8 S9 S1 0 S1 1 S1 2 S1 3 S1 4 S1 5

V TT _ M E M 203 204 G ND 1 G ND 2

VTT1 VTT2 G 1 G 2

D D R S K - 20 4 0 1 -T R 5 B

3. 3V S 5 , 1 1 M_ A _ D QS # [ 7 : 0 ] R N4 1 0 K _ 8 P 4 R_ 0 4 1 8 C HA _ S A 2 7 C HA _ S A 3 6 C HA _ S A 4 5 C HA _ S A

1_ D 0_ D 1_ D 0_ D

I M1 I M1 I M0 I M0

C H A _ S A 1 _ D I M1 1 1 C H A _ S A 0 _ D I M1 1 1

CLO SE TO S O- DI M M

D D R S K -20 4 0 1 -T R 5 B

1 .5 V

R 4 43

1 K _ 1 %_ 0 4

M V R E F _ C A _D I M MA _ R

M V R E F _ C A _ D I MM A _ R

11

R 44 0 1 . 5V 1 K _ 1 % _0 4

C 594 0 . 1 u _ 1 0V _X 5 R _0 4

C 32 7 + 2 20 u _ 4 V _ V _ A

C 709 + * 2 20 u _ 4 V _ V _ A

C6 9 6

C 695

C 69 4

C5 7 7

C 5 78 1 u _ 6 . 3V _0 4

C5 7 9 1 u_ 6 . 3 V _ 0 4

C 580 1 u _ 6 . 3 V _ 04

C6 3 9 1 u _ 6 . 3 V _ 04

1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 0 u _1 0 V _ Y 5V _0 8 1 0 u _ 1 0V _Y 5 V _ 0 8 1u _ 6 . 3 V _ 0 4

1 .5 V

V T T _ ME M

1 1 , 1 2 , 1 3, 4 1 V TT _ M E M 4 , 9 , 1 1 , 1 2 , 1 3, 2 6 , 3 0 , 3 7 , 3 9, 4 1 1 . 5 V 2, 4, 1 1 , 1 2 , 1 3 , 1 4, 1 5 , 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 2 1 , 2 3, 2 4 , 2 5 , 2 6 , 2 9, 3 0 , 3 2 , 3 3 , 3 4, 3 5 , 3 6 , 3 9 , 4 0, 4 3 3 . 3 V S

C6 6 3

C 576

C6 6 7

C 638

C 66 6

C5 9 5

C 6 40

C6 6 4

C 665

C5 9 3

C 3 28

C3 2 4

C 3 23

C3 3 4

C 333

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 .1 u _ 1 6 V _ Y 5 V _ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5V _0 4

1 0 u _1 0 V _ Y 5V _ 08 1u _ 6 . 3 V _ Y 5 V _ 0 4 1 u_ 6 . 3 V _ Y 5 V _0 4

1 u_ 6 . 3 V _ Y 5V _0 41 u _ 6 . 3 V _ Y 5 V _ 0 4

DDRIII CHA SO-DIMM_0 B - 11

Schematic Diagrams

DDRIII CHA SO-DIMM_1

Channel A SO-DIMM 1
CHANGE TO STANDARD
5, 1 0 M _ A _ A [ 1 5 : 0 ] JD I M M1 A M_ A _ A 0 M_ A _ A 1 M_ A _ A 2 M_ A _ A 3 M_ A _ A 4 M_ A _ A 5 M_ A _ A 6 M_ A _ A 7 M_ A _ A 8 M_ A _ A 9 M_ A _ A 1 0 M_ A _ A 1 1 M_ A _ A 1 2 M_ A _ A 1 3 M_ A _ A 1 4 M_ A _ A 1 5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A A A A A A A A A A A A A A A A 0 1 2 3 4 5 6 7 8 9 10 / A P 11 12 / B C # 13 14 15 DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 D Q1 0 D Q1 1 D Q1 2 D Q1 3 D Q1 4 D Q1 5 D Q1 6 D Q1 7 D Q1 8 D Q1 9 D Q2 0 D Q2 1 D Q2 2 D Q2 3 D Q2 4 D Q2 5 D Q2 6 D Q2 7 D Q2 8 D Q2 9 D Q3 0 D Q3 1 D Q3 2 D Q3 3 D Q3 4 D Q3 5 D Q3 6 D Q3 7 D Q3 8 D Q3 9 D Q4 0 D Q4 1 D Q4 2 D Q4 3 D Q4 4 D Q4 5 D Q4 6 D Q4 7 D Q4 8 D Q4 9 D Q5 0 D Q5 1 D Q5 2 D Q5 3 D Q5 4 D Q5 5 D Q5 6 D Q5 7 D Q5 8 D Q5 9 D Q6 0 D Q6 1 D Q6 2 D Q6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 0 Q1 1 Q1 2 Q1 3 Q1 4 Q1 5 Q1 6 Q1 7 Q1 8 Q1 9 Q2 0 Q2 1 Q2 2 Q2 3 Q2 4 Q2 5 Q2 6 Q2 7 Q2 8 Q2 9 Q3 0 Q3 1 Q3 2 Q3 3 Q3 4 Q3 5 Q3 6 Q3 7 Q3 8 Q3 9 Q4 0 Q4 1 Q4 2 Q4 3 Q4 4 Q4 5 Q4 6 Q4 7 Q4 8 Q4 9 Q5 0 Q5 1 Q5 2 Q5 3 Q5 4 Q5 5 Q5 6 Q5 7 Q5 8 Q5 9 Q6 0 Q6 1 Q6 2 Q6 3 M _ A _ D Q [ 6 3: 0] 5 , 10 J D I MM 1 B 1 .5 V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 199 VD D SPD 3 .3 VS R4 5 3 1 0 , 1 2 , 1 3 TS #_ D I MM 0 _ 1 4 ,1 0 ,1 2 ,1 3 DD R3 _ DR A M RS T # C 60 4 C 60 6 2 . 2 u _ 6 . 3V _0 6 0 . 1 u _ 1 6V _Y 5 V _ 0 4 * 1 0K _0 4 77 122 125 198 30 N C1 N C2 N CT E S T E V E NT # R ESET # 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

La yout Not e : signa l /spa c e /si gna l: 8/4/8

B.Schematic Diagrams

3 .3 V S

20mils
C 60 7 C 60 3 2 .2 U_ 6 .3 V _ Y 5 V _ 0 6 0 . 1 u _1 6 V _ Y 5V _ 04

Sheet 11 of 57 IBEXPEAK - M 1/9

5 , 1 0 M_ A _ B S 0 5 , 1 0 M_ A _ B S 1 5 , 1 0 M_ A _ B S 2 5 M_ A _ C S # 2 5 M_ A _ C S # 3 5 M _ A _ CL K _ D DR 2 5 M _ A _ CL K _ D DR # 2 5 M _ A _ CL K _ D DR 3 5 M _ A _ CL K _ D DR # 3 5 M_ A _ C K E 2 5 M_ A _ C K E 3 5 , 1 0 M_ A _ C A S # 5 , 1 0 M_ A _ R A S # 5 , 1 0 M_ A _ W E # 1 0 C H A _S A 0 _D I M 1 1 0 C H A _S A 1 _D I M 1 2 , 1 0 , 1 2 , 13 , 2 0 S M B _ C LK 2 , 1 0 , 1 2 , 13 , 2 0 S M B _ D A T A 5 5 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ O D T 2 M_ A _ O D T 3 M0 M1 M2 M3 M4 M5 M6 M7

109 108 79 114 121 101 103 102 104 73 74 115 110 113 CH A_SA0_DI M1 1 9 7 C H A _ S A 1 _ D I M1 2 0 1 202 200 116 120 11 28 46 63 136 153 170 187 M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D M_ A _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

B A0 B A1 B A2 S 0# S 1# C K0 C K0 # C K1 C K1 # C KE0 C KE1 C AS# R AS# W E# S A0 S A1 S CL S DA O DT 0 O DT 1 D D D D D D D D D D D D D D D D D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 QS QS QS QS QS QS QS QS QS QS QS QS QS QS QS QS 0 1 2 3 4 5 6 7 0# 1# 2# 3# 4# 5# 6# 7#

VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD

D D D D D D D D D D D D D D D D D D

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

20 mils
9, 10 M V R E F _ D Q _ D I MM A

1 126

VR EF_ D Q VR EF_ C A

1 0 MV R E F _ C A _ D I MM A _ R

C 57 1 C 57 3

2 . 2 u _ 6 . 3V _0 6 0 . 1 u _ 1 6V _Y 5 V _ 0 4

5, 10 M _ A _ D Q S [ 7 : 0 ]

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS

S1 S2 S3 S4 S5 S6 S7 S8 S9 S1 0 S1 1 S1 2 S1 3 S1 4 S1 5

VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2

V TT _ M E M 203 204 G ND 1 G ND 2

VT T1 VT T2 G 1 G 2

D D R S K - 20 4 0 1 -T R 4 B

5 , 1 0 M_ A _ D QS # [ 7 : 0 ]

D D R S K -20 4 0 1 -T R 4 B

1 .5 V

V T T _ ME M

1 0 , 1 2 , 1 3, 4 1 V TT _ M E M 4 , 9 , 1 0 , 1 2 , 1 3, 2 6 , 3 0 , 3 7 , 3 9, 4 1 1 . 5 V 2, 4, 1 0 , 1 2 , 1 3 , 1 4, 1 5 , 1 6 , 1 7 , 1 8, 1 9 , 2 0 , 2 1 , 2 3, 2 4 , 2 5 , 2 6 , 2 9, 3 0 , 3 2 , 3 3 , 3 4, 3 5 , 3 6 , 3 9 , 4 0, 4 3 3 . 3 V S

C5 8 3

C 582

C5 8 5

C 590

C 58 8

C5 8 6

C 5 84

C5 8 1

C 589

C5 8 7

C 3 58

C3 4 9

C 3 47

C3 6 7

C 365

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 .1 u _ 1 6 V_ Y5 V_ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5V _0 4

1 0 u _1 0 V _ Y 5V _ 08 1 u _6 . 3 V _ Y 5 V _ 04 1 u _ 6. 3 V _ Y 5 V _ 0 4

1 u_ 6 . 3 V _ Y 5V _0 41 u _ 6 . 3 V _ Y 5 V _ 0 4

B - 12 DDRIII CHA SO-DIMM_1

Schematic Diagrams

DDRIII CHB SO-DIMM_0 Channel B SO-DIMM 0


CHANGE TO STANDARD
5, 1 3 M _B _B [ 15 : 0 ] J D I M M2 A M_ B _ B 0 M_ B _ B 1 M_ B _ B 2 M_ B _ B 3 M_ B _ B 4 M_ B _ B 5 M_ B _ B 6 M_ B _ B 7 M_ B _ B 8 M_ B _ B 9 M_ B _ B 1 0 M_ B _ B 1 1 M_ B _ B 1 2 M_ B _ B 1 3 M_ B _ B 1 4 M_ B _ B 1 5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 1 0/ A P A1 1 A 1 2/ B C # A1 3 A1 4 A1 5 BA0 BA1 BA2 S0 # S1 # CK 0 CK 0 # CK 1 CK 1 # CK E 0 CK E 1 CA S # RA S # W E# SA0 SA1 S CL S DA OD T0 OD T1 DM DM DM DM DM DM DM DM DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ 0 1 2 3 4 5 6 7 S0 S1 S2 S3 S4 S5 S6 S7 S0 # S1 # S2 # S3 # S4 # S5 # S6 # S7 # DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 12 9 13 1 14 1 14 3 13 0 13 2 14 0 14 2 14 7 14 9 15 7 15 9 14 6 14 8 15 8 16 0 16 3 16 5 17 5 17 7 16 4 16 6 17 4 17 6 18 1 18 3 19 1 19 3 18 0 18 2 19 2 19 4 M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 M_ B _ D Q[ 6 3 : 0 ] 5 , 13 JD I MM 2 B 1 .5 V 75 76 81 82 87 88 93 94 99 1 00 1 05 1 06 1 11 1 12 1 17 1 18 1 23 1 24 V V V V V V V V V V V V V V V V V V DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD DD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

5 5 5 5

5 , 1 3 M_ B _ B S 0 5 , 1 3 M_ B _ B S 1 5 , 1 3 M_ B _ B S 2 5 M_ B _ C S #2 5 M_ B _ C S #3 M _B _C L K _ D D R 2 M _B _C L K _ D D R # 2 M _B _C L K _ D D R 3 M _B _C L K _ D D R # 3 5 M _ B _C K E 2 5 M _ B _C K E 3 5, 1 3 M _B _C A S # 5, 1 3 M _B _R A S # 5, 1 3 M _B _W E #

2 , 1 0, 1 1 , 1 3 , 20 S MB _ C L K 2 , 1 0, 1 1 , 1 3 , 20 S MB _ D A TA 5 5 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D 3 . 3V S M0 M1 M2 M3 M4 M5 M6 M7 5 , 1 3 M_ B _ D Q S [ 7 : 0 ] R N 14 10 K _ 8 P 4 R _ 0 4 1 8 C H B _ S A 1 _ D I M1 2 7 C H B _ S A 0 _ D I M1 3 6 C H B _ S A 0 _ D I M0 4 5 C H B _ S A 1 _ D I M0 M_ B _ O D T 2 M_ B _ O D T 3

109 108 79 114 121 101 103 102 104 73 74 115 110 113 CH B _ S A 0 _ DIM 0 1 9 7 CH B _ S A 1 _ DIM 0 2 0 1 202 200 116 120 11 28 46 63 136 153 170 187 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

B.Schematic Diagrams

3 . 3V S

2 0 mil s
C 610 C 60 9 2 .2 U_ 6 .3 V _ Y 5 V _ 0 6 0 . 1 u _ 16 V _ Y 5V _0 4

1 99 77 1 22 1 25 1 98 30 1 1 26

V DD S P D N C1 N C2 N CT E S T E V E NT # R ESET#

1 0, 1 1 , 1 3 T S #_ D I MM 0 _1 4 , 1 0, 1 1 , 1 3 D D R 3 _ D R A MR S T # C3 9 1 C3 9 0 9 , 1 3 MV R E F _ D Q_ D I M MB 2. 2 u _ 6 . 3V _Y 5 V _ 06 0. 1 u _ 1 6V _Y 5 V _ 04

V RE F _ D Q V RE F _ C A V V V V V V V V V V V V V V V SS1 SS2 SS3 SS4 SS5 SS6 SS7 SS8 SS9 SS1 0 SS1 1 SS1 2 SS1 3 SS1 4 SS1 5

Sheet 12 of 57 DDRIII CHB SODIMM _0

9 MV R E F _ C A _D I MM B

R 46 9

* 0 _0 4

M V R E F _C A _ D I M MB _R C6 3 3 2. 2 u _ 6 . 3V _0 6 C6 5 6 0. 1 u _ 1 6V _Y 5 V _ 04

C HB _ S A 1 _ DIM 1 1 3 C HB _ S A 0 _ DIM 1 1 3 5 , 1 3 M_ B _ D QS # [ 7 : 0 ]

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

V T T _ ME M V T T1 V T T2 G1 G2 203 204 G ND 1 G ND 2

D D R R K -2 04 0 1 -T R 4 B

D D R R K -2 0 40 1 -T R 4 B

CLO SE TO SO -DI MM La y out N ot e : SO- DIM M_ 1 is pla ce d f a rthe r from the G M CH tha n SO -DI MM_0
1 .5 V R4 6 0 1K _1 % _ 0 4 M V R E F _ C A _ D I MM B _ R M V R E F _ C A _ D I M MB _ R 13

R 46 3 1 K _ 1 % _0 4 1 .5 V

C6 5 7 0 . 1u _ 1 0 V _X 5 R _0 4

C 69 9

C6 9 8

C6 9 7

C6 7 7

C6 7 8 1 u _6 . 3 V _ 0 4

C6 5 4 1 u _6 . 3 V _ 0 4

C6 7 3 1 u _6 . 3 V _ 0 4

C6 7 4 1 u _6 . 3 V _ 0 4

1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 0 u_ 1 0 V _ Y 5 V _ 0 8 1 u _6 . 3 V _ 0 4

1 .5 V

V T T_ M E M

1 0 , 1 1, 13 , 4 1 V T T _M E M 4 , 9 , 10 , 1 1 , 1 3 , 26 , 3 0 , 3 7, 39 , 4 1 1 . 5V 2 , 4 , 1 0, 1 1 , 1 3 , 14 , 1 5 , 1 6 , 17 , 1 8 , 1 9, 20 , 2 1 , 2 3, 2 4 , 2 5 , 2 6, 2 9 , 3 0 , 32 , 3 3 , 3 4 , 35 , 3 6 , 3 9, 40 , 4 3 3 . 3V S

C 64 7

C 64 6

C6 4 8

C6 4 9

C6 5 0

C6 5 1

C6 5 2

C6 5 3

C6 7 6

C6 7 5

C5 9 9

C 601

C 615

C 598 1 u _ 6 . 3V _0 4

C 596 1 u _6 . 3 V _ 0 4

0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 10 u _ 10 V _ Y 5V _0 8 1 u _ 6 . 3V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 1 u _ 6 . 3V _Y 5 V _ 04

DDRIII CHB SO-DIMM_0 B - 13

Schematic Diagrams

DDRIII CHB SO-DIMM_1 Channel B SO-DIMM 1


CHANGE TO STANDARD
5, 12 M _ B _ B [ 1 5 : 0 ] J D I MM 4 A M_ B _ B 0 M_ B _ B 1 M_ B _ B 2 M_ B _ B 3 M_ B _ B 4 M_ B _ B 5 M_ B _ B 6 M_ B _ B 7 M_ B _ B 8 M_ B _ B 9 M_ B _ B 1 0 M_ B _ B 1 1 M_ B _ B 1 2 M_ B _ B 1 3 M_ B _ B 1 4 M_ B _ B 1 5 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 1 0 /A P A1 1 A 1 2 /B C # A1 3 A1 4 A1 5 BA 0 BA 1 BA 2 S0 # S1 # C K0 C K0 # C K1 C K1 # C KE0 C KE1 C AS# R AS# WE # SA 0 SA 1 SC L SD A O DT 0 O DT 1 D D D D D D D D D D D D D D D D D D D D D D D D M0 M1 M2 M3 M4 M5 M6 M7 QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 QS 0 # QS 1 # QS 2 # QS 3 # QS 4 # QS 5 # QS 6 # QS 7 # DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 1 29 1 31 1 41 1 43 1 30 1 32 1 40 1 42 1 47 1 49 1 57 1 59 1 46 1 48 1 58 1 60 1 63 1 65 1 75 1 77 1 64 1 66 1 74 1 76 1 81 1 83 1 91 1 93 1 80 1 82 1 92 1 94 M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ _ B _ DQ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 M _B _D Q [ 63 : 0 ] 5 , 1 2 J D I M M 4B 1 .5 V 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 D1 6 D1 7 D1 8 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 44 48 49 54 55 60 61 65 66 71 72 12 7 12 8 13 3 13 4 13 8 13 9 14 4 14 5 15 0 15 1 15 5 15 6 16 1 16 2 16 7 16 8 17 2 17 3 17 8 17 9 18 4 18 5 18 9 19 0 19 5 19 6

B.Schematic Diagrams

Sheet 13 of 57 DDRIII CHB SODIMM _1

5 , 1 2 M _B _B S 0 5 , 1 2 M _B _B S 1 5 , 1 2 M _B _B S 2 5 M _B _C S # 0 5 M _B _C S # 1 5 M _B _C L K _ D D R 0 5 M _ B _ CL K _ D DR # 0 5 M _B _C L K _ D D R 1 5 M _B _C L K _ D D R # 1 5 M _ B _ CK E 0 5 M _ B _ CK E 1 5, 1 2 M _ B _ C A S # 5, 1 2 M _ B _ R A S # 5, 1 2 M _ B _ W E # 1 2 CH B _ S A 0 _ DIM 1 1 2 CH B _ S A 1 _ DIM 1 2 , 10 , 1 1 , 1 2 , 2 0 S MB _ C L K 2 , 10 , 1 1 , 1 2 , 2 0 S MB _ D A T A 5 5 M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M M_ B _ D M 0 1 2 3 4 5 6 7 5 , 1 2 M_ B _ D QS [ 7: 0 ] M _B _O D T 0 M _B _O D T 1

109 108 79 114 121 101 103 102 104 73 74 115 110 113 C H B _ S A 0 _ D I M1 1 9 7 C H B _ S A 1 _ D I M1 2 0 1 202 200 116 120 11 28 46 63 136 153 170 187 M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D M_ B _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186

3 .3 V S

20m ils
C5 9 1 C3 6 2 2 . 2 U _6 . 3 V _ Y 5V _0 6 0. 1 u _ 1 6 V _ Y 5 V _ 0 4

199 77 122 125 198 30

V D DS P D NC 1 NC 2 NC T E S T EVEN T# RE S E T #

10 , 1 1 , 1 2 T S # _ D I M M0 _ 1 4 , 10 , 1 1 , 1 2 D D R 3_ D R A M R S T# C6 1 8 C6 2 1 9 , 12 M V R E F _ D Q _ D I M MB 2 . 2 u_ 6 . 3 V _ 0 6 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

1 126

V R E F _ DQ V R E F _ CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5

1 2 MV R E F _ C A _ D I M MB _R

C6 5 9 C6 2 8

2 . 2 u_ 6 . 3 V _ 0 6 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43

V T T_ M E M V T T1 V T T2 G1 G2 20 3 20 4 GN D 1 GN D 2

D D R S K -2 0 4 01 -T R 9D

5 , 1 2 M _B _D QS #[ 7: 0 ]

D D R S K -2 0 4 0 1 -TR 9 D

La yout Not e: SO -DI MM_1 i s pl a ce d fa rthe r f rom t he G MCH tha n SO - DIMM_ 0

1 .5 V

V T T _ ME M

1 0 , 1 1 , 1 2, 4 1 V T T _ ME M 4, 9 , 1 0 , 1 1 , 1 2, 26 , 3 0 , 3 7 , 3 9, 4 1 1 . 5 V 2 , 4 , 1 0 , 1 1 , 12 , 1 4 , 1 5 , 1 6, 1 7 , 1 8 , 1 9 , 20 , 2 1 , 2 3 , 2 4, 25 , 2 6 , 2 9 , 30 , 3 2 , 3 3 , 3 4, 35 , 3 6 , 3 9 , 4 0, 4 3 3 . 3 V S

C 6 72

C6 4 1

C 64 2

C 643

C6 4 4

C 6 45

C6 6 8

C 66 9

C 670

C6 7 1

C6 6 2

C 629

C6 3 0 1 u_ 6 . 3 V _ 0 4

C 6 31 1 u _ 6. 3 V _ 0 4

C6 3 2 1 u _ 6. 3V _0 4

0 . 1 u _ 16 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 1 0 u_ 1 0 V _ Y 5 V _ 0 8 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 1 u _ 6 . 3V _0 4

B - 14 DDRIII CHB SO-DIMM_1

Schematic Diagrams

MXM PCI-E
P W R _ S RC P W R_ S RC J _ MX M1 A E 1 -1 E 1 -2 E 1 -3 E 1 -4 E 1 -5 E 1 -6 E 1 -7 E 1 -8 E 1 -9 E 1-1 0 E 3 -1 E 3 -2 E 3 -3 E 3 -4 E 3 -5 E 3 -6 E 3 -7 E 3 -8 E 3 -9 E 3-1 0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 10 1 10 3 10 5 10 7 10 9 11 1 11 3 11 5 11 7 11 9 12 1 12 3 12 5 13 3 13 5 13 7 13 9 14 1 14 3 14 5 14 7 14 9 15 1 P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C P W R_ S R C GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D 5V 5V 5V 5V 5V GN D GN D GN D GN D P E X _S T D _S W # V GA _ D I S A B LE # P NL _ P W R_ E N P N L _ B L _E N P N L _ B L _P W M H D MI _ C E C DV I_ HP D L V DS _ DD C_ DA T L V DS _ DD C_ CL K GN D OE M OE M OE M OE M GN D P E X _R X 15 # P E X _R X 15 GN D P E X _R X 14 # P E X _R X 14 GN D P E X _R X 13 # P E X _R X 13 GN D P E X _R X 12 # P E X _R X 12 GN D P E X _R X 11 # P E X _R X 11 GN D P E X _R X 10 # P E X _R X 10 GN D P E X _R X 9# P E X _R X 9 GN D P E X _R X 8# P E X _R X 8 GN D P E X _R X 7# P E X _R X 7 GN D P E X _R X 6# P E X _R X 6 GN D P E X _R X 5# P E X _R X 5 GN D P E X _R X 4# P E X _R X 4 GN D P E X _R X 3# P E X _R X 3 GN D GN D P E X _R X 2# P E X _R X 2 GN D P E X _R X 1# P E X _R X 1 GN D P E X _R X 0# P E X _R X 0 GN D 9 1 78 2 -31 4 0 M-N V - 01 R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC R_ S RC G ND G ND G ND G ND G ND G ND G ND G ND G ND G ND P R S N T _R # W AKE# P W R _ GO OD P W R_ E N RS V D RS V D RS V D RS V D P W R_ L E V E L T H_ O VERT # T H_ A L E RT # T H_ P W M GP I O 0 GP I O 1 GP I O 2 S M B _D A T S M B _C LK G ND OE M OE M OE M OE M G ND P E X_ T X1 5 # P E X _ TX 1 5 G ND P E X_ T X1 4 # P E X _ TX 1 4 G ND P E X_ T X1 3 # P E X _ TX 1 3 G ND P E X_ T X1 2 # P E X _ TX 1 2 G ND P E X_ T X1 1 # P E X _ TX 1 1 G ND P E X_ T X1 0 # P E X _ TX 1 0 G ND P E X _ TX 9 # P E X _T X 9 G ND P E X _ TX 8 # P E X _T X 8 G ND P E X _ TX 7 # P E X _T X 7 G ND P E X _ TX 6 # P E X _T X 6 G ND P E X _ TX 5 # P E X _T X 5 G ND P E X _ TX 4 # P E X _T X 4 G ND P E X _ TX 3 # P E X _T X 3 G ND G ND P E X _ TX 2 # P E X _T X 2 G ND P E X _ TX 1 # P E X _T X 1 G ND P E X _ TX 0 # P E X _T X 0 G ND PW PW PW PW PW PW PW PW PW PW E 2-1 E 2-2 E 2-3 E 2-4 E 2-5 E 2-6 E 2-7 E 2-8 E 2-9 E 2-1 0 E 4-1 E 4-2 E 4-3 E 4-4 E 4-5 E 4-6 E 4-7 E 4-8 E 4-9 E 4-1 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 10 0 10 2 10 4 10 6 10 8 11 0 11 2 11 4 11 6 11 8 12 0 12 2 12 4 13 4 13 6 13 8 14 0 14 2 14 4 14 6 14 8 15 0 15 2 5 VS PJ 1 OP E N -3 m m 1 2 5 VRU N

MXM 3.0
PWR_S RC(10A)-7-20V 5V RUN(2.5A) --5V 3V RUN(1A)--3.3V

3A
3 .3 V S

3A
3 VRU N 2 0 C L K _ P C I E _ MX M # 2 0 C L K _ P C I E _ MX M

J _ MX M1 B 15 3 15 5 15 7 15 9 16 1 16 3 16 5 16 7 16 9 17 1 17 3 17 5 17 7 17 9 18 1 18 3 18 5 18 7 18 9 19 1 19 3 19 5 19 7 19 9 20 1 20 3 20 5 20 7 20 9 21 1 21 3 21 5 21 7 21 9 22 1 22 3 22 5 22 7 22 9 23 1 23 3 23 5 23 7 23 9 24 1 24 3 24 5 24 7 24 9 25 1 25 3 25 5 25 7 25 9 26 1 26 3 26 5 26 7 26 9 27 1 27 3 27 5 27 7 27 9 28 1 P E X _R E F C L K # P E X _R E F C L K GN D RS V D RS V D RS V D RS V D RS V D L V D S _ U C LK # L V D S _ U C LK GN D L V D S _ U T X 3# L V DS _ UT X 3 GN D L V D S _ U T X 2# L V DS _ UT X 2 GN D L V D S _ U T X 1# L V DS _ UT X 1 GN D L V D S _ U T X 0# L V DS _ UT X 0 GN D DP _ C_ L 0 # DP _ C_ L 0 GN D DP _ C_ L 1 # DP _ C_ L 1 GN D DP _ C_ L 2 # DP _ C_ L 2 GN D DP _ C_ L 3 # DP _ C_ L 3 GN D D P _ C _ A U X# DP _ C_ A U X RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D RS V D GN D D P _ A _ L 0# DP _ A _ L 0 GN D D P _ A _ L 1# DP _ A _ L 1 GN D D P _ A _ L 2# DP _ A _ L 2 GN D D P _ A _ L 3# DP _ A _ L 3 GN D DP _ A _ A UX # DP _ A _ A UX P R S N T_ L # 9 1 78 2 -31 4 0 M-N V -0 1 3 V RU N CL K _ RE Q # P E X _ RS T # V G A _D D C _D A T V G A _D D C _C LK V GA _ V S Y N C V GA _ H S Y N C G ND V G A _ RE D V GA _ G R E E N V GA _B L U E G ND L V DS _ L CL K # LV D S _ LC LK G ND L V D S _ L TX 3 # LV D S _ LT X 3 G ND L V D S _ L TX 2 # LV D S _ LT X 2 G ND L V D S _ L TX 1 # LV D S _ LT X 1 G ND L V D S _ L TX 0 # LV D S _ LT X 0 G ND D P _ D _L 0 # DP _ D_ L 0 G ND D P _ D _L 1 # DP _ D_ L 1 G ND D P _ D _L 2 # DP _ D_ L 2 G ND D P _ D _L 3 # DP _ D_ L 3 G ND D P _D _ A U X # D P _ D _A U X D P _C _ H P D D P _D _ H P D RS V D RS V D RS V D G ND D P _ B _L 0 # D P _B _ L 0 G ND D P _ B _L 1 # D P _B _ L 1 G ND D P _ B _L 2 # D P _B _ L 2 G ND D P _ B _L 3 # D P _B _ L 3 G ND DP _ B _ A UX # D P _ B _A U X DP _ B _ HP D DP _ A _ HP D 3 V3 3 V3 15 4 15 6 15 8 16 0 16 2 16 4 16 6 16 8 17 0 17 2 17 4 17 6 17 8 18 0 18 2 18 4 18 6 18 8 19 0 19 2 19 4 19 6 19 8 20 0 20 2 20 4 20 6 20 8 21 0 21 2 21 4 21 6 21 8 22 0 22 2 22 4 22 6 22 8 23 0 23 2 23 4 23 6 23 8 24 0 24 2 24 4 24 6 24 8 25 0 25 2 25 4 25 6 25 8 26 0 26 2 26 4 26 6 26 8 27 0 27 2 27 4 27 6 27 8 28 0 MX M_ R S T# R2 6 * 0_ 0 4 R2 7 * 0_ 0 4 MX M_ C L K R E Q# 20 E X _ DD C_ DA T A 1 7 E X _ DD C_ CL K 1 7 E X_ D A C _ V S Y N C 1 7 E X_ D A C _ H S Y N C 1 7 E X_ D A C _ R 1 7 E X_ D A C _ G 1 7 E X_ D A C _ B 1 7 E X_ L V D S -L C LK N 15 E X_ L V D S -L C LK P 1 5

2A
V IN

PJ 2 OP E N -2 m m 1 2

2A
P W R _ S RC

P J1 31 4 m m

1 4A

1 4A

1 5 E X _L V D S -U C L K N 1 5 E X _L V D S -U C L K P

5 V RU N

R2 4

4 7 K _0 4

1 5 E X _ L V D S -U 2 N 1 5 E X _ L V D S -U 2 P 3 .3 V S 1 5 E X _ L V D S -U 1 N 1 5 E X _ L V D S -U 1 P 1 5 E X _ L V D S -U 0 N 1 5 E X _ L V D S -U 0 P 18 E X _ H D M I _C 2 N 1 8 E X _ H D MI _ C 2 P 1 8 E X_ H D MI _ C 1 N 1 8 E X _ H D MI _ C 1 P 3 . 3V S 1 8 E X_ H D MI _ C 0 N 1 8 E X _ H D MI _ C 0 P 1 8 E X_ H D MI _ C C L K N 1 8 E X _ H D MI _ C C L K P 1 8 E X_ H D MI _ C _ S D A 1 8 E X_ H D MI _ C _ S C L

MX M 3.0 MOD ULE B OAR D CONNE CT OR

MX M 3 .0 MO D U L E B O A R D CO NN E C TO R

D GP U _ P R S N T # 2 0 V G A _ P W RG D1 R1 6 3 .3 VS A LL _ S Y S _ P W R G D 2 , 1 5, 2 1 , 3 4, 4 3 1 0 K _0 4 3 . 3V S 10 K _ 04

E X_ L V D S -L 2 N 1 5 E X_ L V D S -L 2 P 1 5 E X_ L V D S -L 1 N 1 5 E X_ L V D S -L 1 P 1 5 E X_ L V D S -L 0 N 1 5 E X_ L V D S -L 0 P 1 5 HDM I_ D# 2 1 5 HDM I_ D2 1 5 HDM I_ D# 1 1 5 HDM I_ D1 1 5 HDM I_ D# 0 1 5 HDM I_ D0 1 5 HDM I_ DCL K # 1 5 HDM I_ DCL K 1 5 HDM I_ D_ S DA 1 5 HDM I_ D_ S CL 1 5 E X_ H D MI _ C H P D 1 8 HDM I_ DHP D 1 5

R3 3 T H_ O V E RT # 1 T H_ A L E RT # 1 R 32 R 31 S M D _ V GA _ T H E R M_ R S M C _ V GA _ T H E R M_ R R2 9 R2 8 R3 0 P E G _ TX N 1 5 P E G _ TX P 1 5 P E G _ TX N 1 4 P E G _ TX P 1 4 P E G _ TX N 1 3 P E G _ TX P 1 3 P E G _ TX N 1 2 P E G _ TX P 1 2 P E G _ TX N 1 1 P E G _ TX P 1 1 P E G _ TX N 1 0 P E G _ TX P 1 0 P E G _ TX N 9 P E G _ TX P 9 P E G _ TX N 8 P E G _ TX P 8 P E G _ TX N 7 P E G _ TX P 7 P E G _ TX N 6 P E G _ TX P 6 * 33 _ 04 * 33 _ 04 * 33 _ 04

B.Schematic Diagrams

R 57

*0 _ 04

P E X _S T D _S W # 1

A C / B A T L # 45 2 . 2K _ 0 4 2 . 2K _ 0 4

1 5 E X _V G A _ E N A V D D 1 5 E X_ V G A _B K L T E N 1 5 E X_ V G A _B K L P W M 3 .3 VS R 3 05 R 3 04 1 5 E X_ L V D S _ D D C _ D A T 1 5 E X_ L V D S _ D D C _ C L K 19 , 3 2 H D A _ R S T# 19 H D A _S D I N 1 3 3 3 2, 3 5 P E G_ R XN [ 0. . 1 5 ] P E G_ R XP [ 0 . . 1 5] R 3 06 R3 0 7 SPD IF O

4. 3 K _ 1 %_ 0 4 4. 3 K _ 1 %_ 0 4

R 32 3 R 31 9

4 . 7K _ 0 4 4 . 7K _ 0 4 H D A _ B I T C L K 1 9 , 32 H D A _ S D OU T 1 9 , 32 HDA _ S Y NC 1 9 ,3 2 P E G_ T X N [ 0 . . 15 ] 3 P E G _ TX P [ 0 . . 15 ] 3

3 .3 V S

* 33 _ 04 *3 3 _0 4 PEG _ XN15 R PEG _ XP1 R 5 PEG _ XN14 R PEG _ XP1 R 4 PEG _ XN13 R PEG _ XP1 R 3 PEG _ XN12 R PEG _ XP1 R 2 PEG _ XN11 R PEG _ XP1 R 1 PEG _ XN10 R PEG _ XP1 R 0 PEG _ XN9 R PEG _ XP9 R PEG _ XN8 R PEG _ XP8 R PEG _ XN7 R PEG _ XP7 R PEG _ XN6 R PEG _ XP6 R PEG _ XN5 R PEG _ XP5 R PEG _ XN4 R P E G _R X P 4 PEG _ XN3 R PEG _ XP3 R PEG _ XN2 R PEG _ XP2 R PEG _ XN1 R PEG _ XP1 R PEG _ XN0 R PEG _ XP0 R

Max: 0. 5in ch

Sheet 14 of 57 MXM PCI-E

E X_ D V I _D 5N E X_ D V I _D 5P E X_ D V I _D 4N E X_ D V I _D 4P E X_ D V I _D 3N E X_ D V I _D 3P

17 17 17 17 17 17

1 7 E X _ DV I_ D2 N 1 7 E X_ D V I _D 2P 1 7 E X _ DV I_ D1 N 1 7 E X_ D V I _D 1P 1 7 E X _ DV I_ D0 N 1 7 E X_ D V I _D 0P 1 7 E X_ D V I _C LK N 1 7 E X _ DV I_ CL K P 1 7 E X _ DD C_ DA T A 1 7 E X _ DD C_ CL K R4 6 R4 5 0 _ 04 0 _ 04

H2 3 H2 4 H 7 _ 0D 4_ 1 H 7 _ 0D 4_ 1

E X_ D V I _H P D 1 7

GN D P E G _ TX N 5 P E G _ TX P 5 P E G _ TX N 4 P E G _ TX P 4 P E G _ TX N 3 P E G _ TX P 3

GN D 5V S

2 4 D G P U _ H O LD _R S T # G R 44 M TN 7 00 2 Z H S 3 D

3 . 3V

Q2 3 S M D _ V GA _ T H E R M _ R G P E G _ TX N 2 P E G _ TX P 2 P E G _ TX N 1 P E G _ TX P 1 P E G _ TX N 0 P E G _ TX P 0 Q2 2 S M C _ V GA _ T H E R M _ R S S

C 51 S M D _ V GA _ T H E R M 3 4 * 1 00 K _ 04 1 4 5

*0 . 1u _ 1 6V _ 0 4

MX M_ R S T #

M TN 70 0 2 Z H S 3 D

2 4, 2 3 S M C _ V GA _ T H E R M 3 4 3 R3 5 P LT _ R S T # U 4 *7 4 A H C 1G 0 8G W

0 _0 4

2 , 1 5, 1 7 , 1 8, 1 9 , 25 , 2 6 , 30 , 3 2, 3 3 , 3 5, 3 9 , 4 3, 4 4 5V S 2 , 4 , 10 , 1 1, 1 2 , 1 3, 1 5 , 1 6, 1 7 , 18 , 1 9 , 20 , 2 1, 2 3 , 2 4, 2 5 , 2 6, 2 9 , 30 , 3 2 , 33 , 3 4, 3 5 , 3 6, 3 9 , 4 0, 4 3 3. 3 V S 15 , 3 8 , 39 , 4 0, 4 1 , 4 3, 4 4 , 4 5, 4 6 V I N 2, 3 , 4 , 9 , 15 , 1 9 , 20 , 2 1, 2 3 , 2 4, 2 5 , 2 6, 2 8 , 29 , 3 0 , 35 , 3 6, 3 7 , 3 9, 4 0 , 4 1, 4 2 3. 3 V 3 V RU N P W R_ S RC

P W R _S R C

5 V RU N

C 99 4 . 7 U _ 2 5V _ X 5R _ 08

C 44

C 83 *4 . 7 U _ 2 5V _0 8

C 10 1

C1 0 0 *4 . 7 U _ 2 5V _ 0 8

C 62

C 52 C3 4 * 4. 7 U _2 5 V _0 8 C5 8 C8 1 C 4 35 C 4 36 C 4 25 C 42 6 C4 3 0 0. 0 1 u _5 0 V _0 4

4. 7 U _2 5 V _X 5 R _ 0 8

4. 7 U _2 5 V _X 5 R _ 0 8

4 . 7U _ 25 V _ X5 R _0 8

4. 7 U _2 5 V _X 5 R _ 0 8 4. 7 U _ 2 5 V _X 5 R _ 0 8 0 . 1 u _5 0 V _ Y 5 V _0 6 0 . 0 1u _ 5 0V _ 0 4 4. 7 U _2 5 V _X 5 R _ 0 8 0. 1 u _5 0 V _ Y 5 V _0 6 0 . 1 u _5 0 V _Y 5 V _0 6

CLOSE T O MXM PIN E1

C OSE TO M XM PINE2 L

CLOSE TOM XM C ONN .

C SE TO M XM CON LO N.

MXM PCI-E B - 15

Schematic Diagrams

Panel, Inverter, CRT


PANEL
1 4 E X_ V GA _ B K LP W M 34 B R I GH TN E S S

P L V DD C D7 R8 6 R9 1 *0 _0 4 J _L CD 2 1 4 E X _L V D S -U C L K N 1 4 E X _ LV D S -U 1 N 1 4 E X_ L V D S -U 1 P E X _L V D S -U C L KN E X _L V D S -U 1N E X _L V D S -U 1P P L V DD 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 8 81 07 -4 00 0 1 C 1 53 0. 1 u _1 6 V _Y 5 V _ 04 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 E X_ L V D S -U C L K P E X _ LV D S - 2N U E X _ LV D S - 2P U E X _ LV D S - 0N U E X _ LV D S - 0P U 3 . 3V S E X _ V GA _ EN A V D D E X _ LV D S _D D C _ C L K E X _ LV D S _D D C _ D A T E X _ LV D S - 0 N L E X _ LV D S - 0 P L E X_ L V D S -U C L K P 1 4 E X_ L V D S -U 2 N 1 4 E X_ L V D S -U 2 P 14 E X_ L V D S -U 0 N 1 4 E X_ L V D S -U 0 P 14 A R 93 *R B 75 1 V 0_ 0 4 1 4 E X_ L V D S -LC LK N 14 E X _L V D S -L CL K P 1 4 E X _L V D S -L 1N 1 4 E X _ LV D S -L 1 P AC

P L V DD J _L C D 1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 88 1 07 -30 0 01 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

3 . 3V S

E X _V G A _E N A V D D E X _L V D S _ D D C _C LK E X _L V D S _ D D C _D A T E X _L V D S -L 0 N E X _L V D S -L 0 P E X _L V D S -L 2 N E X _L V D S -L 2 P E X _L V D S -L 0N 14 E X _L V D S -L 0P 1 4 E X _L V D S -L 2N 14 E X _L V D S -L 2P 1 4

E X _ LV D S -LC L K N E X _ LV D S -LC L K P E X _ LV D S -L1 N E X _ LV D S -L1 P B R I G H T N E S S _R

*10 K _ 04

D6 * B A V 99 R E CT I F I E R

I N V _ B LO N

E X _ LV D S-L C L K N E X _ LV D S-L C L K P

5V S

VL ED 3 . 3V S

3 . 3V

B.Schematic Diagrams

E X _ LV D S-L 1 N E X _ LV D S-L 1 P B R I G H T N E S S _R I N V _ B L ON

R 85 E X _ LV D S - 2 N L E X _ LV D S - 2 P L 2 . 2K _ 0 4

R8 9 2 . K _ 04 2 E X _ LV D S _D D C _ D A T E X_ L V D S _ D DC _ C L K E X_ LV D S _D D C _ D A T 14 E X_ LV D S _D D C _ C L K 14

14

34

B K L _E N

B K L_ E N E X_ V GA _ B K LT E N R9 2 1 0 0K _ 0 4

1 2

4 5

14

Sheet 15 of 57 Panel, Inverter, CRT

5 VS

V LE D

3 . 3V 3. 3 V R8 7 * 10 0 K _0 4 U8 A 74 L V C 0 8P W 1 U8 B 74 L V C 08 P W 1 6 7 U8 C 74 L V C 0 8P W 1 8 R9 6 * 10 0 K _0 4 3. 3 V U8 D 74 L V C 08 P W 1 11 13 2, 1 4 , 21 , 3 4, 4 3 A L L _S Y S _P W R G D 7 14 10 7 R9 8 *1 M_ 04 C 42 9 1 u _6 . 3V _ X 5R _0 4 R 3 03 4. 7 K _ 04 I N V _B L ON 14 9

3 . 3V

14 E X_ V GA _ B K LT E N

V IN

V LE D L18 H C B 1 60 8 K F - 2 1T 2 5 1

24 VL ED C 10 5 0 . 1 u_ 50 V _ Y 5 V _0 6

S B _ B LON

C1 3 2

C 12 9 0. 1 u _5 0 V _Y 5 V _ 06

D 02

1 0u _ 25 V _X 5 R _ 12

2 9 , 34 , 3 5 L I D _ S W #

12

5V S R 50 7 1 00 K _ 04

5 VS

>1 00 mi l

Q3 3 A O3 41 5 S D

PLVDD POWER
> 0 m 10 il
Q3 A O34 1 5 S D

P L VDD_ S E L

3. 3 V S

>10 il 0m

PLV DD LVD S:3 .3V 2A eDP 3D :5V 3A


C8 4 C 1 52 C 15 6

P L V DD

R9 4 *1 00 K _0 4

>1 00 mi l

eDP
D02
J _D P 1 1 4 H D MI _ D C L K # 14 H D MI _D C L K 14 14 H D MI _ D # 0 H D MI _ D 0 C 37 C 36 C 43 C 42 C 10 3 C 10 4 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 0. 1 u _1 6V _ Y 5 V _ 04 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 88 1 07 -3 00 0 1 B A V 99 R 56 AC 1 0 K _0 4 14 H D M I _D H P D L17 F C M1 6 08 K -1 21 T0 6 C1 0 2 2 2 0p _ 50 V _0 4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 C3 9 C3 8 C4 1 C4 0 0 . 1u _ 16 V _Y 5V _ 0 4 0 . 1u _ 16 V _Y 5V _ 0 4 0 . 1u _ 16 V _Y 5V _ 0 4 0 . 1u _ 16 V _Y 5V _ 0 4 H D MI _D #1 1 4 H D MI _D 1 14 H D MI _D #2 1 4 H D MI _D 2 14 G P L V DD I N V _ BL ON 3 .3 V S VL ED C A D3 R5 0 9 1 0K _ 0 4

Q3 4 *A O3 4 15 S D Q4 0 A O3 4 15 S

C 59

1 u _6 . 3 V _Y 5 V _ 04

0 . 1 u_ 16 V _ Y 5 V _0 4 R3 6 1 0K _ 0 4 R3 7 G 1 00 K _0 4 D

0. 1 u _1 6 V _Y 5V _ 04

1 0 u_ 10 V _ Y 5 V _0 8

G D R 50 8 Q 35 M TN 70 0 2Z H S 3 S 1 0 0K _ 0 4 S

Q2 1 MT N 7 0 02 Z H S 3

1 4 H D MI _ D _S D A 1 4 H D MI _ D _ S C L 3 . 3V S R 78 R 79

1 0 0K _ 04 1 0 0K _ 04 B R I GH T N E S S _ R P L V DD_ S E L

1 4 E X _V G A _E N A V D D

E X_ V GA _ E N A V D D

B - 16 Panel, Inverter, CRT

3 . 3V S 3 . 3V 5 VS V IN

2, 4 , 1 0, 1 1 , 12 , 13 , 1 4, 1 6 , 17 , 1 8, 1 9, 2 0 , 21 , 2 3, 2 4, 2 5 , 26 , 2 9, 3 0, 3 2 , 33 , 3 4, 3 5 , 36 , 39 , 4 0, 4 3 2, 3 , 4 , 9, 1 4 , 19 , 20 , 2 1, 2 3 , 24 , 25 , 2 6, 2 8 , 29 , 3 0, 3 5, 3 6 , 37 , 3 9, 4 0, 4 1 , 42 2, 1 4 , 17 , 1 8, 1 9, 2 5 , 26 , 3 0, 3 2 , 33 , 35 , 3 9, 4 3 , 44 14 , 3 8, 3 9 , 40 , 41 , 4 3, 4 4 , 45 , 4 6

Schematic Diagrams

1394_JMB380C
IEEE1394
J13 94PORT1 GND1 GND2 4 3 2 1 LP1016 0 OH M #9 44CM-00 51 5 4 6 3 7 2 8 1 R4 49 0 _04 R4 50 0 _04 R4 51 0 _04 R4 52 0 _04 GND GND TP A+ TP ATP B+ TP B13 94_TP A BI S0 C69 3 R 487 R 488 0.3 3u_Y 5V_16 V 06 _ 5 6_04 5 6_04 139 4_TPA0+ 139 4_TPA013 94_ TPB + 0 139 4_TPB0R 490 R 489 R 478 5 6_04 5 6_04 4. 99K_1 % 04 _ 22 0p_ 50V_04 1. 8VS 3. 3VS 3. 3V 5VS VIN 7, 25, 42 2, 4,1 0,1 1,1 2,13 ,14 ,15 ,17 ,18, 19, 20, 21, 23, 24,2 5,2 6,2 9,3 0,3 2,33 ,34 ,35 ,36 ,39, 40, 43 2, 3,4 ,9, 14, 15, 19,2 0,2 1,2 3,2 4,25 ,26 ,28 ,29 ,30, 35, 36, 37, 39, 40, 41,4 2 2, 14, 15, 17, 18,1 9,2 5,2 6,3 0,32 ,33 ,35 ,39 ,43, 44 14 ,15 ,38, 39, 40, 41, 43, 44, 45,4 6

MIE-0 4RH4 G

C724 1 394 _T PBIAS0 13 94_T PA0+ 1394 _T PA013 94_T PB0+ 1394 _T PB0 -

C720 H CB 012 K 00T40 2 F-5 0.1 u_16 V Y5V_04 _ *0 .1u _16V_0 4

R486

1 2K_1%_0 4

12mil
1 394 _X I C71 6 20p _50 V 04 _ DV1.8V

36 35 34 33 32 31 30 29 28 27 26 25

U38

R49 6 1 M_04

X 13 *24.5 76MHz

C710 0.1 u_16 V Y5V_0 4 _ 1394 _X I 1394 _X O 37 38 39 40 41 42 43 44 45 46 47 48 DV18 TX N I TX UT O MDI O7 MDI O6 MDI O5 MDI O4 DV33 MDI O3 MDI O2 MDI O1 MDI O0

T REXT TPBIAS_1 T PA1 P TPA1N T PB1 P T PB1N T AV33 M DIO8 MDI O9 M DIO 10 MD IO11 M DIO 12

X 4 1 1 4

13 94_XO

C72 9

20p _50 V 04 _

3.3 V S_CARD

Note: Close to JMB380


C735 0.1 u_16 V Y5V_0 4 _

JMB380

JMB380C 6-03-00380-032
23, 28, 29,3 4,3 6,3 7 B F_ P T_RST# U L 2 0 CLK_PCI E 1394 # _ 2 0 CLK_PCI E 1394 _ 1. 8VS L71 DV1. 8V

XRSTN XT EST APCLKN APCL KP APVD D APG ND APREXT APR XP APRXN APV1 8 APT XN APTXP

TC P S MDIO1 3 MDIO1 4 CR_ LEDN DV 3 3 REG_CTRL DV 8 1 C R1_PCTLN CR 1_CD 0N CR 1_CD 1N S EECLK S EEDAT GND _M

24 23 22 21 20 19 18 17 16 15 14 13 49

TCPS R491

40mi l
DV1.8 V C74 4 0.1 u_1 6V_Y5V_0 4 0.1 u_1 6V_Y5V_0 4

1 2 3 4 5 6 7 8 9 10 11 12

JMICRO N

QFN-48
C7 48 C7 47 0. 1u_1 6V_Y5 V 04 _ 0. 1u_1 6V_Y5 V 04 _ PCI E_RX P4_ 1394 2 0 PCI E_RX _13 94 20 N4 DV1. 8V

*HCB20 12KF-500 T40 0.1 u_16 V Y5V_04 _

C7 30 10u_ 10V_Y 5V_08

C7 39 C72 7 PCIE_TXN4_1 394 2 0 PCIE_TXP _13 94 20 4

10 00p _50V_X7R_0 4

12mi l
R50 5 8.2 K 04 _

.
C715 *0 .1u _16V_0 4 C7 11 *0. 1u_1 6V_04

Note: Close to CON

C 692

Note: Close to JMB380

3. 3VS_CARD

L 69

3 .3VS

B.Schematic Diagrams

Sheet 16 of 57 1394_JMB380C

1 0K_04 3.3 V S_C A D R

24. 576M Hz

C70 5

C 746 0 .01 u_5 0V_04

C 745

C 743

0 .1u _16 V Y5V_04 _ 1 0u_ 10V_Y5 V 08 _

1394_JMB380C B - 17

Schematic Diagrams

DVI
PLEASE CLOS E TO C ONNECT OR
. . .
3 3 _0 4 3 3 _0 4 14 14 14 E X _ DA C _ R E X _ DA C _ G E X _ DA C _ B EX _ DAC _ R EX _ DAC _ G EX _ DAC _ B L1 L3 L2 F C M1 00 5 MF -6 0 0 T0 1 _ 04 F C M1 00 5 MF -6 0 0 T0 1 _ 04 F C M1 00 5 MF -6 0 0 T0 1 _ 04 L5 L7 L6 F C M 10 0 5 MF -6 0 0T 0 1 _0 4 F C M 10 0 5 MF -6 0 0T 0 1 _0 4 F C M 10 0 5 MF -6 0 0T 0 1 _0 4 FR ED F G RN F B L UE 14 14 E X_ D V I _D 2 N E X _ DV I_ D2 P LP 7 4 3 C 1 23 C 1 22 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C 1 12 C2 3 C 48 C 47 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C2 2 C 1 11 C 1 21 C 1 20 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C 1 10 C2 1 C 46 C 45 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C2 0 C 1 09 C 1 19 C 1 18 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C 1 08 C2 5 C 50 C 49 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C2 4 C 1 06 C 1 16 C 1 17 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 C 1 07 5 P _ 5 0 V _0 4 5 P _ 5 0 V _0 4 5 P _ 5 0 V _0 4 E X _ DV I_ CL K _ R E X _ DV I_ CL K # _ R 5 P _ 5 0 V _0 4 5 P _ 5 0 V _0 4 E X _ DV I_ DA T A 5 # _ R E X _ DV I_ DA T A 5 _ R 5 P _ 5 0 V _0 4 5 P _ 5 0 V _0 4 E X _ DV I_ DA T A 0 # _ R E X _ DV I_ DA T A 0 _ R 5 P _ 5 0 V _0 4 5 P _ 5 0 V _0 4 E X _ DV I_ DA T A 3 # _ R E X _ DV I_ DA T A 3 _ R 5 P _ 5 0 V _0 4 5 P _ 5 0 V _0 4 E X _ DV I_ DA T A 1 # _ R E X _ DV I_ DA T A 1 _ R 5 P _ 5 0 V _0 4 5 P _ 5 0 V _0 4 E X _ DV I_ DA T A 4 # _ R E X _ DV I_ DA T A 4 _ R

Close to DVI PORT


C 1 13 5 P _ 5 0 V _0 4 E X _ DV I_ DA T A 2 # _ R E X _ DV I_ DA T A 2 _ R 1 2 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 2 4 3

R1 1 50 _ 1 %_ 0 4

R 3 1 5 0 _1 % _ 04

R2 C3 1 50 _ 1 %_ 0 4 22 p _ 50 V _ 0 4 C1 2 22 p _ 50 V _ 0 4 C5 2 2 p_ 5 0 V _0 4 2 2 p _5 0 V _ 04 C9 2 2 p _5 0 V _ 04 C6 2 2 p_ 5 0 V _ 04 C4

2 2p _ 5 0V _ 0 4

2 2 p_ 5 0 V _ 04

2 2 p _5 0 V _ 04

B.Schematic Diagrams

3 .3 VS

1 2 3 4

Sheet 17 of 57 DVI

R N1 2 . 2 K _ 8P 4 R _0 4 8 7 6 5

10 1 4 E X _D D C _D A T A 11 1 4 E X _D D C _C L K 13 1 4 E X _D A C _ H S Y N C 15 1 4 E X _D A C _ V S Y N C 5 VS 3 . 3V S 0 . 2 2 u_ 1 0 V _Y 5V _ 0 4 0 . 22 u _ 10 V _ Y 5 V _ 04 R9 0 1 _0 4

U 1 DD C_ IN1 DD C_ IN2 S Y N C_ IN1 D D C _O U T 1

D02

S Y N C_ IN2 1 V CC _ SY N C 2 V CC _ V IDE O 7 V CC _ DDC 8 BYP 0. 2 2 u _1 0 V _ Y 5 V _0 4 I P 4 7 72 C Z 16

C 17

C1 3

C1 9

A D2 J _D V I 1 S C S 75 1 V -4 0 + 5 V P OW E R D ATA 2 D ATA 2 + 2 / 4 S h i el d D ATA 4 D ATA 4 + D ATA 1 D ATA 1 + D AT A 1 /3 Sh ie d l D ATA 3 D ATA 3 + 14 C C1 6 0. 1 u _ 16 V _ Y 5 V _ 0 4 E X_ D V I _D A T A 2# _ R E X_ D V I _D A T A 2_ R E X_ D V I _D A T A 4# _ R E X_ D V I _D A T A 4_ R E X_ D V I _D A T A 1# _ R E X_ D V I _D A T A 1_ R D 1 BAV9 9 A C R4 L4 F C M1 6 0 8K -1 2 1 T0 6 E X_ D V I _D A T A 0# _ R E X_ D V I _D A T A 0_ R C7 2 2 0 p_ 5 0 V _0 4 E X_ D V I _D A T A 5# _ R E X_ D V I _D A T A 5_ R E X_ D V I _C LK _R E X_ D V I _C LK #_ R F F F H V F C M 1 60 8 K -1 21 T 0 6 C 1 1 2p _ 5 0V _ 0 4 L9 RE D GR N B LU E SYN C S Y NC E X_ D V I _D A T A 3# _ R E X_ D V I _D A T A 3_ R 3. 3 V S C A 1 2 3 4 5 9 10 11 12 13 15 16 17 18 19 20 21 22 23 24 C C C C 1 2 3 4 8 7 6

14

EX _ DVI_ HP D 1 0 K _0 4

L8

2 , 4 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6 , 18 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5, 2 6 , 2 9, 3 0 , 3 2, 3 3 , 3 4, 35 , 3 6 , 39 , 4 0 , 43 3 . 3 V S

B - 18 DVI

DD CL K

F C M 1 60 8 K -1 21 T 0 6 C 2 1 2p _ 5 0V _ 0 4

2, 1 4 , 1 5, 1 8 , 1 9, 2 5 , 2 6, 3 0 , 3 2, 33 , 3 5 , 39 , 4 3 , 44 5 V S

DD CD A T A

C ASE C ASE GN D GN D

. . .

C8

C1 1

C1 0 14 14 E X_ D V I _D 4 N E X _ DV I_ D4 P 1 2 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 6 4 3

14 14

E X_ D V I _D 1 N E X _ DV I_ D1 P

1 2 D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 1 4 1 3 2

14 14 5 VS

E X_ D V I _D 3 N E X _ DV I_ D3 P

D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 5 4 1 3 2

14 14

E X_ D V I _D 0 N E X _ DV I_ D0 P

PLEA SE CLO SE TO CONNE CTOR


14 14 9 12 D D C _O U T 2 14 S Y N C _O U T 1 16 S Y N C _O U T 2 3 V I D E O_ 1 4 V I D E O_ 2 5 V I D E O_ 3 6 G ND R1 5 R1 3 D D C D A TA D D C LK HS Y NC V S Y NC FR ED F G RN FBL U E 14 E X _ D V I _ C L K P 14 E X _ D V I _ C L K N E X_ D V I _D 5 N E X _ DV I_ D5 P

D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 3 4 1 3 2

D V I 2 0 12 F 2 S F -9 0 0T 0 5 _0 8 LP 4 1 2

4 3 D V I 2 01 2 F 2 S F -9 00 T 05 _ 0 8

5 VS

DVI
TM TM TM TM TM TM TM TM TM TM DS DS DS DS DS DS DS DS DS DS

Close to DVI PORT


R R R R R R R R R R R R R R M1 M2 C 5 C 6 66 65 20 19 64 63 18 17 62 61 22 21 59 60 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % 4 9 9 _1 % _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 _ 04 E X _ D V I _ D A T A 2 # _R E X _ DV I_ DA T A 2 _ R E X _ D V I _ D A T A 4 # _R E X _ DV I_ DA T A 4 _ R E X _ D V I _ D A T A 1 # _R E X _ DV I_ DA T A 1 _ R E X _ D V I _ D A T A 3 # _R E X _ DV I_ DA T A 3 _ R E X _ D V I _ D A T A 0 # _R E X _ DV I_ DA T A 0 _ R E X _ D V I _ D A T A 5 # _R E X _ DV I_ DA T A 5 _ R E X _ DV I_ CL K _ R E X _ DV I_ CL K # _ R

GN D (A N A LO G) H O T P L U G D E TE C T TM D S D A T A 0 TM D S D A T A 0 + TM D S D A T A 0 / 5 S h i e d l TM D S D A T A 5 TM D S D A T A 5 + TM D S C L K S h e l d i TM D S C L K + TM D S C l k RE D GR E E N B LU E H SY NC V SYN C DD C Da ta DD C Cl k QH 1 11 2 1- D J T0 -4 F

D SUB

Q 1 M T N 7 0 02 Z H S 3 G

3. 3 V S

Schematic Diagrams

HDMI
HDMI CONNECTOR
5VS R23 1_ 04 R14 1_0 4 J_ HDM 1 I C15 22u _6. 3V_X 5R _08 C14 22u _6. 3V_X 5R _08 18 + 5V EX _H DM C_SDA_R I_ 16 SDA 14 R 10 EX _H DM CCLKN_ R 4 I_ 3 EX _H DM CCLKP_R 1 I_ 2 L12 W CM 201 2F2S-16 1T 3 0 L11 EX _H DM C1N_ R I_ EX _H DM C1P_R I_ 2 3 W CM 201 2F2S-16 1T 3 0 1 4 D H MIG D ND R7 499 _1%_04 499 _1%_04 12 10 R9 R8 499 _1%_04 8 499 _1%_04 6 TM DS DAT A14 TM DS DAT A1+ 2 SHI E D2 L TM DS DAT A2+ 5V S N G D N 2 GD ND G D3 G N N G D N 4 GD GN D Q2 M N 7002 Z S T H 3 G D1 N G S HDMIGND T MDS DAT A2S IELD1 H SHI E D0 L TM DS DAT A0+ 5 R6 3 1 R5 499_ 1%_04 499_ 1%_04 L 10 3 2 WCM2012 F S 161 T 2 03 4 EX _HD M C2N_R I_ 1 EX _HD M C2P_R I_ SCL RESERVE D CE C TM DS CL OCKC LK SHIELD TM DS CL OCK+ T MDS DAT A07 R1 1 499_ 1%_04 2 L 13 9 11 R1 2 499_ 1%_04 3 4 EX _HD M C0N_R I_ 13 HDM _CEC I DDC/C E GND C H OT PLU G DET ECT 19 17 15 EX _H DM C_SCL_ R I_ EX _H DM CHPD_R I_ 200 9/1 1/28 _Al ex 5V S_H DM I

1 EX _HD M C0P_R I_ WCM2012 F S 161 T 2 03

B.Schematic Diagrams

Sheet 18 of 57 HDMI

C2 76 0.1 u_16 V Y5V_04 _

DF03- 714- 193 4

PI N G ND1 ~4 =G ND

14 EX HDM _CCLKP _ I 14 EX _HD M I_C CLKN 14 EX HDM C0P _ I_ 1 4 EX _HDMI_C0 N 14 EX HDM C1P _ I_ 1 4 EX _HDMI_C1 N 14 EX HDM C2P _ I_ 1 4 EX _HDMI_C2 N

EX _HD M I_C CLKP EX _HD M I_C CLKN EX HDM _C0P _ I EX _HD M I_C 0N EX HDM _C1P _ I EX _HD M I_C 1N EX HDM _C2P _ I EX _HD M I_C 2N

C3 0 C3 1 C3 2 C3 3 C2 8 C2 9 C2 6 C2 7

_ I_ 0. 1u_1 6V_Y5V_0 4 EX HDM CCLKP_R 0. 1u_1 6V_Y5V_0 4 EX HDM CCLKN_ R _ I_ 0. 1u_1 6V_Y5V_0 4 0. 1u_1 6V_Y5V_0 4 0. 1u_1 6V_Y5V_0 4 0. 1u_1 6V_Y5V_0 4 0. 1u_1 6V_Y5V_0 4 0. 1u_1 6V_Y5V_0 4 EX _HDMI_C0 P_R EX _HDMI_C0 N_R EX _HDMI_C1 P_R EX _HDMI_C1 N_R EX _HDMI_C2 P_R EX _HDMI_C2 N_R

FOR HDMI SWITCH


3. 3VS C A D02 D18 BAV99 A C R29 8 L55 _H DM CHPD_R I_ FCM 08K-12 1T 6 EX 16 0 EX _H DM CHPD I_ 10K_0 4 C423 220 p_5 0V_04 3. 3VS 5VS_HD M I 5VS_HDM I C A

R47 4. 7K_04 EX _H DM C_SCL I_

R 299 4 .7K_0 4 D R2 96 33 _04

D 19 BAV 9 9 A C D 02 L 57 X_HDMI_C_ S L_R C FCM1608 K 121 T 06 E

S Q4 M TN700 2ZHS3

3. 3VS

5VS_HD M I

5VS_HDM I C A

R43 4. 7K_04 EX _H DM C_SDA I_

R 297 4 .7K_0 4 R2 95 D Q5 33 _04

D 17 BAV 9 9 A C L 56 X_HDMI_C_ S A R D _ FCM1608 K 121 T 06 E C4 24 1 0p_ 50V_04 D 02

M TN700 2ZHS3

3 .3VS 5V S

2 ,4, 10,1 1,1 2,1 3,1 4,15 ,16 ,17 ,19 ,20, 21, 23, 24, 25, 26,2 9,3 0,3 2,33 ,34 ,35 ,36 ,39, 40, 43 2 ,14, 15, 17, 19, 25, 26,3 0,3 2,3 3,3 5,39 ,43 ,44

14 EX HDM _C_SDA _ I

14 EX _HD M I_C _SCL

14 E X_HDM _CH P I D

C4 22 1 0p_ 50V_04

HDMI B - 19

Schematic Diagrams

CougarPoint - M 1/9
R T CV C C

VD D3

20m ils
RT C_ V B A T _ 1

D1 4 1 2 A C 3 A

20m ils

IN TVRME N- In tegr ated SUS 1. 05V V RM En able Hi gh - Enabl In e terna VRs l Lo - E w nable Ext ernal VRs
C3 2 2 1 u _ 10 V _ X 5R _ 06

CougarPoint - M (HDA,JTAG,SATA)
Zo= 50O ? 5%
2 1 X3 32 . 7 6 8 K H z 2 1 X4 R 1 76 1 0 M_ 0 4 RT C_ X 1 RT C_ X 2 R T C _ R S T# S R T C _ R TC # A2 0 RT CX 1 RT CX 2 D 20 R T C R S T# G 22 S RT CR S T # INT RU DE R # C 20 F W H0 / L A D0 F W H1 / L A D1 F W H2 / L A D2 F W H3 / L A D3 C 38 A3 8 B3 7 C 37 D 36 E3 6 K3 6 V5 S E R IRQ S A TA 0 R XN S A T A 0 RX P S A T A 0 T XN S A TA 0T X P S A TA 1 R XN S A T A 1 RX P S A T A 1 T XN S A TA 1T X P S A TA 2 R XN S A T A 2 RX P S A T A 2 T XN S A TA 2T X P AM 3 AM 1 AP7 AP5 A M 10 AM 8 AP1 1 AP1 0 AD AD AH AH 7 5 5 4 S A T A R XN 0 C 6 2 4 S A T A R XP 0 C 6 2 3 S A T A T X N0 C6 2 5 S A T A T X P 0 C6 2 6 S A T A R XN 1 S A T A R XP 1 S A T A T X N1 SATATXP1 L PC L PC L PC L PC _ A D0 _ A D1 _ A D2 _ A D3 34 34 34 34 U 19 A * 32 . 7 6 8K H z

3 .3 V S S E R IRQ H DA _ S P K R 1 0K _0 4 * 1K _0 4 R3 5 8 R3 4 6 3 .3 V S

C2 6 1 15 p _ 50 V _ N P O _ 04

1 .5 V _ V CC S US H DA

10m ils
R 2 39 1K _ 0 4 J _ CBAT 2 1 J _ CBAT 1

B A T 5 4C W GH R 3 89

D02
1 3 4 C 5 05

H DA _ S Y N C

*1 K _ 0 4 1 K _0 4 D02

R 41 8 R 49 5

2 0 K _ 1% _ 0 4 J_ C B A T3 1 u _ 10 V _ X 5R _ 06 1 *B H 8 0 0 . 9G 2 8 5 2 05 -0 2 70 1 R 4 14 2 0 K _ 1% _ 0 4 C 5 23

RT C CLE AR
JO P E N 1 *O P E N _ 1 0m i l -1M M

C2 4 4 15 p _ 50 V _ N P O _ 04

3 4

*K T S -B A T -01 2 -0 01

D02

LP C

B4100 B5100

R403 R378
3. 3 V S R 42 1

F W H 4 / L F R A ME #

L P C _ F R A M E # 34 B o ard I D S E R IRQ S E RIR Q 3 4 0 . 0 1 u _1 6 V _ X5 R 0 . 0 1 u _1 6 V _ X5 R 0 . 0 1 u _1 6 V _ X5 R 0 . 0 1 u _1 6 V _ X5 R _0 4 _0 4 _0 4 _0 4 S A T A _R X N 0 S A T A _R X P 0 S A T A _T X N 0 S A T A _T X P 0 * 10 K _ 0 4 R4 2 2

X 7100M

R4 0 8 1 u _ 10 V _ X 5R _ 06 1 M_ 0 4

RT CV CC V DD 3

R 16 9 R 51 0

33 0 K _ 04 10 K _ 0 4

P C H _ I N T V R ME N

C 17 INT V RM E N

B.Schematic Diagrams

X51 00M

D02

1 4, 3 2 H D A _ S Y N C 3. 3 V S

D 32 H DA _ S P K R

H DA _ S Y N C_ R H DA _ S P K R

L34 H D A _S Y N C T10 SPKR K3 4 H D A _R S T # E3 4 H D A _S D I N 0 G 34 H D A _S D I N 1 C 34 H D A _S D I N 2 A3 4 H D A _S D I N 3

Sheet 19 of 57 CougarPoint - M 1/9

NC2 S HO RT C 2 95 0. 1 u _ 10 V _ X 5R _ 04 S P I_ V DD R 23 3 3 . 3 K _1 % _ 04 S P I_ W P # 8 VD D SI 2 SO 3 W P# R 20 3 3 . 3 K _1 % _ 04 S P I _ H O LD # 7 CE # 6 1

SPI_* = 1.5"~6.5"

BIOS ROM
32 Mb it
U 25 5 S P I_ S I S P I_ S O S P I_ CS 0 # S P I_ S CL K 34 M E_ W E# 34 34 34 34 HS HS HS HS P I _M P I _M P I _S P I _C SI SO CL K E# R R R R R 20 5 23 8 20 4 24 0 24 5 *0 _ 04 *0 _ 04 *0 _ 04 *0 _ 04 *0 _ 04 3 4 H D A _S Y N C _ C T R L

SATA 6G

Q 36 M TN 70 0 2 Z H S 3 S

RTC

S M_ I N T R U D E R #

K2 2

L D R Q0 # LD R Q 1# / G P I O2 3

1 4 , 32 H D A _ B I T C L K

N 34 H D A _B C L K

*1 0 K _ 04

1 4 , 32 H D A _ R S T #

D02
S A T A _ RX N2 3 5 S A T A _ RX P 2 3 5 S A T A _ TX N 2 35 S A T A _ TX P 2 3 5

SATA HDD SATA ODD

32 S P I_ S I S P I_ S O S P I_ S CL K S P I_ CS 0 # S P I_ CS 1 # 14

H D A _S D I N 0 H D A _S D I N 1

IHDA

SATA

S CK 4 H OL D # VSS MX 2 5 L3 2 0 5D M2 I -1 2 G

1 4 , 32 H D A _ S D OU T

RB 7 5 1 V A

HD A _ S DO UT D 11 C

A3 6 H D A _S D O C 36

S A TA 3 R XN S A T A 3 RX P S A T A 3 T XN S A TA 3T X P S A TA 4 R XN S A T A 4 RX P S A T A 4 T XN S A TA 4T X P S A TA 5 R XN S A T A 5 RX P S A T A 5 T XN S A TA 5T X P

AB8 AB1 0 AF3 AF1 Y 7 Y 5 AD 3 AD 1 Y 3 Y 1 AB3 AB1 1. 05 V S Y 11 S A T A I C O MP R 3 86 3 7. 4 _ 1 % _0 4 Y 10 S A T A _ RX N4 S A T A _ RX P 4 S A T A _ TX N 4 S A T A _ TX P 4 35 35 35 35

D02
3. 3 V R 19 4 *1 K _ 04

Flash Descriptor Security Overide


P C H _ J T A G_ T C K _ B U F

H D A _D OC K _E N # / GP I O 3 3 N 32 H D A _D OC K _R S T # / GP I O 13

J _ HD D1 S1 S2 S3 S4 S5 S6 S7 P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 S A T -22 S Y 0B P IN G ND 1 ~ 2 = G ND SATA_ TXP0 S A T A _ T X N0 S A T A _ RX N 0 S A T A _ RX P 0 3 .3 V S R1 1 3 2 10 _ 0 6 5V S R3 3 8 21 0 _ 06

J3 JT A G _T C K H 7 K5 JT A G _T D I H 1 JT A G _T D O JT A G _T M S

NO R EBOO ST T RAP: HD A_SP KR H igh Enab le P C H _ J TA G _ TM S 3 .3 V P C H _ J TA G _ TD I P C H _ J TA G _ TD O R3 5 1 21 0 _ 06

J TA G

S A T A I C O MP O S A TA I C OM P I

+V 1. 0 5 S _ S A T A 3 AB1 2 S A T A 3 R C O MP O AB1 3 S A T A 3C OM P I S A T A I C O MP R 3 83 4 9. 9 _ 1 % _0 4

P C H _ JT A G _T M S P C H _ JT A G _T D I P C H _ JT A G _T D O

SPI_ SC L K SPI_ C S0 # SPI_ C S1 # R3 8 5 R1 4 0

R1 2 2 0_04 * 0 _0 4 R1 3 8 R 1 21

0_04

T3 S P I_ CL K S P I_ CS 0 # S P I_ CS 1 # S A TA 3 R B I A S

AH 1

R B IA S _ S A T A 3 R1 3 7 R1 4 1

7 5 0 _1 % _ 04 3 .3 V S 1 0 K_ 0 4 S A T A _ L E D # 3 0 , 35 3. 3V S

S P I _ C S 0 # _R Y 1 4 S P I _ C S 1 # _R 0_04 T1

SP I

R1 4 5 HD D_ NC 0 C 6 22 HD D_ NC 1 HD D_ NC 2 HD D_ NC 3 C6 2 0 +C 3 93 1 0 0 _0 4

R3 5 9 10 0 _ 04

R3 6 1 10 0 _ 04 SPI_ SI SPI_ SO V4

P3 S A T A L E D# V1 4 S A T A 0 GP / G P I O2 1 P1 S A T A 1 GP / G P I O1 9

S A T A _ L E D# OD D _ D E T E C T# R 1 61

1 0K _0 4

S P I _ MOS I 3 3_ 0 4 S P I _ S O _R U 3 S P I _ MI S O R 12 5 4. 7K _ 0 4 P C H _J T A G _T C K _B U F U S B V CC 0 1 C o u g arP o i n t _R e v _1 p 0

* 0 . 1u _ 1 6V _0 4 1 0 0 u_ 6 . 3 V _ B 2 1 u_ 1 0 V _ 06

BBS_ BIT 0

R1 4 9

*1 K _ 0 4

BBS _BIT0 - BI OS BO OT ST RAP BIT 0


U S B V CC 0 1 E U 0 0 1 -11 7 C R L -TW 5 GN D 1 S A TA _ T X P 1 _R S A TA _ T X N 1 _ R C5 4 C5 5 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ TX P 1 _ C 1 L14 2 6 1 7 2 8 3 9 4 10 11 GN D 3 TXP VBU S TXN DGN D 2 D+ RX N GN D 4 RX P GN D 4 G ND3 GN D 2 GN D 1 G ND GN D G ND GN D

ESATA REDRIVER
S A T A T XP 1 S A T A T XN 1 S A T A RX N1 S A T A RX P 1 R 3 14 R 3 16 R 3 20 R 3 24 0 _0 4 0 _0 4 0 _0 4 0 _0 4 S A T A _ T XP 1_ R S A T A _ T XN 1 _R S A T A _ R X N 1_ R S A T A _ RX P 1 _ R S A TA T X P 1 C 17 7 S A TA T X N 1 C 18 2 S A TA R X N 1 C 18 3 S A TA R X P 1 C 19 4 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ T XP 1 1 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ T XN 1 2 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ R X N 1 4 *0 . 0 1 u_ 1 6 V _ X5 R _ 0 4 S A T A _ R X P 1 5

3 .3 V S

50 mil

L ay ou t No te :
R 10 4 U1 1 * 4. 7 K _ 0 4 *S N 7 5L V C P 41 2 7 EN 1 5 S A TA _T X P 1 _R T X_ 0 P 1 4 S A TA _T X N 1 _ R TX _ 0 N

C 18 0 . 1 u _1 0 V _ X 5R _0 4

C3 5 1 0u _ 1 0V _ Y 5V _ 0 8

ESATA POART
4 L15 3 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ TX N 1 _ C 4 3 W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ R X N 1 _ C 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 S A T A _ R X P 1 _C 1 L16 2

J _ ESATA1

Closed to U23
3. 3 V S

V DD VD D V DD VDD

6 10 16 20

23 C1 7 1 *0 . 0 1u _ 1 6V _X 5 R _0 4 C1 7 3 *0 . 1 u_ 1 6 V _ Y 5V _ 0 4 C 2 02 *1 u _6 . 3 V _ 0 4 23

US B _ P N9 US B _ P P 9

US B _ P N 9 US B _ P P 9

R X _ 0P R X _ 0N

1 2 W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt S A TA _ R XN 1 _R S A TA _ R XP 1 _ R

C5 6 C5 7

H OST
TX _ 1 N TX _ 1 P T -P A D D1 D 0

D EVICE
RX _ 1 N R X_ 1 P GN D G ND GN D G ND GN D

1 2 S A TA _R XN 1 _R 1 1 S A TA _R XP 1_ R

4 3 W C M 20 1 2F 2S -1 6 1 T0 3 -s ho rt

21

3 .3 V S

R 1 09 R 1 10 R 1 05 R 1 06

* 4 . 7K _ 0 4 * 4 . 7K _ 0 4 * 4 . 7K _ 0 4 * 4 . 7K _ 0 4

NEAR TO J_ESATA1 SN75LVCP412RTJ

6 -0 2- 75 41 2- KQ 0

B - 20 CougarPoint - M 1/9

3 13 17 18 19

La yo ut n ot e:

25 , 2 6 , 30 , 4 0 1. 05 V S 35 , 3 9 , 43 , 4 4 5V S 40 , 4 1 , 42 , 4 6 5V 36 , 3 8 , 39 , 4 5 V D D 3 2 1 , 26 RT CV C C 2 , 3 , 4 , 6, 24 , 2 5 , 26 , 4 0 , 43 1 . 0 5 V S _V TT 2 , 3, 4 , 9 , 1 4, 15 , 2 0 , 21 , 2 3 , 24 , 2 5 , 2 6, 2 8 , 2 9, 3 0 , 3 5, 3 6 , 3 7, 39 , 4 0 , 41 , 4 2 3. 3V 2 , 4 , 10 , 1 1 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 1 7 , 1 8 , 20 , 2 1 , 23 , 2 4 , 25 , 2 6 , 2 9, 3 0 , 3 2, 3 3 , 3 4, 3 5 , 3 6 , 39 , 4 0 , 43 3 . 3 V S

2 0 , 2 1, 2 , 14 , 1 5 , 1 7, 1 8 , 2 5, 2 6 , 3 0, 3 2 , 3 3, 2 6 , 2 8, 3 2 , 3 5, 3 7 , 3 9, 2 9, 3 4 , 3 5,

8 9

Schematic Diagrams

CougarPoint - M 2/9
3 . 3V RN 7

CougarPoint - M (PCI-E,SMBUS,CLK)
U1 9 B 37 37 37 37 P C I E _ R XN 1_ U S B 3 0 P C I E _ R XP 1 _ US B 30 P C I E _ T XN 1_ U S B 3 0 P C I E _ T XP 1 _ US B 30 P C I E _ R X N 2 _ GL A N P C I E _ R X P 2 _G L A N P C I E _T X N 2 _ GL A N P C I E _T X P 2 _G L A N P C I E _ R XN 3 _W LA N P C I E _ R XP 3 _ W L A N P C I E _ T XN 3 _W LA N P C I E _ T XP 3 _ W L A N P C I E _ R XN 4 _1 3 9 4 P C I E _ R XP 4 _ 1 3 94 P C I E _ T XN 4 _1 3 9 4 P C I E _ T XP 4 _ 1 3 94 P C I E _ R XN 5 _3 G P C I E _ R XP 5 _ 3 G P C I E _ T XN 5 _3 G P C I E _ T XP 5 _ 3 G C 5 62 C 5 63 0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _0 4 B G3 4 BJ 3 4 AV3 2 A U3 2 BE3 4 BF3 4 BB3 2 A Y3 2 B G3 6 BJ 3 6 AV3 4 A U3 4 BF3 6 BE3 6 A Y3 4 BB3 4 B G3 7 B H3 7 A Y3 6 BB3 6 BJ 3 8 B G3 8 A U3 6 AV3 6 B G4 0 BJ 4 0 A Y4 0 BB4 0 BE3 8 B C3 8 AW 3 8 A Y3 8 P E RN 1 P E RP 1 P E T N1 PETP1 P E RN 2 P E RP 2 P E T N2 PETP2 P E RN 3 P E RP 3 P E T N3 PETP3 P E RN 4 P E RP 4 P E T N4 PETP4 E 12 S M B A L E R T # / GP I O 1 1 H1 4 S M B C LK C9 S M B DA TA S M B _D A T A S M B _C L K P C H_ B T _E N # P C H _ B T _ E N# S M B _C L K 2 , 10 , 1 1 , 1 2, 1 3 S M B _D A T A 2 , 1 0, 1 1 , 1 2, 13

S ML 0 _ C L K S MB _D A T A S MB _C L K S ML 0 _ D A T A

4 3 2 1

5 6 7 8 2 . 2K _8 P 4 R _ 0 4

S M C _ C P U _ T HE R M_ R S M C _ C P U _ T HE R M

R2 9 0 R3 9 7

2 . 2 K _0 4 2 . 2 K _0 4

SMBUS

36 36 36 36 29 29 29 29 16 16 16 16 28 28 28 28

C 5 57 C 5 58

0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _0 4

A 12 S ML 0 A L E R T # / GP I O 6 0 C8 S M L0 C LK G1 2 S ML 0 DA TA

D RA M RS T _ CN T RL _ R S M L0 _ C L K S M L0 _ D A T A

D R A MR S T_ C N T R L 4 , 9

R N8 1 0 K _ 8P 4 R _0 4 U S B 30 _ C L K R E Q# _ R 8 1 P CH _ B T _E N # 7 2 6 3 P CI E C L K R Q 6 # 5 4 D R A MR S T _C N T R L 13 9 4 _P C I E C LK R Q5 # R1 6 2 R3 8 8 1 K _ 04 1 0K _0 4

C 5 55 C 5 56

0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _0 4

C 5 64 C 5 65

0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _0 4

C1 3 S ML 1 A L E RT # / P C H H OT # / GP I O 7 4 E 14 S M L 1C LK / GP I O 5 8 M1 6 S M L1 D A TA / GP I O 7 5 S MC _ C P U _ T H E R M_ R R 3 9 0 S M D_ C P U _ TH E R M *0 _ 0 4

B.Schematic Diagrams

C 5 66 C 5 67

0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _0 4

P E RN 5 P E RP 5 P E T N5 PETP5 P E RN 6 P E RP 6 P E T N6 PETP6 P E RN 7 P E RP 7 P E T N7 PETP7 P E RN 8 P E RP 8 P E T N8 PETP8

PCI-E*

S MC _ C P U _T H E RM 34 S MD _ C P U _T H E RM 34 3 .3 V S

Controller

PCI-E x1 L ane L ane L ane L ane L ane L ane L ane L ane 1 2 3 4 5 6 7 8

Usage US B3.0 GL / CARD R AN EADER WL AN 13 94 3G X X X


3 7 CL K _ P C IE _ US B 3 0 # 3 7 C L K _ P CI E _U S B 3 0 3 7 U S B 3 0 _ C L K R E Q# R3 3 5 0_ 0 4 U S B 30 _ C L K R E Q# _ R

C L _C L K 1

M7 T1 1

CL _ CL K 1 CL _ DA T A1

C L_ C LK 1 2 9 C L_ D A TA 1 2 9

Link

C L_ D A T A 1 P 10 CL _ RS T 1 # CL _ RS T # 1

P C I E C L K R Q 2#

R 3 47

1 0 K_ 0 4

C L_ R S T# 1 2 9

P C I E C L K R Q 1# DG P U_ P R SNT # I C H _ GP I O 46

R 1 42 R 2 10 R 3 71

1 0 K_ 0 4 * 1 0K _ 0 4 1 0 K_ 0 4 3 . 3V

10 pu K ll-do t wn o GN D M1 0 MX M _C L K R E Q # C L K _ P C I E _ MX M# C L K _ P C I E _ MX M MX M _C L K R E Q # 14 RN 3 10 K _ 8 P 4 R _ 0 4 8 1 7 2 6 3 5 4

Y4 0 Y3 9 J2

P E G _ A _ C L K R Q # / GP I O 4 7 CL K O UT _ P CIE 0 N CL K O UT _ P CIE 0 P AB3 7 AB3 8

CLOCKS

P C I E C L K R Q 0 # / G P I O 73 AB4 9 AB4 7 P C I E CL K R Q1 # M1 AA4 8 AA4 7 P C I E CL K R Q2 # V1 0 P C I E C L K R Q 2 # / G P I O 20 Y3 7 Y3 6 A8 P C I E C L K R Q 3 # / G P I O 25 Y4 3 Y4 5 L A N _ CL K RE Q # L12 P C I E C L K R Q 4 # / G P I O 26

C L K O U T _ P E G_ A _ N C LK OU T _ P E G _A _P

C L K _ P C I E _ MX M# 1 4 C L K _ P C I E _ MX M 1 4 CL K _ E X P _ N 4 CL K _ E X P _ P 4

MX M _C L K R E Q # L A N _ C L K R E Q# C L K _ B U F _C P Y C L K _ N C L K _ B U F _C P Y C L K _ P

Sheet 20 of 57 CougarPoint - M 2/9

CL K O UT _ P CIE 1 N CL K O UT _ P CIE 1 P P C I E C L K R Q 1 # / G P I O 18

C L K OU T_ D MI _ N CL K O U T _ D MI _P

AV2 2 A U2 2 A M1 2 A M1 3 BF1 8 BE1 8

I C H _ GP I O 46

R3 7 2

*1 0 K _ 0 4

C L K O U T _ DP _ N C LK O U T _ DP _P CL K O UT _ P CIE 2 N CL K O UT _ P CIE 2 P C L K I N _ D MI _ N C L K I N _ D MI _P C L K I N_ GN D1 _ N CL K I N _G N D 1 _P C L K I N _ D O T _9 6 N C L K I N _D OT _ 9 6P CL K O UT _ P CIE 4 N CL K O UT _ P CIE 4 P C L K IN_ S A T A _ N C L K I N _S A TA _P R EF CL K 1 4 IN

C L K _ P C I E _ I CH _N _R C L K _ P C I E _ I CH _P _ R

R4 0 1 R3 9 6

*0 _ 04 *0 _ 04

C L K _ P C I E _I C H _ N 2 C L K _ P C I E _I C H _ P 2

2 9 C L K _ P C I E _ MI N I # 29 C LK _P C I E _ MI N I 2 9 W LA N _ C L K R E Q#

CL K O UT _ P CIE 3 N CL K O UT _ P CIE 3 P

B J3 0 C L K _ B U F _ C P Y C L K _ N B G3 0 C L K _ B U F _ C P Y C L K _ P G2 4 E 24

C C C C

C L K _ B U F _R E F 1 4 _R R C L K _ P C I E _I C H _ N _R R C L K _ P C I E _I C H _ P _ R R L K _B U F _ D O T 96 _ N_ R R L K _B U F _ D O T 96 _ P _ R R L K _B U F _ C K S S C D _N _ RR L K _B U F _ C K S S C D _P _ R R

4 35 4 00 3 95 4 12 4 04 3 49 3 48

1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4

C L K _ B U F _D OT 9 6 _N _ R C L K _ B U F _D OT 9 6 _P _R

R4 1 1 R4 0 3 R3 3 7 R3 3 6 R4 3 7 *0 _ 04

*0 _ 04 *0 _ 04 *0 _ 04 *0 _ 04

C L K _ B U F _D OT 9 6 _N 2 C L K _ B U F _D OT 9 6 _P 2

X7 2

3 6 C L K _ P C I E _ G LA N # 3 6 C L K _ P C I E _ GL A N

*2 5 MH z 1 4 C 30 3 1 1 8p _ 5 0V _N P O_ 0 4

AK7 AK5

C L K _ B U F _C K S S C D _ N _ R C L K _ B U F _C K S S C D _ P _ R

C L K _ B U F _C K S S C D _ N 2 C L K _ B U F _C K S S C D _ P 2

1 6 C L K _ P C I E _ 1 3 9 4# 1 6 C L K _ P C I E _ 1 3 94

V4 5 V4 6 1 3 9 4 _P C I E C L K R Q5 # L 1 4 AB4 2 AB4 0 E6 2 8 3 G_ C LK R E Q# V4 0 V4 2 P CI E C LK R Q6 # T13 V3 8 V3 7 I C H _ G P I O4 6 4 1 I C H_ GP I O4 6 AK1 4 AK1 3 K1 2

CL K O UT _ P CIE 5 N CL K O UT _ P CIE 5 P P C I E C L K R Q 5 # / G P I O 44

K 45 H4 5

C L K _ B U F _R E F 1 4 _R

C LK _B U F _ R E F 1 4 2 C LK _P C I _ F B 2 3 R2 1 7 1 M_ 0 4

C L K I N _ P C I L OOP B A C K V 47 V 49 X TA L2 5 _ I N X TA L2 5 _ OU T

X8 X 8 A 0 25 0 0 0F G1 H _ 2 5M H z 2 C 30 2 1 8p _ 5 0V _N P O_ 0 4

2 8 C L K _ P C I E _ 3 G# 2 8 C L K _ P CIE _ 3 G

C L K O U T _ P E G_ B _ N C L K O U T _ P E G_ B _ P P E G_ B _ C LK R Q# / G P I O5 6

X T A L 25 _ I N X T A L2 5 _ OU T

Y4 7 XC L K _R C O MP CL K O UT _ P CIE 6 N CL K O UT _ P CIE 6 P P C I E C L K R Q 6 # / G P I O 45

X C L K _ R C OM P

R2 0 8

90 . 9 _ 1% _ 0 4

1. 05 V S 90.9 ? % p -O ullu p to + VccI O (1.0 5V, S0 r ail) 1 . 0 5V S 1 9 , 21 , 2 5 , 26 , 3 0 , 4 0 3 .3 V S 2 , 4 , 10 , 1 1 , 1 2, 1 3 , 1 4, 15 , 1 6 , 17 , 1 8 , 1 9, 2 1 , 2 3, 24 , 2 5 , 26 , 2 9 , 3 0, 3 2 , 3 3, 34 , 3 5 , 36 , 3 9 , 4 0, 4 3 1 . 0 5V S _V TT 2 , 3 , 4 , 6, 2 4 , 2 5 , 26 , 4 0 , 43 3 .3 V 2 , 3 , 4, 9 , 1 4 , 1 5, 1 9 , 2 1 , 23 , 2 4 , 25 , 2 6 , 2 8, 2 9 , 3 0 , 35 , 3 6 , 37 , 3 9 , 4 0, 4 1 , 4 2

FL EX C LO CK S

CL K O UT _ P CIE 7 N CL K O UT _ P CIE 7 P P C I E C L K R Q 7 # / G P I O 46 C L K O U T _ I TP X D P _ N C L K O U T _ I TP X D P _ P Co u g a rP oi n t _ R e v _ 1 p0

C LK O U T F L E X 0 / GP I O 6 4 C LK O U T F L E X 1 / GP I O 6 5 C LK O U T F L E X 2 / GP I O 6 6 C LK O U T F L E X 3 / GP I O 6 7

K 43 F 47 H4 7 K 49 DG PU_ P R S NT # D G P U _ P R S NT # 14

CougarPoint - M 2/9 B - 21

Schematic Diagrams

CougarPoint - M 3/9
CougarPoint -M (DMI,FDI,GPIO)
U1 9 C 3 .3 V S 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 DM DM DM DM DM DM DM DM D D D D I_ RX N I_ RX N I_ RX N I_ RX N 0 1 2 3 BC 2 4 BE2 0 BG 1 8 BG 2 0 BE2 4 BC 2 0 BJ 1 8 BJ 2 0 AW 2 4 AW 2 0 BB1 8 AV1 8 AY AY AY AU 24 20 18 18 D D D D D D D D D D D D MI 0 R MI 1 R MI 2 R MI 3 R MI 0 R MI 1 R MI 2 R MI 3 R XN XN XN XN XP XP XP XP F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R F DI_ R FD FD FD FD FD FD FD FD X N0 X N1 X N2 X N3 X N4 X N5 X N6 X N7 B A B B B B B B B B B B B B B B J1 4 Y1 4 E1 4 H1 3 C1 2 J1 2 G1 0 G9 G1 4 B1 4 F14 G1 3 E1 2 G1 2 J1 0 H9 P M_ C L K R U N # R1 2 3 8 .2 K _ 0 4 3 .3 V

I_ RX P 0 I_ RX P 1 I_ RX P 2 I_ RX P 3 _T X N _T X N _T X N _T X N 0 1 2 3

P CIE _ W A K E # P M_ S L P _ L A N # S W I# S US _ P W R_ A C K P W R_ B T N # A C_ P R E S E N T

R1 5 5 R3 8 7 R1 5 6 R1 5 9 R4 0 5 R4 0 2

1 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 1 0 K_ 0 4 * 1 0 K _ 04 1 0 K_ 0 4

DMI

D MI _T X P 0 D MI _T X P 1 D MI _T X P 2 D MI _T X P 3 R4 1 5 4 9 . 9 _ 1% _ 0 4 D M I _ C O MP _R

D MI 0 T X P D MI 1 T X P D MI 2 T X P D MI 3 T X P

FDI

MI MI MI MI

MI 0 T X N MI 1 T X N MI 2 T X N MI 3 T X N

I_ RX P 0 I_ RX P 1 I_ RX P 2 I_ RX P 3 I_ RX P 4 I_ RX P 5 I_ RX P 6 I_ RX P 7

F D I_ INT

A W16 P M_ B A T L O W # A V1 2 B C1 0 R3 8 1 8 .2 K _ 0 4 R TC V C C A V1 4

B.Schematic Diagrams

1 .0 5 VS

BJ 2 4 D MI _ Z C OM P BG 2 5 D MI _ I R C O MP F DI_ F S Y N C1 F D I _L S Y N C 0 F DI_ F S Y N C0

R4 0 7

7 5 0 _1 % _ 0 4

BH 2 1 D MI 2 R B I A S

D S W O D V RE N

R1 7 4 R1 8 0

3 3 0 K_ 0 4 * 3 3 0K _0 4

Sheet 21 of 57 CougarPoint - M 3/9


S U S _ P W R _ A CK C 12 3 .3 VS R1 4 4 1 0K _0 4 S Y S _ RE S E T # K3

B B1 0 F D I _L S Y N C 1 A L L _S Y S _ P W R G D A 18 D S W V R ME N D S W OD V R E N

R1 3 3

1 0 K_ 0 4

System Power Management

E 22 DP W RO K B 9 W AKE# N 3 C L K R U N # / G P I O3 2 G8 S U S _ S T A T # / G P I O6 1 N 14 S U S C LK / G P I O6 2 D 10 S L P _ S 5 # / G P I O6 3 H 4 SL P_ S4 # F 4 SL P_ S3 # G 10

SU SAC K#

R S M R S T#

S Y S _ RE S E T # P1 2 S Y S _ P W R OK L22 P W RO K

PC IE_ W AKE #

DSWODVREN - On Die DSW VR Enable


P C I E _ W A K E # 2 8 , 2 9, 3 6 , 3 7

S Y S _ P W R OK

P M _C L K R U N #

R7V STUFFED, 25 R7V UNSTUFFED 26

Enabl (DEFAULT) ed

3 4 P M_ P C H _P W R O K

P M _P C H _ P W R OK

SU S_ STAT#

D02
S U S CL K SL P_ S5 #

R 378

0_04

P M_ M P W R OK

L10 A P W RO K B1 3

R7V STUFFED, 26 R7V UNSTUFFED 25

Disab led

4 P M_ D R A M _ P W R GD R S M R S T# 1 0 K_ 0 4 S U S _ P W R _A C K C 21

D R A M P W R OK

34

R S M RS T #

R4 0 6

R S MR S T # K1 6

S U S C# SU SB#

3 4, 41

3 4 SU S_ PW R _ AC K P W R _ B T N#

S U S W A R N #/ S U S P W R D N A C K / GP I O 3 0 E2 0 P W RB T N #

SU SB#

3 3, 34 , 3 7 , 3 9

34

P W R_ B T N#

SL P_ A# G 16

SL P_ A#

23 , 3 4 A C _ P R E S E N T

A C _P R E S E N T

H 20 A C P R E S E N T / GP I O3 1 E1 0 B A T L O W # / G P I O7 2 A1 0 R I# C o ug a rP o i n t _ R e v _ 1 p 0 S L P _ L A N # / G P I O2 9 P M S Y N CH SL P_ SU S#

SL P_ SU S#

P M _B A T LO W # S W I# 34 S W I#

A P1 4

H _ P M_ S Y N C P M _S LP _L A N #

K 14

3 .3 V 3 .3 V 3 .3 V U1 7 A 7 4L V C 0 8 P W 1 4 1 D D R 1 . 5 V _ P W R GD 4 0 1 .0 5 VS_ PW R G D 2 7 7 7 1 .0 5 V S _ V T T _ E N 40 14 4 4 2 1 .8 V S _ P W R G D 3 5 7 6 14 U 17 B 7 4 L V C0 8 P W 14 9 4 6 0 . 8 5V S _ P W R GD 1 . 0 5 V S _ V T T _E N 10 R1 3 5 10 K _ 0 4 8 3 .3 V 14 U1 7 C 74 L V C 0 8P W 12 4 3 D E L A Y _P W R G D 13 11 U 1 7D 7 4 L V C0 8 P W

R 134 *1 0 m li _ s h ort SY S_ PW R O K

R 3 77

*0 _ 04

P M_ M P W R OK

A L L _ S Y S _ P W R GD

2 , 1 4, 15 , 3 4 , 4 3

ON
1. 05 V S 1 9 , 2 0 , 2 5, 2 6 , 3 0 , 4 0 0. 85 V S 7 ,4 6 3. 3V S 2 , 4 , 1 0 , 1 1, 12 , 1 3 , 1 4 , 1 5, 16 , 1 7 , 1 8 , 1 9, 2 0 , 2 3 , 2 4 , 2 5, 2 6 , 2 9 , 3 0 , 3 2, 3 3 , 3 4 , 3 5 , 3 6, 3 9 , 4 0 , 4 3 3. 3V 2 , 3 , 4 , 9 , 1 4 , 15 , 1 9 , 2 0 , 2 3 , 24 , 2 5 , 2 6 , 2 8, 29 , 3 0 , 3 5 , 3 6, 37 , 3 9 , 4 0 , 4 1, 42 1. 05 V S _V TT 2 , 3 , 4 , 6 , 2 4 , 2 5 , 26 , 4 0 , 4 3 RT C V CC 1 9 ,2 6 V DD 3 1 9 , 2 9 , 3 4, 3 5 , 3 6 , 3 8 , 39 , 4 5

B - 22 CougarPoint - M 3/9

Schematic Diagrams

CougarPoint - M 4/9
CougarPoint -M (LVDS,DDI)

U 19D J47 M 45 P 45 L _BK C L LT T T 40 K 47 T 45 P 39 A 37 F A 36 F A 48 E A 47 E L _DDC _CLK L _DDC _DA A T L _CT RL_ CLK L _CT RL_ T DA A L _IBG VD L _VB VD G L _VR H VD EF L _VR L VD EF S O_ RLC DV CT LK SD _CT LDA A VO R T P 38 M 39 S O_S A DV T LLN S O_S A DV T LLP SD _INT VO N S O_ N P DV I T L _BK E LT N L _VD D_E N S O_T CLK DV V INN SD _T LK N VO VC I P A P43 A P45 A 42 M A 40 M A P39 A P40

B.Schematic Diagrams

Display P ort B

LVDS

A 39 K A 40 K A N48 A 47 M A 47 K A J48 A N47 A 49 M A 49 K A J47

L SA VD _CLK # L SA VD _CLK L SA VD _DA A T #0 L SA VD _DA A T #1 L SA VD _DA A T #2 L SA VD _DA A T #3 L SA VD _DA A T0 L SA VD _DA A T1 L SA VD _DA A T2 L SA VD _DA A T3

Digital Display Interface

DD _0N PB DDP _0P B DD _1N PB DDP _1P B DD _2N PB DDP _2P B DD _3N PB DDP _3P B

A V42 A V40 A V45 A V46 A U48 A U47 A V47 A V49

SDVO

DD _A N PB UX DDP _AU P B X DD _HP PB D

A 49 T A 47 T A 40 T

Sheet 22 of 57 CougarPoint - M 4/9

DDP CT C_ RLC LK DD _CT LDA A PC R T

P 46 P 42

A 40 F A 39 F A H45 A H47 A 49 F A 45 F A H43 A H49 A 47 F A 43 F

L SB VD _CLK # L SB VD _CLK L SB VD _DA A T #0 L SB VD _DA A T #1 L SB VD _DA A T #2 L SB VD _DA A T #3 L SB VD _DA A T0 L SB VD _DA A T1 L SB VD _DA A T2 L SB VD _DA A T3

D C_0N DP DD _0P PC D C_1N DP DD _1P PC D C_2N DP DD _2P PC D C_3N DP DD _3P PC

A Y47 A Y49 A Y43 A Y45 B A47 B A48 B B47 B B49

N48 P 49 T 49

C _B RT LUE C _G EN RT RE C _R RT ED

DDP CT D_ RLC LK DD _CT LDA A PD R T

M 43 M 36

M 47 M 49

C _H NC RT SY C _V YNC RT S

R 431

1K_1%04 _

DA C_IRE _R F

T 43 T 42

D C_IRE A F C _IRT RT N C ougarP oint_Rev_1p0

D D_0N DP DD _0P PD D D_1N DP DD _1P PD D D_2N DP DD _2P PD D D_3N DP DD _3P PD

B B43 B B45 B F44 B E44 B F42 B E42 B J42 B G42

Connect to GND

No Connect External Graphics (PCH Integrated Graphics Disable)

External Graphics (PCH Integrated Graphics Disable)


2,4,10,11,12,13,14,15,16,17,18,19,20,21,23,24,25,26 29 30 32 3 3 3 , , , , 3, 4, 5,36,39,40,43 3 3V . S 2,14,15,17,18 19 25 26 3 3 3 , , , , 0, 2, 3,35,39,43,44 5 VS

Display P ort D

T 39 M 40

C _D RT DC_C LK C _D RT DC_D A AT

CRT

D D_A N DP UX DD _AU P PD X D D_HP DP D

A 45 T A 43 T B H41

Display P ort C

D C_A N DP UX DD _AU P PC X D C_HP DP D

A P47 A P49 A 38 T

CougarPoint - M 4/9 B - 23

Schematic Diagrams

CougarPoint - M 5/9
CougarPoint -M (PCI,USB,NVRAM)
Boot BIOS Strap
BBS_BIT1 0 0 1 1
R 436 U19E BG2 6 BJ2 6 BH2 5 BJ1 6 BG1 6 AH3 8 AH3 7 A 3 K4 A 5 K4 C1 8 N3 0 H 3 AH1 2 AM 4 AM 5 Y1 3 K2 4 L2 4 A 6 B4 A 5 B4 RS 1 VD RS 2 VD RS 3 VD RS 4 VD RS 5 VD RS 6 VD RS 7 VD RS 8 VD RS 9 VD RS 10 VD RS 11 VD RS 12 VD RS 13 VD RS 14 VD RS 15 VD RS 16 VD RS 17 VD RS 18 VD RS 19 VD RS 20 VD RS 21 VD RS 22 VD RS 23 VD RS 24 VD RS 25 VD RS 26 VD RS 27 VD T 25 P T 26 P T 27 P T 28 P T 29 P T 30 P T 31 P T 32 P T 33 P T 34 P T 35 P T 36 P T 37 P T 38 P T 39 P T 40 P RS 28 VD RS 29 VD

BBS_BIT0 0 1 0 1
*1K _04

Boot BIOS Location LPC Reserved PCI SPI


B S_B B IT1

(NAND)

B.Schematic Diagrams

Sheet 23 of 57 CougarPoint - M 5/9

Und erstand the RE D FONT d efine


R 433 *1K _04 P CI_GN T#3

B2 1 M2 0 AY1 6 BG4 6

RSVD

T1 P T2 P T3 P T4 P T5 P T6 P T7 P T8 P T9 P T 10 P T 11 P T 12 P T 13 P T 14 P T 15 P T 16 P T 17 P T 18 P T 19 P T 20 P

A Y7 A V7 A U3 B G4 A T10 B C8 A U2 A T4 A T3 A T1 A Y3 A T5 A V3 A V1 B B1 B A3 B B5 B B3 B B7 B E8 B D4 B F6 A V5 A V10 A T8 A Y5 B A2 A T12 B F3

T 21 P T 22 P T 23 P T 24 P

3 3V . S 5 6 7 8 3 3V . S R N13 4 3 2 1 INT_P IRQA # INT_P IRQD # INT PIRQ _ E# SA A T _ODD_D A#

R4 30

*1K _04

INT_P IRQE #

10K 4R_04 _8P

MPC Sw itch Co ntrol MPC OF F -- 0 DEFAULT MPC ON -- 1

B 8 E2 BC3 0 B 2 E3 BJ3 2 BC2 8 B 0 E3 B 2 F3 BG3 2 A 6 V2 B 6 B2 AU2 8 AY3 0 AU2 6 AY2 6 A 8 V2 A 0 W3

3 3V . S R206 R438 5 6 7 8 RN 12 10 K_04 INT_P IRQH # *10K _04 DG PW ELE # PU_ M_S CT 4 3 2 1 P CI_RE Q#0 P CI_RE Q#1 P CI_RE Q#3 INT_P IRQG # 35 S ATA _OD D_DA # P CI_RE Q#0 P CI_RE Q#1 P CI_RE Q#3 B _B T1 BS I DGP U_P _SE CT# WM LE P CI_GNT#3 INT_P IRQE # S A AT _OD D_DA # INT_P IRQG# INT_P IRQH# C4 6 C4 4 E4 0 D4 7 E4 2 F4 6 G4 2 G4 0 C4 2 D4 4 K1 0 P LT_RS T# C 6 H4 9 H4 3 J4 8 K4 2 H4 0

PCI

R426 8.2K _04 R427 8.2K _04

INT IRQB _P # INT IRQC _P #

INT_P IRQA # INT_P IRQB # INT_P IRQC# INT_P IRQD#

K4 0 K3 8 H3 8 G3 8

PIR QA# PIR QB# PIR QC# PIR QD# RE Q1# / GPIO 50 RE Q2# / GPIO 52 RE Q3# / GPIO 54 GNT / GP 1# IO51 GNT / GP 2# IO53 GNT / GP 3# IO55 PIR QE# / GP IO2 PIR QF# / GP IO3 PIR QG# / GP O I 4 PIR QH# / GP O I 5 PM E# PL TRST # CLK OUT_P CI0 CLK OUT_P CI1 CLK OUT_P CI2 CLK OUT_P CI3 CLK OUT_P CI4

US P0N B US 0P BP US P1N B US 1P BP US P2N B US 2P BP US P3N B US 3P BP US P4N B US 4P BP US P5N B US 5P BP US P6N B US 6P BP US P7N B US 7P BP US P8N B US 8P BP US P9N B US 9P BP US P10N B US 10P BP US P11N B US 11P BP US P12N B US 12P BP US P13N B US 13P BP US RB A # B I S US RB A B I S OC0# / GP O I 59 OC1# / GP O I 40 OC2# / GP O I 41 OC3# / GP O I 42 OC4# / GP O I 43 OC5# / GP O I 9 OC6# / GP O I 10 OC7# / GP O I 14

C24 A 24 C25 B 25 C26 A 26 K 28 H28 E 28 D28 C28 A 28 C29 B 29 N28 M28 L30 K 30 G30 E 30 C30 A 30 L32 K 32 G32 E 32 C32 A 32 C33 B 33 A 14 K 20 B 17 C16 L16 A 16 D14 C14

US B_P N0 US B_P 0 P US B_P N1 US B_P 1 P US B_P N2 US B_P 2 P US B_P N3 US B_P 3 P US B_P N4 US B_P 4 P US B_P N5 US B_P 5 P

35 35 35 35 28 28 29 29 35 35 28 28

USB PO RT0 US B PORT1

HM65 no s upport Port6 and Port7

D02

USB

US PN9 19 B_ USB P9 19 _P US B_P N6 35 US B_P 6 35 P

D02

3.3V US B_O C#89 US B_O C#1011 US B_O C#67 US B_O C#1213 U _B A SB I S R187 22.6_1% _06 10K 4R_04 _8P US B_O C#23 US B_O C#14 US B_O C#45 5 6 7 8 R N10 4 3 2 1 5 6 7 8 R N9 4 3 2 1

10K 4R_04 _8P

34

P E M#

PIN PLT_RST# to Buffer

4 14 P , LT_RS T#

20 CLK CI_FB _P 34 P CLK _KB C

R211 R434

22 _04 22 _04

CLK CI_FB _P _R CLK CI_KB _P C_R

U _OC# SB 1 U _OC# SB 23 U _OC# SB 45 U _OC# SB 67 U _OC# SB 89 U _OC# SB 1011 U _OC# SB 1213 U _OC# SB 14 G PIO14

U _OC 35 SB #1

10K 4R_04 _8P

R398

* 0_04

A C_P SE RE NT 21,34

3. 3 VS C 228 *0.1u_10V 5R_04 _X 1 4 2 3 M C74V HC1G 08DF T1G R157 100K_04 B UF_PLT RST 16,28,29,34,36,37 _ # 5 U15

CougarP oint_Rev_1p0

PLT _RST #

2,4, 10 11,12,13,14,15,16,17,18,19, 2 21,24,25,26,29,30,32,33,34,35, 36 39,40,43 3.3VS , 0, , 2,3,4,9,14,15,19, 2 21,24,25,26,28,29,30,35,36,37, 39 40,41,42 3.3V 0, ,

B - 24 CougarPoint - M 5/9

Schematic Diagrams

CougarPoint - M 6/9
CougarPoint - M (GPIO,VSS_NCTF,RSVD)
U 19 F E D P _C A R D _ D E T # 34 3 . 3V S R3 4 2 10 K _ 1 % _ 0 4 E D P _ CA R D_ D E T # S MI # S MI # D G P U _H P D _I N T R # SCI # ICC _ E N# 1 0 K_ 0 4 E D I D _ S E L E C T# T7 B M B U S Y # / G P I O0 A4 2 T A C H 1 / G P I O1 H 36 T A C H 2 / G P I O6 E3 8 T A C H 3 / G P I O7 C 10 GP I O8 C 4 L A N _ P H Y _ P W R _ C TR L / G P I O1 2 G2 GP I O1 5 U 2 S A T A 4 G P / G P I O1 6 RC IN # D G P U _P W R O K * 0 _0 4 B IO S _ RE C HO S T _ A L E RT # 2 3 . 3V S R1 2 4 * 10 K _ 0 4 GF X _ C R B _ D E T 15 S B _ B L ON S B _ B L ON P L L _O D V R _ E N R 1 43 MP C _ L E D _ C TR L 1 0 0 K_ 0 4 33 P C H_ M UT E # P C H _ MU T E # S A T A _ OD D _P R S N T #_ R F D I _O V R V L TG 3 . 3V S R 1 26 *1 0 K _ 04 CR B_ S V_ DE T MF G _ MO D E GF X _ C R B _ D E T K4 GP I O3 5 V8 S A T A 2 G P / G P I O3 6 M5 S A T A 3 G P / G P I O3 7 N 2 S L OA D / G P I O 3 8 M3 S D A T A OU T 0 / GP I O3 9 D02 1 0 0 K_ 0 4 C R I T _ TE MP _ R E P # _ R R 3 66 3 . 3V S R 3 94 10 K _ 0 4 T E S T _ S E T _ UP V S S _ N CT F _ 1 8 A4 R 3 93 A4 4 * 0 _0 4 3 .3 V VS S_ N CT F _ 2 A4 5 VS S_ N CT F _ 3 A4 6 VS S_ N CT F _ 4 A5 R1 4 7 R1 6 0 1 K_ 0 4 1 0 K _ 04 H O S T_ A L E R T # 1 IC C_ E N # HO S T _ A L E RT # 2 B4 7 VS S_ N CT F _ 8 BD 1 VS S_ N CT F _ 9 BD 4 9 VS S_ N CT F _ 1 0 B E1 3 .3 V S R N 11 1 2 3 4 8 7 6 5 S CI# S MI # MF G _ MO D E S A T A _ O D D _ P W R GT BE4 9 VS S_ N CT F _ 1 2 B F1 VS S_ N CT F _ 1 3 BF 4 9 VS S_ N CT F _ 1 4 C ou g a rP o i nt _R e v _ 1 p0 C R I T _T E M P _ R E P # _R MP C _ LE D _ C T R L DG P U_ H P D_ IN T R# V S S _ N CT F _ 3 2 V S S _ N CT F _ 3 1 F4 9 V S S _ N CT F _ 3 0 F1 VS S_ N CT F _ 1 1 V S S _ N CT F _ 2 9 E4 9 V S S _ N CT F _ 2 8 E1 V S S _ N CT F _ 2 7 D4 9 V S S _ N CT F _ 2 6 D1 VS S_ N CT F _ 5 A6 VS S_ N CT F _ 6 B3 R3 7 9 1 0 K _ 04 VS S_ N CT F _ 7 V S S _ N CT F _ 2 5 C4 8 V S S _ N CT F _ 2 1 V S S _ N CT F _ 2 0 BJ 4 5 VS S_ N CT F _ 1 V S S _ N CT F _ 1 9 BJ 4 4 BJ 4 10 0 K _ 0 4 T E S T_ D E T V3 S A T A 5 G P / G P I O4 9 D 6 GP I O5 7 V S S _ N CT F _ 1 7 B H 47 V S S _ N CT F _ 1 6 BH 3 T E S T _ S E T _ UP V1 3 S D A T A OU T 1 / GP I O4 8 V S S _ N CT F _ 1 5 B G 48 BG 2 NC _ 1 P3 7 TS_ VSS 4 TS_ VSS 3 AK1 0 A 2 0 GA T E A U 16 H _ P E C I _ R 1 4 D GP U _ H O L D _ R S T# D G P U _H OL D _ R S T # P E CI P5 R3 4 0 1 0 K_ 0 4 3 . 3V S P4 R3 4 3 R1 6 8 R1 7 3 1 0 K_ 0 4 3 . 3V S G A2 0 34 V _ N V R A M _V C C Q T A C H 7 / GP I O 7 1 T A C H 6 / GP I O 7 0 A4 0 T A C H 5 / GP I O 6 9 C4 1 T A C H 4 / GP I O 6 8 B4 1 P C H _ GP I O 5 7 R2 0 0 R2 0 1 R1 9 8 1 . 5 K _ 1 %_ 0 4 1 . 5 K _ 1 %_ 0 4 C4 0 S A T A _ O D D _P W R G T S A TA _O D D _ P W R GT 3 5 1 . 5 K _ 1 % _ 04 3 .3 V S 3 .3 V S R 5 14 *0 _ 0 4 H _P E C I 4 , 3 4

D GPU H DP (NV CONT ROL B YSELF) 34 2 ,4 1 3 . 3V S CI# ICC _ E N# R 15 3

R 3 41 * 0 _0 4

HO S T _ A L E RT # 1 3 . 3V S R3 4 4 1 0 K_ 0 4 B IO S _ RE C

* 10 K _ 0 4 1 . 05 V S _V TT * 0_ 0 4

CPU/MISC

T A C H 0 / G P I O1 7 T5 S C LO C K / GP I O2 2 E8 GP I O2 4 / M E M_ L E D E1 6 GP I O2 7 P8 GP I O2 8 K1 S T P _ P C I # / GP I O3 4

GPIO

BI OS R EC OV ER Y DI SA BL E- -- -N O S TU FF ( DE FA UL T ) EN AB LE -- -- -S TU F F

R 3 57 D 40

B.Schematic Diagrams

A Y 11 P RO CP W RG D A Y 10 TH R MT R I P # T 14 I N I T 3 _ 3V # AY 1 DF _ T V S I N I T 3 _ 3V # R3 6 8 3 9 0 _1 % _ 0 4

K B C _ R S T # 34 H _ CP U P W R G D 4 H _ T H R MT R I P # 4 R 355 1 K_ 0 4 R3 5 4 P RO C_ S E L E T 4 4 . 7 K _ 04 R 35 0 R 36 3 R 36 7 R 36 4 0_04 0_04 0_04 0_04

AH 8 TS_ VSS 1 AK1 1 TS_ VSS 2 A H 10

35 S A T A _ OD D _ P R S N T #

Sheet 24 of 57 CougarPoint - M 6/ 9

C RB /S V DE TE CT N O ST UF F [D ET EC T ]

R 1 46

NCTF

BJ 4 6 V S S _ N CT F _ 2 2 BJ 5 V S S _ N CT F _ 2 3 BJ 6 V S S _ N CT F _ 2 4 C2

1 0K _8 P 4 R _ 04 R N 6 1 8 2 7 3 6 4 5 1 0K _8 P 4 R _ 04 R1 3 9 R4 2 8

1 0 K_ 0 4 1 0 K_ 0 4

D G P U _ H OL D _ R S T # D G PU_ PW R O K

R1 6 3 R4 2 9 R3 6 5 R3 5 6

*1 K _ 0 4 *1 0 K _ 0 4 *1 K _ 0 4 1 0 0K _0 4

ICC _ E N# D G P U _P W R O K P L L _O D V R _ E N F D I _O V R V L TG

2 , 3 , 4 , 6 , 25 , 2 6 , 4 0 , 4 3 1. 0 5 V S _ V T T 2 , 3 , 4 , 9 , 1 4, 1 5 , 1 9 , 2 0 , 21 , 2 3 , 2 5 , 2 6, 2 8 , 2 9 , 3 0, 35 , 3 6 , 3 7 , 39 , 4 0 , 4 1 , 4 2 3. 3 V 2 , 4 , 1 0, 11 , 1 2 , 1 3 , 14 , 1 5 , 1 6 , 1 7, 1 8 , 1 9 , 2 0 , 21 , 2 3 , 2 5 , 2 6, 2 9 , 3 0 , 3 2, 33 , 3 4 , 3 5 , 36 , 3 9 , 4 0 , 4 3 3. 3 V S

3 .3 V S

R3 4 5

2 0 0K _0 4 S A TA _O D D _ P R S N T # _ R

CougarPoint - M 6/9 B - 25

Schematic Diagrams

CougarPoint - M 7/9
CougarPoint -M (POWER)
U1 9 G 1. 05 V S

D02
3. 3 V S R 11 4 0 _ 06 S USB V C C A _ D A C _ 3 . 3V S 4 , 39 , 4 0 , 4 1, 4 2 5 VS 5 O UT C2 1 7 0. 1u _ 1 0V _ X 5 R _ 0 4 3. 3 V S C2 2 1 2 2u _ 6 . 3 V _X 5 R _0 8 R1 3 1 C 2 18 * 1 u_ 6 . 3 V _ X 5R _ 04 *1 7 . 4 K _ 1% _ 0 4 3 AD J R1 4 8 *1 0 K _ 1 %_ 0 4 1 .8 VS 1 . 8 V S _ V C C T X _L V D L45 *H C B 16 0 8 K F -1 21 T 2 5 S HDN GN D 1 2 IN

POWER
U4 8 OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR E [1 ] E [2 ] E [3 ] E [4 ] E [5 ] E [6 ] E [7 ] E [8 ] E [9 ] E [1 0 ] E [1 1 ] E [1 2 ] E [1 3 ] E [1 4 ] E [1 5 ] E [1 6 ] E [1 7 ] V C CA D A C

1.6A
C4 9 8 10 u _ 6. 3 V _ X 5 R _ 0 6 C5 3 1 1 u _6 . 3 V _ X 5R _ 04 C5 4 0 1 u _ 6. 3 V _ X 5 R _ 04 C5 1 0 1 u _ 6. 3V _ X 5 R _ 0 4

LVDS

B.Schematic Diagrams

A A 23 A C 23 A D 21 A D 23 A F 21 A F 23 A G 21 A G 23 A G 24 A G 26 A G 27 A G 29 A J 23 A J 26 A J 27 A J 29 A J 31

1 . 0 5V S A N 19

V V V V V V V V V V V V V V V V V

CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC CCC

68mA
C3 0 1 0. 01 u _ 16 V _ X 7R _ 04 3 . 3 V S _ V C C A _ LV D C2 9 2 0 . 1u _ 1 0 V _X 5 R _ 0 4 C2 2 2

L28 H C B 1 6 08 K F -1 2 1 T2 5

U1 3 4

CRT

U4 7 VSSAD AC

VCC CORE

10 u _ 6. 3 V _ X 5 R _ 0 6

L62 * H C B 1 60 8 K F -1 2 1 T2 5

AK3 6 V CC A L V DS AK3 7 V S S A L V DS V C C T X_ L V D S [ 1] V C C T X_ L V D S [ 2] AP3 6 V C C T X_ L V D S [ 3] AP3 7 V C C T X_ L V D S [ 4] 0 . 01 u _ 16 V _ X 5 R _ 0 4 C5 4 6 C 5 45 A M3 7 A M3 8 R4 2 3 0_04 C5 3 9

*S C 1 5 63 I S K -3 . 0 T R T

*1 0 u _6 . 3 V _ X 5R _ 06

C3 0 0 22 u _ 6. 3V _ X 5 R _ 0 8 R 20 7 0 _ 04

0 . 0 1 u _1 6 V _ X5 R _0 4

A N 16 C5 1 7 A N 17 *1 0 u _6 . 3 V _ X 5R _ 06 A N 21

V C C I O[ 1 5 ] V C C I O[ 1 6 ]

HVCMOS

* B K P 1 00 5 H S 12 1 _ 04

1. 0 5 V S

C 5 12 1 0 u _6 . 3 V _ X 5R _ 06

C5 2 0 1 u_ 6 . 3 V _ X5 R _0 4

C5 0 0 1u _ 6 . 3V _X 5 R _ 0 4

DMI

A P 26 A T 24 A N 33

VCCIO

3. 3 V S B H 29 C2 7 5 0. 1 u _ 1 0V _ X 5 R _ 0 4 1 . 5 V S _ 1. 8 V S 1. 0 5 V S R 3 73 *0 _ 0 4 B G6 A P 17 + V 1 . 0 5S _ V C C _ D M I 1. 0 5 V S _ V T T R 41 3 * 15 m i _ s h or t _0 6 l A U 20

DFT / SPI

FDI

1 .0 5 V S

1 .5 VS

1 .8 V S

B - 26 CougarPoint - M 7/9

Sheet 25 of 57 CougarPoint - M 7/ 9

+V 1. 0 5 S _ V C C A P L L_ E X P L6 1 B J 22

V C C I O[ 2 8 ] 3 .3 V S V C C A P LL E X P V 33 V C C 3 _ 3[ 6] C5 4 1 V 34 V C C 3 _ 3[ 7] 0 . 1u _ 1 0V _ X 5 R _ 0 4

V C C I O[ 1 7 ]

4A
C 5 35 1 u _ 6. 3 V _ X 5 R _ 04 C4 9 9 1 u_ 6 . 3 V _ X5 R _0 4

A N 26 V C C I O[ 1 8 ] A N 27 V C C I O[ 1 9 ] A P 21 V C C I O[ 2 0 ] A P 23 V C C I O[ 2 1 ] A P 24 V C C I O[ 2 2 ] V C C I O[ 2 3 ] V C C I O[ 2 4 ] V C C D MI [ 1] A T2 0 V C C V R M[ 3] A T1 6

1 . 5 V S _ 1. 8 V S

157mA 570mA
1 . 0 5V S _V TT

20mA
V C C C L K D MI AB3 6 1 .0 5 VS

C5 2 2 1 u _ 6. 3 V _ X 5 R _ 0 4

C 52 9 1 0 u_ 6 . 3 V _ X5 R _0 6

V C C I O[ 2 5 ] A N 34 V C C I O[ 2 6 ] V C C D F TE R M[ 1] A G1 7 V CC3 _ 3 [3 ] V C C D F TE R M[ 2] A J1 6 V C C D F TE R M[ 3] A J1 7 V C C D F TE R M[ 4] V C C M E 3 . 3V C5 0 9 0 . 1u _ 1 0V _X 5 R _ 0 4 2 009/1 1/12 3. 3 V S 3 .3 V 0_ 0 4 *0 _ 04 A G1 6

20mA

V _ N V R A M_ V C C Q R 37 6 R3 9 9

1. 8 V S * 15 m i _ s h ort _ 0 6 l * 0_ 0 4

3. 3V S

157mA

A P 16 V C C V R M [ 2]

D02
R1 2 0 R2 0 9

V cc A F D I P L L V C C I O[ 2 7 ]

V1 VC CSPI

20mA
C 2 24

V C C D MI [ 2]

1 u _ 6. 3V _ X 5 R _ 0 4 C o u ga rP o i n t _R e v _1 p 0

1 9 , 20 , 2 1 , 26 , 3 0 , 4 0 2, 3 , 4 , 9 , 1 4, 1 5 , 1 9 , 20 , 2 1 , 23 , 2 4 , 2 6, 2 8 , 2 9 , 30 , 3 5 , 36 , 3 7 , 3 9, 4 0 , 4 1 , 42 39 2 , 14 , 1 5 , 1 7, 1 8 , 1 9 , 26 , 3 0 , 32 , 3 3 , 3 5, 3 9 , 4 3 , 44 26 7 , 1 6 , 42 2 , 4 , 1 0, 1 1 , 1 2 , 13 , 1 4 , 15 , 1 6 , 1 7, 1 8 , 1 9 , 20 , 2 1 , 23 , 2 4 , 2 6, 2 9 , 3 0 , 32 , 3 3 , 34 , 3 5 , 3 6, 3 9 , 4 0 , 43 2, 3 , 4 , 6 , 2 4, 2 6 , 4 0 , 43 1 . 5V S _1 . 8 V S

1. 0 5 V S 3 .3 V 1 .5 V S 5 VS 1 . 5 V S _ 1 . 8V S 1 .8 V S 3 .3 V S 1 . 0 5 V S _ V TT

R 38 4 R 39 1 R 39 2

*0 _ 0 4 0 _0 4 *0 _ 0 4

Schematic Diagrams

CougarPoint - M 8/9
L 42 *H C B 1 0 05 K F -1 2 1 T 20 1 .0 5 V S C 2 97 3 .3 V C5 2 4 0 . 1u _ 1 0V _ X 5 R _ 0 4 T16 V CC DS W 3 _ 3 V C C I O [ 31 ] 3 .3 V S C 4 95 H C B 1 60 8 K F -1 2 1T 2 5 C 5 69 1 0 u _6 . 3 V _ X 5R _ 06 1 . 0 5V S L 34 C 5 47 1u _ 6 . 3V _ X 5 R _ 0 4 + V C C A P L L_ C P Y _ P C H * H C B 1 60 8 K F -1 2 1T 2 5 AL 2 9 V C C I O[ 1 4 ] AL 2 4 C 5 21 *1 u_ 6 . 3 V _ X5 R _0 4 AA1 9 V CC A S W [1 ] 1. 0 5 V S C 2 78 2 2 u _6 . 3 V _ X 5R _ 08 C5 3 2 AA2 6 1u _ 6 . 3V _ X 5 R _ 0 4 AA2 7 V CC A S W [5 ] AA2 9 V CC A S W [6 ] C 2 72 2 2 u _6 . 3 V _ X 5R _ 08 C5 1 8 1u _ 6 . 3V _ X 5 R _ 0 4 AA3 1 V CC A S W [7 ] AC 2 6 V CC A S W [8 ] AC 2 7 V CC A S W [9 ] AC 2 9 V C C A S W [ 1 0] AC 3 1 C 5 28 AD 2 9 1 u _ 6. 3V _ X 5 R _ 0 4 AD 3 1 W21 W23 V C C A S W [ 1 5] W24 V C C A S W [ 1 6] W26 V C C A S W [ 1 7] C 5 01 1 .0 5 VS 1 . 0 5 V S _ V C C A _ A _D P L L44 H C B 10 0 5 K F -1 21 T 2 0 C 32 1 +C 31 0 2 2 u_ 6 . 3 V _ X5 R _0 8 *2 2 0 u _4 V _ V _ B L40 H C B 10 0 5 K F -1 21 T 2 0 C2 8 7 +C 30 9 22 u _ 6. 3V _ X 5 R _ 0 8 *2 2 0 u _4 V _ V _ B 1 . 0 5V S C5 5 0 1 u_ 6 . 3 V _ X5 R _0 4 R4 2 5 0 _ 04 C5 4 4 0 . 1u _ 1 0V _X 5 R _ 0 4 C 5 11 + V 1 . 0 5 M_ V C C S U S *1 u _ 10 V _ X 5 R _ 0 4 T17 V1 9 T21 D CP S US [1 ] D CP S US [2 ] V C C A S W [ 22 ] 1. 05 V S V CCS S C C4 9 7 1 u _6 . 3 V _ X5 R _0 4 C5 0 8 C5 4 3 V C CS S C A G 3 3 1u _ 6 . 3V _X 5 R _ 0 4 V1 6 D CP S S T 1 u_ 6 . 3 V _ X5 R _ 0 4 C2 8 1 AF1 7 AF3 3 AF3 4 AG 3 4 1 u _ 6. 3 V _ X 5 R _ 04 *0 _ 0 4 1. 1V S _ V C C A _ B _ D P L C 2 90 R2 1 6 1 . 5 V S _ 1. 8 V S 0. 1 u _ 10 V _ X 5R _ 04 W29 V C C A S W [ 1 8] W31 V C C A S W [ 1 9] W33 V C C A S W [ 2 0] V C C I O[ 5 ] + V CC RT CE X T N 1 6 D CP RT C V C C I O [ 12 ] Y 49 V C C V R M [ 4] V C C I O [ 13 ] V C C I O[ 6 ] A F 14 A K1 A F 11 V C C V R M[ 1 ] 1 . 0 5V S A C1 6 V C C I O[ 2 ] A C1 7 V C C I O[ 3 ] A D1 7 V CC S S C V C C I O[ 4 ] 1u _ 6 . 3 V _X 5 R _ 0 4 1 9 , 20 , 2 1 , 2 5, 3 0 , 4 0 19 , 2 1 2 , 4 , 1 0 , 11 , 1 2 , 13 , 1 4 , 1 5, 1 6 , 1 7 , 18 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5, 29 , 3 0 , 32 , 3 3 , 3 4, 3 5 , 3 6, 3 9 , 4 0 , 43 25 2 , 1 4, 1 5 , 1 7, 18 , 1 9 , 25 , 3 0 , 3 2, 3 3 , 3 5, 3 9 , 4 3 , 44 4 , 9 , 10 , 1 1 , 1 2, 1 3 , 3 0, 3 7 , 3 9 , 41 2 8 , 32 , 3 5 , 3 7, 3 9 , 4 0, 4 1 , 4 2 , 46 2 , 3, 4 , 9 , 1 4 , 15 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5, 28 , 2 9 , 30 , 3 5 , 3 6, 3 7 , 3 9, 4 0 , 4 1 , 42 2, 3 , 4 , 6 , 2 4, 2 5 , 4 0 , 43 1 .5 V *0 _ 04 *1 5 mi l _ sh o rt _ 0 6 3 .3 V 1. 0 5 V S RT C V CC 3 .3 VS 1 . 5 V S _ 1 . 8V S 5 VS 1 .5 V 5V 3 .3 V 1 . 0 5 V S _ V TT C5 2 5 L2 9 *H C B 1 0 05 K F -1 2 1 T2 0 + V 1. 0 5 S _ V C C A P L L _S A TA 3 A H1 4 C5 0 3 A H1 3 1u _ 6 . 3 V _X 5 R _ 0 4 *1 0 u _6 . 3 V _ X5 R _0 6 C4 9 6 A F 13 V C C 3 _ 3[ 2 ] A J2 + V 1 . 05 S _ S A T A 3 L60 H C B 1 0 0 5K F -12 1 T 20 1 .0 5 V S V C C 3 _ 3[ 4 ] V C C A S W [ 1 1] V C C A S W [ 1 2] V C C A S W [ 1 3] V C C A S W [ 1 4] V CC A S W [4 ] AA2 1 V CC A S W [2 ] AA2 4 V CC A S W [3 ] V C C I O [ 34 ] T26 1 . 0 5V S C5 3 0 0 . 1u _ 1 0V _ X 5 R _ 0 4 D CP S US [3 ] *0 . 1 u _1 0 V _ X 5R _ 04 P C H_ V C CD S W V1 2 D CP S US B Y P T38 V C C 3_ 3 [ 5 ] T23 BH 2 3 V C C A P LL D MI 2 V C C S U S 3 _ 3[ 8 ] V 23 V C C S U S 3 _ 3[ 7 ] T24 V C C S U S 3 _ 3[ 9 ] V 24 V C C S U S 3 _ 3 [ 10 ] P 24 V C C S U S 3 _ 3[ 6 ] R 1 86 1 0_ 0 4 D 8 C C D B U 0 03 4 0 A 3 .3 V 5V V C C I O [ 32 ] T29 V C C I O [ 33 ] C5 3 3 0. 1u _ 1 0V _ X 5 R _ 0 4 C 5 14 0 . 1 u _1 0 V _ X 5R _ 04 * 1 0u _ 6 . 3V _X 5 R _ 0 6 C 29 1 AD 4 * 0. 1 u _ 10 V _ X 5R _ 04 9 U1 9 J 1 . 05 V S _ V C C A _ C L K

CougarPoint - M (POWER)
PO W ER
N 26 V CC A CL K V C C I O [ 29 ] P 26 V C C I O [ 30 ] P 28 3. 3 V T27 1u _ 6 . 3 V _X 5 R _ 0 4 C5 2 7 1 . 0 5V S

5 2mA

L43

142. 6mA

320m A

1 . 0 5V S

USB

1849m A

B.Schematic Diagrams

Clock and Miscellaneous

V 5 R E F _ S US

M 2 6 + V 5 A _ P C H _ V C C 5R E F S U S A N2 3 + V C CA _ US B S US C5 1 5 * 1u _ 6 . 3V _X 5 R _ 0 4

DC P S US [4 ] A N2 4 V C C S U S 3 _ 3[ 1 ] + 5 V _P C H _ V C C 5 R E F S U S P 34 V 5 RE F R 1 97 N 20 V C C S U S 3 _ 3[ 2 ] N 22 V C C S U S 3 _ 3[ 3 ] P 20 V C C S U S 3 _ 3[ 4 ] P 22 V C C S U S 3 _ 3[ 5 ] C 51 3 V C C 3 _ 3[ 1 ] V C C 3 _ 3[ 8 ] T34 0 . 1 u _1 0 V _ X5 R _0 4 0 . 1u _ 1 0V _X 5 R _ 0 4 0 . 1 u _ 10 V _ X 5R _ 04 A A 16 W 16 C 55 9 C5 3 6 3 .3 V S C 5 48 1 u _6 . 3 V _ X 5R _ 04 1 u_ 6 . 3 V _X 5 R _ 0 4 C5 4 2 1 0_ 0 4 D 10 C C D B U 0 03 4 0 A 3 .3 VS 5 VS

Sheet 26 of 57 CougarPoint - M 8/9

PCI/GPIO/LPC

97mA
3. 3V

159mA
10mA 10mA

BD 4 7

SATA

V CC A DP L L A BF4 7 V CC A DP L L B

V C C A P LL S A T A

1 . 5V S _1 . 8 V S

160mA

V V V V

CC CC CC CC

I O[ 7 ] D I F F C LK N [ 1 ] D I F F C LK N [ 2 ] D I F F C LK N [ 3 ]

1 .0 5 V S

0. 1 u _ 10 V _ X 5R _ 04 V C C S S T

MISC

1 . 0 5V S _V T T C2 3 5 4 . 7u _ 6 . 3V _X 5 R _ 0 6 RT CV C C C2 6 5 1 u_ 6 . 3 V _ X5 R _ 0 4 C 2 60 0 . 1 u _ 10 V _ X 5R _ 04 C 5 26 0 . 1 u _ 10 V _ X 5R _ 04

BJ 8

V _P R OC _ I O

CPU

< 1mA 2 mA C2 3 4
0. 1 u _ 10 V _ X 5 R _ 04

V C C A S W [ 23 ]

V 21 T19

V C C A S W [ 21 ]

1 . 5 V _V C C S U S H D A R 41 6 P 32

HDA

V CC RT C C2 6 3 0. 1 u _ 10 V _ X 5 R _ 04

RTC

A2 2

V CC S US H DA C 53 4

R 41 9

C o u ga rP o i n t _R e v _1 p 0

0. 1 u _ 10 V _ X 5 R _ 0 4

CougarPoint - M 8/9 B - 27

Schematic Diagrams

CougarPoint - M 9/9
CougarPoint -M (GND)
U 19 I AY 4 AY 4 2 AY 4 6 AY 8 B1 1 B1 5 B1 9 B2 3 B2 7 B3 1 B3 5 B3 9 B7 F4 5 BB1 2 BB1 6 BB2 0 BB2 2 BB2 4 BB2 8 BB3 0 BB3 8 BB 4 BB4 6 BC 1 4 BC 1 8 BC 2 BC 2 2 BC 2 6 BC 3 2 BC 3 4 BC 3 6 BC 4 0 BC 4 2 BC 4 8 BD 4 6 BD 5 BE2 2 BE2 6 BE4 0 BF1 0 BF1 2 BF1 6 BF2 0 BF2 2 BF2 4 BF2 6 BF2 8 BD 3 BF3 0 BF3 8 BF4 0 BF 8 BG 1 7 BG 2 1 BG 3 3 BG 4 4 BG 8 BH 1 1 BH 1 5 BH 1 7 BH 1 9 H 10 BH 2 7 BH 3 1 BH 3 3 BH 3 5 BH 3 9 BH 4 3 BH 7 D3 D 12 D 16 D 18 D 22 D 24 D 26 D 30 D 32 D 34 D 38 D 42 D8 E1 8 E2 6 G18 G20 G26 G28 G36 G48 H 12 H 18 H 22 H 24 H 26 H 30 H 32 H 34 F3 VSS[ 15 9] VSS[ 16 0] VSS[ 16 1] VSS[ 16 2] VSS[ 16 3] VSS[ 16 4] VSS[ 16 5] VSS[ 16 6] VSS[ 16 7] VSS[ 16 8] VSS[ 16 9] VSS[ 17 0] VSS[ 17 1] VSS[ 17 2] VSS[ 17 3] VSS[ 17 4] VSS[ 17 5] VSS[ 17 6] VSS[ 17 7] VSS[ 17 8] VSS[ 17 9] VSS[ 18 0] VSS[ 18 1] VSS[ 18 2] VSS[ 18 3] VSS[ 18 4] VSS[ 18 5] VSS[ 18 6] VSS[ 18 7] VSS[ 18 8] VSS[ 18 9] VSS[ 19 0] VSS[ 19 1] VSS[ 19 2] VSS[ 19 3] VSS[ 19 4] VSS[ 19 5] VSS[ 19 6] VSS[ 19 7] VSS[ 19 8] VSS[ 19 9] VSS[ 20 0] VSS[ 20 1] VSS[ 20 2] VSS[ 20 3] VSS[ 20 4] VSS[ 20 5] VSS[ 20 6] VSS[ 20 7] VSS[ 20 8] VSS[ 20 9] VSS[ 21 0] VSS[ 21 1] VSS[ 21 2] VSS[ 21 3] VSS[ 21 4] VSS[ 21 5] VSS[ 21 6] VSS[ 21 7] VSS[ 21 8] VSS[ 21 9] VSS[ 22 0] VSS[ 22 1] VSS[ 22 2] VSS[ 22 3] VSS[ 22 4] VSS[ 22 5] VSS[ 22 6] VSS[ 22 7] VSS[ 22 8] VSS[ 22 9] VSS[ 23 0] VSS[ 23 1] VSS[ 23 2] VSS[ 23 3] VSS[ 23 4] VSS[ 23 5] VSS[ 23 6] VSS[ 23 7] VSS[ 23 8] VSS[ 23 9] VSS[ 24 0] VSS[ 24 1] VSS[ 24 2] VSS[ 24 3] VSS[ 24 4] VSS[ 24 5] VSS[ 24 6] VSS[ 24 7] VSS[ 24 8] VSS[ 24 9] VSS[ 25 0] VSS[ 25 1] VSS[ 25 2] VSS[ 25 3] VSS[ 25 4] VSS[ 25 5] VSS[ 25 6] VSS[ 25 7] VSS[ 25 8] V SS[2 5 9] V SS[2 6 0] V SS[2 6 1] V SS[2 6 2] V SS[2 6 3] V SS[2 6 4] V SS[2 6 5] V SS[2 6 6] V SS[2 6 7] V SS[2 6 8] V SS[2 6 9] V SS[2 7 0] V SS[2 7 1] V SS[2 7 2] V SS[2 7 3] V SS[2 7 4] V SS[2 7 5] V SS[2 7 6] V SS[2 7 7] V SS[2 7 8] V SS[2 7 9] V SS[2 8 0] V SS[2 8 1] V SS[2 8 2] V SS[2 8 3] V SS[2 8 4] V SS[2 8 5] V SS[2 8 6] V SS[2 8 7] V SS[2 8 8] V SS[2 8 9] V SS[2 9 0] V SS[2 9 1] V SS[2 9 2] V SS[2 9 3] V SS[2 9 4] V SS[2 9 5] V SS[2 9 6] V SS[2 9 7] V SS[2 9 8] V SS[2 9 9] V SS[3 0 0] V SS[3 0 1] V SS[3 0 2] V SS[3 0 3] V SS[3 0 4] V SS[3 0 5] V SS[3 0 6] V SS[3 0 7] V SS[3 0 8] V SS[3 0 9] V SS[3 1 0] V SS[3 1 1] V SS[3 1 2] V SS[3 1 3] V SS[3 1 4] V SS[3 1 5] V SS[3 1 6] V SS[3 1 7] V SS[3 1 8] V SS[3 1 9] V SS[3 2 0] V SS[3 2 1] V SS[3 2 2] V SS[3 2 3] V SS[3 2 4] V SS[3 2 5] V SS[3 2 8] V SS[3 2 9] V SS[3 3 0] V SS[3 3 1] V SS[3 3 3] V SS[3 3 4] V SS[3 3 5] V SS[3 3 7] V SS[3 3 8] V SS[3 4 0] V SS[3 4 2] V SS[3 4 3] V SS[3 4 4] V SS[3 4 5] V SS[3 4 6] V SS[3 4 7] V SS[3 4 8] V SS[3 4 9] V SS[3 5 0] V SS[3 5 1] V SS[3 5 2] H 46 K1 8 K2 6 K3 9 K4 6 K7 L 18 L2 L 20 L 26 L 28 L 36 L 48 M12 P1 6 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N 18 P3 0 N 47 P1 1 P1 8 T33 P4 0 P4 3 P4 7 P7 R2 R 48 T12 T31 T37 T4 W 34 T46 T47 T8 V1 1 V1 7 V2 6 V2 7 V2 9 V3 1 V3 6 V3 9 V4 3 V7 W 17 W 19 W2 W 27 W 48 Y 12 Y 38 Y4 Y 42 Y 46 Y8 BG 2 9 N 24 AJ 3 AD 4 7 B4 3 BE1 0 BG 4 1 G 14 H 16 T36 BG 2 2 BG 2 4 C 22 AP1 3 M14 AP3 AP1 BE1 6 BC 1 6 BG 2 8 BJ 28 H5 A A17 AA2 AA3 A A33 A A34 A B11 A B14 A B39 AB4 A B43 AB5 AB7 AC 19 A C2 AC 21 AC 24 AC 33 AC 34 AC 48 AD 10 AD 11 AD 12 AD 13 AD 19 AD 24 AD 26 AD 27 AD 33 AD 34 AD 36 AD 37 AD 38 AD 39 A D4 AD 40 AD 42 AD 43 AD 45 AD 46 A D8 AE2 AE3 A F10 A F12 AD 14 AD 16 A F16 A F19 A F24 A F26 A F27 A F29 A F31 A F38 AF4 A F42 A F46 AF5 AF7 AF8 AG 19 A G2 AG 31 AG 48 AH 11 A H3 AH 36 AH 39 AH 40 AH 42 AH 46 A H7 AJ 19 AJ 21 AJ 24 AJ 33 AJ 34 A K12 AK3 U1 9H VSS [0 ] VSS [1 ] VSS [2 ] VSS [3 ] VSS [4 ] VSS [5 ] VSS [6 ] VSS [7 ] VSS [8 ] VSS [9 ] VSS [1 0] VSS [1 1] VSS [1 2] VSS [1 3] VSS [1 4] VSS [1 5] VSS [1 6] VSS [1 7] VSS [1 8] VSS [1 9] VSS [2 0] VSS [2 1] VSS [2 2] VSS [2 3] VSS [2 4] VSS [2 5] VSS [2 6] VSS [2 7] VSS [2 8] VSS [2 9] VSS [3 0] VSS [3 1] VSS [3 2] VSS [3 3] VSS [3 4] VSS [3 5] VSS [3 6] VSS [3 7] VSS [3 8] VSS [3 9] VSS [4 0] VSS [4 1] VSS [4 2] VSS [4 3] VSS [4 4] VSS [4 5] VSS [4 6] VSS [4 7] VSS [4 8] VSS [4 9] VSS [5 0] VSS [5 1] VSS [5 2] VSS [5 3] VSS [5 4] VSS [5 5] VSS [5 6] VSS [5 7] VSS [5 8] VSS [5 9] VSS [6 0] VSS [6 1] VSS [6 2] VSS [6 3] VSS [6 4] VSS [6 5] VSS [6 6] VSS [6 7] VSS [6 8] VSS [6 9] VSS [7 0] VSS [7 1] VSS [7 2] VSS [7 3] VSS [7 4] VSS [7 5] VSS [7 6] VSS [7 7] VSS [7 8] VSS [7 9] Co ug a rPo in t_ R ev _ 1p 0 VSS[ 80 ] VSS[ 81 ] VSS[ 82 ] VSS[ 83 ] VSS[ 84 ] VSS[ 85 ] VSS[ 86 ] VSS[ 87 ] VSS[ 88 ] VSS[ 89 ] VSS[ 90 ] VSS[ 91 ] VSS[ 92 ] VSS[ 93 ] VSS[ 94 ] VSS[ 95 ] VSS[ 96 ] VSS[ 97 ] VSS[ 98 ] VSS[ 99 ] VSS[ 1 00 ] VSS[ 1 01 ] VSS[ 1 02 ] VSS[ 1 03 ] VSS[ 1 04 ] VSS[ 1 05 ] VSS[ 1 06 ] VSS[ 1 07 ] VSS[ 1 08 ] VSS[ 1 09 ] VSS[ 1 10 ] VSS[ 1 11 ] VSS[ 1 12 ] VSS[ 1 13 ] VSS[ 1 14 ] VSS[ 1 15 ] VSS[ 1 16 ] VSS[ 1 17 ] VSS[ 1 18 ] VSS[ 1 19 ] VSS[ 1 20 ] VSS[ 1 21 ] VSS[ 1 22 ] VSS[ 1 23 ] VSS[ 1 24 ] VSS[ 1 25 ] VSS[ 1 26 ] VSS[ 1 27 ] VSS[ 1 28 ] VSS[ 1 29 ] VSS[ 1 30 ] VSS[ 1 31 ] VSS[ 1 32 ] VSS[ 1 33 ] VSS[ 1 34 ] VSS[ 1 35 ] VSS[ 1 36 ] VSS[ 1 37 ] VSS[ 1 38 ] VSS[ 1 39 ] VSS[ 1 40 ] VSS[ 1 41 ] VSS[ 1 42 ] VSS[ 1 43 ] VSS[ 1 44 ] VSS[ 1 45 ] VSS[ 1 46 ] VSS[ 1 47 ] VSS[ 1 48 ] VSS[ 1 49 ] VSS[ 1 50 ] VSS[ 1 51 ] VSS[ 1 52 ] VSS[ 1 53 ] VSS[ 1 54 ] VSS[ 1 55 ] VSS[ 1 56 ] VSS[ 1 57 ] VSS[ 1 58 ] AK3 8 AK4 AK4 2 AK4 6 AK8 AL1 6 AL1 7 AL1 9 AL2 AL2 1 AL2 3 AL2 6 AL2 7 AL3 1 AL3 3 AL3 4 AL4 8 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN 2 AN 29 AN 3 AN 31 AP1 2 AP1 9 AP2 8 AP3 0 AP3 2 AP3 8 AP4 AP4 2 AP4 6 AP8 AR 2 AR 48 AT 1 1 AT 3 1 AT 8 1 AT 2 2 AT 6 2 AT 8 2 AT 0 3 AT 2 3 AT 4 3 AT 9 3 AT 2 4 AT 6 4 AT 7 AU 24 AU 30 AV1 6 AV2 0 AV2 4 AV3 0 AV3 8 AV4 AV4 3 AV8 AW 14 AW 18 AW 2 AW 22 AW 26 AW 28 AW 32 AW 34 AW 36 AW 40 AW 48 AV1 1 AY 12 AY 22 AY 28

B.Schematic Diagrams

Sheet 27 of 57 CougarPoint - M 9/9

C ou ga r Poin t _R ev _1 p0

B - 28 CougarPoint - M 9/9

Schematic Diagrams

3G, CCD
3G
C 3 78 + 2 20 u _ 6 . 3V _6 . 3 *4 . 5 G ND 0 . 1 u _ 16 V _ Y 5V _ 0 4 3 G_ 3 . 3V 3 G _3 . 3 V UIM UIM UIM UIM UIM _ PW R _ DAT A _ CL K _ RST _ VPP C 61 2 C6 0 5 1 0 u_ 1 0 V _ Y 5 V _ 0 8 C 61 1 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 C7 1 8 0 . 1u _ 1 6V _Y 5 V _ 04 R 44 6 2 0 K _ 04 D G D S Q 18 M TN 7 0 02 Z H S 3 1 u _ 6. 3 V _ Y 5V _ 0 4 G R 2 61 0_04 C6 8 7 0. 1 u _ 1 6V _ Y 5V _0 4

3G POWER
3 .3 V

C6 0 8 J _3 G 1 2 1 , 2 9, 36 , 3 7 P C I E _W A K E # 3. 3 V 20 3 G _C L K R E Q # 2 0 C L K _ P C I E _3 G # 2 0 C L K _ P C I E _ 3G R4 4 8 1 0 K _ 04 1 3 5 7 11 13 9 15 W AKE# C OE X1 C OE X2 C L K R E Q# RE F C L K RE F C L K + GN D 0 GN D 1 3 .3 V AUX_ 0 1 .5 V _ 0 U I M_ P W R U I M_ D A T A U I M_ C L K U I M_ R E S E T U I M_ V P P G ND 5 2 6 8 10 12 14 16 4

>120 mil

Q2 9 A O 34 1 5 S D

3 G _3 . 3 V

>120mil

40 mil

GN D GN D

G ND

R4 4 7

1 00 K _ 0 4 Q 28 M TN 7 00 2 Z H S 3

GN D 21 27 29 34 3 G_ D E T # 2 0 PC IE _ RXN5 _ 3 G 2 0 P C I E _R X P 5_ 3 G 2 0 P C I E _T X N 5 _ 3 G 2 0 P C I E _ T X P 5_ 3 G GN D R4 5 5 35 23 25 31 33 *1 0 m il _ s ho rt 17 19 37 39 41 43 45 C 66 0 47 49 51 1 0 u_ 1 0 V _ Y 5 V _ 0 8 GN D 2 GN D 3 GN D 4 GN D 1 1 P E T n0 P E T p0 P E Rn 0 P E Rp 0 R e s erv ed 0 R e s erv ed 1 GN D 1 2 3. 3 V A U X _3 3. 3 V A U X _4 GN D 1 3 R e s erv ed 2 R e s erv ed 3 R e s erv ed 4 R e s erv ed 5

KEY
G ND 6 G ND 7 G ND 8 G ND 9 GN D 1 0 W _ D IS A B L E # PER SET # S MB _ C L K S MB _ D A T A USB _ D U S B _D + 3 .3 V AUX_ 1 1 .5 V _ 1 1 .5 V _ 2 3 .3 V AUX_ 2 LE D _ W W A N # L E D _W L A N # L ED_ W PA N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46

G 3 4 3 G_ P O W E R S

B.Schematic Diagrams

From EC default HI
B U F _P LT _ R S T# 3 G _E N 34 B U F _ P L T _R S T # 16 , 2 3 , 2 9, 34 , 3 6 , 3 7 U SB_ PN 2 2 3 U SB_ PP2 2 3 3G _ 3 . 3V

40 mil 40 mil
3G _ 3 . 3V C3 9 2 2 2 0u _ 6 . 3 V _6 . 3 *4 . 5 +

Port 2
U I M _P W R 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 C6 8 8 GN D UIM _ P W R UIM UIM UIM UIM _ RS T _ VPP _ CL K _ DA T A C6 9 1 1 5 2 6 3 7 C 6 90 J _ S I M1 R4 8 3 4 . 7 K _ 04 U I M _D A T A

3 G _3 . 3 V

Sheet 28 of 57 3G, CCD


( TO P VI EW )
UIM UIM UIM UIM UIM UIM _ PW R _ GN D _ RST _ I/O _ CL K _ DAT A

C6 3 4

0 . 1u _ 1 6 V _Y 5 V _ 04

8 89 0 8 -52 0 4 M-0 1 G ND G ND G ND G ND

SIM CONN

C6 8 9 *2 2 p _5 0 V _ 0 4

C 7 04

GN G GN D

R 4 8 4 R 48 5* 1 0m i l _s h o rt * 1 0m i l _s h o rt

U I M_ C LK _ R U I M_ D A T A _R

*2 2 p _5 0 V _ 0 4

*2 2 p _ 50 V _ 0 4 *2 2 p _5 0 V _ 0 4 G ND

G ND

<4000 mils
GN D

TV ANTENNA
R 58 J AN T2 1 1 2 2 3 3 4 4 F R -0 0 5D *0 _ 1 2

CCD
5V 5 V _ CC D

T V _ GN D

J A NT 1 1 2 3 2 02 7 9 -00 1 E -0 1 J A NT 3 1 2 3 C 1 59 1u _ 6 . 3 V _ Y 5 V _ 04

1A
U 6 4 5 C 158 C CD_ E N 3 E N G ND G 5 24 3 A 2 1 00 K _ 0 4 0. 1 u _ 1 6V _ Y 5V _0 4 1 u _ 6 . 3V _Y 5 V _0 4 1 V IN V IN V OU T

G ND 1 GN D 2

H2 5 H 7 _ 0 B 4 _0 D 2_ 8

1 3 53 0 6 -1

GN D

5 V _ CC D

48 mil 1A
R8 0 C1 2 5 C1 2 4 1u _ 6 . 3V __ Y 5V _0 4

C1 3 0 1u _ 6 . 3V __ Y 5V _0 4

D02
34 CC D_ E N

2009 /11/3 0_Al ex

2 02 7 9 -00 1 E -0 1

Port 5
23 23 34 U S B_ PN5 US B _ P P 5 C C D _D E T #

J _ CC D1 1 2 3 4 5 8 5 2 05 -0 5 0 01

From KBC default HI

5V 3 .3 V 3 .3 VS V DD 5

2 6 , 3 2 , 35 , 3 7 , 3 9, 40 , 4 1 , 4 2, 4 6 2 , 3 , 4 , 9 , 1 4, 1 5 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5 , 26 , 2 9 , 3 0, 35 , 3 6 , 3 7, 3 9 , 4 0 , 41 , 4 2 2 , 4 , 1 0 , 1 1, 1 2 , 1 3 , 14 , 1 5 , 1 6, 1 7 , 1 8 , 19 , 2 0 , 2 1, 2 3 , 2 4 , 25 , 2 6 , 2 9, 30 , 3 2 , 3 3, 3 4 , 3 5 , 36 , 3 9 , 4 0, 4 3 3 5 , 3 8 , 39

3G, CCD B - 29

Schematic Diagrams

Mini PCIE, LID


V DD3 R 2 71 1 C3 9 9 0. 1 u _ 16 V _ Y 5 V _ 04 GN D G ND U5 VC C G ND OU T 1 0 K _0 4 2 L ID _ S W #

L ID_ S W #

15 , 3 4, 3 5

M H -2 4 8

PS U1, PSU 2 3 1 2

X5100

B.Schematic Diagrams

LID SWITCH IC
Sheet 29 of 57 Mini PCIE, LID

20 mil
3. 3 V C 32 9 0 .1 u_ 1 6V _Y 5V _ 0 4 J_ MIN I 1 2 1, 2 8 , 3 6, 3 7 P C I E _ W A K E # 3 .3 V 2 0 W L A N_ CL K RE Q # 2 0 C L K _ P C I E _ MI N I# 2 0 C L K _ P C I E _ MIN I P C IE _ W A K E # R 26 3 10 K _ 0 4 1 3 5 7 11 13 9 15 W AKE # C OE X 1 C OE X 2 C R R G G LK R E Q# E F CL K E F CL K + ND0 ND1 3. 3 V A U X_ 0 1 . 5V _ 0 U I M _P W R U I M_ D A T A U IM_ C L K UIM _ RE S E T U IM_ V P P GN D 5 2 6 8 10 12 14 16 4 GN D R2 5 8 *0 _ 04 8 0C LK 8 0D E T# 3 IN 1 B T_ S B D # 34 34 34 V DD3

MINI CARD

H 15 H 7 _5 B 5 _ 0D 3_ 7

KEY
21 27 29 3 4 W LA N _ D E T # 20 P C I E _R XN 3 _W L A N 2 0 P C IE _ R X P 3 _ W LA N 2 0 P C IE _ T XN 3 _W L A N 2 0 P C I E _ TX P 3 _ W LA N 30 , 3 4,3 5 B T_ E N R2 5 1 3. 3 V 20 20 20 C L_ C LK 1 C L_ D A TA 1 C L_ R S T# 1 3. 3 V R 23 1 R 23 0 R 22 9 R 2 22 R 2 23 B T _S B D # R 25 6 *0 _ 04 *0 _ 04 *0 _ 04 * 0_ 0 4 0 _ 04 * 0_ 0 4 * 0_ 0 4 35 23 25 31 33 17 19 37 39 41 43 45 47 49 51 G ND2 G ND3 G ND4 G ND1 1 PETn 0 PETp 0 P E R n0 P E R p0 R es e rv e d0 R es e rv e d1 G ND1 2 3 .3 V A UX _ 3 3 .3 V A UX _ 4 G ND1 3 R es e rv e d2 R es e rv e d3 R es e rv e d4 R es e rv e d5 88 9 10 -5 2 04 M-0 1 GN D 6 GN D 7 GN D 8 GN D 9 G ND1 0 W _ DIS A B L E # P E RS E T # S MB _ C L K SM B_ DAT A U S B _D US B _ D+ 3. 3 V A U X_ 1 1 . 5V _ 1 1 . 5V _ 2 3. 3 V A U X_ 2 LE D _ W W A N # L E D_ W L A N# LE D _ W P A N # 18 26 34 40 50 20 22 30 32 36 38 24 28 48 52 42 44 46 B U F _ P LT _ R S T #

GN D R2 5 2 1 0K _0 4 3 .3 VS W L A N _ E N 3 0 ,3 4, 3 5 B U F _P L T _R S T # 1 6 ,2 3, 2 8 ,34 , 3 6 , 37 BT _ DET # 3 4 U S B _P N 3 2 3 U S B _P P 3 2 3 3. 3 V A U X_ 1 R2 4 9 0 _0 4 3 .3 V 3. 3 V S V DD3 1. 5 V S 3. 3 V 2 ,4 , 10 , 1 1,1 2 ,1 3, 1 4 , 1 5,1 6 , 17 , 1 8 ,19 , 2 0 , 21 ,2 3, 24 , 2 5, 2 6 , 3 0,3 2 ,3 3, 3 4 , 35 , 3 6 , 39 ,4 0 ,43 1 9 ,34 , 3 5, 3 6 , 3 8,3 9 ,4 5 2 5 ,39 2 ,3 , 4,9 ,1 4, 15 , 1 9,2 0 , 2 1, 2 3 ,2 4, 2 5 , 26 ,2 8 , 30 , 3 5 ,36 , 3 7,3 9 ,4 0, 4 1 , 4 2

20 m il 40 m il 20 m il

Port 3

3. 3 V W L A N _L E D # 3 0 , 34 ,3 5

3 0 ,34 , 3 5 B T_ E N

B - 30 Mini PCIE, LID

Schematic Diagrams

LED, Hotkey, LID SW, Fan


CPU FAN CONTROL
5 VS FO N 1 2 3 4 U 33 F ON VIN V OU T VSET APE8 8 7 2 GN GN GN GN D D D D 8 7 6 5 C 2 89 C 2 94 4. 7 u _ 6. 3 V _ X 5R _0 6 C5 1 6 0 . 1u _ 16 V _ Y 5 V _ 0 4 4 . 7u _ 6. 3V _ X 5R _ 06 C5 0 4

VGA FAN CONTROL


5 VS F ON 1 1 2 3 4 U2 2 F ON VIN V OU T VSET A P E 8 8 72 VG A_ FAN 3 4 5 V S _ V GA _ F A N 5 VS_ FAN J_ F A N 1 C 5 19 1 0 u _1 0 V _ Y 5 V _ 08 1 2 3 8 5 20 5 -0 37 0 1 J _FAN 1 3 3. 3 V S R4 1 7 4 . 7 K _0 4 1 3 4 V GA _ F A N S E N 3 .3 V S R4 3 9 4 . 7K _ 0 4 1 J N1 _FA 3 C 29 6 1 0 u_ 1 0 V _Y 5V _0 8 J_ F A N 2 1 2 3 8 5 20 5 -03 7 0 1 GN D GN D GN D GN D 8 7 6 5

C PU _F AN
34

0. 1 u _1 6 V _ Y 5 V _ 04

V GA _FA N

CP U_ F A N

34 C P U _ F A N S E N

B.Schematic Diagrams

3. 3 V 5 VS J _L E D 3 1 2 3 4 5

3. 3 V S 1 . 05 V S

GN D L E D _A C I N L E D _P W R L E D _B A T_ C H G L E D _B A T_ F U L L L E D_ A C IN 3 4 L E D _ P W R 34 L E D_ B A T _ CHG 3 4 L E D _ B A T _ F U L L 34

Sheet 30 of 57 LED, Hotkey, LID SW, Fan


C7 2 3 0. 1 u _ 16 V _ Y 5 V _0 4

C 21 9 C4 1 6 0. 1 u _ 16 V _ Y 5 V _0 4 C1 6 1 0 . 1u _ 1 6V _ Y 5 V _ 04 C 11 5 0 . 1 u_ 1 6 V _Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _ 0 4

C 6 17 0 . 1 u _1 6 V _ Y 5V _0 4

C3 9 6 0. 1 u _ 16 V _ Y 5 V _0 4

C 17 4 0 . 1 u_ 1 6 V _Y 5 V _ 0 4

C 3 95 C 2 71 0 . 1 u _1 6 V _ Y 5V _ 0 4 0 . 1 u _1 6 V _ Y 5V _ 0 4 1. 5 V C 75 7 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 C 7 58 0. 0 1 u_ 1 6 V _X 7 R _0 4

8 52 0 4 -05 0 0 1

X5100 only

3 .3 V S J _L E D 1 1 2 3 4 5 6 S A TA _ L E D # B T _E N W LA N _E N S A T A _L E D # 1 9 , 3 5 B T _E N 29 , 3 4 , 35 W L A N _ E N 2 9 , 3 4, 3 5 W L A N _ L E D # 2 9, 34 , 3 5 5 VS 3. 3 V

EMI
3. 3 V S

W L A N _L E D #

C los e to U3 9

85 2 01 -0 6 05 1 GN D

C lo se to P C16
C7 5 5 0 . 01 u _1 6 V _ Y 5 V _0 4

Cl os e to H1 9
C1 7 9 0 . 0 1u _ 16 V _ Y 5 V _ 04 C 75 6 0 . 0 1u _ 1 6V _ Y 5 V _ 04 C 18 4 0 . 0 1u _ 1 6V _ Y 5 V _ 04

3 .3 V S J _ L E D2 1 2 3 4 5 6 L E D _N U M # L E D _C A P # L E D _S C R O LL # L E D _ N U M# 3 4 , 35 L E D_ C A P # 3 4 ,3 5 L E D _ S C R OL L # 34 , 3 5

8 52 0 1 -06 0 5 1 S P T1 S MD 8 0 X 80 1

3. 3 V S V DD 3 3. 3 V 5V S 1. 0 5 V S 1. 5 V

2 , 4 , 10 , 1 1 , 12 , 1 3 , 14 , 1 5 , 16 , 1 7 , 18 , 1 9 , 20 , 2 1 , 23 , 2 4, 25 , 2 6, 2 9 , 3 2, 3 3 , 3 4, 3 5 , 3 6, 3 9 , 4 0, 4 3 1 9 , 29 , 3 4 , 35 , 3 6 , 38 , 3 9 , 45 2 , 3 , 4, 9, 1 4 , 15 , 1 9 , 20 , 2 1 , 23 , 2 4 , 25 , 2 6 , 28 , 2 9 , 35 , 3 6 , 37 , 3 9, 40 , 4 1, 4 2 2 , 1 4, 1 5 , 1 7, 1 8 , 1 9, 2 5 , 2 6, 3 2 , 3 3, 3 5 , 3 9, 4 3 , 4 4 1 9 , 20 , 2 1 , 25 , 2 6 , 40 4 , 9 , 10 , 1 1 , 12 , 1 3 , 26 , 3 7 , 39 , 4 1

D02

LED, Hotkey, LID SW, Fan B - 31

Schematic Diagrams

RJ45
R N2 4 3 2 1 5 6 7 8 * 0_8P 04 4R_ L72 D02 36 36 36 36 LA _M 0 N DIN LA _M 0 N DIP LA _M 1 N DIN LA _M 1 N DIP LA N_M DIN0 LA N_M 0 DIP LA N_M DIN1 LA N_M 1 DIP 12 11 9 8 T 4D T 4+ D T 3D T 3+ D M 4X M 4+ X M 3X M 3+ X 1 3 1 4 1 6 1 7 LM 1X LM 1+ X LM 2X LM 2+ X 1 2 3 4 LP8 8 7 6 5 DLM 1X DLM 1+ X DLM 2X DLM 2+ X DL X M 1+ DL X M 1DL X M 2+ DL X M 2J_RJ1 1 2 DA + 3 DA + 6 DB DB 4 + 5 DC 7 DC + 8 DD DD 130451-02 S 0402T B L-040 RN5 4 3 2 1 5 6 7 8 *0_8P _04 4R NM _1 CT NM _2 CT NM _3 CT NM _4 CT R72 R71 R70 R69 C _R 7 5_1% _04 NM T 7 5_1% _04 7 5_1% _04 7 5_1% _04 C114 GND 1 2 shi ld GND e shi ld e

36 36 36 36

LA _M 2 N DIN LA _M 2 N DIP LA _M 3 N DIN LA _M 3 N DIP

LA N_M DIN2 LA N_M 2 DIP LA N_M DIN3 LA N_M 3 DIP

6 5 3 2 10 7 4 1

T 2D T 2+ D T 1D T 1+ D TT C4 TT C3 TT C2 TT C1

M 2X M 2+ X M 1X M 1+ X MT C4 MT C3 MT C2 MT C1

1 9 2 0 2 2 2 3 1 5 1 8 2 1 2 4

LM 3X LM 3+ X LM 4X LM 4+ X

1 2 3 4

S 0402T - 04 B L 0 LP9 8 DLM 3X 7 DLM 3+ X 6 DLM 4X 5 DLM 4+ X

DL X M 3+ DL X M 3DL X M 4+ DL X M 4-

B.Schematic Diagrams

C 163

C 142

C 133 * 0.01u_16V 7R _X _04

GS 5009 LF T 0.01u_16 7R_04 V_X * 0.01u_16V 7R _X _04 C 178 * 0.01u_16 7R_04 V_X D02

Sheet 31 of 57 RJ45

40 m i l

1000p_2K _X _12_H12 V 7R 5

H9 H6 H10 H5 H26 H2 7 H8_0D 4_3 H8_0D 4_3 H8_0 D4_3 H8_0 D4_3 H7_ 0D2_8 H7 _0D2_8

H 7 M 2 M AR -M K M 1 M AR -M K M 4 MM K - AR M 3 M M RK - A 2 3 4 5 9 8 7 6 2 3 4 5

H 16 9 8 7 6 2 3 4 5

H 12 9 8 7 6 2 3 4 5

H 19 9 8 7 6 2 3 4 5

H 11 9 8 7 6 H20 H8 H1 4 H6_ 0D3_7 H3 _5D1_8 H3 _5D1_8

M H8_0 T D2_8

M H8_0D T 2_8

M H8_0D T 2_8

M H8_0D T 2_8

M H8_0D T 2_8

G ND M 6 M AR -M K H 1 H2 H2 2 H 21 C 111D1 11N C111D 111N C1 11D111N C 111D11 1N M 5 M AR -M K M 7 MM K - AR M 8 M M RK - A H 3 2 3 4 5

G ND

GN D

GN D

GN D

GN D GND GND GN D

H 13 9 8 7 6 2 3 4 5 9 8 7 6 2 3 4 5

H 17 9 8 7 6 2 3 4 5

H 4 9 8 7 6 2 3 4 5

H 18 9 8 7 6

M H8_0 T D2_8

M H8_0D T 2_8

M H8_0D T 2_8

M H8_0D T 2_8

M H8_0D T 2_8

G ND

G ND

GN D

GN D

GN D

GN D

DV DD 3.3V

36 2,3,4,9,14,15,19,20,21,23,24,25,26,28,29 3 3 , 0, 5,36,37,39,40,41,42

B - 32 RJ45

Schematic Diagrams

Codec Realtek ALC892


G R5 0 2 S A O3 41 5 Q1 9 C D B U 0 0 3 40 A 3 .3 VS C 3. 3 V S _ A U D L47 *H C B 1 00 5 K F - 1 2 1T 2 0 C 34 6 1 0 u_ 1 0 V _Y 5 V _ 08 0 . 1 u_ 1 6 V _ Y 5 V _ 04 C3 5 3 5V S _A U D D2 5 1 0 K _0 4

La ut N e: yo ot
U4 3 pi n 1 ~ pin 1 1 an d pin 4 7 an d pin 48
D

3 .3 VS C 3 32 C 3 89 0 . 1 u_ 1 6 V _Y 5 V _ 04 0 . 1 u_ 1 6 V _Y 5 V _ 04 0 . 1 u_ 1 6 V _Y 5 V _ 04 0 . 1 u_ 1 6 V _Y 5 V _ 04 0 . 1 u_ 1 6 V _Y 5 V _ 04

ar e Di gi ta l sig na ls . Th e ot he rs a re An al og s ign al s.

D0 2
40 m il
C3 6 9 0. 1u _ 1 6V _ Y 5V _ 0 4

C 3 71 C 3 80

La ut N e: yo ot
(1 )M IC 1- L ( U13 .2 1) (3 )L IN E- L (U 13. 23 ) (2 )MI C1 -R (U1 3. 22 ) (4 )LI NE -R ( U1 3.2 4)
C 3 44

4 0m il
C 4 50 C3 7 9

L49

*H C B 1 0 05 K F - 1 2 1 T2 0

5V S A U DG

C 3 64

* 0 . 1u _ 1 6V _Y 5V _0 4

D0 2
25 3 8

1 0 u _ 10 V _ Y 5 V _ 0 8

10 u _ 10 V _ Y 5 V _ 0 8 C 3 76

A U DG 7 1 U 30 9

A U DG V R EF _ CO DEC L5 0 C 37 2 0. 1 u _ 16 V _ Y 5V _ 0 4 2. 2 u _ 6. 3 V _ Y 5V _ 0 6 H C B 16 0 8 K F - 1 2 1T 2 5

0 . 1 u _1 6 V _ Y 5 V _ 0 4

DVD D1 D VDD 2

C3 5 2 C3 6 6 1 4, 19 H D A _ S D O U T 1 4, 19 H D A _ B I T C L K 19 H D A _S D I N 0 1 4 , 19 H D A _ S Y N C 1 4 , 1 9 H D A _R S T # R 2 50 R 2 55 R 2 57 R 2 59 R 2 62

10 u _ 10 V _ Y 5 V _ 0 8 *2 2p _ 5 0V _N P O_ 0 4 33 _ 0 4 33 _ 0 4 33 _ 0 4 33 _ 0 4 33 _ 0 4 E A P D _ MO D E SP D IF O 1 u _1 0 V _ 06

2 4 3 5 6 8 10 11 47

GP I O0 / DM I C-C L K DM IC_ D A T GP I O1 / DM I C-D A T A S D A TA - O U T B I T -C L K S D A TA - I N S Y NC R E S E T#

AVD D1 A VDD 2

DVS S2

D0 2

27 VR EF V R E F OO U T -B _ L V R E F OU T- B _R 28 32 39 41 30 31 35 36 14 15 43 44 45 46 33 C AP 40 J DR E F AVSS1 A VSS2

C 37 3

MI C 1- V R E F O - L MI C 1- V R E F O - R S U R R _ L _C S UR R_ R_ C MI C 2- V R E F O F RO NT _ L F RO NT _ R T4 5 T4 4 F RO NT _ L F RO NT _ R 33 33

AUD G

D IG IT AL

M ax: 0 .5inc h
1 4 , 35 SPD IF O

p o rt ASUU R RR- - O UUTT- RL S R O V R E F O U T -F _ L V R E F OU T -E ON T O port DFFRR ON T- - O UUTT- RL

P B P C EE
34 K B C _B E E P HD A _ S P K R 1 2

33 D 16 A C A 3

E A P D _ MO D E

S P D IF I/E AP D 48 S P D IF O 12 PC BEEP

B.Schematic Diagrams

BEEP

D0 2
5V S 5V C

19

R 2 65 R 2 64 C 3 77

4 7 K_ 0 4 C 3 75 4 .7 K_ 0 4 * 1 00 p _ 50 V _ N P O _ 0 4 35 35 J D_ S E N S E A J D_ S E N S E B

L7 3 *H C B 1 0 05 K F - 1 2 1 T2 0 L4 8 H C B 10 0 5 K F - 1 21 T 2 0

B A T 54 C W G H A UDG 13 34 37 29 16 17 18 19 20 MI C 1- L MI C 1- R R 2 67 R 2 68 7 5 _ 04 7 5 _ 04 C 3 85 C 3 86 4 . 7 u_ 6 . 3 V _ X R _0 6 5 4 . 7 u_ 6 . 3 V _ X R _0 6 5 21 22 S e n se A S e n se B NC L D O _I N MI C 2 - L MI C 2 - R

p o rt E R F port G C

F R _H P - L _ H P -R ENT ER LFE

C3 8 1 C3 8 2 A U D I O_ C E N_ C LE F _O U T _ C S I D E - L _R S I D E -R _ R C AP R 24 2 R 24 3

4 . 7 u _6 . 3 V _ X R _0 6 5 4 . 7 u _6 . 3 V _ X R _0 6 5 C 33 6 C 33 5 4 . 7u _ 6 . 3V _X 5 R _ 0 6 4 . 7u _ 6 . 3V _X 5 R _ 0 6

H E A D P H ON E - L H E A D P H ON E - R R 2 35 R 2 34 7 5 _ 1% _ 0 4 7 5 _ 1% _ 0 4

H E A D P H O N E -L H E A D P H O N E -R S ID E _ L S ID E _ R 35 35

35 35

L DO_ I N C3 8 3 C3 8 4 4. 7 u _ 6. 3 V _ X 5 R _ 0 6 4. 7 u _ 6. 3 V _ X 5 R _ 0 6 MI C 2 _L MI C 2 _R

ANALOG
port F

D p o rt HSS II D EE- RL

C3 6 1 C3 5 7 2 0 K _ 1% _ 0 4 * 5. 1 K _ 1 % _0 4

*0 . 1 u_ 1 6 V _ Y 5 V _ 04 *1 0 u_ 1 0 V _ X R _0 8 5 A UDG

D 15 * R B 7 5 1V A

I N T _ MI C C3 6 8 2 2 u _6 . 3 V _ X R _0 8 5

R2 6 6

1 K _ 04

I N T _ MI C _R

D0 2
35 35 M IC 1 -L M I C 1 -R

C D -L C D -GN D C D -R MI C 1 - L MI C 1 - R A L C 89 2

p o rt C

L IN E 1 -L L I N E 1 -R

23 24

A UDG

BluRay content protection


7 5_ 1 % _0 4 7 5_ 1 % _0 4 LI N E - L LI N E - R 35 35

26

C nn ect st and by p ow er (f or o pop no ise )

p o rt B

C 33 7 C 38 7 C 38 8

*1 0 0p _ 5 0V _ N P O _ 0 4 4. 7 u _ 6. 3V _ X 5 R _ 0 6 4. 7 u _ 6. 3V _ X 5 R _ 0 6 R2 6 9 R2 7 0

VT 1 8 1 8 S P 2 P A L C 8 9 2
A UDG 3. 3V S

Sheet 32 of 57 Codec Realtek ALC892

X7100

o nly

NE RA C EC OD
L74 H C B 1 00 5 K F - 1 2 1T 2 0 U4 5 S UR R_ L _ C F RO NT _ L 2 11 10 S0 S U R R _ R _C F RO NT _ R D OL B Y _ S E L 5 8 7 S1 P I 5 A 3 15 8 0B 1 1B 1 12 0B 0 1B 0 VC C A0 GN D VC C A1 GN D 4 6 S U R R _R S UR R_ R 33 MI C 2 - V R E F O 1 3 9 C 7 81 0 . 1 u_ 1 6 V _Y 5 V _0 4 S UR R_ L A U DG 33

S U R R _L

3 .3 VS

4 2

R 2 73 P C B F o o t p r n t = 8 8 26 6 - 2 R i A UDG 3. 3V S M I C 1 -V R E F O-L MI C 1- V R E F O - R I N T _ MI C R2 6 0 2 . 2 K _0 4 L75 H C B 1 00 5 K F - 1 2 1T 2 0 M I C 1 -L C3 7 0 A U DG 33 *6 8 0 p_ 5 0 V _X 5 R _ 0 4 AUD G AU DG MI C 1- R C3 6 3 *6 8 0p _ 5 0V _ X 5 R _ 0 4 R2 5 3 C 4 00 2. 2 K _ 0 4 3 3 0 p_ 5 0 V _X 7 R _ 0 4 2 .2 K_ 0 4 8 8 2 6 6- 0 2 0 01 2 1 J _ I N TM I C 1

R 47 6

1 0 K _0 4

U4 6 A U D I O_ C E N _ C F RO NT _ L 2 11 10 S0 L E F _ OU T_ C F RO NT _ R 34 D O LB Y _ S E L DO L B Y _ S EL 5 8 7 S1 P I 5 A 3 15 8 A UDG 2, 4 , 1 0 , 1 1, 1 2 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 18 , 1 9 , 2 0, 2 1 , 2 3, 24 , 2 5 , 26 , 2 9 , 3 0, 3 3 , 3 4, 3 5 , 3 6 , 39 , 4 0 , 43 3 . 3 V S 2 , 1 4, 1 5 , 1 7, 1 8 , 1 9 , 25 , 2 6 , 30 , 3 3 , 3 5, 3 9 , 4 3, 44 5 V S 2 6 , 28 , 3 5 , 37 , 3 9 , 4 0, 4 1 , 4 2, 46 5 V 0B 1 1B 1 12 0B 0 1B 0 VC C A0 GN D VC C A1 GN D 4 6 L E F _ OU T L E F _O U T 33 1 3 9 C 7 82 0 . 1 u_ 1 6 V _Y 5 V _0 4

C ENT ER

CEN T E R

Codec Realtek ALC892 B - 33

Schematic Diagrams

APA2010D1-TPA2008D2
AM P 5 VS _

AUDIO AMP

A M P GN D R 2 25 *0 _ 04 A MP _ E N 2 M 0 il F R O N T_ R A MP GN D R2 2 6 A MP GN D A MP GN D 32 F R ON T _L 2 M 0 il F R O N T_ L A MP GN D C 3 11 0 _0 4 C 3 18 R 24 6 R 24 7 C 3 54 R 2 28 R 2 27 * 0_ 04 D0 2 0 _ 04 C 3 51 2. 2 u _6 . 3V _ Y 5 V 0 6 _ C 3 08

T PA 20 08 D2 P 2P B A2 05 50 ( TS SO P2 4)
U2 7 3 22 D02 0. 1 u _1 6V _ Y 5 V _0 2 4 4 23 6 P GN D L1 7 0. 1 u _1 6V _ Y 5 V _0 4 1 2 L INP 14 15 NC 10 11 CO S C RO S C T h erm al _ Pad VDD LOU TN A GN D TP A 2 00 8 D 2 8 12 LO U T N V OL U ME P VDDL 1 P VDDL 2 4 13 P GN D L2 L INN P GN D R 1 P GN D R 2 LO U TP 9 19 5 LO U T P S H U TD O WN BYPASS RIN N RIN P R O U TP P V DD R1 R OU TN P V DD R2 17 16 18 R OU TN 20 21 R OU TP

D 02

D 02

L 46 H C B 16 0 8K F -1 21 T2 5 5 VS C 32 0 22 u_ 6. 3 V _ X5 R _ 08

C 3 55 0 . 1u _1 6 V Y 5 V _0 4 _

C 3 19 0. 1 u _1 6V _ Y 5 V _0 4

2 M 0 il

0. 1 u _1 6V _ Y 5 V _0 4

2 M 0 il

2 M 0 il L1 9 F C M 10 05 K F -12 1 T0 3

0. 1 u _1 6V _ Y 5 V _0 4 6 . 98 K _1 %_ 0 4 1 0K _ 04

O n

5 VS A MP GN D

2 M 0 il L2 0 F C M 10 05 K F -12 1 T0 3

B.Schematic Diagrams

T he vo lu me c on trol. th e g ai n ra ng e is from - 80d b(Vvo lu me= 5V) t o + 20 db (Vvo lume =0V) wi th 6 4 ste ps p reci se c on trol.

C 3 56 2 2 0p _5 0 V_ 0 4 12 0 K _0 4

25

R 24 8

S H U TD O WN 2 M 0 il A MP GN D R2 1 3 A MP GN D A MP GN D 2 M 0 il 32 S U RR_ L R2 3 7 A MP GN D 5 VS A MP GN D 0 _0 4 C 3 40 R 2 15 R 2 14 C 3 38 C 2 93 0 _0 4 C 2 98 R 2 32 2. 2 u _6 . 3V _ Y 5 V 0 6 _ C 2 88 22 D 02 0. 1 u _1 6V _ Y 5 V _0 2 4 4 23 RIN P 6 * 0_ 04 D 02 7 0. 1 u _1 6V _ Y 5 V _0 4 1 2 14 V OL U ME 15 T h erm al _Pa d NC 10 11 RO S C 25 R 24 4 3 . 3V S C 3 42 2 2 0p _5 0 V_ 0 4 R 2 36 1 00 K _1 %_ 0 4 C 33 1 *0. 1 u _1 0V _ X R _ 04 5 12 0 K _0 4 CO S C P GN D L1 P GN D L2 L INN L INP BYPASS RIN N

R O U TP 21 P V DD R1 R OU TN P V DD R2 P GN D R 1 P GN D R 2 LO U TP P VDDL 1 P VDDL 2 13 VDD LOU TN A GN D 8 12 T P A2 0 08 D 2 B _L OU T N 9 4 18 19 5 17 16 B _R O U TN

2 M 0 il

0. 1 u _1 6V _ Y 5 V _0 4

2 M 0 il 2 M 0 il

0. 1 u _1 6V _ Y 5 V _0 4 6 . 98 K _1 %_ 0 4 1 0K _ 04

2 M 0 il L3 1 F C M 10 05 K F -12 1 T0 3

D02
5 VS

21 , 34 , 3 7, 3 9 S U S B # 24 32 34 P C H _ MU T E # E A P D _ MOD E K B C _ MU T E #

R 2 41

*0 _0 4

1 4 2 0 . 1u _ 16 V _Y 5 V _ 04 U2 8 MC 7 4 V H C 1 G08 D F T 1G 3 1 0 u_ 10 V _Y 5V _ 08 A P _E N M C3 0 7 C 30 5

L ow m ute !

C D 13 C D 12

A *C D B U 0 0 34 0 A *C D B U 0 0 34 0

A MP _5 V S

T PA 20 08 D2 P 2P B A2 055 0 ( TS SO P2 4)
A MP GN D R 2 19 A MP _ E N 20 M il A MP GN D R2 1 8 A MP GN D A MP GN D C 3 12 0 _ 04 C 3 13 R 2 93 2. 2 u _6 . 3V _ Y 5 V _0 6 C3 1 4 *0_ 0 4 3 S H U TD O W N 22 D 02 2 0 . 1u _1 6 V Y 5 V _0 4 4 _ 23 RIN P 6 *0_ 0 4 7 P GN D L2 R2 9 2 A MP GN D 5 VS 0 _ 04 C 4 85 R 2 20 R 2 21 0. 1 u _1 6V _ Y 5 V _0 4 1 0K _ 04 1 0K _ 04 1 L INN 2 14 V OL U ME 15 10 11 RO SC T h erm al _ P d a NC CO SC P VDDL 2 VDD LOU TN A GN D T P A 20 08 D 2 25 13 8 12 L INP L OU T P P VDDL 1 9 4 P GN D R 2 5 20 M il P GN D L1 P V DD R2 P GN D R 1 18 19 BYPASS RIN N R OU T P P V DD R1 R OU TN 21 17 16 U4 4 20

32

CE NT E R

0. 1 u _1 6V _ Y 5 V _0 4

X510 0
F R ON T _R F R ON T _L 0. 1 u _1 6V _ Y 5 V _0 4 C 7 73 0. 1 u _1 6V _ Y 5 V _0 4 C 4 86

D02

A MP GN D

32

L E F _O U T

C 37 4

0 . 1 u_ 16 V _Y 5V _ 04

R 4 24 D0 2

3 . 1 6K _ 1% _0 4 C 6 16 C 47 7 22 0p _5 0 V _0 4

R 45 4 1 20 K _0 4

X 7100

0 . 1 u_ 16 V _Y 5V _ 04

A MP GN D

D 02

2 , 4 , 15 , 17 , 1 8, 1 9, 2 5, 2 6 , 0 , 32 , 35 , 39 , 4 3, 4 4 5 V S 1 3 2 , 4 , 10 , 11 , 12 , 1 3, 1 4, 1 5, 1 6 , 17 , 18 , 19 , 2 0, 2 1, 2 3, 2 4 2 5 , 26 , 29 , 3 0, 3 2, 3 4, 3 5 , 6 , 39 , 40 , 43 3 . 3V S , 3

B - 34 APA2010D1-TPA2008D2

B _L OU T P

L3 0

32

S U RR_ R

L2 6

Sheet 33 of 57 APA2010D1TPA2008D2

R 25 4

*20 m li _P _ 04 A MP GN D R 2 12 A MP _ E N * 0_ 04

T PA 200 8D 2 P 2P BA 20 55 0 ( TS SOP 24 )
U2 6 3 20

D02
C 3 41 0 . 1u _1 6 V Y 5 V _0 4 _ C 2 99 0. 1 u _1 6V _ Y 5 V _0 4

A MP GN D

B _R O U TP

L2 5

32

F R ON T _R

L2 2

. . . .

L2 1

F C M 10 05 K F -12 1 T0 3

R OU T +

F ro nt Spe a ker R / L

2W

J _X 51 S P K 1 R OU T 1 2 3 4 8 52 05 - 0 40 01

F C M 10 05 K F -12 1 T0 3

4 Oh Spe er m ak

LOU T+ R OU T + R OU T LO U T+ LO U TC 76 1 C7 62 C7 6 3 C76 4 LOU T-

1 00 0p _ 50 V_X7 R_ 04

1 0 00 p_ 5 0V_ X7R_ 0 4

10 0 0p _5 0V_ X7R _0 4

1 00 0p _ 50 V_X7 R_ 04

D 02
D 02 A MP _ 5V S C 28 6 22 u_ 6. 3 V _ X5 R _ 08

F C M 10 05 K F -12 1 T0 3

B _R O U T+

Ba ck Su rr o un d Sp ea ke r R / L
J_ X 71 S P K 1 1 2 3 4 5 6

2W

F C M 10 05 K F -12 1 T0 3

B _R O U T-

4 Ohm S ak pe er

F C M 10 05 K F -12 1 T0 3

85 20 4 - 06 00 1 B _ R OU T + B _ R OU T B _ LO U T+ B _ LO U TC7 6 9 C77 0 C7 66 C 76 7 C7 65

B _ LO U T+

D 02
C7 68

10 00 p _5 0V_ X7R _0 4

1 00 0 p_ 50 V_ X R_ 04 7

10 00 p _5 0V_ X7R _0 4

1 00 0p _ 50 V_X7 R_ 04

1 00 0 p_ 50 V_X7 R_ 04

1 00 0p _5 0 V_X7 R_ 04

B _L OU T -

L39 A MP GN D *H C B 10 0 5K F - 1 21 T2 0 - 7

4 O hm S pea r ke
A MP GN D CE NT E R+ CE NT E RL52 L51 F C M10 0 5K F -1 21 T0 3 7 F C M10 0 5K F -1 21 T0 3 7

CE NT ER 2 W TH D+ N at 1 %

D0 2

S UBW OO FE R 3W
P C B F o ot p r i nt = 88 26 6 - 2R S U B W OOF E R + S U B W OOF E R L6 7 FC M10 0 5K F -1 21 T0 3 - 7 C77 2 10 00 p _5 0V_ X7R _0 4 C7 71 FC M10 0 5K F -1 21 T0 3 - 7 L6 6 88 2 66 - 02 00 1 2 1 4 O hm J_ S U B W OOF 1

Th cu off f qu cy Fc e tre en ut Fc ut = 1 / (2 * P * ( ) i CA ut( db 48 -3 )= 5.4 Hz * (R ) Fc A) S ak pe er 48 4 Hz Lo Pa 5. w ss F ilt er

D02

1 00 0p _ 50 V_X7 R_ 04

A MP GN D

Schematic Diagrams

KBC-ITE IT8519
K B C_ A V D D V D D3 C4 0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 C 40 1 1 0 u_ 1 0 V _Y 5 V _0 8 C 4 17 0 . 1 u _1 6 V _ Y 5 V _ 0 4 C4 2 0 0 . 1u _ 1 6V _ Y 5V _ 0 4 0. 1u _ 16 V _ Y 5 V _ 04 C4 2 1 L5 3 H C B 10 0 5K F -12 1 T 20 C 41 3 0 . 1 u _1 6 V _ Y 5 V _ 04 C4 1 1 *0 . 1 u_ 1 6V _Y 5V _0 4

C 4 15 L54 3 .3 V S H C B 10 0 5 K F -1 21 T 2 0 0 . 1 u _1 6 V _ Y 5 V _ 0 4 E C _ V CC

K B C_ A G ND

26 50 92 1 14 121 1 27

11

U3 1 10 9 8 7 13 6 5 22 14 W RS T # 126 4 16 20 23 15 76 77 78 79 80 81 B A T _ DE T B A T _ V OL T T OT A L _ C U R 66 67 68 69 70 71 72 73 110 111 115 116 117 118

M74 0T /T U

74

0 _0 4 fo r M 76 0T /TU B KP 10 05 HS1 21 _0 4 f or E MI S ol uti on

VST B Y VST BY VST B Y VST BY VST BY VST BY

V CC

AVC C

VBAT

19 L P C _A D 0 19 L P C _A D 1 19 L P C _A D 2 19 L P C _A D 3 23 P CL K _ K B C 1 9 L P C _ F R A ME # 19 SE RIR Q 1 6 , 2 3, 2 8 , 2 9, 36 , 3 7 B U F _ P L T _R S T #

P C L K _K B C

LA D 0 LA D 1 LA D 2 LA D 3 LP C C L K LF R A ME # S E RIR Q LP C R S T # / W U I 4 / G P D 2 ( P U )

L PC

K/B MATRIX

K S I 0/ S T B # K S I1 /A F D# K S I 2 / I N I T# K S I3 /S L IN# KSI4 KSI5 KSI6 KSI7

58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55

KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB KB

-S I 0 -S I 1 -S I 2 -S I 3 -S I 4 -S I 5 -S I 6 -S I 7 -S O0 -S O1 -S O2 -S O3 -S O4 -S O5 -S O6 -S O7 -S O8 -S O9 -S O1 0 -S O1 1 -S O1 2 -S O1 3 -S O1 4 -S O1 5

K B C _ W RE S ET # 24 GA 2 0 3 5, 4 5 A C_ IN # 30 LE D _ A C I N 21 , 2 3 A C _ P R E S E N T 24 24 S MI # S CI#

GA 2 0 / GP B 5 K B R S T # / GP B 6 ( P U ) P W U R E Q# / GP C 7 ( P U ) L8 0 L LA T / G P E 7( P U ) E C S C I #/ G P D 3 ( P U ) E C S M I #/ G P D 4 ( P U )

DAC
GP J 0 GP J 1 D A C 2/ G D A C 3/ G D A C 4/ G D A C 5/ G PJ 2 PJ 3 PJ 4 PJ 5

29 , 3 0 , 35 W L A N _E N 33 K B C _ MU T E # 19 ME _W E # 30 C P U _F A N 30 V GA _ F A N U S B _ P N_ CT RL #

IT8519
FLASH

K S O0 / P D 0 K S O1 / P D 1 K S O2 / P D 2 K S O3 / P D 3 K S O4 / P D 4 K S O5 / P D 5 K S O6 / P D 6 K S O7 / P D 7 KS O 8 /A CK # K S O9 / B U S Y K S O1 0 / P E K S O 1 1/ E R R # K S O1 2 / S L C T K S O 13 K S O 14 K S O 15

ADC
A DC A DC A DC A DC A DC A DC A DC A DC 0/ G 1/ G 2/ G 3/ G 4/ G 5/ G 6/ G 7/ G PI0 PI1 PI2 PI3 PI4 PI5 PI6 PI7

45 B A T_ D E T 4 5 B A T _ V OL T 4 5 T OT A L _ C U R 3 T H E R M_ V OL T 28 28 3 G_ D E T # CCD _ DE T #

3 G_ D E T# C C D _D E T # M OD E L_ I D S M C_ B AT S M D_ B AT S M C _ V GA _T H E R M S M D _ V GA _T H E R M H _P E C I _ R S M D _ C P U _ TH E R M L CD _ B RIG HT NE S S K B C_ B E E P

F LF R A ME #/ G P G2 F LA D 0 / S C E # F L A D1 /S I F L A D 2/ S O F L A D 3/ G P G6 F L C LK / S C K ( P D )F L R S T # / W U I 7 / T M/ G P G0

100 101 102 103 104 105 106

K B C_ S P I_ CE # K B C_ S P I_ S I K B C_ S P I_ S O K B C_ S P I_ S CL K

SMBU S
S MC S MD S MC S MD S MC S MD LK 0 / G A T0 / G LK 1 / G A T1 / G LK 2 / G A T2 / G PB3 PB4 P C1 P C2 P F 6( P U ) P F 7( P U )

GPIO
( P D )K S O 1 6/ G P C 3 ( P D )K S O 1 7/ G P C 5 ( ( ( ( ( ( ( P P P P P P P D D D D D D D )I D )I D )I D )I D )I D )I D )I D 0/ G 1/ G 2/ G 3/ G 4/ G 5/ G 6/ G P H0 P H1 P H2 P H3 P H4 P H5 P H6

45 S M C_ BA T 45 S M D_ BA T 1 4 S MC _V GA _ T H E R M 1 4 S MD _V GA _ T H E R M 20 S M D _ C P U _T H E R M

56 57 93 94 95 96 97 98 99 107

LOW ACTIVE

3 2 KBC _ BEEP 3 0 , 3 5 L E D _S C R O L L# 30 , 3 5 LE D _ N U M# 3 0 , 3 5 LE D _ C A P # 3 0 L E D_ B A T _ CH G 3 0 L E D _B A T_ F U LL 30 L E D _P W R 29 29 80 C L K B T _ DET #

24 25 28 29 30 31 32 34

PWM
P W M0 / GP P W M1 / GP P W M2 / GP P W M3 / GP P W M4 / GP P W M5 / GP P W M6 / GP P W M7 / GP A 0( A 1( A 2( A 3( A 4( A 5( A 6( A 7( P P P P P P P P U U U U U U U U ) ) ) ) ) ) ) )

( P D )I D 7/ G P G1

EXT GPIO
( P D )E GA D / GP E 1 ( P D )E GC S # / GP E 2 ( P D )E GC L K / GP E 3

82 83 84

* 0_ 0 4 * 0_ 0 4

R 2 82 R 4 32

8 0 CL K 3 IN1 H _P R OC H O T# _ E C

4 H _ P R O C H O T #_ E C 35 T P _ CL K 35 T P _ DAT A 28 3G _E N

85 86 87 88 89 90

PS/2
P S 2C P S 2D P S 2C P S 2D P S 2C P S 2D L K 0/ A T 0/ L K 1/ A T 1/ L K 2/ A T 2/ GP F 0 ( GP F 1 ( GP F 2 ( GP F 3 ( GP F 4 ( GP F 5 ( PU PU PU PU PU PU ) ) ) ) ) )

WAKE UP
( P D )W U I 5 / GP E 5 ( P D )LP C P D # / W U I 6 / GP E 6

35 17

PWM/COUNTE R
( P D )T A C H 0/ G P D 6 ( P D )T A C H 1/ G P D 7 ( P D )T M R I 0 / W U I 2/ G P C 4 ( P D )T M R I 1 / W U I 3/ G P C 6 ( P D )C R X/ G P C 0 ( P D )C T X / GP B 2

47 48 120 124 119 123 R 29 4 R 29 1 0_04 * 0 _0 4 C IR_ RX R 64 2 S H OR T S W I#

125 18 21

WAKE UP
P W RS W /G P E 4 ( PU ) R I 1 # / W U I 0 / GP D 0 ( P U ) R I 2 # / W U I 1 / GP D 1 ( P U )

CIR

39 PW R _ SW # 1 5 , 2 9, 3 5 L I D _ S W # 21 P W R_ B T N#

* 0_ 0 4 NC6

33

GP I NTERR UPT
GI N T / G P D 5 ( P U )

LPC/WAKE U P
( P D )L 8 0 H L A T / GP E 0

19 112 2 128 C K 3 2K E C K 3 2K R 28 4 X9 1 2 X1 0 1 2 C 41 9

AVSS

VSS VSS VSS VSS VSS VSS VSS

2 9, 3 0 , 3 5 W LA N _ LE D # 29 W L A N_ DE T #

108 109

UART
RX D/G PB 0 ( P U ) TX D / GP B 1 ( P U )

( P D )R I N G# / P W R F A I L #/ L P C R S T # / GP B 7

CLOCK
CK 3 2 K E CK 3 2 K

1 12 27 49 91 1 13 122

75

I T E 85 1 9 B X R 2 81 C 4 14 *0 _ 04 E C _V S S

0 . 1 u _1 6 V _ Y 5 V _ 04 NC 7 S HO RT

0 _0 4 FO R I T8 51 2CX /E X 0 .1 U_ 04 FO R IT E85 12 -J (IT E8 50 2- J E C Co st Do wn


15 BRIG HT NE S S R2 7 6 0 _ 04

W/ 0 CIR )

N C3

S H OR T

D02
LC D _ B R I GH T N E S S K B C _ A GN D

*1 2 p _5 0 V _ N P O _0 4

C4 0 6

*0 . 1u _ 1 6V _Y 5V _0 4

.
C 4 10 4 5 6 8 11 12 14 15 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 *1 0 M_ 0 4 * 3 2. 7 6 8 K H z 4 3 * 3 2. 7 6 8 K H z 4 3

V D D3 J _ CIR 1 1 J_KB 1 24 1 2 3 4 8 5 20 4 -0 40 0 1 C I R _R X

V D D3

* 0 . 1u _ 1 6V _ Y 5V _ 0 4

R 2 79 1 0 0 K _0 4 K B C _W R E S E T # C 4 09

X7100
J _ KB2 8 52 0 1 -24 0 5 1 K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O K B -S O 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

X5100
J _K B 1 85 2 01 -2 4 05 1 4 5 6 8 11 12 14 15 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 R6 3 0 R6 3 1 R6 3 2 1 0 K _0 4 4 . 7 K _0 4 4 . 7 K _0 4 C S MC _B A T AC D2 1 BAV9 9 AC D2 2 BAV9 9 AC D2 3 BAV9 9 AC D2 4 BAV9 9 A C S MD _B A T A C B A T_ D E T A C A 4 , 24

1 u _ 10 V _ 0 6

EC M ODULE CHOO SE ( FOR D IFFE RENCE K/B TYPE )


VE R. V1 .0 RX R 27 7 1 0K / R27 8 X R 27 7 X /R 278 1 0K VO LT AG E 3 .3 V 0V
R 2 77 R 2 78

M OD EL_ ID X 51 00M X 71 00M


1 0 K _ 04 * 10 K _ 0 4

B.Schematic Diagrams

D02

M OD E L _I D

V D D3

RX
V DD 3

Sheet 34 of 57 KBC-ITE IT8519

V D D3 3 G_ D E T # C C D _ D E T# R2 7 4 R2 7 5 1 0K _ 0 4 1 0K _ 0 4

3 G_ P O W E R 2 8

V S H G _S E L 4 5 CCD _ E N S US B # S US C # 28

H_ P E C I 2 0 S MC _ C P U _ T H E R M

R2 8 9

4 3 . 2 _1 % _ 04

H_ P E C I_ R

2 1 , 3 3, 3 7 , 3 9 2 1 ,4 1

S MC _C P U _ T H E R M R 51 6

*0 _0 4

S U S _ P W R _A C K 2 1 B T _E N 2 9 , 3 0, 3 5 BKL _ EN 1 5 H S P I_ CE # 1 9 H S P I _ S C LK 1 9 H S P I _ MS O 1 9 H S P I _ MS I 19 DD_ O N 3 5 , 3 8, 3 9

B A T_ V O LT

PCL K _ K B C

R2 8 0 *1 0 _0 4

C 41 2

* 10 p _ 50 V _ N P O _ 04

3 . 3V S

R 5 15 10 K _ 0 4

B A T _ V OL T

C 40 3

1u _ 1 0V _ Y 5V _ 0 6

U S B _P W R _ E N # 3 5 C E LL _ C O N T R O L 45 H D A _ S Y N C _ C TR L 19 D OL B Y _S E L 3 2 R S M R S T # 21 K B C_ RS T # 2 4 8 0 DE T # R 28 3 1 0 K _0 4 3I N 1 T OT A L _C U R R 4 9 7 29 8 0D E T # D02 CP U_ F ANS E N 3 0 V G A _F A N S E N 30 P M _P C H _ P W R OK 2 1 V C OR E _O N 4 3 A L L _S Y S _ P W R G D 2 , 1 4 , 15 , 2 1 , 43 3 IN1 29 C 48 0 1 00 _ 0 4 1u _ 1 0V _ Y 5V _ 0 6

D02

V DD 3

N C4 S H OR T 0. 1 u _ 16 V _ Y 5 V _ 0 4 C 73 4 U 39 S P I _ V D D _1 8 VD D SI 2 S O R4 9 9 V DD 3 K B C_ F L A S H 3 1 K _ 04 K B C _ H OL D # 7 4 . 7 K _0 4 1 W P# CE # 6 K B C_ S P I_ S CL K _ R SC K R5 0 4 3 IN1 8 0 CL K 8 0 DE T # 4 H OL D # VSS S S T2 5 V F 0 80 B 1 9 , 29 , 3 5 , 36 , 3 8 , 39 , 4 5 V D D 3 2 , 4 , 10 , 1 1 , 12 , 1 3 , 14 , 1 5 , 1 6, 1 7 , 1 8, 1 9 , 2 0, 2 1 , 2 3, 2 4 , 2 5, 2 6 , 2 9, 30 , 3 2 , 33 , 3 5 , 36 , 3 9 , 40 , 4 3 3. 3V S K B C_ S PI_ CE# _ R K B C _ S P I _ S O_ R 5 K B C_ S PI_ S I_ R R2 8 6 R2 8 5 R2 8 7 R2 8 8 4 7_ 0 4 1 5_ 1 % _0 4 1 5_ 1 % _0 4 4 7_ 0 4 K B C _S P I _ S I K B C _S P I _ S O K B C _S P I _ C E # K B C _S P I _ S C LK

P ME # 23 LA N _ P C I E _ W A K E # 3 6 21 45

8 Mb it

KBC_SPI_*_R = 0.1"~0.5"

CHG _ E N

J _8 0 D E B U G1 1 2 3 4 5 8 82 6 6 -05 0 0 1 C 4 18 * 12 p _ 50 V _ N P O_ 04

KBC-ITE IT8519 B - 35

Schematic Diagrams

USB, TP, FP, MULTI-CONN


F OR C LI CK BO AR D F OR HD D& OD D BOA RD
Zero Power ODD
Z ero _ V I N R6 4 0 C7 7 9 2 4 6 8 10 12 14 16 18 20 J _ S A T A _ H OD D 1 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 *0 . 0 1u _ 50 V _ X 7R _ 04 S A T A _ TX P 2 S A T A _T X N 2 S A T A _ RX N2 S A T A _ RX P 2 S A T A _ TX P 4 S A T A _ TX N 4 S A T A _ RX N4 SAT A_ RXP4 S A T A _ TX P 2 1 9 S A T A _ TX N 2 1 9 S A T A _ RX N2 S A T A _ RX P 2 S A T A _ TX P 4 S A T A _ TX N 4 19 19 19 19 5 V S _O D D 2 GN D G5 2 43 A C7 1 4 +C 3 9 4 10 0 K _ 04 *1 0 0 u_ 6 . 3 V _B 2 1 0u _ 10 V _ Y 5 V _ 0 8 U 43 1 V O UT VIN VIN EN 4 5 0. 1 u _ 16 V _ Y 5 V _0 4 J _T P 1 10 9 8 7 6 5 4 3 2 1 8 52 0 1- 10 0 51 T P _ CL K T P _ DA T A T P _ CL K 3 4 3 .3 V S T P _ DA T A 3 4 T P _ CL K T P _ DA T A C7 5 0 4 7P _ 5 0 V _0 4 4 7 P _5 0 V _ 04 U S B _P N 4 23 U S B _P P 4 23 C 75 1 5 VS 5 VS *1 5 mi l _ sh o rt _ 06 R6 3 3 C 78 0 5V S _O D D 1 0K _ 0 4 1 0 K _0 4 *1 0 U _ 1 0V _ 0 8 R 63 4 C7 4 9 5 VS

24 S A T A _ OD D _ P R S N T # 2 3 S A TA _ O D D _ D A # 5 VS 3. 3 V S

S A TA _O D D _ P R S N T # S A TA _O D D _ D A #

2 4 6 8 10 12 14 16 18 20

3 R 6 41

S A T A _ OD D _ P W R G T 2 4

S A T A _ RX N4 1 9 S A T A _ R X P 4 19

H om e t o m 1. 2 7 *2 0 ca p

B.Schematic Diagrams

5V

USB PORT
5V 5 C 34 8 * 0. 1 u _ 16 V _ 0 4 C3 4 5 C 3 26 *0 . 1 u _1 6 V _ 04 10 u _ 10 V _ Y 5 V _ 08 F or E SD 3 9 , 41 D D _ ON #

US B V CC0 1 U 29 F L G# V O U T 1 V IN 1 V O UT 2 V IN 2 V O UT 3 4 EN # GN D 32 32 MI C 1-R MI C 1-L R T9 7 1 5B G S 1 6 7 8 C3 6 0 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 0 u _1 0 V _ Y 5 V _0 8 * 1 00 u _6 . 3 V _ B 2 2 3

100 mil
C3 4 3 +C 6 00

Sheet 35 of 57 USB, TP, FP, MULTI-CONN

100 mil

FOR A ud io
U S B V CC 0 1 1 3 5 7 9 11 13 15 17 19 A U DG

JA CK BO AR D
2 4 6 8 10 12 14 16 18 20 JD _ S E N S E A LI N E -R LI N E -L JD _ S E N S E B S IDE _ R S IDE _ L J D_ S E N S E A 3 2 L I N E -R 32 L I N E -L 32 J D_ S E N S E B 3 2 S IDE _ R 3 2 S IDE _ L 3 2

J _A U D I O 1

C3 5 9

C 35 0

3 2 H E A D P H ON E -R 3 2 H E A D P H ON E -L 5V S SPK_ HP#

USB Charge PORT


V DD 5 U S B V C C _C H A R GE R C 7 83 10 u _1 0 V _ Y 5 V _ 08 1 IN 23 V DD 3 23 U S B _P N 1 U S B _P P 1 2 DM _ O 3 4 V DD 5 3 4 , 3 8, 3 9 D D _ ON V DD 5 3 4 U S B _ P W R _E N # D P Q7 3 MT N 7 0 0 2Z H S 3 S R 6 52 R6 4 5 R6 4 7 R6 5 1 10 K _ 0 4 10 K _ 0 4 5 D P _O I L I M_ S E L E N /DS C CT L 1 CT L 2 CT L 3 PPAD O UT 11 D M_ I N DP _ IN G ND I LI M0 I LI M1 9 NC 13 F A UL T # G_ OC #0 1 R6 5 3 10 14 16 15 R6 4 6 R6 4 8 15 K _ 1 %_ 0 4 U S B _ P P 1 _R U S B _ P N1 _ R C7 8 4 17 23 12 U 47

0 . 1 u_ 1 6V _ Y 5V _ 0 4 *1 0 u_ 1 0V _ 0 8

8 81 0 7-2 0 0 01

8/3 1
23 23 U S B _O C # 1 14 , 3 2 SPD IF O U S B _P N 0 U S B _P P 0

US B _ P N 0 US B _ P P 0

0. 1 u _ 16 V _ Y 5 V _ 0 4 V D D3 3. 3V

P R 2 45 1 0 K _ 04

1 0K _0 4 6 1 0K _0 4 7 8

R 65 0 *1 0K _ 0 4 R6 4 9 10 K _ 0 4 * 10 K _ 0 4 *0 _ 04

D02
J _ X7 1 P OW 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 87 1 5 1-1 5 0 51

3. 3 V S

X7100 only
FO R 3D E mi tte r Mo du le
W L A N _L E D # 2 9 , 3 0, 3 4 S A T A _L E D # 19 , 3 0 B T _E N 29 , 3 0 , 34 W L A N _ E N 2 9 , 3 0, 3 4 L E D _ N U M# 3 0, 3 4 L E D _ C A P # 3 0 , 34 L E D _ S C R OL L # 3 0 , 3 4 M_ B T N # 39 V D D3 5 VS 85 2 0 5-0 6 0 01 23 23 U S B _P N 6 U SB_ PP6 6 5 4 3 2 1 J _ 3D 1

G 3 4 ,4 5 A C_ IN#

9/3
CTL1 CTL1 CTL1

T P S 2 5 40

M_PQ FP16
CTL2 CTL2 CTL2 CTL3: 0 CTL3: 1 CTL3: X X 1 1 1--- -- > D dicat ed Charg ing Pot, Aut o-det ect e 1- --- -> Charg ing D ns tream Port, BCSpe cificat ion 1.1 ow 0--- -- > Sta ndard D ns tream Port, USB 2.0 Mo de ow

USB_AC_IN
US B V C C_ CH A RG E R

D 02 W L A N_ L E D# S A T A _ LE D # B T _E N W LA N _E N L E D _ N U M# L E D_ CA P # L E D _S C R O L L# M_ B T N #

US B V C C_ CH A RG E R L68 H C B 1 6 0 8K F -1 2 1 T2 5 U S B _ V C C 01 _ 0

50 mil

.
C 5 68 1 0 u_ 1 0V _Y 5V _0 8 C 59 7

50 mil

L I D _S W #

L ID_ S W #

15 , 2 9 , 34

0 . 1 u_ 1 6 V _Y 5 V _0 4

C 75 9 0 . 0 1u _ 1 6V _ X 7 R _ 0 4

C 7 60 0 . 0 1 u_ 1 6 V _X 7R _0 4 1 L 65 U S B _P N 1 _R U S B _P P 1 _ R 1 4 2 3 2 3

Port 0
J _ US B 1 V+ DAT A_ L DAT A_ H GN D GN D 1 GN D 1 G ND 2 V DD 3 3 . 3V S 5V 5 VS 3 . 3V V DD 5 1 9 , 2 9, 3 4 , 3 6, 3 8 , 3 9, 4 5 2 , 4 , 1 0, 1 1 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 1 7 , 1 8, 1 9 , 2 0, 2 1 , 2 3, 2 4 , 2 5, 2 6 , 2 9, 3 0 , 3 2, 3 3 , 3 4, 3 6 , 3 9, 4 0 , 4 3 2 6 , 2 8, 3 2 , 3 7, 3 9 , 4 0, 4 1 , 4 2, 4 6 2 , 1 4 , 15 , 1 7 , 18 , 1 9 , 25 , 2 6 , 30 , 3 2 , 33 , 3 9 , 43 , 4 4 2 , 3 , 4 , 9, 1 4 , 1 5, 1 9 , 2 0, 2 1 , 2 3, 2 4 , 2 5, 2 6 , 2 8, 2 9 , 3 0, 3 6 , 3 7, 3 9 , 4 0, 4 1 , 4 2 3 8 ,3 9 4

W C M2 01 2 F 2 S -1 61 T 03 -s h ort

EM I

B - 36 USB, TP, FP, MULTI-CONN

GN D 2

U S 04 0 3 6B C A 0 81 P IN G N D3 ~ 4 = G ND

L35

S P D I F O_ R F C M1 0 05 K F -1 2 1 T0 3 _0 4 C 27 3 1 0 00 p _ 50 V _ X 7R _ 04

Schematic Diagrams

Card Reader (JMC 251C)


S D_ CL K

JMC251 C
3. 3 V S R4 7 1 V C C _C A R D *4 . 7 K _ 04 S D _ C D # S DX C_ P O W E R D0 2 R 48 1 1 K_ 0 4 S D_ W P

D 02 C 74 0 n ear Pin# 41 I S ON * 10 p _ 50 V _ N P O _ 06 S D_ CL K R 50 0 D 02 R5 0 1 0_ 0 4 R6 3 9 0_ 0 6

V D D3

3 . 3 V _L A N

S wit ch in g R eg ula to r c los e to PI N3 3


DV DD

R 4 74 L A N_ S CL R 4 73

* 4 . 7K _ 0 4 * 4 . 7K _ 0 4 8

*1 0 0 K _1 % _ 04

U 35 7 VC C WP A0 A1 A2 1 2 3 SC L SD A G ND

(>2 0m il )
R E G LX

L 70 D V DD

S W F 2 5 20 C F -4R 7 M-M 3. 3 V _ L A N S D X C _ P OW E R C 7 41 2. 2 u _ 6. 3 V _ Y 5 V _ 0 6 M D IO1 1 L A N _ LE D 0 L AN_ L ED1 IS ON

R E GL X

S D _B S S D_ D3 S D_ D 2 S D_ D1 S D_ D 0 D VDD

D0 2

V DD 3

3 .3 V

F or JM C2 51/ 26 1 o nly

Ca R rd eade Pul Hi r l gh/Lo w Re D 1 2 _ 52 sist ors A VD


C 72 8 0 . 1 u_ 1 6 V _Y 5 V _0 4 MD I O1 0 MD I O9 MD I O8 A V D D 1 2 _5 2 A V D D 1 2 _5 5 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

D02
R 4 56 * 15 m i _ s ho rt _ 0 6 l R 49 8 *0 _ 0 4

U3 7

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

M D IO1 1 L A N_ L ED0 LA N _ LE D 1 IS O N GND V D DIO VDDO M D IO 5 M D IO4 M D IO 3 M D IO2 M D IO 1 M D IO0 F B1 2 G ND LX

A V D D 1 2 _ 55 C 70 8 0 . 1 u_ 1 6 V _Y 5 V _0 4

D V DD D V DD

R4 7 5

*1 5 m li _ s ho rt _ 0 6 3 1 L A N _ MD I P 0 3 1 L A N _ MD I N 0 *1 5 m li _ s ho rt _ 0 6 31 31 D02 L A N _ MD I P 1 L A N _ MD I N 1

R4 7 2

A V D D 1 2 _ 62 C 70 2 0 . 1 u_ 1 6 V _Y 5 V _0 4 D V DD R4 6 6

3 . 3 V _L A N 3 1 L A N _ MD I P 2 3 1 L A N _ MD I N 2 *1 5 m li _ s ho rt _ 0 6 31 31 L A N _ MD I P 3 L A N _ MD I N 3

LA N _ MD I P 2 LA N _ MD I N 2 A V D D 1 2 _6 2 LA N _ MD I P 3 LA N _ MD I N 3

R EXT A V D D 33 X IN X OU T C LK N CL KP AV D D1 2 RX P RX N G ND TXN TX P AV DD 1 2 M D IO1 3 M D IO7 C R _ C D 1N

MD I O 1 0 MD I O 9 MD I O 8 V DD V I P _1 V IN_ 1 A V D D 12 V I P _2 V IN_ 2 GN D A V D D 33 V I P _3 V IN_ 3 A V D D 12 V I P _4 V IN_ 4

JMC251 C
(LQFP 64)

V DD RE G V CC 3 V P W R CR TEST MP D W AKEN L A N _ LE D 2 C R _L E D R S TN CP P E N G ND V D DIO MD I O6 MD I O1 2 MD I O1 4 C R _ C D 0N

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

3. 3 V S ( >2 V C C _C A R D MP D R 47 9 L A N _ P C I E _W A K E # L A N_ S C L L A N_ S D A

( >2 0m il) 0m il)


D02 B U F _ P L T_ R S T#

* 0 _0 4

S D _W P M D I O 12 MD I O1 4 S D _C D #

3. 3 V _ L A N V D D3 A V D D 1 2 _7 C 6 83 0 . 1 u _1 6 V _ Y 5 V _ 04 A V D D 1 2_ 7 C6 5 8 D0 2 C 7 74 1 u _2 5 V _ 08 6 *1 0u _ 1 0V _ Y 5V _ 0 8 D V DD V C NT L V O UT V O UT EN 2 1 VFB C7 7 6 8 2 p _5 0 V _ N P O_ 0 4 R6 3 8 2 . 5 K _ 1% _ 0 4 GN D U 42 4 3 R 63 7 A V D D 1 2 _1 3 1. 2 7 K _ 1% _ 0 4 V IN V IN P OK 5 9 7 8 IN_ C

D02 3 . 3 V _ LA N J MC 25 1 C 1 K _ 04 MS _ I N S #

P CI e Dif fe re nti al P ai rs = 10 0 Ohm

3 .3 VS R4 6 8 R4 5 9 *1 0 K _ 1% _ 0 4 MS _ I N S # 1 2K _ 1 % _0 4

A V D D 12 _ 7

L A NX IN L A NX OUT

R4 7 0

A V D D 1 2 _ 13 M D I O 13 M D IO7

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

R 4 64

*0 _ 0 4 MS _ I N S #

C6 8 0 0 . 1u _ 1 6V _ Y 5V _ 0 4

DV D D R4 6 2 * 1 5m i l_ s h or t _ 0 6

D VDD R4 5 7 * 15 m i l_ s ho r t _ 0 6

D 02

R 4 65

0 _0 4

3 .3 V _ L A N

C 68 1 C 68 2

0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04

P C I E _ R XP 2 _ GL A N 20 P C I E _R X N 2 _ GL A N 2 0 2 1 , 28 , 2 9 , 37 P C I E _W A K E #

DV D D

C6 3 7 LA N X OU T D02 *1 0 u_ 6 . 3 V _X 5 R _ 0 6 P in#5 5 R eser ved R4 6 7 X1 2 2 3 . 3 V _ LA N 2 C 73 3 0 . 1 u_ 1 6 V _Y 5 V _0 4 Pin #43 C7 3 8 *0 . 1 u_ 1 0 V _X 5 R _ 0 4 Pi 3 n#4 X 8 A 02 5 0 00 F G 1H _ 25 MH z C 63 5 22 p _5 0 V _ N P O _0 4 C6 3 6 3 X1 1 1 *1 M _0 4 *2 5M H z 1 4 L A NX IN D 02

P C I E _T X N 2 _ GL A N 20 P C I E _ T X P 2_ G LA N 2 0 C LK _ P C I E _G L A N 2 0 C L K _ P C I E _ G LA N # 20

22 p _ 50 V _ N P O _ 04

3 . 3 V _ LA N

V C C _C A R D C 70 6 D 02 C7 1 3 0 . 1u _ 1 6V _ Y 5V _ 0 4 Pi 9 n#5 C 6 84 0. 1 u _1 6 V _ Y 5 V _ 04 P 2 in# C7 0 7 0. 1 u _ 16 V _ Y 5 V _ 0 4 P in#2 1 C 39 8 0 . 1 u _1 6 V _ Y 5 V _ 04 C 3 97 V C C_ CA R D

1 0 u_ 6 . 3 V _X 5 R _ 0 6 Pin #59 Res erve d

D02
C7 1 7 C 70 1 0 . 1 u _1 6 V _ Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4

10 u _1 0 V _ Y 5 V _ 08

Place all capacitors closed t o chip. The subs cript in e ach CAP incic ates t he pin number of JMC251/JMC261 t hat should be closed t o.

Near Cardreader CONN


1 9 , 29 , 3 4 , 3 5, 3 8 , 3 9, 4 5 V D D 3 D V DD 2 , 4 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6 , 17 , 1 8 , 19 , 2 0 , 21 , 2 3 , 24 , 2 5 , 26 , 2 9 , 30 , 3 2 , 33 , 3 4 , 35 , 3 9 , 40 , 4 3 3 . 3V S 2 , 3 , 4 , 9 , 14 , 1 5 , 19 , 2 0 , 21 , 2 3 , 24 , 2 5 , 26 , 2 8 , 29 , 3 0 , 35 , 3 7 , 39 , 4 0 , 41 , 4 2 3 . 3V 2 6 , 28 , 3 2 , 35 , 3 7 , 39 , 4 0 , 41 , 4 2 , 46 5 V

( >20 mi l)
C 74 2 1 0 u_ 1 0V _Y 5V _0 8 Pin# 33 C7 3 1 0 . 1u _ 16 V _ Y 5 V _ 0 4 Pi 3 n#3 L A N_ S DA

6 5 4

*A T 2 4C 02 B N 3 .3 V S V DD 3 3 . 3V S V D D3 D 02 MP D C7 1 9 0 . 1u _ 1 6V _ Y 5V _ 0 4 Pi n#31 R4 9 3 R4 9 4 C7 1 2 1 0 K _ 04 * 4. 7K _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04

(> 20 mil )
C 7 36 1 0 u _1 0 V _ Y 5 V _ 08 Pi n#32 C 72 6 0 . 1 u_ 1 6 V _Y 5 V _0 4 Pin #32

(> 20m il )
C 72 5 1 0 u_ 1 0 V _Y 5 V _0 8 P in#3 1

3. 3 V _ L A N R 4 77 B U F _P LT _ R S T # 1 6, 2 3 , 2 8, 2 9 , 3 4, 3 7 *0 _ 04

3 .3 V

B.Schematic Diagrams

D02
R6 3 6 0 _0 6

V DD3 3 .3 V

R 63 5 * 0_ 0 6

1A

Sheet 36 of 57 Card Reader (JMC 251C)

AX6610

C 77 8

1 0 u _6 . 3 V _ X5 R _0 6

R4 8 2 D 20 P C IE _ W A K E # A C C D B U 0 03 4 0

1 0K _1 % _ 04

3. 3V _ L A N

L A N _P C I E _ W A K E #

L A N _P C I E _ W A K E # 3 4

4 IN 1 SOCKET SD/MMC/MS/MS Pro


J_ C A R D _ N OR 1 S D_ CD # S D_ W P S D_ D1 S D_ D0 P 1 P 2 P 3 P 4 P 5 P 6 P 7 P 8 P 9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 P1 6 P1 7 P1 8 P1 9 P2 0 P2 1 P2 2 C D_ S D W P _S D D A T 1_ S D D A T 0_ S D W P GN D _ S D V S S _S D V S S _M S B S _M S C L K _S D D A T 1_ M S S D I O/ D A T 0_ M S V D D_ S D D A T 2_ M S V S S _S D I N S _ MS D A T 3_ M S C MD _S D S C L K _M S V C C _ MS C D / D A T 3_ S D V S S _M S D A T 2_ S D 1-0 8 1 -40 0 3 95 -0 0 1

Card Reader Power


V C C_ C A RD

S D_ B S S D_ CL K S D_ D1 S D_ D0 V C C _C A R D C4 0 2 0 . 1u _ 16 V _ Y 5 V _ 0 4 MS _ I N S # S D_ D3 S D_ B S S D_ CL K S D_ D3 C4 0 5 S D_ D2 0 . 1u _ 16 V _ Y 5 V _ 0 4 S D_ D2

R2 7 2 7 5_ 1 % _0 4

V C C _C A R D

GN GN GN GN

D D D D

P2 3 P2 4 P2 5 P2 6

PN 6- 20-G4000- 026 : 1- 081-4003 95-001 PN 6- 21-G4000- 126 : M SD 19-C0-10A3 0

Card Reader (JMC 251C) B - 37

Schematic Diagrams

USB 3.0
3 . 3V L36 3 . 3V A 1 . 05 V f or X7 2 C99 0323 3 . 3V A

C 2 49 0 . 1u _1 0V _ X5 R _ 04

H C B 16 08 K F -12 1T 25

C 25 5

C 53 7 C 25 3 0. 1 u_ 10 V _X 5R _0 4 0. 1 u_ 10 V _X 5R _0 4 0. 1 u_ 10 V _X 5 R _0 4

U S B 30 V C C C 2 80 0. 1 u_ 1 0V _ X5 R _ 04 3. 3 V A

L 27

4 MIL 0

C 2 01

1 0 u_ 10 V _Y 5V _ 08

H C B1 6 08 K F-1 2 1T 25

Port 2
J_ U S B 2 S S TX + S H I E L D V B US S S TX DGN D D+ S S R X+ GN D _ D S S R X- S H I E L D

0 . 01 u _1 6V _ X7 R _ 04 C5 5 2 5 p_ 5 0V _ 04 0 . 01 u _1 6V _ X7 R _ 04 0. 1 u_ 10 V _X 5 R _0 4 C 27 9

Standar d-A

C 56 1 C 5 49 0. 0 1u _1 6 V_ X 7R _ 04 0 . 01 u_ 16 V _X 7 R _0 4 C 55 4 C 26 6 C2 5 2 0. 0 1u _1 6 V_ X 7R _ 04 0. 0 1u _ 16 V _X 7R _ 0 4 0 . 01 u_ 1 6V _ X7 R _ 04 C 5 51 C2 6 8 C 56 0 C 5 53 0 . 01 u_ 1 6V _ X7 R _0 4 0. 0 1u _1 6 V_ X 7R _ 0 4 C 5 38 C 2 84 C 25 4 C 28 5 0 . 01 u_ 16 V _X 7 R _0 4 0 . 01 u_ 16 V _X 7 R _0 4 0. 0 1u _1 6V _ X 7R _ 04 0. 0 1u _1 6 V_ X 7R _ 0 4 D1 0 F13 F14 H1 1 K 11 K 12 L8 L9 L10 L1 3 L1 4 N4 N5 N 6 P 3 C4 C5 C6 C7 D 5 E 11 E 12 H3 H 4 L5 P 13 F3 G3 G4 E3 E4 C8 C9 D8 D9 D7

9 1 8 2 4 3 6 7 5

G ND1

G ND2

U 21

C -3 17 A H 0 9F Z T S4 9 4C B U2A V DD3 3 C LOSE B6 A6 N8 P8 B8 A8 S S T X2 S S T X2 # U 2D M 2 U 2D P 2 S S RX 2 S S R X 2# TO CO NNECT OR

V DD3 3 V DD 33 V D D33

V DD 10 V D D10 V D10 D V DD1 0 V DD1 0

V DD1 0 V DD 10 V D D10 V D10 D

V DD 10 V D D10

V DD3 3 V DD3 3 V DD3 3

V DD3 3 V DD3 3

V DD3 3 V DD 33

V DD33 V DD3 3 V DD3 3 V DD3 3

V DD1 0 V DD1 0

V DD1 0 V DD1 0 V DD1 0

V DD 10 V DD 10 V D10 D V DD1 0

20 C L K_ P C I E _ U S B3 0 20 C L K _P C I E _ U S B 30 # 20 PC I E_ R X P 1_ U S B 30 20 PC I E_ R X N 1 _U S B 3 0 20 P C I E _T X P1 _ U S B 30 20 P C I E _T X N 1_ U S B 30 C 25 0 C 25 1

B2 B1 0 . 1u _1 0V _ X5 R _ 04 D 2 0 . 1u _1 0V _ X5 R _ 04 D 1 F2 F1

P E C L KP P E C L KN P E TX P P E TX N P E RX P P E RX N

U3 A V DD3 3

U 3 TX D P 2 U 3T X D N 2 U 2 D M2 U2 DP 2 U3 RX DP 2 U3 RX DN2

C 21 5

0 . 1u _1 0V _ X5 R _ 04 2 3 2 3

B.Schematic Diagrams

C 21 4 0 . 1u _1 0V _ X5 R _ 04 1 L58 4 *W C M2 0 12 F 2S -1 61 T0 3-s h ort 1 L5 9 4 * WC M20 12 F 2S -1 61 T 03 -sh ort

3 .3 V 16 , 23 , 2 8, 2 9, 3 4, 3 6 B U F _ P LT _R ST # R 17 0 2 1, 2 8, 2 9, 3 6 P C I E _ W AK E # 2 0 U SB 3 0 _C L K R E Q# A U XD E T R 17 1 D9 R 18 8 R 18 3 3 . 3V C S C S 75 1V -4 0 10 K _0 4

0 _0 4 R 1 81

P E W A KE 0_ 04

H2 K1 K2

P E R S TB P E W A KE B P E C R E QB A UX DE T PSEL S MI B P ON R ST B

0 _0 4 A U X D E T_ R J 2 J1 1 0K _ 04 H1 P5

OC I 2 B OC I 1 B P P ON 2 P P ON 1

G1 4 H1 3 H1 4 J 14

U SB 3 0_ OC U S B 30 V C C P P ON CLOS E TO L3 3

. H C B 16 08 K F -12 1T 25
4 MI 0 L

C 2 62

1 0 u_ 10 V _Y 5 V _0 8

CONNEC TOR 9 1 8 2 4 3 6 7 5

J_ U S B 3

C 62 7 1u _6 . 3 V_ X 5R _ 04

D02
A U X D E T_ R R 1 82 N EC? *0 _0 4 ?

U S B _S P I _ S C LK U S B _S P I _ C E # U S B _S P I _ S I U S B _S P I _ S O

M2 N2 N1 M1

S P IS CK S P ICS B S P IS I S P IS O

U 3T X D N 1 U 2 D M1 U2 DP 1 U3 RX DP 1 U3 RX DN1

A1 0 N1 0 P1 0 B1 2 A1 2

S S T X1 # U 2D M 1 U 2D P 1 S S RX 1 S S R X 1#

C 99032 9

K1 3 K1 4 J1 3 P4

u PD720200
GN D GN D GN D GN D

0. 1 u_ 10 V _ X5 R _0 4 1 L6 3 *W C M 20 12 F 2S -1 61 T0 3 -sh ort 4 1 L6 4 *W C M 20 12 F 2S -1 61 T0 3 -sh ort 4

C 2 74

2 3 2 3

Standard -A

Sheet 37 of 57 USB 3.0

U 3 TX D P 1

B1 0

S S T X1

C 2 69

0. 1 u_ 10 V _ X5 R _0 4

S ST X + S H I E LD V BU S S ST X DGN D D+ S SR X+ GN D _ D S SR X- S H I E LD

G ND1

Port 1
FP- >UEA11 1RC-C ABUF- 7H C99 0401

G ND2

C -3 17 A H 0 9F Z TS 4 9 4C B R REF U2 A VS S P 1 2 R 19 5 N1 2 N1 1 1 . 6K _ 1% _0 4 3 . 3V

C1 4 GN D N1 4 M1 4 P6 R 20 2 1 0 0_ 04 X6 2 X5 2 3 C 28 2 20 p_ 5 0V _ N P O_0 4 24 MH z 1 *24 MH z 1 4 C 28 3 2 0 p_ 50 V _N P O _0 4 A1 A2 A3 A4 A5 A7 A9 A1 1 A1 3 A1 4 B3 B4 B5 B7 B9 B1 1 B1 3 B1 4 C1 C2 C3 C1 0 C1 1 GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D CS E L GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GN D GND GND GND GND GN D G ND G ND GND GND GND GND GN D G ND G ND GND GND GND GND GN D G ND G ND GND GND GND GND GN D GN D G ND GND GND GND GND GN D GN D G ND GND GND GND GND GN D GN D G ND GND GND GND GND GND X T1 X T2 U2 P VS S U3 A VS S

D6 R 10 0 P1 4 P1 1 P9 P7 P2 P1 N1 3 N9 N7 N3 M1 3 M1 2 M1 1 M1 0 M9 M8 M7 M6 M5 M4 M3 L 12 L 11 L7 L6 U GN D 3 . 3V 5V 5 R 1 01 C 2 04 *1 0 K_ 0 4 D Q7 R 1 02 S *2 N 7 00 2W 0_ 0 4 1 0u _1 0 V_ Y 5 V _0 8 4 2 V I N 1 V O U T2 3 V I N 2 V O U T3 E N# G ND 1 8 U 12 F L G# V O U T1 6 7 1 0 K_ 0 4 U S B 3 0_ OC U S B 30 V C C

D02

5 MI 0 L
C 21 1 C 20 7 + 0 . 1 u_ 16 V _Y 5 V _ 04 * 0. 1 u_ 16 V _ Y 5V _ 04

C 23 2 2 20 u _6 .3V _ 6. 3 *4 .5

R T9 71 5 BG S

P PO N G

3 . 3V NC 1 * N C _ 04 C 23 7 0 . 1u _1 6V _ Y 5 V _0 4 U1 6 U S B _ SP I _ V D D _ 1 8 V DD R1 6 4 1 K _0 4 U S B_ F LA S H 3 SI 2 SO W P# CE # S CK R1 5 8 4 . 7K _ 04 U S B_ H OL D # 7 H OLD # VS S A T2 5F 5 12 A N 1 6 4 U S B _S P I _ SO _R U S B _S P I _ C E #_ R 5 U S B _S P I _ SI _ R R 15 1 R 16 6 R 16 5 4 7_ 04 U S B_ S P I _S I 1 5_ 1% _ 04 U S B_ S P I _S O 1 5_ 1% _ 04 U S B_ S P I _C E# 4 7_ 04 U S B_ S P I _S C L K

3 . 3V

C1 2 C1 3 D 3 D4 D11 D1 2 D1 3 D1 4 E1 E2 E 3 1 E 14 F4 F6 F7 F8 F9 F1 1 F 12 G1 G2 G6 G7 G8 G9 G11 G1 2 G1 3 H6 H7 H 8 H 9 H12 J3 J4 J6 J7 J8 J9 J1 1 J1 2 K3 K4 L1 L2 L3 L4

512Kb it

KB SP *_ = 0. ~0 " C_ I_ R 1" .5

R1 6 7 4 7K _ 04

U S B _S P I _ SC LK _ R R 15 4

3 . 3V 5V 5V R 17 2 10 K _0 4 R 13 0 AU XD E T 10 K _0 4 5 9 7 8 EN Q16 21 , 33 , 34 , 39 S U S B # G S *MT N 70 0 2Z H S 3 0. 1 u _1 6V _ Y 5V _ 0 4 C 2 27 C 22 6 1 0u _1 0 V_ Y 5 V _0 8 0 . 1 u_ 16 V _Y 5V _ 04 2. 4 K _1 %_ 0 4 R 1 29 NEC? ? C9903 29 C 2 48 1u _6 . 3V _ Y 5 V _0 4 A 610AE X6 SA C 2 20 0. 0 15 u_ 1 0V _ X7 R _0 4 C 21 6 1 G ND V FB 2 R 1 36 75 0_ 1 %_ 04 C 2 30 *1 0 U _1 0V _ 08 C2 2 9 1 0u _ 10 V _Y 5 V _0 8 0. 1 u_ 16 V _Y 5V _ 04 4 , 9, 1 0, 1 1, 1 2 , 3 , 26 , 30 , 39 , 41 1. 5 V 1 2 , 3, 4 , 9, 1 4 , 15 , 19 , 20 , 21 , 23 , 24 , 2 5, 2 6, 2 8, 2 9, 3 0, 3 5 , 6 , 39 , 40 , 41 , 42 3. 3 V 3 2 6, 2 8, 3 2, 3 5 , 9 , 40 , 41 , 42 , 46 5V 3 1 .5 V

2A
U1 4 VIN VIN P OK V CNT L V O UT V O UT 6 4 3

C 22 3 1 u_ 1 0V _ 06 1. 0 5V

3A
C 22 5

P R 93

*1 5 mi _ sh o rt l

U GN D

(15nF ~48nF)

B - 38 USB 3.0

Schematic Diagrams

VDD3, VDD5
VR EF P R 11 6 * 0_ 0 4 P R1 1 5 0_ 0 4 PC 9 8

1u _ 1 0V _0 6 P R1 1 8 E N _ 3V P C9 3 10 0 K _ 04 10 0 0 p_ 5 0 V _ X7 R _0 4 5 4 6 3 2 1 P U7 V IN 24 VO 1 P R 1 05 8 1u _ 6 .3 V _X 5 R _ 0 6 P Q 59 P 1 2 03 B V 8 7 6 5 PC 8 5 0 . 1u _ 5 0V _Y 5 V _0 6 4 PL 1 0 4.7 U H _ 6 . 8* 7 .3* 3 .5 2 1 3 2 1 10 UG A T E 2 11 P HA S E 2 8 7 6 5 *5 m m P C9 4 P C1 7 7 P R 12 3 + 22 0 u _6 . 3 V _ 6 . 3* 4 . 5 1 3 K _1 % _ 0 6 PC 9 7 1 0 0p _ 5 0 V _N P O _ 0 4 C 0 . 1 u _ 16 V _ Y 5 V _ 04 L GA T E 2 EN0 G ND PAD GN D P Q 56 P 1 2 03 B V 4 3 2 1 PD 9 13 25 15 16 17 V R E G5 A C P R 91 E N_ A L L R B 0 54 0 S 2 *6 8 0 K _ 1% _ 0 4 P R8 9 P R9 6 R B 0 5 40 S 2 18 C 14 12 S K IP S E L P HA S E 1 19 L G ATE1 L DO 5 VCL K 4 1 2 3 P1 2 0 3 BV F M S 30 0 4 - A S - H A 10 0 0 p_ 5 0 V _ X7 R _0 4 P D6 A V R E G5 V IN C 5 6 7 8 P D1 7 PC 9 6 3 0 K _ 1 %_ 0 6 9 L DO 3 B OO T 2 P OK P C8 8 B OO T 1 22 1 u_ 2 5 V _ 08 21 UG A T E 1 1 2 3 20 4 5 6 7 8 P Q 55 P 1 2 03 B V SY S5 V P L8 4 .7 U H _6 .8 *7 . 3 *3 .5 1 2 V DD 5 PJ 1 9 1 2 *5 m m 23 * 1 0K _0 4 SYS5 V P C 99 0 .1 u _ 50 V _ Y 5 V _ 0 6 P C 1 67 4 . 7 u _2 5 V _ X 5R _ 08 P C 16 6 4 . 7 u_ 2 5 V _ X5 R _0 8 V FB2 T O NSEL VFB1 V R E G3 EN2 V IN 7 P C 17 6 P C1 7 5 P C9 0 4 .7u _ 2 5V _X 5 R _ 0 8 V O2 1 0 0 K _0 4 P C9 5 10 0 0 p_ 5 0 V _ X7 R _0 4 E N_ 5 V P R 1 14

VREF

VDD3
5A
V DD 3 P J 20 2 1 SY S3 V

4 .7 u_ 2 5 V _ X5 R _0 8

EN1

5A

VDD5
Sheet 38 of 57 VDD3, VDD5

B.Schematic Diagrams

uP6182

Ra
P R1 2 1

P Q5 7

PD 1 6

F M S 3 0 04 -A S -H

Rb
P R1 2 2 1 9 . 1 K _ 1% _ 0 6

P C 1 72 + 2 2 0 u_ 6 .3 V _6 . 3 *4 .5

P C 92 0 .1 u_ 1 6 V _Y 5 V _ 04

P R 11 7 2 0 K _ 1% _ 0 4

M990125
VRE F V RE G 5 V IN 1 PR8 8 P R8 2 P R8 3 * 0_ 0 4 0 _ 04 PR 9 0 * 0 _0 4 *0 _0 4 0_ 0 4 P C 79 0 . 0 1 u _1 6 V _ X7 R _0 4 V R E G5 P C 78 1 u _6 .3 V _ X 5R _ 06 P C 80 0 .01 u _ 1 6V _ X 7 R _ 0 4 P D3 A R B 0 54 0 S 2 C SY S1 5 V P C 73 2 2 00 p _ 50 V _ X 7 R _ 0 4 P D4 C R B 0 54 0 S 2 2 2 00 p _ 50 V _ X 7 R _ 0 4 4 . 7 u _2 5 V _ X 5R _ 08 R B 0 54 0 S 2 A P D5 A R B 0 54 0 S 2 C P D8 C R B 0 54 0 S 2 A SY S5 V

2. 2_ 0 6

SY S1 0 V P C 74

V RE G 5 P R 1 19 P R 98 P R 1 13 1 0 K _0 4 D 0 _0 4 E N _ 5V *0 _ 0 4 E N _ 3V V IN C

P D7 A

P C7 6

C OP Y C4 8 C 98 09 17
P Q2 1 D G 3 4 ,3 5, 3 9 D D _ ON S M T N 7 00 2 Z H S 3 1 P C 8 9 0 . 1 u _1 0 V _ X 5 R _ 0 4

P Q 25 G M TN 7 00 2 Z H S 3 S P R 1 09

PJ 6 * 4 0m i l 2

1 0 0 K _ 04

PQ 3 1 G 45 A C _ IN S M T N 70 0 2 Z H S 3 D

D02
39 S YS5 V 3 5 ,3 9 V D D5 39 VIN1 3 9 ,4 0 S Y S 1 5 V 1 9 ,29 ,3 4 ,3 5,3 6 ,3 9 ,45 V D D 3 1 4 , 15 ,3 9 , 4 0,4 1 , 4 3 , 44 , 4 5 , 4 6 V I N

VDD3, VDD5 B - 39

Schematic Diagrams

5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1


V DD 3 3 .3 VS

POWER BUTTON
SW 1 4 3 H C H _S T S -0 2 L76 C 3 39 1 2

20 mil R7 5

POWER SWITCH LED


1 00 _ 0 43 5 M _B T N # 20mi l M _B TN # R 5 0 3

U3 4 VA VIN 1K _ 0 4 3 M _ B T N# 4 I N S T A N T -O N P 2 80 8 A 1 C1 2 7 *0 . 1 u _1 6 V _ 0 4 P W R_ S W # 5 GN D 1 V A 2 V IN D D _ ON _ LA T C H 6 V IN1 7 R4 5 8 P W R _S W # 8 V IN1 2 2 _ 04 D D _O N

R4 6 1 1 0K _0 4

P W R _ S W # 34

M_ B T N M_ B T N # # 20 mil

A V L C 15 S 0 2 0 36 _ 0 4

D02
VI N VIN VA VA VA

SY S5 V SY S5 V P R1 9 4

0 . 1 u _1 6 V _ Y 5 V _ 0 4

10 K _ 0 4 D D _ ON # D D D _ ON # 3 5 , 41 P R 1 93 1 0 K _ 04 P C1 7 9 SUS B S *0 . 1 u_ 1 6 V _Y 5 V _0 4 D P C1 6 4 P Q 54 1 0 0 K _ 04 G 2 1, 3 3 , 3 4, 3 7 S U S B # 1. 5 V 1. 5 V S _ C P U S MT N 7 0 0 2Z H S 3 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 P R1 9 5 SU SB 4 , 2 5, 4 0 , 4 1, 4 2

D02
C

D 4 K P -20 1 2 S GC C4 2 8 C 42 7 C 57 0 0. 1 u _ 50 V _ Y 5 V _ 0 6 0 . 1 u _5 0 V _ Y 5V _0 6 0 . 1 u _5 0 V _ Y 5 V _0 6 0. 1u _ 5 0V _ Y 5 V _ 0 6 0 . 1u _ 5 0V _ Y 5 V _ 0 6 G 3 4 , 3 5, 3 8 D D _O N C 6 1 9 C 72 1 P Q6 1 MT N 7 0 02 Z H S 3

B.Schematic Diagrams

Sheet 39 of 57 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1

EMI
C5 0 6 0. 1 u _ 1 6V _ Y 5V _ 0 4

5V
S Y S 1 5 V V D D5

5VS
3A
P Q 7 1A M TN N 2 0 N 0 3 Q8 8 2 7 1

1.5VS
P Q2 8 A M T N N 20 N 03 Q 8 8 2 7 1

1.5VS_CPU
NM OS
1 .5 V S 7 P S _ S 3 C N TR L_ 1 . 5 S

C5 0 7 C2 4 6

0. 1 u _ 1 6V _ Y 5V _ 0 4 0. 1 u _ 1 6V _ Y 5V _ 0 4

NM OS

5V

N MOS

C2 4 7

0. 1 u _ 1 6V _ Y 5V _ 0 4

3A

S Y S 1 5V

V DD 5

5 VS

S Y S 15 V

1 .5 V

P R 2 17 1 M_ 0 4 3

Power Plane
R2 2 4 1 M_ 0 4 4 P Q 71 B M TN N 2 0 N 0 3 Q8 C3 1 6 5 6 DD_ O N#

R1 5 2 1M _ 04

P Q 1 6A M TN N 2 0 N 0 3 Q8 8 2 7 1

PJ3 MUST SHORT


SY S1 5 V 2 P J 17 OP E N _ 2A 1 P Q 53 A * MT N N 20 N 03 Q 8 2 1

NM OS

P R 1 92 * 2 20 _ 0 4

C 31 7 0 . 1 u_ 1 6 V _ Y 5 V _ 04 1 .5 VS_ EN C2 3 1 S US B 1 PJ 9 2 *4 0m i l 4 , 2 5, 40 , 4 1 , 42 22 0 0 p _5 0 V _ X7 R _0 4

C2 3 3

C 2 38 P R 19 1 1 M_ 0 4 8 7

R1 7 9 1 0 0_ 0 4 0 . 1u _ 1 6V _Y 5 V _0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 P Q 16 B M TN N 2 0 N 0 3 Q8 5 S US B G S D

P C 1 93 4 7 0p _ 5 0V _X 7 R _ 0 4

P Q 2 8B M TN N 2 0 N 0 3 Q8 5

P C 1 60 3 Q1 4 MT N 70 0 2 Z H S 3 * 0. 1 u _ 16 V _ Y 5V _ 0 4 P Q 53 B *M T N N 2 0 N 0 3 Q8 5 2 2 00 p _ 50 V _ X 7 R _ 04 6 S USB

P C 1 61 * 1 0u _ 6 . 3V _ X 5 R _ 0 6 D G S

4 70 p _ 50 V _ X 7 R _ 0 4 1 6

*4 0 m li

P J2 3

P C 15 9

P Q5 2 * MT N 7 0 0 2 Z H S 3

ON

ON ON
3 .3 V 3 .3 V R1 1 1 *1 0 K _0 4 R1 0 8

3.3V
NM OS
S Y S 1 5 V V D D3

3.3VS MOS N
3 . 3V S Y S 1 5V VD D3

3A
P R 1 96 1 M_ 0 4

P Q 6 4A M TN N 2 0 N 0 3 Q8 8 2 7 1

3A
R4 4 5 1 M_ 0 4

P Q6 0 A M T N N 20 N 03 Q 8 8 2 7 1

3 .3 VS 1 .5 V S _ CP U

*1 0 K _ 0 4 D G C R 11 6B E

+ 1 . 5 S _C P U _P W R GD Q1 2

4 ,4 1

Power Plane
3

C 61 3

C6 1 4 R 44 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 * 10 0 _ 04 10 u _ 10 V _ Y 5 V _ 0 8 P Q 6 0B M TN N 2 0 N 0 3 Q8 5 SUSB G S D Q 27 * MT N 7 0 0 2Z H S 3

*1 K _ 04

Q9 *2 N 39 0 4

P C 1 80 2 2 00 p _ 50 V _ X 7 R _ 0 4 6

P Q 64 B M TN N 2 0 N 0 3 Q8 5 1 DD_ O N#

C6 0 2 2 20 0 p _5 0 V _ X 7R _ 04

38 V IN1 45 VA 38 SYS5 V 3 5 ,3 8 V DD5 4 , 25 , 4 0 , 41 , 4 2 S U S B * MT N 7 0 02 Z H S 3 4 ,7 1 . 5V S _C P U 3 8 , 4 0 S Y S 15 V 7 , 16 , 2 5 , 4 2 1 . 8 V S 25 1 .5 VS 4 , 9 , 1 0 , 11 , 1 2 , 13 , 2 6 , 3 0, 3 7 , 4 1 1. 5 V 1 9 , 2 9 , 34 , 3 5 , 36 , 3 8 , 4 5 V D D 3 2 6 , 2 8, 3 2 , 3 5, 37 , 4 0 , 41 , 4 2 , 4 6 5 V 1 4 , 15 , 3 8 , 40 , 4 1 , 4 3, 4 4 , 4 5, 46 V I N 2 , 1 4, 1 5 , 1 7 , 18 , 1 9 , 25 , 2 6 , 3 0, 3 2 , 3 3, 35 , 4 3 , 44 5 V S 2 , 4, 1 0 , 1 1, 12 , 1 3 , 14 , 1 5 , 1 6, 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 3 , 24 , 2 5 , 2 6, 2 9 , 3 0, 3 2 , 3 3 , 34 , 3 5 , 36 , 4 0 , 4 3 3 . 3 V S 2 , 3 , 4 , 9, 1 4 , 1 5, 19 , 2 0 , 21 , 2 3 , 2 4, 2 5 , 2 6, 2 8 , 2 9 , 30 , 3 5 , 36 , 3 7 , 4 0, 4 1 , 4 2 3. 3 V

P J2 1 2 *4 0 m li

ON

B - 40 5V, 3.3V, 5VS, 3VS, 1.5VS, VIN1

Schematic Diagrams

Power 1.05VS, 1.05VS_VTT


5V VIN 5V PR129 3 100K_1% 04 _ 4,25, 39,41, 42 SUS B SUS B P Q32 B G 4 S PC106 *0.1u_1 6V _Y5V_04 PC111 1 3 1 4 1 5 1 6 0.1 u_50V_Y5V 6 _0 1 2 C 5 6 7 8 5 6 7 8 P GD 10 9 RTN G ND N.C N.C F B DL 17 ? ? ? ? PIN3? P 12 C1 1u_10V_Y5V_06 P J11 1 PR135 2 0K _1%_04 5V PR137 90.9K_04 PC107 0 .01u_16 V 7R_ 04 _X P C10 8 20p_50V_NPO_04 P R133 100K 1% _ _04 RT N P R134 40.2K_1% 04 _ PC109 4 7p_50V_NP O_04 * 40mil PR131 0_04 2 PA D V OUT BS T V CC 3 4 * 0 _ .5 6 36 56 u 2 V_ . * 5 0 _ .5 _ .3 6 u 2 V 6 *6 0 u 6 _ V_ 4 .1 _1 V Y5 0 P Q62 M DU2 654 4 P Q33 *M DU2654 4
+

A PD12 1.0 5V _ON C D 5 P R136 10 K _1%_04 P U9 SC412A / uP 612 7 RB0540S2 P Q63 M DU2 657 4 2 3 1 PC110 01_0 Y _6 . u 5 V_ 5V 0 PC116 4 7 _ 5 X R_0 . u 2 V_ 5 8 PC119 4 _ 5 X R_ .7u 2 V_ 5 08 PC113 0 _ 0 Y V_ 6 .1u 5 V_ 5 0
+

P 78 C1 *1 u 2 V_ .3 . 4 C 5 _ 5 6 *4 _

5 6 7 8

M DN7002 Z T HS6R

1.05VS
20 A PJ22
1 2 *OP EN-12mm 1. 05V S

N.C

5V 21 1.05 V S_P WRGD

12 11

E N

IL IM

DH

PR132 1.05VS P _ WRGD

10K_04

N. C

LX

PL11 1UH _ 10* 0* 5 1 4. 1 2

V .05 1

P C182

P C183

P C18 7

B.Schematic Diagrams

PD18 2 3 1 FM 3004 -A S S-H A

RT N

2 3 1

Sheet 40 of 57 Power 1.05VS, 1.05VS_VTT


V CCIO_ S ENS 6 E V I O_S SS ENS 6 E

6/22 Modify

PR130 0_04 P J16 1 * 40mil 3.3VS 3.3 V S 2

1.05VS_VTT
N MOS
SYS 5V 1 .05VS 1 8 7 R480 3 1M _04 P Q66A M NN20N03Q8 T 2 1

P R128 10K 1% _ _04

PR127 10K_04 1.05VS_V T P T _ WRGD 46

9A
1. 05V S_VT T PR220 2, 3,4,6, 24,25, 26,43 1.05 V S_V T T C679 01_6 Y _4 . u 1 V_ 5V 0 C661 1 u 10 _ V 8 0 _ V Y5 _0 R49 2 *100_0 4 1K_04 B E C G Q39 2N3 904

6 D 2 S 1 M DN7002ZHS6R T P Q51A PC105 *0.1u_ 16V _Y5V_04

C700 4 *2200p_50 V 7R_ 04 _X PQ66B M NN20N03Q8 T 5 6 3.3 V

D G S

1.05 V S_V T_E T N#

Q31 *M N7002 Z T HS3

R506 10K_04

ON
D 21 1.05VS V T _ T _EN G S Q32 M N7002ZHS T 3

2,4, 10,11, 12,13, 14,15, 16,17, 18,19, 20,21, 23,24, 25,26, 29,30, 32,33, 34,35, 36,39, 43 3 .3VS 19,2 0,21,2 5,26,3 0 1. 05V S 38,3 9 S YS15V 26,2 8,32,3 5,37,3 9,41,4 2,46 5V 14,1 5,38,3 9,41,4 3,44,4 5,46 V N I 2,3 ,4,6, 24,25, 26,43 1.05VS_V T T 2,3, 4,9,1 4,15,1 9,20,2 1,23,2 4,25,2 6,28,2 9,30,3 5,36,3 7,39,4 1,42 3.3V

Power 1.05VS, 1.05VS_VTT B - 41

Schematic Diagrams

Power 1.5V/VTT_MEM
P D 10 PU 8 V D DQ u P 6 1 63 A 5V RB 05 4 0 S 2 C P Q5 8 M DU 2 65 7 4 2 3 1 P C1 6 9 5 6 7 8 0. 1u _ 5 0V _ Y 5 V _ 0 6 P C1 7 1 4 . 7u _ 2 5V _ X 5 R _0 8 P C1 6 8 4 . 7u _ 2 5V _X 5 R _0 8 P C1 7 0 0 . 1u _ 5 0 V _Y 5 V _ 0 6 *1 5 u _2 5 V _ 6 . 3* 4 . 4_ C V IN

VTT_MEM
PJ 8 V T T _M E M 2 1 * OP E N _2 A P C 10 3 1 0 u _1 0 V _ Y 5 V _ 0 8 P C 10 4

P C 10 1 1 0 u_ 1 0 V _Y 5 V _ 08 P C 1 00 23 V L DO IN 24 VTT 1 P C 1 02 P R 11 1 0 _ 06 1 0 u _1 0 V _ Y 5 V _ 0 8 *1 0u _ 1 0V _Y 5 V _0 8 3 V DD Q 5V P R1 0 4 P R1 0 1 P R1 0 3 0 _0 6 *0 _ 0 4 *0 _ 0 4 P C 86 0 .1 u_ 1 0 V _ X5 R _0 4 5 V T T RE F 5V P R 10 0 0 _ 06 6 C OMP 8 V D DQ S NS 9 *1 0 _ 04 VD DQ SET V D DQ S E T GND N C NC S5 S3 10 P GO OD 11 4 M ODE CS P V C C5 V C C5 15 14 13 2 V T T S NS G ND DR V L 0_ 0 6 P G ND C S _G ND 18 17 16 P R1 1 2 P R 10 8 0 _ 06 4 V T T GN D LL D RV H 0_06 20 P R 12 5 VBST 21 P R 1 26 22 0 .1u _ 1 0V _ X 5 R_ 0 4

0730 modify
V D DQ

1.5V
23A
1 0. 1 u _ 16 V _ Y 5 V _ 0 4 PJ 1 8 2 1 .5 V *O P E N _8 A 0. 1 u _ 1 6V _ Y 5 V _ 0 4

PL 9 1 . 0 U_ 1 0* 10 * 5 1 2 * 33 0 u _2 . 5 V _ V _ A 5 60 u _ 2. 5 V _ 6 . 3 *6

19

P C 17 3

P Q 29 MD U2 6 5 4

P Q3 0 *M DU2 6 5 4 4

+ C P D1 1

5 6 7 8

2 3 1

2 3 1

6.1 9 K _ 1 %_ 0 6 P R 1 20 2 . 2_ 0 4

5V F M S 3 0 04 -A S -H A

5 6 7 8

B.Schematic Diagrams

P C1 6 5 P C 1 74

PC1 6 2

P C 16 3

P C9 1 1 u_ 1 0 V _ 06

P C8 7 3 .3 V 1 u _1 0 V _ 06 P R8 7 P R9 9 1 0 0 K _ 04 DD R1 . 5 V _ P W RG D DD R1 .5 V _ P W R G D 2 1 0_ 0 6

PR9 7

Sheet 41 of 57 Power 1.5V/ VTT_MEM

V T T _ ME M

P R 12 4

*2 2 _0 4 D

PC 84 *1 0 00 p _ X 5 R _ 0 4

P Q2 6 4 , 2 5, 39 , 4 0 , 42 S U S B S US B G S *M TN 7 00 2 Z H S 3

12

P R 94 5V * 1 0K _1 % _ 04 5V 4 , 3 9 +1 .5 S _ C P U _ P W RG D P R1 1 0 P R1 0 7 1 0 0 K _0 4 * 10 0 K _ 0 4 D VTTEN P R9 2

25

P R 1 06 P C8 3 P Q2 2 SU SB G MT N 70 0 2 Z HS 3 S 0 . 1 u _ 16 V _ Y 5 V _ 0 4 2 1 ,34 S US C # G

1 00 K _ 0 4 D 1

G S

P Q2 4 MT N7 0 0 2Z H S 3 G

P Q2 7 S 2 MT N 70 0 2 Z HS 3

PJ 7 *4 0m i l 3 5 ,39 D D_ ON #

V DDQ S E T

3 .3V

P R8 6 7 5K _ 1 % _ 04

P R8 1 15 0 K _ 1% _ 0 4

3 .3 V

P R8 5 3 .3 V 10 0 K _ 04 P R 79 1 0 0K _ 0 4 G P Q1 7 MT N7 0 0 2Z H S 3 D S D P Q1 8 MT N 70 0 2 Z HS 3 P R8 0 D 1 0 0 K _ 04 G D S MT N7 0 0 2Z H S 3

PJ 2 8 1 2 ,2 4 ICC _E N # * 40 m i l 3 .3 V 2

G S

P C7 7 1 u_ 6 . 3 V _X 5 R_ 0 4

PQ 2 0

1. 5V_ CTRL1 1 1 0 0

1. 5_ CTRL0 1 0 1 0

Volta ge 1.5 5V 1.6 0V 1.6 5V 1.7 0V

D03
P R 84 1 0 0K _ 0 4 G P Q1 9 9 /17' 09 S

P C 75 1 u_ 6 . 3 V _ X5 R _0 4

PC8 1

10 K _ 1 % _0 6

* 1 00 0 p _X 5 R _0 4

5V

P R 1 02

4 7 K _ 04 P C8 2 P Q2 3 *M TN 7 00 2 Z H S 3

P R9 5

10 K _ 1 % _0 6

0 . 1 u _ 16 V _ Y 5 V _ 0 4

PJ 2 9 1 2 0 I CH _ GP IO 46 * 40 m i l 2

MT N 70 0 2 Z HS 3

2 6 ,28 ,3 2 ,3 5,3 7 , 3 9, 40 , 4 2 , 46 5 V 1 4 ,15 ,3 8 ,3 9,4 0 , 4 3, 44 , 4 5 , 46 V I N 4 , 9 ,10 ,1 1 ,1 2,1 3 , 2 6, 30 , 3 7 , 39 1 . 5 V 2, 3, 4 ,9 ,1 4, 15 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5, 26 ,2 8 ,29 ,3 0 ,3 5,3 6 , 3 7, 39 , 4 0 , 42 3 . 3 V 10 , 1 1 , 1 2, 1 3 V T T _M E M

B - 42 Power 1.5V/VTT_MEM

Schematic Diagrams

Power 1.8VS

1.8VS
? ? ? ? PIN6? 5V 3.3 V PC67 1 V1.8 PJ5 2 *OPEN_2A PU6 5 6 9 VIN VCNTL 7 VIN 4 POK VOUT 3 VOUT 8 EN 1 2 GND VFB AX6610 / GS7113 M990125 PC69 PC72 PR76 1K_1%_04 0.1u_16V_Y5V_04 10u_10V_Y5V_08 C937 901 1u_10V_06
Sheet 42 of 57 Power 1.8VS

1.8VS

B.Schematic Diagrams

2A
3.3V PR78 10K_04 R150 *10mil_short 21 1.8VS_PWRGD PR75 10K_04 5V 1.8VS_PWRGD EN1.8VS D PC64 *1u_6.3V_Y5V_04

2A
PC70 PC71 PC68 PR77 * 10u_10V_Y 5V_08 10u_ 10V_Y5V _08 PC66 82p_50V_NPO_04 0 .1 u _ 1 6 V _ Y 5 V _ 0 4 2,3,4,9,14,15,19,20,21,23,24,25,26,28,29,30,35,36,37,39,40,41 3.3V 7,16,25 1.8VS 26,28,32,35,37,39,40,41,46 5V 1.27K_1%_04

4,25,39,40,41 SUSB

PR74 1M_04 PC65

PQ15 2N7002 S

2200p_50V_X7R_04

Power 1.8VS B - 43

Schematic Diagrams

Power V-Core 1
T R BST

VCORE_1
PR 3 8 13 . 3 K _ 1 % _0 4

I MO N

P R5 0 1 0 _ 0 4

P C 4 7 6 8 0 p_ 5 0 V _ X 7R _ 04 P R 47 1. 21 K _ 0 4

B~ 43 50
R T1 1 2

P C4 4 0 . 1 u_ 1 0 V _ X5 R _0 4

PR 4 9

24 . 9 k _ 1% _ 0 4 A_ GN D P R5 5

P C4 9

5 60 0 p _ 50 V _ X 7 R _ 0 4

0804 modify
PC 4 5 22 p _ 50 V _ N P O_ 0 4 P R3 4 33 0 0 p _5 0 V _ X 7R _ 04 P R 42 P C 43 3 . 01 K _ 1 % _0 4

1 00 K _ N TC _ 06 _ B A _G ND TSENS E A_ GN D D IFFOU T

PR 4 6

1K _ 0 4

FB

PR5 5 ch a ng e to 24 .9 o hm

P C 53 2 4. 9 _ 1 % _0 4

1 0 0 p_ 5 0 V _ N P O _ 04

PUT COL SE TO VCOR E Phase 1 Inducto r


P R3 9 1 6 5K _0 6 P R3 5 P R3 6 P R3 7 1 3 7K _ 1 % _ 06 1 3 7K _ 1 % _ 06 1 3 7K _ 1 % _ 06

0804 modify
C SP1 C SP2 C SP3 44 44 44

7 5 K _ 04

P R1 6 0 6 V C OR E _ V S S _ S E N S E R T2 P R 15 9

*1 0 0 _0 4 P R5 3 0_04 T R BST

P R 43

2 1 K _1 % _ 0 4

P C3 9 P C4 0

15 0 0 p_ 5 0 V _ 0 4 27 0 p _5 0 V _ X 7 R _ 0 4

Qua d 4 5W CP U VID 1= 0. 9V Ic cM a x = 94 A R_LL= 1. 9m oh m OCP ~ 12 0A


CS N2 44

P C 56 0 . 1 u_ 1 0 V _ X 5 R_ 0 4 1

CSSU M P C 30 C OM P CSC OM P P R 22 VR 1 _C SRE F IM ON P R 32 P R 20 PC 3 8 1 0 00 p _ 5 0V _ X 7 R _ 0 4 1 0 _0 4 1 0 _0 4 1 0 _0 4 CSN 1 CSN 2 CSN 3 44 44 44 P C 31 PR 2 1 0 . 0 4 7u _ 1 0v _X 7 R _ 0 4 5. 49 K _ 1 % _0 4 CS P3 C SN1 CS N1 P C 32 0 . 0 4 7u _ 1 0v _X 7 R _ 0 4 44 44 PR 1 9 5 . 4 9 K _ 1% _ 0 4 CS P2 CS N3 44 44 0 . 0 4 7u _ 1 0v _X 7 R _ 0 4

D02
6 V CO RE _ V C C_ S E N S E 6 ,4 4 V CO RE P R1 6 P R5 7 *1 0 0 _0 4 0_04

P C5 5 10 0 0 p _5 0 V _ X 7R _ 04

B~ 3 96 4
1 0 0K _N T C _0 6 _ B 8 . 2 5K _ 0 4 2

B.Schematic Diagrams

P R3 0

*1 5 m il _ s ho rt

3.3VS
A_ ND G A_ GN D PR6 2 10 K _ 0 4 4 H _ P R O C H OT # 1 TSENSE 2 3 4 H_ C PU_ SVID DA T H_ C PU_ SVID CL K 5 H_ C PU_ SVID AL RT# 6 7 VR _R DY 8 9 10 11 PR5 8 1 0 K_ 0 4 12 13 PC5 8 PR 6 6 1 u_ 6 . 3 V _ X5 R _ 04 *1 4 K _ 04 A_ GN D 0 . 0 1 u_ 5 0 V _ X7 R _0 4 53 52 51 50 49 48 47 46 45 44 43 42 41 40 PU 4

5VS

A_ GN D

P R3 3 A_ GN D * 0 _0 4

Sheet 43 of 57 Power V-Core 1

PU COLSE T TO VCORE HO SPOT T

EPAD D IF F O UT VSN T RB S T FB C OM P IL IM DR OO P C S CO M P CS S UM IO UT CS REF N C2 N C1

2 Ph a se : 0 o hm 3 Ph a se : DNP
2 CSN 2 P2 3 P3 1 P1

07 30 modi fy

2 1 D E L A Y _P W R G D V R _ ON

P R 65 6 1 3 1 _V CC PR 7 1 2 . 2 _0 6

0_ 0 4

5VS

V IN

1K _0 4 P C5 7

V S NA VSPA F BA DI F F OU T A T RB ST A C OM P A I LI MA D R O OP A CS C OM P A IO UT A CS S U M A C SPA C S NA

P R 67

A_ G ND

VSP T SEN SE V R HO T # S D IO SC L K AL ER T# V R _ RD Y V R _ RD Y A EN ABL E VC C R OS C V R MP T SEN SEA

N C P 6 1 31 S

CS N2 C SP2 CS N3 C SP3 CS N1 C SP1 D R ON P W M1 / A D D R P W M3 / V B O OT P W M 2 /IS HE D IM AX P W MA / I M A X A V B OO T A

39 38 37 36 35 34 33 32 31 30 29 28 27

C SN2

CSN 2 CSN CSP C SN3 CSN C SPP3 CSP CSN CSP

P R 23 D RO N

5. 49 K _ 1 % _0 4 D R ON 44

CS P1

44

V R 1 _ P W M1 4 4 V R 1 _ P W M 3 44 V R 1_ P W M2 4 4 P R2 4 10 K _ 0 4 P R2 7 75 k _ 1 %_ 0 4 PR 2 6 P R 25 * 0_ 0 4 1 0K _0 4 A_G ND

5VS

14 15 16 17 18 19 20 21 22 23 24 25 26

1.05 V S_VTT

D02
A_ G ND A_ G A_ G NDA_ GN D ND

A_ GN D

A_ GN D

OP TION: DI SALBE V_ GT

A _G ND

A_ G ND P J2 7 * 6 mi l

P R 21 9 1 10 K _ 1 % _ 04

ICC_ M AX_ 21 h =R *1 0uA*2 56 A/2 V

A_ GN D

0804 modify

P R6 0 1 30 _ 0 4 6 H _C P U _S V I D D A T 6 H _C P U _S V I D A L R T# 6 H _C P U _S V I D C L K

P R6 3 75 _ 0 4

P R6 1 5 4 . 9 _ 1% _ 0 4 H _ CP U _ S V IDD A T H_ C P U_ S V I D A L RT # H_ CP U_ S V ID CL K

3. 3V S P R5 4 *1 0 0 K _ 04

P R6 9 1 PJ 4

* 10 K _ 0 4 2 *6 m li G S

V R_ O N

D P Q 10 * MT N 7 0 0 2Z H S 3

PR6 8 *1 0 K _0 4 2 , 1 4 , 1 5 , 21 , 3 4 A L L _S Y S _ P W R GD P R7 0 *1 5 m il _ s ho rt V R _O N

G 34 V CO RE _ O N S

PQ 9 * MT N 7 0 0 2 Z H S 3 2

1 P J3 * 6 mi l

P C 51 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 2 , 4 , 1 0, 1 1 , 1 2 , 13 , 1 4 , 1 5, 16 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 3 , 2 4 , 25 , 2 6 , 2 9, 3 0 , 3 2 , 3 3, 3 4 , 3 5 , 36 , 3 9 , 4 0 3. 3 V S 2 , 3 , 4 , 6, 2 4 , 2 5 , 26 , 4 0 1 . 0 5V S _ V TT 1 4, 1 5 , 3 8 , 3 9, 4 0 , 4 1 , 44 , 4 5 , 4 6 V I N 2 , 1 4 , 1 5 , 17 , 1 8 , 1 9, 2 5 , 2 6 , 3 0, 3 2 , 3 3 , 35 , 3 9 , 4 4 5V S

B - 44 Power V-Core 1

Schematic Diagrams

Power V-Core 2
VIN
* 4 . 7u _ 2 5V _ X 5 R _0 8 *4 . 7 u _2 5 V _ X 5 R _ 0 8 0 . 1u _ 5 0 V _Y 5 V _ 0 6 VCO RE 1 5u _ 2 5V _6 . 3 *4 . 4

VCORE_2
P R1 2 . 2_ 0 6 PC 3

PC 3 c ha nge t o 06 03 Si ze a nd X7 R Ty pe
0 . 22 u _ 10 V _ X 7R _ 06 PQ 1 M D U 26 5 7 D G S HG SW 8 7 V R E G _S W 1_ H G V R E G_ S W 1 _ OU T D D PQ 4 8 M D U 26 5 4 V R E G _S W 1_ L G G S G S P Q4 7 MD U 2 6 54 P Q2 *M D U 26 5 7 G S D

P C8 +

P C1 3

P C1 4

P C4

PR1 cha nge to 0 60 3 Siz e


43 43 V R 1 _ P W M1 D R ON P R7 4 9 . 9 _1 % _ 04

PU 3 1 2 3 4 2 . 2u _ 6 . 3V _X 5 R _0 6 BST P WM EN VC C

N CP5 9 1 1

PL 4 0 . 36 u H _ 1 3 *1 3 *3 . 5 1 2

V C OR E 6 , 43

GN D 6 LG PAD 9 5

5VS

C P D1 5 P R1 2 F MS 3 0 04 -A S -H A * 1 5m i l _s h o rt CS N 1 43

P R9 P C7 + 1 5 u _2 5 V _ 6 . 3* 4. 4 P C9 *4 . 7 u _2 5 V _ X 5 R _ 0 8 P C1 0 *4 . 7 u _2 5 V _ X 5 R _ 0 8 P C5

* 1 5m i l _s h o rt

CSP 1

43

B.Schematic Diagrams

PC 2 c ha nge t o 06 03 Si ze a nd X7 R Ty pe
P R2 2 . 2_ 0 6 PC 2 0 . 22 u _ 10 V _ X 7R _ 06

PC1 8

0 . 1u _ 5 0 V _Y 5 V _ 0 6

VIN
P Q3 MD U 2 6 57 D P Q4 *M D U 26 5 7 D G S S

6 ,4 3

V CO RE

D02 P C3 4 + 3 3 0 u_ 2 . 5 V _ 9m _ 6 . 3 *6 P C3 3 + 3 3 0 u_ 2 . 5 V _ 9m _ 6 . 3 *6 P C2 7 + 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 + 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 P C2 9 + 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 P C2 5 + 33 0 u _2 . 5 V _ 9m _ 6 . 3 *6 P C2 6 + *3 30 u _ 2. 5 V _ 9 m _6 . 3 *6 P C2 2 + *3 30 u _ 2. 5 V _ 9 m _6 . 3 *6 P C2 8

PR 2 c hange t o 06 03 Si ze

PU 2 1 BST P WM

N CP5 9 1 1 HG SW GN D LG PAD 9 8 7 6 5 V R E G_ S W 3 _ LG V R E G_ S W 3 _ H G V R E G_ S W 3 _ OU T

43 43

V R 1 _ P W M3 D R ON PR 6 2 . 2u _ 6 . 3V _X 5 R _0 6

P L3 0 . 3 6 uH _ 13 * 13 *3 . 5 1 2 C

Sheet 44 of 57 Power V-Core 2

VC OR E V C OR E 6 , 4 3

5V S
P C1 6

3 4 9. 9 _ 1 %_ 0 4 E N 4 VC C

P Q4 5 MD U 2 6 54 G

P Q4 6 MD U 2 6 54 G

D el P C31

P D1 4 S S F MS 3 0 04 -A S -H A P R1 3 * 1 5m i l _s h o rt C S N3 43

P R1 0 P C6 + 1 5u _ 2 5V _6 . 3 *4 . 4 P C1 1 *4 . 7 u _2 5 V _ X 5 R _ 0 8 P C1 2 *4 . 7 u _2 5 V _ X 5 R _ 0 8

* 1 5m i l _s h o rt PC1 7 0 . 1u _ 5 0 V _Y 5 V _ 0 6

C SP3

43

PR3 cha nge to 0 60 3 Siz e

PC1 cha nge to 0 60 3 Siz e a nd X7R Type


5VS VIN

R se rve fo r e 2 Ph ase

P R3 P R4 *0 _ 04

2 . 2_ 0 6

PC 1

0 . 22 u _ 10 V _ X 7R _ 06

P Q6 MD U 2 6 57 D G S

P Q5 *M D U 26 5 7 G S D

PU 1 1 43 43 V R 1 _ P W M2 D R ON P R5 4 9 . 9 _1 % _ 04 2 . 2u _ 6 . 3V _X 5 R _0 6 2 3 4 P C1 5 BST P WM EN VC C

N CP5 9 1 1 HG 8 SW 7 V R E G _S W 2_ H G VR EG_SW2_OU T

PL 2 0 . 36 u H _ 1 3 *1 3 *3 . 5 1 2 C

VC OR E

GN D 6 LG PAD 9 5 VREG _ SW 2 _LG

P Q4 3 MD U 2 6 54 G

P Q4 4 MD U 2 6 54 G

V C OR E 6 , 4 3

5VS

P D1 3 S S F MS 3 0 04 -A S -H A

R2 5 0

2 Pha se: DNP 3 Pha se: 0 ohm


C S N2 43

P R8

* 1 5m i l _s h o rt

C SP2

43

1 4 , 15 , 3 8 , 39 , 4 0 , 4 1, 4 3 , 4 5, 4 6 V I N 2 , 1 4, 1 5 , 1 7 , 18 , 1 9 , 25 , 2 6 , 3 0, 3 2 , 3 3, 3 5 , 3 9, 43 5 V S

0804 modify

Power V-Core 2 B - 45

Schematic Diagrams

AC_In, Charger
4. 7 u _ 25 V _ X 5 R _ 0 8 4 . 7 u_ 2 5 V _X 5 R _0 8 4 . 7 u _2 5 V _ X 5R _ 08 1 2 G ND G ND GN D 1 GN D 2 PL 5 H C B 4 53 2 K F -8 0 0T 6 0 8 7 6 5 4 3 2 1 VIN P Q3 8 M E 4 42 5 D0 2 VA P R 14 8 0_04 1 2 3 P Q3 6 A A P 6 9 01 2 1 P C 11 5 4 . 7 u_ 2 5 V _X 5R _0 8 P C 1 1 4 4 . 7u _ 2 5V _ X 5 R _ 0 8 P C 1 18 4 . 7 u _2 5 V _ X 5R _ 08 P L 12 4 . 7 U H _ 6. 8 *7 . 3 *3 . 5 7 5 6 4 5 6 7 8 P Q3 7 M E 4 42 5 P R 15 6 0 . 0 2_ 1 % _3 2 BAT P C 1 3 2 4 . 7u _ 2 5V _ X 5 R _ 0 8 P C 1 31 4 . 7 u _2 5 V _ X 5R _ 08 4. 7 u _ 25 V _ X 5 R _ 0 8 C4 0 8 1 0 00 p _5 0 V _ X 7 R _ 04 T 3 P OW E R J A C K JA C 1 1 2 3 4 2 MJ -3 43 2 -0 07 P C2 0 P C 19 PR 1 1 P C2 4 0 . 1 u_ 5 0 V _Y 5 V _0 6 P R 1 97 1 0 K _ 1% _ 0 4 4 8 7 6 5 P Q7 ME 4 4 25 3 2 1 PL 1 H C B 4 53 2 K F -8 0 0T 6 0 VA 8 7 6 5 4 P R1 5 7 0. 0 1 _ 1% _ 3 2 P Q4 9 ME 4 4 25 0 . 33 u _ 16 V _ Y 5 V _ 06 3 2 1 P R1 5 8 0. 0 1 _ 1% _ 3 2 4 . 7 u _2 5 V _ X 5 R _ 08 4 . 7u _ 2 5V _ X 5 R _ 0 8 P C1 4 7 BAT P C1 4 0 0 . 1u _ 5 0V _ Y 5 V _ 0 6 J _D C -J A C K 1

D02

P Q7 2 ME 4 4 25

1 2 3

5 6 7 8

C ha rge C urren t : 3.0 A C ha rge V ol tag e 16 .8V T ot al Po wer : 2 00W

P C1 3 0

P C 12 9

P C 1 41

3A
0 . 1 u _5 0 V _ Y 5V _ 0 6

P R 1 98 1 3 0 K _1 % _ 04

PR 1 4 2 0 0 K _1 % _ 04

P C 1 46

C 40 7 0 . 1 u_ 1 6 V _ Y 5V _ 0 4

0 . 1u _ 5 0V _ Y 5 V _ 0 6 1 0 K _ 08 0 . 1 u_ 5 0 V _Y 5 V _0 6

3 4 P R 1 47 P R 14 6 * 10 m li _ s ho rt * 10 m i _ s ho rt l P Q3 6 B A P 6 9 01 PC1 2 8

PC2 3

P C 1 24

0 . 1 u_ 5 0 V _Y 5 V _0 6 P C 1 27 C E LL S VA P R 14 9 *0 _ 04 1u _ 2 5V _ 0 8 P C1 3 9 0 . 1u _ 5 0V _ Y 5 V _ 0 6

B.Schematic Diagrams

P R 15 1 00 K _ 0 4

P R1 4 3 0_ 0 4

P R1 4 4 0 _0 4

A P D 1 9 R B 05 4 0 S 2

S GN D 5 P R 15 0

*0 _ 04

P C1 3 7

0 . 1u _ 5 0V _ Y 5V _ 0 6

P C 12 0

P C 1 21 0 . 1 u_ 5 0 V _Y 5 V _ 0 6 32 31 30 29 28 27 26 25 VA P C1 3 4 24 23 22 21 20 19 18 17 33 C TL P C 1 33 P R 15 3 P C 13 6 V O LT -S E L 0 . 1u _ 5 0V _ Y 5V _ 0 6 0 . 1u _ 5 0V _ Y 5V _ 0 6 3 9. 2 K _ 1 %_ 0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4

Sheet 45 of 57 AC_In, Charger

0 . 1u _ 5 0V _ Y 5 V _ 06

P U 10 1 2 3 4 5 6 7 8

P C 13 8

BAT

P Q7 0 P D T A 1 1 4E U C

P R2 1 5 30 K _ 1 %_ 0 4 B A T _V O L T 3 4

-IN E 1 O UT C1 OU T C 2 + INC 2 -IN C 2 ADJ 2 C OM P 2 CO M P 3

P R 1 41 P R 2 14 P C 19 2 0 . 1 u_ 1 6 V _Y 5 V _0 4 P R1 5 4 2 4 9 K _1 % _ 04 P R 14 2 1 0 0K _ 1 % _0 4 P C1 1 7 V D D3 S GN D 5 P R 13 8 34 *1 0 K _ 04 A C / B A T L# 1 4 V DD 3 D P C 1 88 P Q3 4 MT N 7 0 02 Z H S 3 S T OT A L _ C U R S GN D 5 1 0 K _ 1% _ 0 4 6 . 0 4 K _1 % _ 04 P Q3 9 M TN 7 00 2 Z H S 3

G SY S3 V S

9 10 11 12 13 14 15 16

M B 39 A 1 3 2

P R1 5 1 S GN D 5 1 K _1 % _ 04

P R 20 3 1 0 0K _ 1 % _0 4 V S H G _ S E L 34

0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 P R 1 99 P R 2 01 * 10 m li _ s ho rt *1 0m i l _s h o rt P C1 3 5 P R2 0 6 1 00 p _ 50 V _ N P O _ 04 P C1 8 6 4 7 p_ 5 0V _N P O_ 0 4 1 0K _ 1 % _0 4 4 9 . 9K _ 1 % _0 4 1 0 2K _1 % _ 04 D P R2 0 7 22 K _ 1 %_ 0 4 S G ND5 P C1 8 5 2 20 0 p_ 5 0 V _X 7 R _ 0 4 S G ND 5 P R 15 2 76 . 8 K _ 1% _ 0 4 P R2 1 3 *0 _ 0 4 V OL T- S E L P Q 40 G S P R 20 2 P R2 0 9 P R2 0 8

2 M_ 1% _ 0 4

38

A C _I N P R1 3 9

1 0 0 0p _ 5 0V _ X 7 R _ 0 4

P R 2 12 MT N 7 0 0 2Z H S 3

0 _ 04

0730 modify
D VA P R 14 5 1 M_ 0 4 A C_ IN G S

1 0K _0 4 A C_ IN # P Q3 5 M T N 7 00 2 Z H S 3 CE L L S 3 4 ,3 5

S G ND5

S GN D 5S GN D 5

P R1 4 0 D B 20 0 K _ 1% _ 0 4 P Q 68 D T A 1 14 E U A P R2 0 0 P R 2 04 P Q6 9 MT N 7 0 02 Z H S 3 S 1M _ 1% _ 0 4 1 0 0 K _0 4 34 34 34 D P Q 65 M TN 7 00 2 Z H S 3 P C1 8 9 P C1 8 1 PQ 6 7 MT N 7 0 0 2Z H S 3 0 . 0 1u _ 5 0V _ X 7 R _ 0 4 1 M _0 4 S P R 2 05 S P C1 9 0 P C1 9 1 3 0p _ 5 0V _ N P O_ 0 4 30 p _ 50 V _ N P O _0 4 3 0 p_ 5 0 V _ N P O_ 0 4 S MC _B A T S MD _B A T B A T_ D E T P L 15 P L 14 P L 13 H C B 1 0 05 K F -1 2 1 T2 0 H C B 1 0 05 K F -1 2 1 T2 0 H C B 1 0 05 K F -1 2 1 T2 0 J B A TT A 1 1 2 3 4 5 6 7 B TC -07 A R 1

G S YS3 V

Battery Voltage: 12V~16.8V

1 0 0K _ 0 4 C TL 34 C E LL _ C O N T R O L D

G P R2 1 0

P Q4 2 SY S3 V P R 2 16 10 0 K _ 04 D G S M TN 70 0 2 Z H S 3

1M _0 4

P R 21 1

S GN D 5

P R1 5 5

* 15 m i _ s h ort l

P Q4 1 34 C H G _E N G 1 S MT N 70 0 2 Z H S 3 PJ 1 2 * 1m m 2

VIN

S GN D 5 P C1 2 2 P C 12 5 P C1 2 6 P C 12 3 39 VA 38 , 3 9 S Y S 5V 1 9 , 29 , 3 4 , 35 , 3 6 , 38 , 3 9 V D D 3 1 4 , 15 , 3 8 , 39 , 4 0 , 41 , 4 3 , 44 , 4 6 V I N

0. 1 u _5 0 V _ Y 5 V _ 06 0 . 1u _ 5 0V _ Y 5V _ 0 6 0 . 1 u_ 5 0 V _Y 5 V _0 6 0 . 1 u_ 5 0 V _Y 5 V _0 6

B - 46 AC_In, Charger

0 . 1 u _5 0 V _ Y 5V _0 6

V CC -I N C 1 + INC 1 A CIN A CO K -I N E 3 A DJ 1 C O MP 1

CT L 2 C B O U T -1 LX VB O U T -2 P GN D CEL L S

FOR EMI

VIN CT L 1 G ND V RE F TRE RMAL PAD R T CS A DJ 3 BATT S G ND

P C 1 84 S G ND 5

Schematic Diagrams

Power 0.85VS
5V P C 1 50

0 .02 2 u_ 1 6 V _X 7 R _ 0 4

P R 1 68 1 0 K _ 04

0 .9 V VC CS A_V ID 0 VC CS A_V ID 1 0 0

0.8 V 1 0

0.7 V 0 1

0.6 V 1 1
P OK

0 . 85 V S _ P W R GD 2 1 V IN

4 . 7 u_ 2 5V _ X 5 R _ 0 8

0730 modify
P R1 8 7 6. 4 9 K _1 % _ 04 P R 1 79 1 0 K _1 % _0 4

5V

0 _0 4

P D1 PC1 4 2 P C 36 R B 0 54 0 S 2 P R1 8 8 9. 3 1 K _1 % _ 04 P R 1 80 1 0 K _1 % _0 4 C P R1 7 7 1 0 0 _0 4 P C 1 43 P C3 7

0. 1 u _ 50 V _ Y 5V _0 6

P R1 7 4

4 . 7u _ 25 V _ X 5 R _ 0 8

0 . 1 u _5 0 V _Y 5 V _ 0 6

B.Schematic Diagrams

V CCS A _ S E N S E 7

P R1 8 9

12 K _ 1% _ 0 4

P R 1 81

1 0 K _1 % _0 4 P U1 1 u P 61 2 2 5 4 3 2 1

P C 1 49 8

0730 modify
P Q8 A P D 1 5 0 3Y V S PL 7 1 . 0U H _ 6 .8* 7. 3 * 3. 5 1 2 V0 .8 5 PJ 1 4 OP E N -5m m 1 2 0.8 5 V S

EAP SS P OK UG B O OT

Sheet 46 of 57 Power 0.85VS

P R1 9 0

15 K _ 1% _ 0 4

P R 1 82

1 0 K _1 % _0 4 6 7 8 9 10 S E T3 S E T2 S E T1 S E T0 FB

COM P V ID 0 V ID1 E N /P S M C SN

GN D P HA S E LG VC C RT CSP

21 20 19 18 17 16

0. 1u _ 50 V _ Y 5 V _ 06

1 2

6A
P C1 4 5 +

P C 14 4

P C1 5 5 P C 15 3 P R 18 6 22 _ 0 4 0 . 01 u _ 16 V _ X7 R _0 4 47 p _ 50 V _ N P O _0 6 P C1 5 1 P R 18 3 *0 _0 4 P R1 7 5 1 0 0K _1 % _0 4

3 C SN P Q8 B P D 1 50 3 Y V S 4 0 . 8 5V _ O N P R 17 0 1 2 K _1 % _0 4 P C1 5 2

P R 1 85 10 0 _0 4

P C1 9 4 1u _ 25 V _ 0 8

P R 16 7 3 3 K _1 % _0 4

0730 modify 0730 modify

0 . 1u _ Y 5 V _ 50 V _ 0 4 C SP

P C 1 54 *0 . 1u _ 1 6V _ X 7 R _ 0 6

C SN P R1 7 6 6.8 K _ 1 %_ 0 4

0730 modify

7 V CC S A _ V ID0 7 V CC S A _ V ID1

P R 1 78 V C C S A _S E N S E 7 0_04

5V 5V

P R 1 72 1 0 0K _ 0 4 P R1 6 9 10 0 K _0 4 0 .85 V _ ON 3 D P Q 5 1B S MT D N 7 0 0 2Z H S 6 R 4

5G D 1

4 0 1.0 5 V S _ V TT _ P W R G D

G S

P Q5 0 M T N 7 00 2 Z H S 3 2

P J1 5 *1 mm 0 .85 V S VIN 5 V 2 6, 28 , 3 2,3 5 , 3 7, 3 9 ,40 ,4 1 , 42 7 14 , 1 5, 3 8 ,3 9, 4 0 ,4 1,4 3 , 44 , 4 5

P C1 4 8 1 u_ 6 .3 V _X 5 R _ 0 4

0 . 1 u_ 1 6V _ Y 5 V _ 04

P R 1 84

1 K _1 % _ 04

P R 17 1 0 _ 04 5 6 C SP

P R1 7 3 0_ 0 4

56 0 u_ 2 . 5 V _6 . 6 *6 . 6 *5 . 9

11 12 13 14 15 0 . 0 1u _ 1 6V _ X 7 R _ 0 4

Power 0.85VS B - 47

Schematic Diagrams

Audio Jack
USB PORT
A _ U S B V CC A _ USB V C C AL 9 H C B 16 0 8 K F -1 21 T 2 5 A _ USB V C C2

60 mil
A C2 1 00 u _ 6. 3 V _ B 2 A C1 1 0. 1 u _ 16 V _ Y 5 V _ 0 4 A J _ US B 1 1

50 mil
A C 17 0 . 1 u_ 1 6 V _Y 5V _0 4 A C 15 0 . 1 u_ 1 6 V _Y 5 V _0 4 AC 1 4 1 0 u _1 0 V _ Y 5 V _ 08 V+ D A TA _ L 3 D A TA _ H GN D 1 GN D 1 A GN D AG ND A L I N E _S E N S E A J _ L INE 1 AL 6 A L I N E -R AL 5 A _ US BV C C A J _ A U D I O1 A M I C 1 -R A M I C 1 -L A H E A D P H ON E -R A H E A D P H ON E -L H P _P L U G A _ 5V S 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 A J D_ SE N S E A A L INE - R A L INE - L A J D_ SE N S E B A S ID E_ R A S ID E_ L A S P D IF O AU SB_ PP0 A U S B _ P N0 AC 9 1 0 0 p_ 5 0V _0 4 A J _ S P DI F 1 AS IDE _ L AS IDE _ R A L8 A L1 1 H CB 1 6 08 K F -1 2 1T 2 5 H CB 1 6 08 K F -1 2 1T 2 5 A S ID E _ S E NSE A C 16 AC 1 8 A_ 5 VS 6 8 0 p_ 5 0 V _X 7 R _ 0 4 A _ A UD G 6 8 0p _ 50 V _ X 7R _ 04 H C B 1 6 0 8K F -1 2 1 T2 5 A C7 *0 . 1u _ 1 6V _ Y 5V _ 0 4 A R 11 * 22 0 _0 4 A _ A UD G A JD _S E N S E A A JD _S E N S E B AR AR AR AR 10 9 7 8 1 0K _1 % _0 4 2 0K _1 % _0 4 3 9. 2 K _ 1 % _0 4 5 . 1K _1 % _ 04 A LI N E _ S E N S E A MI C _S E N S E AHP _ S E NS E AS IDE _ SE N S E A C1 9 1 8 0 p_ 5 0 V _N P O_ 0 4 A _A U D G A M IC_ S E NS E A J _M I C 1 A MI C 1 -R A MI C 1 -L AL 4 AL 1 H C B 1 60 8 K F -1 2 1T 2 5 H C B 1 60 8 K F -1 2 1T 2 5 AC 6 1 0 0p _ 5 0V _ 0 4 A _ A UD G A HP _ S E N S E A J_ H P 1 A H2 H 8 _0 D 2_ 8 AH 1 H 8 _0 D 2 _ 8 A H E A D P H O N E -R A H E A D P H O N E -L A R5 A R4 75 _ 0 4 75 _ 0 4 AL 3 AL 2 F C M1 0 0 5K F -12 1 T0 3 F C M1 0 0 5K F -12 1 T0 3 AC 5 AR 3 A _A U D G A GN D 2 2K _0 4 A C1 A C1 3 A C1 2 A C8 A GN D 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 A _ A UD G A _ A UDG 2 2 K _ 04 A _ A UD G A _ A UD G A_ A U DG A _ A UD G A _ A UD G AR 6 1 0 0 p_ 5 0V _0 4 10 0 p _5 0 V _ 04 A C4 AR 2 * 1K _ 0 4 AR 1 * 1K _ 0 4 A _ A UD G HP_ P L UG 5 4 3 6 2 1 2S J -T 3 51 -S 2 3 AC 3 1 0 0 p_ 5 0V _0 4 A _ A U DG A _ A UD G 5 4 3 6 2 1 2S J-T 3 5 1-S 2 3 1 2 3 4 5 A B C A_ A U DG A _ A UD G AC 1 0 A _ A UD G 1 0 0 p_ 5 0V _0 4 A L I N E -L F C M1 0 0 5K F -12 1 T0 3 F C M1 0 0 5K F -12 1 T0 3 5 4 3 6 2 1 2 S J -T 35 1 -S 2 3 GN D 2 GN D K S -00 1 H L -A N B A GN D 2 4 +

D02

A GN D A U S B _P N 0 _R A U S B _P P 0_ R

B.Schematic Diagrams

A G ND AR 1 2 A US B _ P N0 A US B _ P P 0 4 AL 7 * 0_ 0 4 3

1 2 W C M2 0 1 2F 2 S -1 6 1T 0 3 -sh o rt AR 1 3 * 0_ 0 4

Sheet 47 of 57 Audio Jack

AUDIO JACK

6 -2 0- B2 89 0- 006

8 8 24 2 -2 00 1 A S P DIF O A _ A U DG A G ND A L 10

TX T OJ -0 0 1S T -2 -H 4

DR IV E IC

A _ A UD G

MIC IN

6- 20 -B 28 90 -00 6

6- 20 -B 289 0- 00 6

B - 48 Audio Jack

Schematic Diagrams

X5100 ODD Board


O_5V S ? ? 2 4 6 8 10 12 14 16 18 20 2 4 6 8 10 12 14 16 18 20 OJ _SA TA _H OD D1 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 OSATA_TXP 0 OS ATA_TXN 0 OS ATA _R XN 0 OSATA_R XP 0

EOD D_ED TEC T# EOD D_D A#

D02

OJ _ODD 1 S1 S2 S3 S4 S5 S6 S7 OGN D

OC 4 OC 5 OC 6 OC 7

0. 01u_16V_X7R _04 0. 01u_16V_X7R _04 0. 01u_16V_X7R _04 0. 01u_16V_X7R _04

OSA TA _TXP0 OSA TA _TXN0 OSA TA _R XN0 OSA TA _R XP0 OGN D

H ometom 1.27*20 pos t

B.Schematic Diagrams

OGN D

P1 P2 P3 P4 P5 P6 SLS -13SB1G

EOD D _E DTEC T# O_5VS EOD D _D A# OC3 OC 1 *10u_10V_08 OC 2 0.01u_16V _X7R _04 O_5V S

Sheet 48 of 57 X5100 ODD Board

FP->AT13035BAA089 C990326
OGN D

0.1u_16V_Y5V_04

X5100M ONLY

OGND

OH 1 OH 2 OH 3 OH 4 H8_0D2_8 H8_0D 2_8 H 6_5D 2_5 H 3_5D 1_8

OGN D

OGN D

OGN D

OGN D

X5100 ODD Board B - 49

Schematic Diagrams

X5100 Click Board


CSW1 ~2 T 3 . 3V T+5 VS T C1 7 0. 1 u _ 16 V _ Y 5 V _ 04 2 1 4 3 T +5 V S F CR 1 *3 2 m li _ sh o rt T J_ T P B 1 10 9 8 7 6 5 4 3 2 1 8 52 0 1 -10 0 51 T G TP _ C LK T GT P _ DA T A T J _ TP 1 1 2 3 4 5 6 8 52 0 1 -06 0 51 * 32 m i _ s h ort l T GN D T R 1 4 T E S D _G N D T GN D T GN D T GN D T GT P _ C L K T GT P _ D A T A T TP B U T TO N _ L T TP B U T TO N _ R T G ND 1 3

RIGHT KEY
TSW 1 T J G-5 3 3-S -T/ R 2 4 1 3

LIFT KEY
T SW 2 T J G-5 3 3-S -T / R 2 4

TT P B U TT O N_ R

TT P B U TT ON _ L

5 6

TC 1 TU S B _ P N 1 0 T USB _ P P 1 0 0 . 1 u _1 6 V _ Y 5 V _ 04

6-20-94A20-110

B.Schematic Diagrams

I t is s trongly re commende d t hat the TESD GN h as _ D a de dic ate d c onnec tion t o the s yst em chas sis or c ab le s hie ld.

T GN D

T GN D

5 6

T 3 . 3V TU 1 T R1 1 *4 . 7 K _ 04 *4 . 7 K _ 04 4 . 7K _ 0 4 T GN D 1u _ 6. 3 V _ Y 5 V _ 0 4 TP U 1 T NR E S E T B5 U S B_ CO NNE C T B1 1 B DR IVE 1 B1 0 B DR IVE 2 A5 B 7 B 8 B 9 C 2 BEZEL 1 A N C1 BEZEL 1 B N C2 BEZEL 2 A N C3 BEZEL 2 B N C4 R E G_ OU T C1 0 A V DD A3 E S D _ GN D 1 C3 E S D _ GN D 2 A1 DV DD 1 DV DD 2 E S D _ GN D 3 P D_ RE G MC S MI S O B4 MO S I B3 MC L K B1 U S B _ DN C1 US B _ D P A2 NR E S E T C4 D GN D 1 C1 1 R E F _ OS C A8 A G ND E S D _ GN D 4 B6 X TA L I N C8 D GN D 2 A6 X TA L OU T T XO U T T GN D T XI N T GN D T H2 H 10 _ 0 D 5 _ 5 T H1 H 1 0 _ 0D 5 _5 T G ND T GND T R E F _ OS C T GN D TC 4 18 p _ 50 V _ N P O _ 04 T C8 1 8 p_ 5 0V _N P O_ 0 4 A1 1 C9 A4 B2 C6 T P D_ R E G 47 p _5 0 V _ N P O _0 4 T MCS T MI S O T MOS I T MCL K T USB _ P N_ R T X OU T T USB _ P P _ R T N RE S E T 3 4 TX1 H S X 5 31 S _ 1 2M H Z T XIN TR 4 1 M _0 4 T GN D 2 1 T GN D TR 5 4 7 0 _0 4 T XI N _ R TU S B _ C ON N TU S B _ P P _R TR 8 TR 7 T GN D 1 . 5 K _ 1% _ 0 4 2 7 . 4 _1 % _0 4 TU S B _ P P 1 0 TC 13 47 p _5 0 V _ N P O _0 4 T GN D TA V D D T GN D T GN D T3 . 3 V T RE G _O U T T C2 1 u _1 0 V _ 06 T R1 2 . 2_ 1 % _0 6 T C3 1 u _ 10 V _ 0 6 0 . 1 u_ 1 6 V _Y 5V _0 4 TU S B _ P N _ R TR 6 2 7 . 4 _1 % _0 4 T U S B _ P N 10 T C1 5 T A V DD T GN D A1 0 T R E G_ O U T C7 C5 T BEZ EL 2 A7 T USB _ CO NN T G ND T B DR I V E 1 T B DR I V E 2 T BEZ EL 1 T RE F _ O S C TC 1 6 2 2 p _5 0 V _ N P O _0 4 T GND T B DR IV E 2 TR 12 1 00 _ 1% _ 0 4 2 R C L A M P 05 0 2 B T C1 4 T E S D _ GN D 3 3 p_ 5 0 V _N P O_ 0 4 T PD_ RE G T BEZ EL 2 T 3. 3 V T BEZ EL 1 TU 2 T B DR IV E 1 TR 9 1 00 _ 1% _ 0 4 1 3 TC 6 1 u _ 6. 3 V _ X 5R _ 04 TR 2 4 7 K _ 04 T 3. 3 V T GN D 1u _ 6 . 3V _ Y 5V _ 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 T 3. 3 V T MOS I T MI S O T MC S T MC L K 5 2 1 6 8 S Q C S# S CK VDD

Sheet 49 of 57 X5100 Click Board

T3 . 3 V

T MI S O T MO S I

T R1 0 T R1 3

3 W P#

TC 1 0 *0 . 1 u_ 1 6V _Y 5V _0 4

TC 12

TC 5

T C9

D02
4 V SS HO L D# T G ND *M 95 1 28 W M N 6 T P 7

951206

The TESD_GND trac e has t o be w ide (> 2 0mil) T he pat h b e mark ed in nee ds t o b e desig n t o be s hort and at low imp ed an ce.
TC 7 TR 3 3 3 0 K _0 4

1 u _ 6. 3 V _ X 5R _ 04

T G ND

T GND

TC 11

H X531S S +-20ppm

T GN D

A 9

TCS5XF
T G ND T GN D

T GN D

X5100M ONLY

B - 50 X5100 Click Board

Schematic Diagrams

X5100 LED 1 Board

LLED_ACIN LJ_LED1 1 2 3 4 5 LED_GND LR3 LLED_ACIN LLED_PWR LLED_BAT_CHG LLED_BAT_FULL 220_04

LLED_PWR LR4 220_04

LLED_BAT_CHG LR2 220_04

LLED_BAT_FULL LR1 220_04

B.Schematic Diagrams

85205-05001

LD2

LD1

Sheet 50 of 57 X5100 LED 1 Board

1 KPB-3025YSGC 2

Y SG

Y SG
LED_GND 4

3 KPB-3025YSGC LED_GND

2 LED_GND

AC IN/POWER ON LED
LH1 H6_0D2_3

4 LED_GND

BAT CHARGE/FULL LED

LED_GND

X5100 LED 1 Board B - 51

Schematic Diagrams

X5100 LED 2 Board


L2_3.3VS

L2J_LED1 6 5 4 3 2 1 L2SATA_LED# L2BT_EN L2WLAN_EN L2_WLAN_LED# L2_3.3VS D02 85201-06051 L2GND L2R3 220_04 A

LED
L2_3.3VS L2_3.3VS

B.Schematic Diagrams

Sheet 51 of 57 X5100 LED 2 Board

HDD/CD-ROM LED
A

L2R1 220_04 A L2D3 D02 L2R4 C KP-2012SGC C L2BT_EN B 0_04

L2R2 220_04

L2D1 KP-2012SGC L2H1 L2H2 H6_0D2_3 H6_0D2_3

L2D2 KP-2012SGC

W t hi e

L2_WLAN_LED#

L2WLAN_ENB L2SATA_LED# E L2GND L2GND L2Q2 *DTC114EUA

L2GND

L2GND

B - 52 X5100 LED 2 Board

L2Q1 DTC114EUA

Schematic Diagrams

X5100 LED 3 Board


L3_3.3VS L3_3.3VS L3_3.3VS L3_3.3VS

L3J_LED1 6 L3LED_NUM# 5 L3LED_CAP# 4 L3LED_SCROLL# 3 2 1 85201-06051

L3R3 220_04

L3R2 220_04

L3R1

B.Schematic Diagrams

220_04

D0 2

L3D3 KP-2012SGC C

SCROLL LOCK LED

L3D2

CAPS LOCK LED

L3D1 KP-2012SGC C

NUM LOCK LED

Sheet 52 of 57 X5100 LED 3 Board

KP-2012SGC C

L3LED_SCROLL#

L3LED_CAP#

A L3LED_NUM#

L3H2 L3H1 H6_0D2_3 H6_0D2_3

L3_GND L3_GND

X5100 LED 3 Board B - 53

Schematic Diagrams

X7100 HDD & ODD Board


H J _OD D 1 S1 S2 S3 S4 S5 S6 S7 HG ND H _5VS H _E OD D _D A # HC1 6 HC1 5 HC1 4 HC1 3 0.0 1u_16V _X7R _ 04 0.0 1u_16V _X7R _ 04 0.0 1u_16V _X7R _ 04 0.0 1u_16V _X7R _ 04 H S A TA_T XP0 H S A TA_T XN 0 H S A TA_R XN 0 H S A TA_R XP 0 H _EO D D _ ED TEC T# H _EO D D _ D A # H _5V S H _3. 3V S H _5V S ? ? 2 4 6 8 10 12 14 16 18 20 2 4 6 8 10 12 14 16 18 20 H J _SA TA _H O D D 1 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 17 17 19 19 H SA TA _TXP 0 H S AT A_TX N 0 H SA TA _R X N 0 H S A TA _R XP 0 H SA TA _TXP 1 H SA TA _TXN 1 H SA TA _R XN 1 H SA TA _R XP 1

B.Schematic Diagrams

P1 P2 P3 P4 P5 P6

H _E OD D _E D TE C T#

H om et om 1. 27*20 p os t

Sheet 53 of 57 X7100 HDD& ODD Board

C 185 94-11305-L HG ND

FP->AT13035BAA089 C990326

H GN D

HG ND

D02
H J _H D D 1 S1 S2 S3 S4 S5 S6 S7 P1 P2 P3 P4 P5 P6 P7 P8 P9 P 10 P 11 P 12 P 13 P 14 P 15 SG 41718522F B OXO R A 4 P I N G N D 1 ~2 = G N D H GN D H GN D HC 5 HC 6 HC 7 HC 8 0. 01u_16V _X7R _04 0. 01u_16V _X7R _04 0. 01u_16V _X7R _04 0. 01u_16V _X7R _04 H _3. 3V S H S A TA_T XP1 H S A TA _TXN 1 H S A TA_ R XN 1 H S ATA _R XP1

X7100M ONLY
H H3 H H2 H H1 H 7_0D 2 _8 H 7_0D 2 _8 H 6_0D 2_ 3 HG ND HG ND HG ND

H C 11 * . 01u_16V _04

H C 10 * 10u_10V _08 H _5V S

H GN D

H GN D

HC9 0.1 u_16V _Y 5V _04

H C4 0. 1u_ 16V_ Y 5V _04

H C 17 0. 1u_16 V_Y 5V _04

H C 12 1u_6. 3V _X5R _04

HC 2 10u_10V _Y 5V_ 08

HC1 100u_6. 3V _B 2

H C3 * 22u_6. 3V _12

B - 54 X7100 HDD & ODD Board

Schematic Diagrams

X7100 CIR

CIR_VDD5 CJ_CIR1 4 CIR_RX _R 3 2 1 85204-04001 CIR_GND

B.Schematic Diagrams

Sheet 54 of 57 X7100 CIR

CIR

CIR_VDD5

R629 CU1 100_04 V V CC2 CH4 CH2 H6_0D2_3 H6_0D2_2 0.1u_16V_Y5V_04 CIR_GND 10u_10V_Y5V_08 CIR_GND CIR_RX _R CC4 G O GND2 G GND1 O GND2 GND1

IRM -V038/TR1

D02
CIR_GND CIR_GND

CIR_GND

X7100 CIR B - 55

Schematic Diagrams

X7100 LED Board


L4_3.3VS L4_V DD3 1 J_L4LE D1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 87151-15051 L4_W LAN_ LED# L4_S _LE ATA D# L4_B T_EN L4_W LAN_ EN L4_LE D_NU M# L4_LE D_CA # P L4_LE CROLL# D_S L4_M_B TN# L4_U2 G ND VC C O UT L 3V 4_3. S 2 L4 D # _LI _SW L4R5 L4R6 220_04 A A L4D4 KP -2012S GC C C L4_LED P# _CA L4_LED _NUM# L4R11 220_04 A L4D8 KP -2012S GC C L4D5 K P-2012S GC L4R7 220_04 L4_3.3VS L4_3.3VS

D02

L4_C1 0. 1u_1 6V_Y5 V_04

MH-248

X7100
A L4G ND

220_04

L4D3 KP -2012S GC

B.Schematic Diagrams

L4_LID_S # W

L4_VD D3

C L4_LED _SCR OLL# L4_W _LED LAN # D02 L4R1 0_04 L4_3 3V . S

Sheet 55 of 57 X7100 LED Board

L4G ND

POW ER BUTT ON
L4_S W1 4 3 HCH _STS -02 1 2

20mil L4R8

PO WER SW ITCH LE D

L4_3.3V S L4_3.3VS

L4_3.3VS

L4R9 100_04 L4_M_B TN# 20mil 20mil L4C1 *0. 1u_16 V_04 L4G ND A C L4GND L4D9 KP -2012SG C A L4D6 220_04

HDD/CD -ROM LED


A

L4 R10 22 0_04

L4D7 KP -2012SG C C C K P-2012S GC

White
L4_WLA N B N_E L4_S TA_LE A D# L4Q1 *D TC114E UA

L4_B N B T_E L4Q 2 DTC 114EU A

L4GND L4GN D

L4GN D

L4H1 L4H2 L4H 3 H6_0D2_3 H6_0D 2_3 H6 _0D2_3

L4G ND

L4GND

L4GND

B - 56 X7100 LED Board

Schematic Diagrams

X7100 Click Board


C 3. 3 V C + 5V S C+ 5 V S F CR 7 *3 2 m li _ sh o rt C J _ TP B 1 10 9 8 7 6 5 4 3 2 1 8 52 0 1 -10 0 51 C GT P _ C L K C GT P _D A T A C C1 6 CU S B _P N 1 0 CU S B _ P P 1 0 0 . 1 u _1 6 V _ Y 5 V _ 04 C J_ T P 1 1 2 3 4 5 6 8 52 0 1 -06 0 51 * 32 m i _ s h ort l CG ND C R 1 0 C TE S D _ GN D C GN D CG ND C GN D C G TP _C LK C G TP _D A TA C T P B U TT ON _ L C T P B U TT ON _ R C GN D 1 3 CC 1 7 0. 1 u _ 16 V _ Y 5 V _ 04

RIGHT KEY
C SW 2 T J G-5 3 3-S -T/ R 2 4 C T P B UT T ON _R 1 3

LIFT KEY
CSW 1 T JG -5 33 -S -T / R 2 4 C TP B U T TO N _ L

5 6

CS W 4 *T J G-5 3 3 -S -T/ R 1 3 5 6 2 4 1 3

5 6 C SW 3 * TJ G- 53 3 -S -T / R 2 4 5 6 C G ND

6-20-94A20-110
I t is s tron gly re commen de d t hat th e TESD GN h as _ D a de dic ate d c on nec tion t o th e s yst em ch as sis o r c ab le s hie ld.
C 3. 3 V CU 2 CJ _ F PB 1 C R E G_ O UT C B D RI V E 1 C B D RI V E 2 CX IN C X O UT C M OS I CM CL K CM CS CN RES E T C3 .3 V 1 3 5 7 9 11 13 15 17 19 21 23 *C ON 24 A C GND C GN D C BDR IV E1 CG N D CR 1 5 CR 1 6 1 00 _ 1% _ 0 4 1 00 _ 1% _ 0 4 1 3 C BDR IV E2 C3 .3 V C P D_ R E G J_FP 1 23 1 C C 22 1u _ 6 . 3V _ Y 5V _ 0 4 24 TO VI P EW 2 2 24 B ON V OTT IEW C GN D C R E G_ O UT C R1 8 CC 2 6 6 1 TJ_ FP1 1 u _1 0 V _ 06 2 . 2_ 1 % _0 6 C C2 7 1 u _ 10 V _ 0 6 0 . 1 u_ 1 6 V _Y 5V _0 4 C GN D CG N D C U S B _P N _R CR 1 9 2 7 . 4 _1 % _0 4 C USB _ PN1 0 C C2 8 C C 23 1 u_ 6 . 3 V _Y 5V _0 4 CC 2 4 3 3 p_ 5 0 V _N P O_ 0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 C A VDD CG N D C R1 7 C C2 1 3 3 0 K _0 4 1 u _ 6. 3 V _ X 5R _ 04 C3 .3 V C BEZEL 2 C C2 5 CT E S D _G N D R C L A M P 05 0 2 B 2 2 4 6 8 10 12 14 16 18 20 22 24 CR E F _O S C CB E Z E L 1 CB E Z E L 2 CM I S O CU S B _C ON N CP D _R E G CU S B _P N _ R CU S B _P P _R C R E F _ OS C C A VDD C MI S O C MOS I C R1 1 C R1 2 C R1 3 *4 . 7 K _ 04 *4 . 7 K _ 04 4 . 7K _ 0 4 C3 .3 V CM CM CM CM OS I ISO CS CL K 5 2 1 6 S Q C S# S CK V DD 8 C GN D

B.Schematic Diagrams

W P# C GN D

CC 18 *0 . 1 u_ 1 6V _Y 5V _0 4

D02
CG ND

4 V SS HO L D# *M 95 1 28 W M N 6 T P

Sheet 56 of 57 X7100 Click Board

C N RE S E T

C R1 4 C C1 9 C C2 0

4 7 K _ 04 1 u _ 6. 3 V _ X 5R _ 04 2 2 p _5 0 V _ N P O _0 4

C3 .3 V

C GN D

C3 . 3 V

951206
C BEZEL 1 C U3

P lace Bott on

C C2 9 47 p _5 0 V _ N P O _0 4

C GND C XI N C R2 2 C R2 0 4 7 0 _0 4 C X I N _R C U S B _C ON N C U S B _P P _ R C GN D 2 3 1 4 C G ND CR 2 1 CR 2 3 1 . 5 K _ 1% _ 0 4 2 7 . 4 _1 % _0 4 C U S B _P P 10

X7100M ONLY
C CH 1 C CH 2 C C H3 C CH 4 C CH 5 CC H 6 H 6_ 0 D2 _ 2 H 6 _0 D 2_ 2 H 6 _ 0D 2 _2 H 6_ 0 D 2 _ 2 H 4 _0 D2 _ 2 H4 _ 0D 2 _2

1 M _0 4 C XO UT

H X531S S +-20ppm

C C3 0 47 p _5 0 V _ N P O _0 4 C GND

C X1 H S X 5 31 S _ 1 2M HZ

CC 31 18 p _ 50 V _ N P O _ 04 C GN D

C C3 2 1 8 p_ 5 0V _N P O_ 0 4 CG N D

C GN D

CGN D

CG ND

C GND

C GN D

CG ND

X7100 Click Board B - 57

Schematic Diagrams

X7100 Fingerprint Board


FPJ T1 FP U 1 B5 U SB_C ON N EC T B11 BD R I VE1 BD R I VE2 B7 NC1 B8 B9 BEZ EL1B NC2 BEZ EL2A NC3 C2 NC4 R E G_OU T A VD D ES D _GN D 1 ES D _GN D 2 D VD D 1 A11 D VD D 2 ES D _GN D 3 PD _R EG MC S C6 MI SO MOSI MC LK B1 U SB_D N U S B_D P N R E SET DGN D 1 C 11 R E F_OSC AGN D ES D _G N D 4 XTA LI N C8 DGN D 2 X LOU T TA A6 FXOU T F GN D A8 B6 FXI N FR E F_OSC FGN D C1 A2 C4 B4 B3 C9 A4 B2 FP D _R E G FMC S FMI SO FMOSI FMC LK FU S B_PN FU S B_PP FN R ES ET 1 FGN D 2 24 BOTTON VIEW 24 2 TOP VIEW FJ1 23 23 1 FGN D A3 C3 A1 BEZ EL2B C7 A10 C 10 FR E G_OU T C5 FB EZE L2 BEZ EL1A B10 A5 A7 FU S B_C ON N FB D RI V E1 FB D RI V E2 FB EZE L1 FMOS I FMC LK FMC S FN R E SE T F3. 3V FR E G_OUT FB D R IV E1 FB D R IV E2 FXI N FXOU T 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 FR EF _OS C FBE ZE L1 FBE ZE L2 FMI SO FU SB _CON N FPD _R EG FU SB _PN FU SB _PP FAV D D

The TESD_GND trace has to be w ide ( > 20mil) The path be marked in RED needs to be design t o be short and at low im pedance.
F 3. 3V

S PN Z-24S2-VB-017-1-R F GN D FGN D

B.Schematic Diagrams

6-21-41710-212
FA VD D FGN D FGN D F3. 3V

Sheet 57 of 57 X7100 Fingerprint Board

X7100M ONLY

B - 58 X7100 Fingerprint Board

A9

TCS5XF

FGN D

BIOS Update

Appendix C:Updating the FLASH ROM BIOS


To update the FLASH ROM BIOS you must:
Download the BIOS update from the web site. Unzip the files onto a bootable CD/DVD/USB Flash Drive. Reboot your computer from an external CD/DVD/USB Flash Drive. Use the flash tools to update the flash BIOS using the commands indicated below. Restart the computer booting from the HDD and press F2 at startup enter the BIOS. Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer. After rebooting the computer you may restart the computer again and make any required changes to the default BIOS settings.

BIOS Version Make sure you download the latest correct version of the BIOS appropriate for the computer model you are working on. You should only download BIOS versions that are V1.01.XX or higher as appropriate for your computer model. Note that BIOS versions are not backward compatible and therefore you may not downgrade your BIOS to an older version after upgrading to a later version (e.g if you upgrade a BIOS to ver 1.01.05, you MAY NOT then go back and flash the BIOS to ver 1.01.04).

C:BIOS Update

Download the BIOS


1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. 2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files (the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model (see sidebar for important information on BIOS versions).

Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive


1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the downloaded files. 2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).

Set the computer to boot from the external drive


1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the computer and press F2 (in most cases) to enter the BIOS. 2. Use the arrow keys to highlight the Boot menu. 3. Use the + and - keys to move boot devices up and down the priority order. 4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer. C - 1

BIOS Update

Use the flash tools to update the BIOS


1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you see the message Starting MS-DOS. You will then be prompted to give Y or N responses to the programs being loaded by DOS. Choose N for any memory management programs. 2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB flash drive). 3. Type the following command at the DOS prompt: C:\> Flash.bat 4. The utility will then proceed to flash the BIOS. 5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer restarts.

C:BIOS Update

Restart the computer (booting from the HDD)


1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from the HDD. 2. Press F2 as the computer restarts to enter the BIOS. 3. Use the arrow keys to highlight the Exit menu. 4. Select Load Setup Defaults (or press F9) and select Yes to confirm the selection. 5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS


You may now enter the BIOS and make any changes you require to the default settings.

C-2