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The world of mobile computing has seldom been so exciting. Not, at least, for last 3 years when all that the chip giants could think of was scaling down the frequency and voltage of the desktop CPUs, and labeling them as mobile processors. Intel Centrino mobile technology is based on the understanding that mobile customers value the four vectors of mobility: performance, battery life, small form factor, and wireless connectivity. The technologies represented by the Intel Centrino brand will include an Intel Pentium-M processor, Intel 855 chipset family, and Intel PRO/Wireless 2100 network connection . The Intel Pentium-M processor is a higher performance, lower power mobile processor with several microarchitectural enhancements over existing Intel mobile processors. Some key features of the Intel Pentium-M processor Microarchitecture include Dynamic Execution, 400-MHz, on-die 1-MB second level cache with Advanced Transfer Cache Architecture, Streaming SIMDExtensions 2, and Enhanced Intel SpeedStep technology. The Intel Centrino mobile technology also includes the 855GM chipset components GMCH and the ICH4-M. The Accelerated

Hub Architecture is designed into the chipset to provide an efficient, high bandwidth, communication channel between the GMCH and the ICH4M.The GMCH component contains a processor system bus controller, a graphics controller, and a memory controller, while providing an LVDS interface and two DVO ports. The integrated Wi-Fi Certified Intel PRO/Wireless 2100 Network Connection has been designed and validated to work with all of the Intel Centrino mobile technology components and is able to connect to 802.11b Wi-Fi certified access points. It also supports advanced wireless LAN security including Cisco LEAP, 802.1X and WEP. Finally, for comprehensive security support, the Intel PRO/Wireless 2100 Network Connection has been verified with leading VPN suppliers like Cisco, CheckPoint, Microsoft and Intel NetStructure.

1. Pentium-M Processor
The Intel Pentium-M processor is a high performance, low power mobile processor with several micro-architectural enhancements over existing Intel mobile processors. The following list provides some of the key features on this processor:

Supports Intel Architecture with Dynamic Execution High performance, low-power core On-die, 1-MByte second level cache with Advanced Transfer Cache Architecture Advanced Branch Prediction and Data Prefetch Logic Streaming SIMD Extensions 2 (SSE2) 400-MHz, Source-Synchronous processor system bus Advanced Power Management features including Enhanced Intel SpeedStep technology Micro-FCPGA and Micro-FCBGA packaging technologies The Intel Pentium-M processor is manufactured on Intels advanced 0.13 micron process technology with copper interconnect. The processor maintains support for MMX technology and Internet Streaming SIMD instructions and full compatibility with IA-32 software. The high performance core features architectural innovations like Micro-op Fusion and Advanced Stack Management that reduce the number of micro-ops handled by the processor. This results in more efficient scheduling and better performance at lower power. The on-die 32-kB

Level 1 instruction and data caches and the 1-MB Level 2 cache with Advanced Transfer Cache Architecture enable significant performance improvement over existing mobile processors. The processor also features a very advanced branch prediction architecture that significantly reduces the number of mispredicted branches. The processors Data Prefetch Logic speculatively fetches data to the L2 cache before an L1 cache requests occurs, resulting in reduced bus cycle penalties and improved performance. The Streaming SIMD Extensions 2 (SSE2) enable break-through levels of performance in multimedia applications including 3-D graphics, video decoding/encoding, and speech recognition. The Intel Pentium-M processors 400-MHz processor system bus utilizes a split-transaction, deferred reply protocol. The 400-MHz processor system bus uses Source-Synchronous Transfer (SST) of address and data to improve performance by transferring data four times per bus clock (4X data transfer rate, as in AGP 4X). The processor features Enhanced Intel SpeedStep technology, which enables realtime dynamic switching between multiple voltage and frequency points instead of two

points supported on previous versions of Intel SpeedStep technology. This results in optimal performance without compromising low power. The processor features the Auto Halt, Stop-Grant, Deep Sleep, and Deeper Sleep low power states. The Intel Pentium-M processor utilizes socketable Micro FlipChip Pin Grid Array (Micro-FCPGA) and surface mount Micro Flip-Chip Ball Grid Array (Micro-FCBGA) package technology. The Micro-FCPGA package plugs into a 479-hole, surface-mount, Zero Insertion Force (ZIF) socket, which is referred to as the mPGA479M socket.

HALT instruction. The processor will transition to the Normal state upon the occurrence of SMI#, INIT#, LINT [1:0] (NMI, INTR), or PSB interrupt message. 1.1.3 Stop-Grant State When the STPCLK# pin is asserted, the Stop-Grant state of the processor is entered 20 bus clocks after the response phase of the processor-issued Stop-Grant Acknowledge special bus cycle. Since the AGTL+ signal pins receive power from the system bus, these pins should not be driven (allowing the level to return to VCCP) for minimum power drawn by the termination resistors in this state.

Features of Pentium-M 1.1 Clock Control and Low Power States

The Intel Pentium M processor supports the AutoHALT, Stop-Grant, Sleep, Deep Sleep, and Deeper Sleep states for optimal power management. See Figure.1 for a visual representation of the processor low-power states. 1.1.1 Normal State This is the normal operating state for the processor. 1.1.2 Auto HALT Power down State Auto HALT is a low-power state entered when the processor executes the 1.1.4 HALT/Grant Snoop State The processor will respond to snoop or interrupt transactions on the system

bus while in Stop-Grant state or in AutoHALT Power Down state. During a snoop or interrupt transaction, the processor enters the HALT/Grant Snoop state. The processor will stay in this state until the snoop on the system bus has been serviced or the interrupt has been latched. 1.1.5 Sleep State The Sleep state is a low power state in which the processor maintains its context, maintains the phase-locked loop (PLL), and has stopped all internal clocks. The Sleep state can only be entered from Stop-Grant state. Once in the Stop-Grant state, the processor will enter the Sleep state upon the assertion of the SLP# signal. The SLP# pin should only be asserted when the processor is in the Stop-Grant state. 1.1.6 Deep Sleep State Deep Sleep state is a very low power state the processor can enter while maintaining context. Deep Sleep state is entered by asserting the DPSLP# pin while in the Sleep state. BCLK may be stopped during the Deep Sleep state for additional platform level power savings. BCLK stop/restart timings on Intel 855PM and Intel 855GM chipset-based platforms are as follows:

Deep Sleep entry - DPSLP# and CPU_STP# are asserted simultaneously. The platform clock chip will stop/tristate BCLK within 2 BCLKs +/- a few nanoseconds. Deep Sleep exit - DPSLP# and CPU_STP# are deasserted simultaneously. The platform clock chip will drive BCLK to differential DC levels within 2-3 ns and starts toggling BCLK 2-6 BCLK periods later. 1.1.7 Deeper Sleep State The Deeper Sleep state is the lowest power state the processor can enter. This state is functionally identical to the Deep Sleep state but at a lower core voltage. The control signals to the voltage regulator to initiate a transition to the Deeper Sleep state are provided on the platform.

1.2 Enhanced Intel SpeedStep Technology

The Intel Pentium-M processor features Enhanced Intel SpeedStep technology. Unlike previous implementations of Intel SpeedStep technology, this technology enables the processor to switch between multiple frequency and voltage points instead of two. This will enable superior performance with optimal power savings. Switching between states is software controlled unlike previous implementations

where the GHI# pin is used to toggle between two states. The following are the key features of Enhanced Intel SpeedStep technology: Multiple voltage/frequency operating points provide optimal performance at the lowest power. Voltage/Frequency selection is software controlled by writing to processor MSRs (Model Specific Registers) thus eliminating chipset dependency. Improved Intel Thermal Monitor mode. When the on-die thermal sensor indicates that the die temperature is too high, the processor can automatically perform a transition to a lower frequency/voltage specified in a software programmable MSR. The processor waits for a fixed time period. If the die temperature is down to acceptable levels, an up transition to the previous frequency/voltage point occurs. An interrupt is generated for the up and down Intel Thermal Monitor transitions enabling better system level thermal management.

bus by delivering 3.2 GB of data per second into and out of the processor .this is accomplished through a physical signaling scheme of quad pumping the data transfers over a 100-MHz clocked system bus and a buffering scheme allowing for sustained 400-MHz data transfer .the system bus features the following low power enhancement: Low voltage swing Intelligent disabling of data, address and control signal buffers Dynamic on-die termination disabling

1.4 1MB Level 2 Advanced Transfer Cache

The Level 2 Advanced Transfer Cache (ATC) is 1MB in size and delivers an extremely high data throughput channel between the level 2 Cache and the processor core. The Advanced Transfer Cache transfers data on each core clock. Features of the ATC include: Non-blocking, full speed, on-die Level 2 Cache 8-way set associativity data clocked into and out of the cache every clock cycle

1.3 400 MHz System Bus with low power features

The Intel Pentium-M processor supports Intels highest performance mobile system

1.5 Advanced Branch Prediction and Data Prefetching

The Intel Pentium M processor features an advanced branch prediction architecture that combines three types of predictors - Global, Bi-Modal and Loop Detector. The processor automatically selects the most optimal algorithm to use, significantly reducing the number of mispredicted branches. The processor also features an advanced data prefetcher that can track up to 8 upstream and 4 downstream operations simultaneously. Data is prefetched from main memory to the L2 cache in advance, resulting in higher performance by reducing the need to access system memory.

1.6 Streaming SIMD Extensions 2(SSE2)

The Intel Pentium M processor supports the complete SSE2 instruction set. These instructions include 128-bit SIMD integer arithmetic and 128-bit SIMD double-precision floating-point operations. These instructions reduce the overall number of instructions required to execute a particular program task and as a result can contribute to an overall performance increase.

2.1 Intel 855GM Chipset GMCH 2. Intel 855GM Chipset GMCH

As the next step in the evolution of the Intel Hub Architecture for the notebook PCs using Intel Centrino mobile technology, the Intel 855GM chipset was designed in tandem with Intel Pentium-M processor. The Intel 855GM Graphics and Memory Controller Hub (GMCH) delivers support for either PC1600 and PC2100 DDR memory technology and a 400 Mhz system bus, providing the latest graphics support through 1.5V AGP4X technology. Together these features deliver the highest total bandwidth capabilities to the PC platform. The enhanced 82801DBM I/O Controller Hub 4 (ICH4-M) delivers twice the I/O bandwidth over traditional bridge architecture and provides dedicated data paths to fully optimize the additional bandwidth. The ICH4-M has reduced core voltage from previous generation of I/O hub architecture chipsets. The ICH4-M makes a direct connection from the graphics and memory for faster access to peripherals and provides the features and bandwidth required for a high performance notebook PC.

Product Features
Processor/Host Bus Support Intel Pentium M processor 2x address, 4x data Supports system bus at 400 MHz Supports 64-bit host bus addressing Supports Enhanced Intel SpeedStep technology Memory System Directly supports one DDR SDRAM channel, 64-bits wide Supports 200/266-MHz DDR SDRAM devices with max of two, doublesided SODIMMs four rows populated) with unbuffered PC1600/PC2100 DDR SDRAM. Video Stream Decoder Improved hardware motion compensation for MPEG2 All format decoder (18 ATSC formats) supported Software DVD at 60 Fields/second and 30 frames/second full screen Support for standard definition DVD Multiple hardware col cursor support or (32-bit with alpha and legacy 2-bpp mode) Accompanying I2C and DDC channels provided through multiplexed interface Display

Analog display support o 350-MHz integrated 24-bit RAMDAC that can drive a standard progressive scan analog monitor with pixel resolution up to 1600x1200 at 85 Hz and up to 2048x1536 at 75 Hz Dual independent pipe support o Concurrent: Different images and native display timings on each display device o Simultaneous: Same images and native display timings on each display device DVO (DVOB and DVOC) support o Digital video out ports DVOB and DVOC with 165-MHz dot clock on each 12-bit interface; two 12-bit channels can be combined to form one dual channel 24-bit interface with an effective dot clock of 330-MHz o The combined DVO B/C ports as well as individual DVO B/C ports can drive a variety of DVO devices (TV-Out Encoders, TMDS and LVDS transmitters, etc.) with pixel resolution up to 1600x1200 at 85 Hz and up to 2048x1536 at 72 Hz. o Compliant with DVI Specification 1.0 Dedicated LFP (local flat panel) LVDS interface

o Single- or dual-channel LVDS panel support up to UXGA panel resolution with frequency range from 25 MHz to 112 MHz (single channel/dual channel) o LCD panel power sequencing compliant with SPWG timing specification o Compliant with ANSI/TIA/EIA 6441995 spec Tri-view support through LFP interface, DVO B/C port, and CRT Internal Graphics Features Up to 64 MB of dynamic video memory allocation Display image rotation Graphics core frequency Display core frequency at 133 MHz or 200 MHz Render core frequency at 100 MHz,133 MHz, 200 MHz 2D graphics engine o Optimized 128-bit BLT engine o Ten programmable and predefined monochrome patterns 3D graphics engine o 3D setup and render engine o High quality performance texture engine o DirectX and OpenGL pixelization rules Hub Interface to ICH4-M o 266 -MB/s point-to-point Hub Interface to ICH4-M o 66-MHz base clock

Power Management o APM Rev 1.2 compliant power management o Supports Suspend to System Memory (S3), Suspend to Disk (S4) and Soft Off (S5) o ACPI 1.0b, 2.0 support o Enhanced Intel SpeedStep technology support Package o 732-pin Micro-FCBGA (37.5 x 37.5 mm) Additional o Support for Hi-Speed Universal Serial Bus (USB 2.0) with backward compatibility with USB 1.1 o AC97 2.2 Interface with support for a third codec to provide 20 bit resolution. o LAN Connect Interface (LCI) provides flexible network solutions such as home phone line, 10/100 Mbps Ethernet, and 10/100 Mbps Ethernet with LAN manageability o Dual Ultra ATA-100 controllers support the fastest IDE interface for transfers to storage devices

The GMCH is in a 732-pin Micro-FCBGA package and contains the following functionality: Optimized for the Intel Pentium M processor Supports a single channel of DDR SDRAM memory Supports the fourth generation Mobile I/O Controller Hub (ICH4-M) to provide the features required by a mobile platform Contains advanced power management logic Supports a single Intel Pentium M processor configuration at 400-MHz or 3.2 GB/s 1.05-V AGTL+ host bus supporting 64bit host addressing with Enhanced Intel SpeedStep Technology support Up to 1 GB (with 512-Mb technology and two SO-DIMMs) of PC1600/2100 DDR and up to 2 GB (high density using 512-Mb technology) Integrated graphics capabilities, including 3D rendering acceleration and 2D hardware acceleration Deeper Sleep state support

2.2. System Architecture

The Intel 855GM GMCH component provides the processor interface, DDR SDRAM interface, display interface, and Hub interface in an Intel 855GM chipset based system.

2.3. Processor Host Interface

The GMCH is optimized for the Intel Pentium M processor. Key features of

the Intel Pentium M processor system bus (PSB) are: Source synchronous double pumped address Source synchronous quad pumped data System bus interrupt delivery Low voltage swing (Vtt = 1.05 V)

be triggered by an external input pin. The memory controller logic supports aggressive Dynamic Row Power Down features to help reduce power and supports Address and Control line Tri-stating when DDR SDRAM is in an active power down or in self refresh state.

2.4. Intel 855GM GMCH Host Bus Error Checking

The Intel 855GM GMCH does not generate nor check parity on Data, Address/Request, and Response signals on the PSB.

2.6. Intel 855GM GMCH Internal Graphics

The GMCH IGD provides a highly integrated graphics accelerator delivering high performance 2D, 3D, and video capabilities. With its interfaces to UMA using a DVMT configuration, an analog display, a LVDS port, and two digital display ports (e.g. flat panel), the GMCH can provide a complete graphics solution. The GMCH uses Tiling architecture to increase System Memory efficiency and thus maximize effective rendering bandwidth. The Intel 855GM GMCH also improves 3D performance and quality with 3D Zone Rendering technology. The GMCH has four display ports, one analog and three digital. These provide support for a progressive scan analog monitor, a dedicated dual channel LVDS LCD panel, and two DVO devices. Each port can transmit data according to one or more protocols.

2.5. Intel 855GM GMCH System Memory Interface

The GMCH System Memory Controller directly supports the following: One channel of PC1600/2100 SO-DIMM DDR SDRAM memory Maximum System Memory with two, double-sided SO-DIMMs (four rows populated) supporting up to 1 -GB system memory, and high density supporting up to 2-GB system memory The GMCH System Memory interface supports a thermal throttling scheme to selectively throttle reads and/or writes. Throttling can be triggered either by the on-die thermal sensor, or by preset write bandwidth limits. Read throttle can also


The Intel Centrino mobile technology is

3. Wireless Connectivity
The Intel PRO/Wireless 2100 network connection is the integrated Wireless LAN (WLAN) solution for Intel Centrino mobile technology. The Intel PRO/Wireless 2100 network connection works in concert with the other Intel Centrino mobile technology components to provide freedom and flexibility to work and play on the go without searching for a phone jack, network cable, or plugging in a special card. To access the Internet wirelessly, a laptop uses radio signals to communicate with a wireless LAN via base band circuitry, a media access controller, and a radio. A wireless LAN operates with one of two IEEE standard protocols finalized in 1997 and differing in data rate and signal frequency. The two standards are the 802.11a and 802.11b, the latter often called Wi-Fi. The 802.11a operates at 5 GHz and can transmit data at up to 54 Mb/s. The 802.11b operates at 2.4 GHz and transmits data at 11 Mb/s. A newer protocol, IEEE 802.11g, is being finalized and should be out this summer. It has the same data rate as 802.11a but operates on the same frequency as 802.11b and is compatible with it.

based upon four major categories: Security, Performance, Ease-of-use, and Verification. Security Intel Centrino mobile technology has been Intel-tested for industry standards-based WLAN security support (802.1X, WEP and WPA). Cisco Compatible Extensions (such as LEAP and CKIP) support is available on certain models. Subject to PC manufacturers availability and validation, this enables interoperability with Cisco Aironet wireless LAN infrastructure. Performance With 802.11b support and speeds up to 11Mbps, Intel PRO/Wireless 2100 network connection enables fast network connections. It includes perpacket antenna selection to enable optimized WLAN performance. Support for Intel Wireless Coexistence System helps enables reduced interference between Intel PRO/Wireless and certain Bluetooth devices. Ease-of-use Available Intel PROSet software allows for multiple profile setup and switching between profiles for simplified wireless access as you move between different access points with the advanced profile


management feature. This also allows for setting security options. Verification Intel Centrino mobile technology is verified with leading VPN infrastructure products. Intel is working with hardware and software developers and wireless service provides to deliver a reliable and integrated wireless mobile computing experience.

Intel Intelligent Scanning Technology, reduces power by controlling the frequency of scanning for access points Power Save Protocol (PSP) is a user selectable feature with five different power states, which allows the user to make their own power versus performance choice when in battery mode.

4. Key Benefits 4.1 Breakthrough Mobile Performance

Intel Centrino mobile technology is designed to meet the users needs of multitasking, constant-computing lifestyle - and to work with the performance demands of future applications. Intel Centrino mobile technology also features advanced instruction prediction to eliminate CPU process replication, and secondgeneration Streaming SIMD Extensions (Streaming SIMD Extensions 2) with instructions integrated into the software to enhance performance. With support for USB 2.0, there is an increased performance with the peripherals and backward compatibility with USB 1.0 devices.

Additional highlights of the Intel PRO/Wireless 2100 Network Connection include :

Single band support, providing the ability to connect to 802.11b networks Industry standard and extended wireless security support (WEP, 802.1X and Cisco LEAP) Available Intel PROSet software with automatic WLAN switching support enables automatic switching between wired and wireless LAN connections Available Intel PROSet software supports Cisco, CheckPoint, Microsoft and Intel VPN connections Intel Wireless Coexistence System support enables reduced interference between Intel PRO/Wireless and certain Bluetooth devices Per-packet antenna selection enables optimized WLAN performance

can serve as a basis for the development of a widely accepted industry-standard benchmark

There are no industry-standard benchmarks for determining the range and throughput of WLANs. Some would even say that there is no common vocabulary. But Intel engineers wanted tangible evidence to reinforce what they knew intuitively. They wanted proof that Intel Centrino mobile technology provides breakthrough mobile performancein terms of processor speed, battery life and throughputand an enhanced user experience overall. So Intel engineers developed a methodology for obtaining controlled, reproducible results. Intel is confident that its test results establish the breakthrough mobile performance of Intel Centrino mobile technology when considering all performance criteria (processing, battery life and wireless), and that the methodology Intel engineers used