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INTEL 8086/8088

. -

8086
8086 16-
Intel
1978 x86
.

IIntel
t l 8088 (
(
))
, 8-


8088
IBM PC.

8086


8080 8085 .

8086

8088
8085.

85-


8086
.

8086

16-

8085.

8086

:
- 20-

220

== 1 MB .

16 ,
16 .

,
.

4 16-

16

8 4 16 .

8086

64K 8-bit I/O ( 32K 16 bit)


.

.

4
1 .

8086
4 .
.

4.77 ( 8088
IBM PC), 8 MHz 10 MHz

8086

-
(-
).
)


(8288)

8085

8085

(. Intel),
.


((
).

)

8086


:
1.
2.
3.
4.

Fetch .
( )
.



(
(
).

8086/8

8086

8086/88
.
.
8086/88
:
1.
2.

(Execution Unit, EU).


(Bus
Interface Unit, BIU).


(EXECUTION UNIT,EU)

8086 8088 .

16bit (8bit
(8bit-8088)
8088)
-
(ALU)
EU (),

.

EU .

BIU.

(EXECUTION UNIT,EU)


,
EU BIU
.

BIU

EU 16bit-

,
20 1

(BUS INTERFACE UNIT,BIU)

fetch ,

BIU EU

EU , BIU

6.
BIU .
fetch 2
.

fetch 2
(16- )

(BUS INTERFACE

UNIT,BIU)

EU ,
BIU
.

, EU,
.



BIU 8086 8088,
.

8086
ES
CS
SS
DS
IP

BIU

(20 bit adder)

EU

AX
BX
CX
DX

AH
BH
CH
DH

Extra Segment
Code Segment
g
Stack Segment
Data Segment
Instruction Pointer
AL
BL
CL
DL

SP
BP
SI
DI
FLAGS

Accumulator
Base Register
Count Register
Data Register
Stack Pointer
Base Pointer
Source Index Register
Destination Index Register

8x16-

4
.

(AX, BX, CX, DX)-


8x8- .

(SP,

(SP BP) (SI,


(SI DI)DI) 1616
.

8086/88 16 BITS
AX, BX, CX DX



1 M

:
AX, BX, CX, DX


AX, BX, CX, DX


AH, BH, CH, DH
AL,
AL BL
BL, CL
CL, DL

:
AX, BX, CX, DX
AX
Accumulator
,


/
BX

Table Lookup
p

((XLAT))

:
AX, BX, CX, DX
CX
(Count register)

DX
(Data register)

8086/88
, .

64.

4 ,
.
CS(Code Segment) -

.
SS(Stack Segment) - .
DS(Data Segment)-
Segment)
.
ES(Extra Segment)-
.


Pointer and Index Registers


SP: Stack pointer


SS

BP: Base Pointer




Pointer and Index Registers
SI: Source Index register
( )
SI
DS
. , SI DS
.
DI: Destination Index register
.
DI

ES , DI ES
.
SI DI

(FLAGS)

8086/88 6x1-

EU

: TF(Trap), DF(Direction), IF(Interrupt


Enable);

: OF(Overflow), SF(Sign), ZF(Zero),


AF(AuxillaryCarry) PF(Parity),
AF(AuxillaryCarry),
PF(Parity) CF(Carry).
CF(Carry)

(flags)

Carry flag

Overflow

Parity flag

Direction
I t
Interrupt
t enable
bl

A ili
Auxiliary
flag
fl

Trap
6

Zero
Sign

(FLAGS)

() :

MPU.
.
Flag
Bit no.

15

14

13

12

11

10

A
5

P
3

C
1

CF (carry)

(fl
(flags))

OF (overflow)
.

DF (direction)
.
IF (i
(interrupt)
t
t)
.
TF (trap) single step .
,

.
.

(FLAGS)

SF (sign)
(1
(1=negative)
negative)
ZF (zero)
.
(1=yes)
AF (auxiliary carry) bit 3 bit 4
(BCD).
(BCD)
PF (parity)
( ).


(IP)

16bit

(PC)
( ) 8085.
BIU.
IP
BIU (

).
,
.


8086
40 .

8086
(MN/MX).

MN/MX GND, 8086


24 31 .

8288
S0, S1, S2

MULTIBUS .
MN/MX VCC, 8086

24 31.

8086


( )

AD15-AD0

I/O

- . 1
/IO ,
.

19/S6 A16/S3

- . 1
4 .
I/O .
T

. S5
IF ,
S6
0.


( )

BHE/S7

RD

BUS HIGH ENABLE/STATUS.


BHE T1
AD15-AD
AD8;
AD7-AD0

READ. 8086
I/O .


( )

READY

READY. ,
READY
8086
.
. 8284
.

INTR

INTERRUPT REQUEST. ,
.
()
,

TEST

TEST. WAIT
.
.


( )

NMI

NON-MASKABLE INTERRUPT.
.

RESET

RESET. PSW, IP, DS, SS, ES


. CS
FFFFh
FFFFh.

4
. ,
8086 (fetch)
.
a FFFF0h

CLK

CLOCK. duty cycle 33%.


( )

Vcc

: 5V

GND

MN/MX

MINIMUM/MAXIMUM. 0,
, .


( )

M/IO

Memory/Input-Output.
Memory/Input-Output


(M/IO=1) I/O (M/IO=0)

WR

WRITE. 0,
WRITE
0
I/O .

INTA

INTERRUPT ACKNOWLEDGE.

.
()

ALE

Address Latch Enable.


AD0-AD15
.


( )

DT/R

Data Transmit/Receive.
Transmit/Receive
( 8286/8287
)

DEN

DATA ENABLE.
ENABLE

/ .

HOLD/HLDA

I/O

HOLD. HOLD
HOLD
(DMA )
. , 8086

HLDA

( ,
). HOLD , HLDA

.


( )

QS1, QS0

QUEUE STATUS.

S2, S1, S0

STATUS. 8086
(8288)


( )

LOCK

lock
,

RQ/GT1
RQ/GT0

I/O

Bus request/Bus grant. RQ



.
GT
.

RQ/GT
Q

0
RQ/GT1.

stb
OE

T
OE

stb
OE

T
OE

:
.
.
(WR) M/IO 1.


:
.
(RD) M/IO 1.


T1:


Address/Data bus.
M/IO, ALE DT/R
/,

.
T2:

T2
8086 RD WR , DEN,

DEN /
.


T3:

READY T2.

, T3
wait
it state.
t t
,
T3.
T4:

BUS CYCLE 8086 4


(Tstates).

5MHz ( =
200ns),
),

((4*T))
800ns.

1.25MHz
1 25MHz (5MHz/4)
(5MHz/4).



((

)
.


600ns .

(setup times),
times)
Address setup data setup.
150ns.

450ns 30
30-40ns
40ns
.

420ns DRAM 8086 (2.4


(
H
Hz).
)