Digital Fundamentals

CHAPTER 5 Combinational Logic Analysis

Floyd Digital Fundamentals, 9/e

Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Slide 1

Basic Combinational Logic Circuits

Floyd Digital Fundamentals, 9/e

Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Slide 2

Basic Combinational Logic Circuits • AND-OR Logic • AND-OR-Invert Logic • Exclusive-OR Logic

Floyd Digital Fundamentals, 9/e

Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Slide 3

Basic Combinational Logic Circuits • AND-OR Logic

Floyd Digital Fundamentals, 9/e

Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Slide 4

Inc.Example 5-1 Floyd Digital Fundamentals. Upper Saddle River. 9/e Copyright ©2006 by Pearson Education. Slide 5 . New Jersey 07458 All rights reserved.

Upper Saddle River. . New Jersey 07458 All rights reserved.Basic Combinational Logic Circuits Combinational Logic Circuits In Sum-of-Products (SOP) form. . basic combinational circuits can be directly implemented with AND-OR combinations if the necessary complement terms are available. Product terms A B C D J K AB CD AB + CD + . 9/e Copyright ©2006 by Pearson Education. + JK Sum-of-products JK Product term Floyd Digital Fundamentals. Inc. Slide 6 .

The SOP expression is an AND-OR combination of the input variables and the appropriate complements. A B C D E DE ABC X = ABC + DE SOP Floyd Digital Fundamentals. New Jersey 07458 All rights reserved. Upper Saddle River.Basic Combinational Logic Circuits Combinational Logic Circuits An example of an SOP implementation is shown. 9/e Copyright ©2006 by Pearson Education. Inc. Slide 7 .

Inc. New Jersey 07458 All rights reserved. The AOI configuration lends itself to product-of-sums (POS) implementation. the circuit is called an AND-OR-Invert circuit. Floyd Digital Fundamentals.Basic Combinational Logic Circuits Combinational Logic Circuits When the output of a SOP form is inverted. 9/e Slide 8 . A B C D E DE ABC X = ABC + DE X = ABC + DE AOI X = (ABC)(DE) DeMorgan X = (A + B + C)(D + E) POS Copyright ©2006 by Pearson Education. The output expression can be changed to a POS expression by applying DeMorgan’s theorem twice. An example of an AOI implementation is shown. Upper Saddle River.

9/e Copyright ©2006 by Pearson Education. Slide 9 .Basic Combinational Logic Circuits • AND-OR Invert Logic Floyd Digital Fundamentals. Inc. New Jersey 07458 All rights reserved. Upper Saddle River.

New Jersey 07458 All rights reserved. 9/e Copyright ©2006 by Pearson Education. Inc. Upper Saddle River. Slide 10 .Example 5-2 Floyd Digital Fundamentals.

Upper Saddle River. New Jersey 07458 All rights reserved. Inc. Slide 11 . The Boolean expression is X = AB + AB The circuit can be drawn as A A 0 0 1 1 B 0 1 0 1 X 0 1 1 0 Symbols: X Distinctive shape =1 Rectangular outline B Floyd Digital Fundamentals.Exclusive-OR Logic Inputs Output The truth table for an exclusive-OR gate is Notice that the output is HIGH whenever A and B disagree. 9/e Copyright ©2006 by Pearson Education.

Inc. New Jersey 07458 All rights reserved. 9/e Copyright ©2006 by Pearson Education. Slide 12 . Upper Saddle River.Basic Combinational Logic Circuits • Exclusive-OR Logic Floyd Digital Fundamentals.

9/e Copyright ©2006 by Pearson Education.Exclusive-NOR Logic Exclusive-NOR Logic Inputs Output The truth table for an exclusive-NOR gate is Notice that the output is HIGH whenever A and B agree. The Boolean expression is X = AB + AB The circuit can be drawn as A X B A 0 0 1 1 B 0 1 0 1 X 1 0 0 1 Symbols: =1 Distinctive shape Rectangular outline Floyd Digital Fundamentals. Upper Saddle River. Slide 13 . Inc. New Jersey 07458 All rights reserved.

Exclusive-NOR Logic Floyd Digital Fundamentals. Inc. Slide 14 . Upper Saddle River. 9/e Copyright ©2006 by Pearson Education. New Jersey 07458 All rights reserved.

New Jersey 07458 All rights reserved.Implementing Combinational Logic Floyd Digital Fundamentals. Slide 15 . Upper Saddle River. 9/e Copyright ©2006 by Pearson Education. Inc.

Floyd Digital Fundamentals. create a logic circuit that implements that table. 9/e Copyright ©2006 by Pearson Education.Implementing Combinational Logic • From Boolean expression to logic circuit – Given a Boolean expression. Inc. Upper Saddle River. create a logic circuit that implements that expression. Slide 16 . • From truth table to logic circuit – Given a truth table. New Jersey 07458 All rights reserved.

Upper Saddle River. LED is ON.For each circuit. Circuit (c): XOR. determine if the LED should be on or off.0 V +5.0 V 330  +5. 9/e Copyright ©2006 by Pearson Education.0 V 330  +5. inputs disagree.0 V +5. Circuit (b): XNOR. output is LOW. output is LOW.0 V 330  B A LED B A LED B A LED (a) (b) (c) Circuit (a): XOR. Floyd Digital Fundamentals. Inc. inputs disagree. New Jersey 07458 All rights reserved. LED is ON. inputs agree.0 V +5. +5. LED is OFF. output is HIGH. Slide 17 .

Upper Saddle River. then the terms are ORed together. Then combine the three terms using a 3-input OR gate. Slide 18 . Show the circuit that will implement the Boolean expression X = ABC + ABD + BDE.Implementing Combinational Logic Implementing an SOP expression is done by first forming the AND terms. A B C A B D B D E Floyd Digital Fundamentals. (Assume that the variables and their complements are available.) Start by forming the terms using three 3-input AND gates. 9/e X = ABC + ABD + BDE Copyright ©2006 by Pearson Education. New Jersey 07458 All rights reserved. Inc.

Inc. 3. New Jersey 07458 All rights reserved. Read each group by eliminating any variable that changes across a boundary. Floyd Digital Fundamentals. The vertical group is read AC. Upper Saddle River. Read the minimum SOP expression and draw the circuit. 2.Karnaugh Map Implementation For basic combinational logic circuits. A Karnaugh map is drawn from a truth table. The circuit is on the next slide: Copyright ©2006 by Pearson Education. The horizontal group is read AB. C AB 1 1 1 C B changes across this boundary AB AB AB 1. 9/e C changes across this boundary Slide 19 . 4. Group the 1’s into two overlapping groups as indicated. the Karnaugh map can be read and the circuit drawn as a minimum SOP.

Upper Saddle River.continued… Circuit: A C A B X= AC + AB The result is shown as a sum of products. It is a simple matter to implement this form using only NAND gates as shown in the text and following example. Slide 20 . New Jersey 07458 All rights reserved. Floyd Digital Fundamentals. Inc. 9/e Copyright ©2006 by Pearson Education.

New Jersey 07458 Education.From Truth Table to Combination Circuits Floyd Thomas L. Inc. Floyd Digital Fundamentals. Copyright ©2006 by Pearson Upper Saddle River. New Jersey 07458 All All rights reserved.rights reserved. Inc. 9e Copyright ©2006 by Pearson Education. Slide 21 . Upper Saddle River. 9/e Digital Fundamentals.

Inc. 9e Copyright ©2006 by Pearson Education. Upper Saddle River. Slide 22 . Copyright ©2006 by Pearson Upper Saddle River. Inc.From Truth Table to Combination Circuits Floyd Thomas L. New Jersey 07458 Education.rights reserved. Floyd Digital Fundamentals. 9/e Digital Fundamentals. New Jersey 07458 All All rights reserved.

New Jersey 07458 All rights reserved. 9/e Copyright ©2006 by Pearson Education.Quiz: Please verify the equivalence of the circuits below (a) by Boolean Algebra (b) K-map Floyd Digital Fundamentals. Inc. Slide 23 . Upper Saddle River.

Inc.The Universal Property of NAND and NOR Gates NAND and NOR gates are “universal” because they can used to produce any of the other logic functions. New Jersey 07458 All rights reserved. Slide 24 . 9/e Copyright ©2006 by Pearson Education. Upper Saddle River. Floyd Digital Fundamentals.

Slide 25 . A Inverter A A+B B OR gate B NOR gate A A+B A A B AND gate AB Floyd Digital Fundamentals. Inc. New Jersey 07458 All rights reserved. Upper Saddle River.The Universal Property of NAND Gates NAND gates are sometimes called universal gates because they can be used to produce the other basic Boolean functions. 9/e Copyright ©2006 by Pearson Education.

9/e Copyright ©2006 by Pearson Education.The Universal Property of NAND Gates • NAND Gate as an Inverter Floyd Digital Fundamentals. Upper Saddle River. New Jersey 07458 All rights reserved. Inc. Slide 26 .

Slide 27 . New Jersey 07458 All rights reserved. Upper Saddle River. Inc. 9/e Copyright ©2006 by Pearson Education.The Universal Property of NAND Gates • Two NAND Gates as an AND Gate Floyd Digital Fundamentals.

Inc. 9/e Copyright ©2006 by Pearson Education. New Jersey 07458 All rights reserved.The Universal Property of NAND Gates • Three NAND Gates as an OR Gate Floyd Digital Fundamentals. Slide 28 . Upper Saddle River.

The Universal Property of NAND Gates • Four NAND Gates as OR Gate Floyd Digital Fundamentals. 9/e Copyright ©2006 by Pearson Education. New Jersey 07458 All rights reserved. Inc. Slide 29 . Upper Saddle River.

The Universal Property of NOR Gates NOR gates are also universal gates and can form all of the basic gates. Slide 30 . Upper Saddle River. 9/e Copyright ©2006 by Pearson Education. A Inverter A AB B AND gate B NAND gate A AB A A B OR gate A+ B Floyd Digital Fundamentals. Inc. New Jersey 07458 All rights reserved.

9/e Copyright ©2006 by Pearson Education. Upper Saddle River.The Universal Property of NOR Gates • NOR Gate as an Inverter Floyd Digital Fundamentals. New Jersey 07458 All rights reserved. Inc. Slide 31 .

Upper Saddle River. Slide 32 .The Universal Property of NOR Gates • Two NOR Gates as an OR Gate Floyd Digital Fundamentals. New Jersey 07458 All rights reserved. Inc. 9/e Copyright ©2006 by Pearson Education.

Inc. Upper Saddle River.The Universal Property of NOR Gates • Three NOR Gates as an AND Gate Floyd Digital Fundamentals. New Jersey 07458 All rights reserved. Slide 33 . 9/e Copyright ©2006 by Pearson Education.

Inc. Slide 34 . 9/e Copyright ©2006 by Pearson Education. New Jersey 07458 All rights reserved.The Universal Property of NOR Gates • Four NOR Gates as an AND Gate Floyd Digital Fundamentals. Upper Saddle River.

DeMorgan’s theorem can be written as A + B = AB. the logic is easy to read if you cancel the two connected bubbles on a line. 9/e Copyright ©2006 by Pearson Education. By using equivalent symbols. Upper Saddle River. Floyd Digital Fundamentals. Inc.Combinational Circuit Using NAND and NOR Gates Alternatively. A B A C X = (A + B)(A + C) Again. it is simpler to read the logic of POS forms. For example. New Jersey 07458 All rights reserved. Slide 35 .

NAND/NOR logic Diagram Using Dual Symbol • NAND symbol and Negative-OR symbol called Dual symbol • NOR symbol and Negative-AND symbol called Dual symbol • Every connections between input and output either bubble-to-bubble or nonbubble-to-nonbubble Floyd Digital Fundamentals. Upper Saddle River. Inc. Slide 36 . New Jersey 07458 All rights reserved. 9/e Copyright ©2006 by Pearson Education.

Floyd Thomas L. Slide 37 .Development of the AND-OR equivalent.rights reserved. Copyright ©2006 by Pearson Upper Saddle River. Inc. New Jersey 07458 Education. Inc. Floyd Digital Fundamentals. Upper Saddle River. 9/e Digital Fundamentals. 9e Copyright ©2006 by Pearson Education. New Jersey 07458 All All rights reserved.

Upper Saddle River. New Jersey 07458 Education. New Jersey 07458 All All rights reserved. Slide 38 . Inc. 9e Copyright ©2006 by Pearson Education. Inc. Floyd Digital Fundamentals. 9/e Digital Fundamentals. Copyright ©2006 by Pearson Upper Saddle River.rights reserved.Illustration of the use of the appropriate dual symbols in a NAND logic diagram . Floyd Thomas L.

rights reserved. Inc. Copyright ©2006 by Pearson Upper Saddle River. 9e Copyright ©2006 by Pearson Education. New Jersey 07458 All All rights reserved. 9/e Digital Fundamentals. Slide 39 .Example 5-7 Floyd Thomas L. Floyd Digital Fundamentals. New Jersey 07458 Education. Upper Saddle River. Inc.

ABC+D’+C’) Floyd Thomas L. 9e Copyright ©2006 by Pearson Education. Inc. Floyd Digital Fundamentals. New Jersey 07458 All All rights reserved. New Jersey 07458 Education. (ABC + DE) 2. Upper Saddle River. Slide 40 . 9/e Digital Fundamentals. Inc.rights reserved. Copyright ©2006 by Pearson Upper Saddle River.Using NAND Gates to implement 1.

Slide 41 . 9e Copyright ©2006 by Pearson Education. Upper Saddle River. Copyright ©2006 by Pearson Upper Saddle River. Inc. Inc. Floyd Digital Fundamentals.NOR logic for X = (A + B)(C + D). New Jersey 07458 Education. 9/e Digital Fundamentals.rights reserved. New Jersey 07458 All All rights reserved. Floyd Thomas L.

Inc. 9e Copyright ©2006 by Pearson Education. Inc.rights reserved. Slide 42 . Upper Saddle River. Copyright ©2006 by Pearson Upper Saddle River. Floyd Digital Fundamentals. New Jersey 07458 All All rights reserved. New Jersey 07458 Education. 9/e Digital Fundamentals.Figure 5–25 Floyd Thomas L.

Inc. 9/e Digital Fundamentals. New Jersey 07458 All All rights reserved. Floyd Thomas L. Inc. 9e Copyright ©2006 by Pearson Education. Slide 43 . New Jersey 07458 Education. Copyright ©2006 by Pearson Upper Saddle River. Upper Saddle River. Floyd Digital Fundamentals.Use of the appropriate dual symbols in a NOR logic diagram.rights reserved.

Slide 44 . Inc. 9e Copyright ©2006 by Pearson Education. Floyd Digital Fundamentals. New Jersey 07458 All All rights reserved. 9/e Digital Fundamentals. Upper Saddle River.rights reserved.Use of the appropriate dual symbols in a NOR logic diagram Floyd Thomas L. New Jersey 07458 Education. Copyright ©2006 by Pearson Upper Saddle River. Inc.

New Jersey 07458 All rights reserved.Pulsed Waveforms For combinational circuits with pulsed inputs. 9/e Copyright ©2006 by Pearson Education. the circuit shown can be analyzed at the outputs of the OR gates: A B C D G1 G2 G3 Floyd Digital Fundamentals. Upper Saddle River. For example. A B C D G1 G3 G2 Slide 45 . Inc. the output can be predicted by developing intermediate outputs and combining the result.

New Jersey 07458 All rights reserved.Pulsed Waveforms Alternatively. Inc. A B C D A B C D G3 Floyd Digital Fundamentals. Slide 46 . you can develop the truth table for the circuit and enter 0’s and 1’s on the waveforms. Upper Saddle River. 9/e Inputs A B C D 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Output X 0 1 1 1 0 1 1 1 0 0 0 0 0 1 1 1 G1 G3 G2 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 1 1 0 1 1 1 0 1 1 0 0 1 0 0 0 0 0 0 1 1 0 1 1 0 1 0 Copyright ©2006 by Pearson Education. Then read the output from the table.

Upper Saddle River. Inc. Negative-OR The dual operation of a NAND gate when the inputs are active-LOW. Floyd Digital Fundamentals. New Jersey 07458 All rights reserved. Negative-AND The dual operation of a NOR gate when the inputs are active-LOW. 9/e Copyright ©2006 by Pearson Education. Slide 47 . The term universal refers to a property of a gate that permits any logic function to be implemented by that gate or by a combination of gates of that kind.Selected Key Terms Universal gate Either a NAND or a NOR gate.

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