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IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, VOL. 5, NO.

1, FEBRUARY 2011

39

A 2.4-GHz Energy-Efficient Transmitter for Wireless Medical Applications
Qi Zhang, Student Member, IEEE, Peng Feng, Student Member, IEEE, Zhiqing Geng, Xiaozhou Yan, and Nanjian Wu, Member, IEEE

Abstract—A 2.4-GHz energy-efficient transmitter (TX) for wireless medical applications is presented in this paper. It consists of four blocks: a phase-locked loop (PLL) synthesizer with a direct frequency presetting technique, a class-B power amplifier, a digital processor, and nonvolatile memory (NVM). The frequency presetting technique can accurately preset the carrier frequency of the voltage-controlled oscillator and reduce the lock-in time of the PLL synthesizer, further increasing the data rate of communication with low power consumption. The digital processor automatically compensates preset frequency variation with process, voltage, and temperature. The NVM stores the presetting signals and calibration data so that the TX can avoid the repetitive calibration process and save the energy in practical applications. The design is implemented in 0.18- m radio-frequency complementary metal–oxide semiconductor process and the active area is 1.3 mm2 . The TX achieves 0-dBm output power with a maximum data rate of 4 Mb/s/2 Mb/s and dissipates 2.7-mA/5.4-mA current from a 1.8-V power supply for ON-OFF keying/frequency-shift keying modulation, respectively. The corresponding energy efficiency is 1.2 nJ/b mW and 4.8 nJ/b mW when normalized to the transmitting power. Index Terms—Autocalibration, energy efficient, frequency presetting technique, nonvolatile memory (NVM).

Fig. 1. System diagram of typical WBSN applications.

I. INTRODUCTION REMENDOUS advances have been achieved in many areas with the development of wireless communication techniques in the past few years. Recently, many medical systems based on wireless communication techniques have been developed to improve human health, such as wireless body sensor networks (WBSNs) [1]–[8]. Fig. 1 shows some typical applications in WBSN. First, the human body worn sensor nodes are used to monitor vital signs, such as temperature, heart rate, and electrocardiogram (ECG) in WBSN. In addition, the function of the sensor nodes can be expanded to medical treatments, such as drug delivery and nerve stimulation. After the biomedical information acquisition, the signal will be preprocessed and stored. Next, the information
Manuscript received March 13, 2010; revised May 25, 2010 and June 20, 2010; accepted July 31, 2010. Date of publication September 13, 2010; date of current version January 26, 2011. This work was supported in part by Chinese National High-tech Researching and Development Projection under Grant Nos. 2008AA010703 and 2009AA011606, and in part by the National Natural Science Foundation of China under Grant 60976023. This paper was recommended by Associate Editor A. Bermak. The authors are with the Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China (e-mail: zhangqi06@semi.ac.cn; nanjian@red. semi.ac.cn). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TBCAS.2010.2064772

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will be transmitted by the RF transceiver to the portable base station. The sensor nodes also receive some control commands from the base station remotely. Finally, the biomedical information is sent to the health-care center for further diagnosis. As known to all, the RF transceiver plays an important role in the wireless medical system. Compared to the conventional RF transceiver, the transceiver in medical sensor nodes has more stringent constraints in terms of power consumption and size limitations. In particular, the TX should be ultra low consumption in order to operate as long as possible with a limited supply of energy. It is mainly studied in this paper. Great improvement has been achieved in low-power OOK/FSK transmitter designs for WMA [1]–[8]. However, the energy efficiency is still the most important and challenging issue for the TX design for WMA to enable long operation time. In the literature, [1] and [5], the TX is realized in mixer-based frequency upconversion architecture, but the energy efficiency for this architecture is usually low due to the power hungry mixer and digital-to-analog converter (DAC). In [6] and [7], the VCO direct modulation architecture is adopted. Generally speaking, the direct modulation topology can achieve a high data rate and normally consumes less power. However, the VCO carrier frequency is unlocked and the close-in phase noise cannot be suppressed by the loop. In practice, the open-loop topology requires periodic relocking of the VCO frequency, thus making continuous operation difficult. In the design [4], the TX is realized in the phase-locked loop (PLL)-based architecture. The PLL-based topology can improve the communication quality because the VCO is always locked by the

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When the calibration process is finished. In particular.power nonvolatile memory (NVM) based on a standard complementary metal–oxide semiconductor (CMOS) process is integrated in the TX to store the presetting signals and calibration data obtained in the chip testing process. Section V is the conclusion. NO. the TX transmits the sampled information to the external base station. 4) a mixedsignal LC-tank VCO. 2) a charge pump (CP). The measurement results will be shown in Section IV. This avoids the repetitive calibration process and saves the power consumption in practical applications. PFD uses a three-state phase/frequency detection scheme. Four inverters are inserted in the reset path as the delay cell to avoid the dead-zone problem. The CP is based on low-power source switch topology. In practical applications. Finally. but the transistors in PA are biased around the threshold voltage to achieve high efficiency. Some complementary switches are adopted to reduce the rising time and falling time of the PA. Transmitter Architecture Fig. The divider is a conventional one that consists of a dual-modulus prescaler (DMP) and a pulse-swallow counter. it first performs frequency autocalibration. The class-B PA is also adopted to save the energy for transmitting. 1. and 5) a programmable divider. the processor receives a baseband signal from the baseband processor and for the VCO and PA and generates the signal to perform OOK/FSK modulation. The operation flow of the TX is described as follows. a digital processor. The LPF is a second order on-chip RC filter. In this paper. This avoids the repetitive calibration process and saves the power consumption in practical applications. TRANSMITTER ARCHITECTURE A. Its oscillation frequency is determined accurately by the output signals C[n:0] and P[m:0] of the digital processor and is tuned finely by the output signal of a lowpass filter (LPF) through the presetting module. The frequency presetting can directly preset the frequency of VCO with small initial frequency error and avoid the tradeoff between the lock-in time and the phase noise or spurs. The class B amplifier looks like a CMOS inverter. The PLL frequency synthesizer is mainly composed of five main blocks: 1) a phase-frequency detector (PFD). II. A digital processor is designed to control the operation mode of TX and to preset the PLL or VCO output frequency. First. the processor measures the output frequency of DMP and calibrates the relation between the VCO output frequency and the digital presetting signals C[n:0] and P[m:0] automatiis set to VDD/2. When the TX starts up or receives a reset signal for the first time. The TX combines the VCO direct modulation mode and the PLL-based mode to make good use of their advantages. 2. the data rate is limited by the loop bandwidth in this topology. the TX can achieve OOK/FSK modulation with a high data rate in a high energy efficiency way. the data rate of the PLL-based mode can be increased by the frequency presetting technique proposed by our lab without increasing the loop bandwidth [10]. low hardware complexity ON-OFF keying/frequency-shift keying (OOK/FSK) modulation scheme is adopted in the design. The ultra-low-power NVM integrated in the TX is based on FN tunneling phenomenon with extremely low current density. The digital processor can perform the following operations. In Section II. As a result. The frequency presetting technique can accurately preset the frequency of VCO with a small initial frequency error and reduce the lock-in time directly so that the frequency switching speed and the data rate of the TX can be increased greatly with low power consumption. The PA is a push-pull class-B buffer amplifier with little dc power consumption. A low-power. The Fig. Section III describes the details of design and implementation. the presetting signals and calibration data obtained will be stored into the NVM. we will give the architecture of the proposed TX. compact. The technique can reduce the lock-in time and increase the frequency switching speed greatly so that the data rate of the TX can be increased with low power consumption. ultra-low. Then. However. The buffer amplifier is selfbiased to reduce the second-order harmonic. the processor can accurately preset the output frequency of the VCO by the presetting signals C[n:0] and P[m:0] so that the frequency of the PLL synthesizer can be rapidly switched. Furthermore. VOL. The digital processor measures the output frequency of VCO and calibrates the relation between the output frequency and the presetting digital signals C and P automatically. 3) a second-order loop filter (LPF). a 2. and low-power portable base station which makes the medical monitoring available anytime and anywhere. and NVM. The VCO is a novel mixed-signal LC-tank VCO as it contains a presetting module. 5. it stores the calibration cally when data into the NVM.40 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS. It consists of a class B amplifier and a buffer amplifier. The digital processor reads . The TX mainly consists of four blocks: a PLL frequency synthesizer with frequency presetting function. Next. a class-B power amplifier (PA). FEBRUARY 2011 PLL. They are also suitable for the design of a smart. respectively. The TX can operate in two modes: 1) PLL-based mode and 2) VCO direct modulation mode with OOK/FSK modulation. It can generate and for frequency calibration and two frequency signals PFD. Architecture of the proposed transmitter. Furthermore. It stores the control signals and calibration parameters obtained in the chip testing process. 2 shows a block diagram of the proposed TX.4-GHz energy efficient TX for medical sensor nodes is proposed.

The frequency presetting technique is to preset the frequency of the VCO to the target frequency with a small initial frequency error by presetting the signals of the digital processor. the synthesizer can settle down in a very short time. we select a large inductor L with a high Q value to increase the loop gain of VCO. In the VCO direct modulation is biased to VDD/2. C. Therefore. DESIGN AND IMPLEMENTATION OF TRANSMITTER A. The digital signal C[5:0] controls the presetting module with the output signal of LPF to produce a VCO control signal . Fig. 3(a) and (b). the temperature of the human body is almost constant. The oscillation frequency of the mixed-signal VCO can be preset accurately by the digital signal and finely tuned by the output signal of the LPF in the PLL loop. The typical EEPROM or FLASH memory requires additional masks so that even a small size of embedded memory brings additional cost for the entire system. the lock-in time can be shortened as long as the initial frequency error can be reduced. Its lock-in time almost does not depend on frequency step. In order to reduce the frequency error. these kinds of memories usually consume a lot of power. The mechanism where the frequency presetting method reduces the lock-in time of the synthesizer significantly is as follows. Since the lock-in time depends on the magnitude of the initial frequency error. Frequency Presetting Method The precision of the VCO output frequency and the lock-in time of PLL are important issues in VCO direct modulation mode and PLL-based mode. and MP11 transistors constitute . and natural frequency of the PLL loop. B. is almost constant and equal to VDD/2. and temperature. MP3 . Furthermore. process variation. In the mode. and a source follower. The digital signal P[3:0] is adopted to control capacitance of the LC tank and generate 16 overlapped discrete tuning curves to increase the desired frequency tuning range and lower VCO gain [12]. respectively. Mixed-signal VCO with a presetting module. respectively. The LC-tank VCO adopts complementary-type PMOS and NMOS to reduce the current needed for oscillation. Nonvolatile Memory For the medical application. Low-Power Mixed-Signal LC-Tank VCO Fig. after the output frequency of VCO is preset with a very small initial frequency error. the PLL loop is cut off and PLL-based mode. 4 shows the measured and simulated dependence of the VCO output fre0. a novel mixed-signal LC-tank VCO is designed. resistors. is the damping factor. 3 shows the proposed mixed-signal VCO. 3. it is suitable for the ultra-low-power medical application. III. It consists of an LC-tank VCO and a presetting module. as shown in Fig. In our dethe VCO. quency on the presetting signals P and C at The presetting module is a mixed-signal circuit. (a) Top architecture. switches. The signal sign. So the frequency calibration just needs to be done once after the chip is worn or implanted. It consists of a series of parallel current sources. MP1.: A 2. The frequency presetting technique proposed by our group [10] can be used to overcome the difficulties. (1) is the acceptable frequency error. an ultra-low-power NVM with a high efficiency charge pump circuit was designed by our lab [11]. The digital processor generates two terms of digital signals C and P to control the output frequency of VCO. Smaller will benefit phase noise performance and it also improves the resolution of frequency presetting.ZHANG et al. device parasitic effect. And the supply voltage is unchanged due to the on-chip voltage regulator. The NVM can store the presetting signals and calibration parameters when powered down so that the repetitive calibration process is avoided and the power consumption is saved in practical applications. OOK modulation can be achieved by switching the control signal and directly by the baseband data while FSK modulation can be realized by changing two different groups of presetting signals C[n:0]. Therefore. the signals C and P can accurately preset the output frequency of finely tunes the frequency. The lock-in time of the frequency synthesizer is defined as Fig. the output voltage of the LPF precisely tunes the frequency of the VCO. The memory can be integrated in a standard CMOS process and it is based on FN tunneling phenomenon with extremely small current density. In order to reduce power consumption. Thus. is the The factor is the initial frequency error. P[m:0] of VCO and divide ratio N[j:0] of DMP. Recently.4 GHz ENERGY-EFFICIENT TRANSMITTER FOR WIRELESS MEDICAL APPLICATIONS 41 the required presetting signals C and P from the NVM directly to preset the frequency of the VCO.9 V. (b) Presetting module.

Fig. the dependence of the VCO presetting frequency on the signal C under different P signals is automatically measured by the frequency sampler.9 V. five points are sampled. The by the switches MP2. the PLL is opened by the switch S and the input of VCO is biased to of the VCO is divided 0.9 V. 3. the processor produces the measured data to form a fitting curve by the linear interpolation module. The value of resistor R is tuned by the 3-b digital signal RES_SEL[2:0] to make the presetting frequency more accurate. and MP12. a series of current sources with a different ratio of their currents: 2n ( 1. When a digital signal C[5:0] is inputted into the presetting module. FEBRUARY 2011 B. Frequency Autocalibration Fig. 2. the sampling points Si are shown in Fig. the module produces the voltage by the source follower. Output frequency Fo versus presetting signal C[5:0]. where and are sam(due to the sampling pling errors and with a 1-MHz reference clock). VOL. Then. respectively. which is 1 MHz. But the measured result shows that the dependence of the VCO presetting frequency on signal C deviated from the simulation result due to process variation and the device parasitic effect. The frequencies obtained by sampling at the points and are and . as shown in Fig. 5 shows the measured results of the transfer characteristics of the proposed VCO with a different frequency presetting signal C when the signal P[3:0] is set to “0100. And the output signal tunes the frequency of the VCO by adjusting the current through MP13. After this operation. respectively. The Monte Carlo simulations are used to guarantee that the frequency error can always be below the least-significant bit (LSB) of the C code settings across process and temperature. MP4 linearity between the VCO frequency and the presetting signal C[5:0] code can be ensured by carefully matching the design of the current sources.9 V. For example. the digital processor can automatically calibrate the relation between the presetting frequency and the signals C and P in the calibration mode by the following algorithm. The calibration algorithm is based on a frequency sampling and linear interpolation. 4. And by the DMP to generate the signal the will be sampled by the digital processor with the reference clock. 5.” The is about 25 MHz/V near the 0. First. NO. In practical applications. The error of the frequency calibration mainly results from the error of the frequency sampling and linear interpolation by the digital method. We assume that the is between the actual frequencies and target frequency at the sampled points and . 4. The fitting curve will be stored into the NVM. 5. respectively. The simulated on the presetting signals C and P at result shows the good linear relation between the presetting frequency and the signal C under three P signals. For every P signal. 5. the output frequency around 80 MHz. respectively. 1. respecerror) for target frequency are noted as tively. They can be expressed according to linear interpolation in Fig. 4. 6). Fig. Next. The 6-b frequency presetting digital signal C[5:0] controls the current sources on/off . Furthermore. Then. 4 shows the dependence of the VCO presetting frequency 0. we can obtain (4) .42 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS. the calculated signal C and the calibrated frequency (including and . measured (2) (3) Combining (2) and (3). the TX can be remotely controlled to perform the calibration process again in case the supply voltage and temperature changed. the value of signals C and P for the target frequency can be calculated from this fitting curve. 2. Thus. especially the layout design. The idea of calibrating the switched capacitors to achieve the reduced initial frequency offset is proposed in [13]. The signals C corresponding to points and are and . consisting of MP14 and MP15 to preset the frequency of the VCO with a small freof the LPF accurately quency error. The calibration resolution with 1-MHz reference frequency is discussed as follows. Transfer characteristics of the proposed VCO.

Measured calibrated frequency. In order to reduce rising time and falling time of the transmitter.6 MHz. 6. Here. The energy efficiency of the PA is about 27. The complementary ac-coupled NMOS/PMOS approach was used in the preamplifier portion of the PA in [14]. L1 is the interstage matching inductor between the buffer and PA. This is enough for the PLL-based operation mode since the typical lock-in time is several microseconds. Ultra-Low-Power Nonvolatile Memory The NVM proposed in this paper is based on FN tunneling phenomenon with extremely small current density. C2.ZHANG et al. M6 Fig. and C3 are dc-block capacitors.: A 2. which is shown in Fig. we obtain . The PA output power is proportional to the square of the current .4 GHz ENERGY-EFFICIENT TRANSMITTER FOR WIRELESS MEDICAL APPLICATIONS 43 Fig. An off-chip L-type matching network is adopted for its high Q inductor. The buffer amplifier that mainly consists of transistor M3 and M4 is self-biased to reduce the second-order harmonic. which is shown in Fig. D. 6. complementary switches M5. M8 are adopted. which cannot be afforded in the medical application. the drive stage usually consumes a lot of power to make the output stage switching lossless. such as operation mode. The measurement results indicated that the probability that (4) has a maximum and minimum value is very small. Capacitors C1. 7. Fig.8% under the 1. The measured results show that the PA output power is about 1. And it is also enough for the VCO direct modulation mode because the frequency error can be allowed by the input bandwidth of the commonly used receiver. It is used to store the frequency presetting signals C and P after calibration and the parameters of the TX. the class B PA with a simple matching network and reduced output power is adopted in the design. It is fully compatible with the standard CMOS process.antenna. And the error can also be significantly reduced if the reference clock is first divided and used for frequency detection during the calibration process. Schematic of the PA. M1 and M2 are biased in the subthreshold region to achieve high energy efficiency with little dc power.8-V supply voltage. And the PA drain efficiency is defined in Efficiency (5) Fig. The saturation ac current of the PA is a function of the target output power and the supply voltage. But they all increase the energy for calibration. Output power and efficiency of the PA. 8 shows the simulated and measured PA efficiency and PA output power with a 50. However. it can be used as the last stage in our PA due to the reduced output-power levels required by the application. However. C. Therefore. 7.5 dB lower than the simulated results. which is mainly due to the parasitical effect of the bonding wire and printed-circuit board (PCB). Class B Power Amplifier The class E PA is more widely used for improved efficiency over other linear-mode PAs. 8. and M7. The PA is a push-pull class B buffer amplifier that mainly consists of transistor M1 and M2. It can be proved that (4) has the maximum value when and it has the minimum value when . And the output matching network is relatively complex. which means the resolution of the calibration is 1 MHz. The measured error between target frequency and actual frequency of VCO of this calibration algorithm is within 0. modulation . Higher frequency resolution could be achieved by longer counting time.

IV. 11. 11. The mixed-signal VCO covers frequencies ranging from 2. 9. Its power consumption is 4 A (10 A) at the read (write) rate of 1.3 mm . The measured results indicate that the memory can operate well under a wide supply voltage and clock frequency range. FEBRUARY 2011 Fig. Measured typical frequency-hopping characteristics of PLL. The chip active area is 1. The bit-line controller controls the writing operation of the NV memory.18.6 MHz. respectively. The die micrograph of the proposed TX is presented in Fig. 4. as shown in Fig. The lock-in time is less than 3 s.59 GHz. The reference frequency and loop bandwidth of PLL are 1 MHz and 80 kHz. etc.8 kb/s) with the clock frequency of 1 MHz. The architecture of the NVM is shown in Fig. 10. 12. and process variation. respectively. 1. which is much shorter than that of the conventional PLL. 12. The results demonstrated that the frequency presetting technique could accurately preset the output frequency of VCO and reduce the lock-in time of the PLL. a column decoder. Fig. The maximum . The implementation method of the circuits is discussed in the literature [11].03 to 2. scheme. Die micrograph of the chip. NO. The column decoder selects the active column. The figure shows typical frequency hopping characteristics of the synthesizer at 250 s.44 IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS.m RF CMOS process with a 1.3 Mb/s (0.8-V power supply. Architecture of the NVM.428 GHz at 250 s. An ultra-low-power 192-b NVM memory was also implemented. a bit-line controller. 5. MEASURED RESULTS The design is implemented in the 1P6M. The spectrum of the modulated signal with a data rate of 4 Mb/s was measured at a carrier frequency of around 2. 13. the maximum data rate for OOK modulation could achieve the data rate of 4 Mb/s. In the PLL-based mode and VCO direct modulation mode. to save the power consumption and enhance the versatility. and a charge pump. The lock-in time almost did not depend on frequency step. The dependence of the VCO output frequency on the presetting signals C and P is shown in Fig. Fig. Measured phase noise of the PLL. it is 102 dBc/Hz at 1-MHz offset and 117 dBc/Hz at 3-MHz offset. carrier frequency. The resolution of the presetting frequency was within 0. Fig. The charge pump generates high voltage and MV in writing operation. temperature. frequency deviation. The measured PLL lock-in time is shown in Fig. The measured PLL phase noise is shown in Fig. 9. 10.41 to 2. The measured output spectrum of the transmitter with OOK modulation is shown in Fig. The dependence of the frequency on time shows that the frequency hopped rapidly from 2. VOL. 0. The sense amplifiers detect the outputs of the active-column cells in reading operation. It consists of an NV cell array. a sense amplifier column. 6.4 GHz.

The performance comparison with other designs is shown in Table II.8 for OOK/FSK modulation with the data rate of 4 Mb/s/2 Mb/s. The power consumption of the transmitter in the PLL-based mode is larger than in VCO direct modulation mode.4 GHz ENERGY-EFFICIENT TRANSMITTER FOR WIRELESS MEDICAL APPLICATIONS 45 Fig. . 14(a). TABLE I MEASURED CHIP PERFORMANCE Power consumption Data rate (6) According to (6). Spectrum of the OOK modulated signal at 2. the optimum energy efficiency of TX is 1. The spectrum was measured so that the transmitting data rate was 200 kb/s with 1-MHz frequency deviation. This signal quality is adequate for typical FSK demodulators to satisfy a bit-error rate (BER) of better than 10 .7 mA for OOK modulation and 5. data rate for OOK modulation is limited to the startup time of VCO and PA. With a 1. frequency deviation. The measured spectrum of the FSK modulation signal for the PLL-based mode is shown in Fig. the proposed TX has more flexibility in terms of programmability and multi modulation schemes since those transmitters can generate only one frequency fixed by the physical dimensions of a microelectromechanical-system (MEMS) device and are unsuitable for frequency-shift keying (FSK) modulation. 13. To take into account the TX output power. Measured 200-kb/s FSK modulation characteristics.4 mA for FSK modulation. In VCO direct modulation mode. which is equivalent to 23-dB SNR. the maximum data rate is 2 Mb/s with 10-MHz frequency deviation.8-V supply voltage. Although some other designs fabricated in a more advanced technology. Table I summarizes the measured performance of the proposed design. and system required EVM. (a) Modulation spectrum. The maximum data rate for FSK modulation is mainly limited to the settling time of PLL.: A 2. The proposed transmitter accomplishes high energy efficiency and delivers a reasonable output-power level for wireless medical applications. an FOM defined in [15] can be used for efficiency evaluation Fig. [17].4 GHz AT 4 Mb/s. A key metric for measuring the energy efficiency of wireless TX is the average amount of energy required to transmit a single bit of data. the measured minimum average current consumed by the TX is 2. The measured FSK error is 6. (b) FSK error and eye diagram. 14. such as RF-MEMS technology. and the FSK error is 10. which reflects the efficiency of PA.2 nJ/b and 4.88%.ZHANG et al. have higher efficiency [16].3%.

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His research is in the field of semiconductor quantum devices and circuits. Changchun. and the Ph. in 1982. Chinese Academy of Sciences.: A 2. Nanjian Wu (M’05) was born in Zhejiang.4 GHz ENERGY-EFFICIENT TRANSMITTER FOR WIRELESS MEDICAL APPLICATIONS 47 Xiaozhou Yan was born in Chongqing. he joined the Research Center for Interface Quantum Electronics and Faculty of Engineering. He received the B. in 2004. Sapporo. China. China. China. as a Visiting Professor. In 2005.S. Since 2000. he was an Associate Professor in the Department of Electro-Communications. In 1992. Japan.S. in 1982. Hokkaido University. Sichuan.S. and the design of analog-digital mixed-signal large-scale integrated circuit. Beijing. University of Electro-Communications. in 1985. Chinese Academy of Sciences. His research interests include radio-frequency integrated-circuit design and mixed-signal integrated-circuit design. He received the B. 1961. China. Tokyo. in 1992. he has been a Professor at the Institute of Semiconductors. China. degree in physics from Heilongjiang University. Beijing. China. as a Researcher Associate. Japan. In 1998. degree from Sichuan University. and the D. the M. in 2009. .S. he visited the Research Center for Integrated Quantum Electronics. on February 27.ZHANG et al. degree from the Institute of Semiconductors. degree in electronic engineering from the University of Electronic-Communications. degree in electronic engineering from Jilin University.D. Hokkaido University.