Design Metrics Q: How to evaluate the performance of a digital circuit (gate, block, )?

A: Depends Cost Power Dissipation Energy to perform a function Speed (delay, operating frequency) Reliability Scalability etc. Design challenge optimising design metrics Obvious design goal: Construct an implementation with desired functionality Design metric A measurable feature of a systems implementation Optimising design metrics is a fundamental need Key design challenge: Simultaneously optimise numerous design metrics Design challenge optimizing design metrics Commonly used design metrics Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE cost NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing the system Size: the physical space required by the system Performance: the execution time or throughput of the system Power: amount of power consumed by the system

Flexibility: the ability to change the functionality of the system without incurring heavy NRE cost Design challenge optimizing design metrics Common metrics (continued) Time-to-prototype: the time needed to build a working version of the system Time-to-market: the time required to develop a system to the point that it can be released and sold to customers Maintainability: the ability to modify the system after its initial release

Correctness, safety, etc many more NRE and Unit Cost Metrics Costs: Unit cost: the monetary cost of manufacturing each copy of the system, excluding NRE cost

NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing the system

total cost = NRE cost + unit cost * # of units

= (NRE cost / # of units) + unit cost The performance design metric Throughput Tasks per second e.g. Camera A processes 4 images & B say 8 images per second Throughput can be more than latency e.g. due to concurrency (by capturing a new image while previous image is being stored). Speedup of B over A = Bs performance / As performance Throughput speedup = 8/4 = 2 Moores Law In 1960s, Gordon Moore worked for Fairchild Semiconductors (later, he co-founded Intel) He noticed a trend in IC manufacture Every two years the number of components on an area of silicon doubled* He published this work in 1965 known as Moores Law His original predictions were for 10 years into the future His work predicted personal computers and fast telecommunication networks * Sources vary regarding time period

Graphical illustration of Moores law

Something that doubles frequently grows more quickly than most people realize! A 2002 chip can hold about 15,000 1981 chips inside itself

Buses: An Introduction
A key characteristic of a bus is that it is a shared transmission medium A bus usually consists of multiple wires (a.k.a. pathways or lines)

Each line is capable of transmitting at any time an electronic signal representing a single binary digit (i.e. 1 or 0)

However Over time, a sequence of binary digits may be transferred across a single line Serial Bus Several lines can be used to transmit bits simultaneously Parallel Bus Bus Taxonomy Many types of buses can be designed Here are some of the common ones: Serial vs. Parallel Various designs possible: Parallel Bus: around 50 100 lines Serial Bus: around 3 or 4 lines Synchronous vs. Asynchronous Referenced by a central clock or not Bus taxonomy

Some more: Dedicated Separate data and address lines Multiplexed Shared lines Address or data select control line Advantage Fewer lines Disadvantages More complex control Ultimate performance Why design so many different types of buses? Single Buses have Problems Lots of devices on one bus can lead to: Physically long buses Signal Propagation delays this can adversely affect performance Electrical problems Slower devices dictate the maximum bus speed Total Data transfer rates approaches bus capacity Computer Buses Lines in computer buses can be classified into one of five groups Data Lines Address Lines Control Lines Power / GND Lines CLOCK Line These can be implemented according the various bus taxonomies listed earlier

For instance. Computer Buses Parallel Buses: Data [0:N] Address [0:M] Control [0:P] Power [+5V, 0V] CLOCK Serial Buses: Data, address, and control are sequentially sent down a single wire There may be additional control lines Power/GND lines CLOCK line Computer Buses Structure Data Lines Pass data back and forth between components Number of lines represents bus width = word size (e.g. 8-bit, 16-bit, 32-bit, 64-bit, etc.) Address lines Designates location of source or destination Width of address bus specifies maximum memory capacity Computer buses Because multiple devices communicate on a line, some mechanism for control is needed Examples of Control Lines include: Memory Read or Write

I/O Read or Write Transfer ACK Bus request Bus grant Interrupt request Interrupt acknowledgement Reset Computer Bus Operations PROTOCOL: Obtain the use of the bus Transfer the data via the bus Receive Possible acknowledgement PROTOCOL: Obtain the use of the bus Transfer the data request via the bus Wait for other module to send data Send Possible acknowledgement Concept of Registers Small, permanent storage locations within the CPU used for a particular purpose Manipulated directly by the Control Unit Wired for specific function Size in bits or bytes (not MB like memory) Can hold data, an address or an instruction How many registers does the LMC have? General Purpose Registers Programmer-visible registers Hold intermediate results or data values, e.g., loop counters Equivalent to LMCs Memory Typically several dozen in modern CPUs (register file) Use of GP Registers Scratchpad for currently executing program

Holds data needed quickly or frequently Special Purpose Registers: Program Counter Register (PC) Also called instruction pointer Instruction Register (IR) Stores instruction fetched from memory Status Registers Status of CPU and currently executing program Flags (one bit Boolean variable) to track condition like arithmetic carry and overflow, power failure, internal computer error Memory Address Register (MAR) Intermediate storage for Address Bus Memory Data Register (MDR) Intermediate storage for Data Bus Each memory location has a unique address Address from an instruction is copied to the MAR which finds the location in memory Control Unit determines if it is a store or retrieval (i.e. write or read operation) Transfer takes place between the MDR and memory MDR is a two way register MFC (Mem Function Complete) signal from RAM to indicate completion What is CISC? CISC = Complex Instruction Set Computer Pronounced as "sisk" CISC is an ISA Design Philosophy which aims to achieve complex operations with single instructions In other words, it favors the richness of the ISA Typically as many as 200 unique instructions It has been a prominent architecture since c. 1978 Todays computers continue to use processors which are based on CISC designs What is RiskRISC = Reduced Instruction Set Computer RISC is an ISA Design Philosophy which aims to achieve simple operations with single instructions In other words, it favors the simplicity of the ISA Occams Razor / The Natural Law of Parsimony: Entities should not be made complex unnecessarily! Einstein: Everything should be made as simple as possible, but not simpler

RISC emerged historically later than CISC Background and History of RISC The RISC approach developed as a result of the following developments occurring during the 1970s: increase in memory size with a decrease in cost advanced compilers high speed caches Moores Law ! All started with three major research projects IBM: 801 Processor Project University of California at Berkeley: RISC Project Stanford University: MIPS Project In late 1970s, IBM was the first to start In 1980, David A. Patterson of Berkeley, began the project that gave this new approach its name, RISC A year later, Stanford MIPS was developed

CISC Philosophy: The belief that better performance would be obtained by reducing the number of HLL instructions required to implement a program

Example: The C Language is very compact ! RISC Philosophy: As compiler technologies improved during the late 1970s,

researchers started to wonder if CISC architectures really delivered better performances than architectures with simpler instruction set

Compilers getting sophisticated, Hardware getting more complex duplication of effort! Lets make the hardware simpler and faster

and leave the complexity to the compiler instead!

CISC Fewer but more complex instructions to execute a given task than RISC Instructions can access external RAM at will Arithmetic or other instructions may read their operand from memory and could write the result in memory Programs for CISC take less storage space than programs for RISC RISC Simpler instructions Usually fixed-length instructions Aims for one-instruction-per-clock faster execution speeds per instruction more instructions executed in same amount of time than CISC Cheaper to implement (simple instruction set results in simpler hardware implementation) Utilises Load/Store architecture only explicit load (read) and store (write) instructions have permission to access the external memory; all other instructions must access internal register file Parallelisum The industry figured out the advantages of going parallel a long time ago! Hence, we see stuff like the following: Multi-Core Architectures Nehalem micro-architecture, AMD Barcelona (quad-core) Sun Niagara Distributed-Memory Architectures IBM BlueGene Cell Mini-core Architectures: Intel Teraflops GPUs Multi-threaded Architectures Multi-processing Architectures Etc., etc.

Proposed by Prof. Michael J. Flynn (Stanford University) First published in the Proceedings of the IEEE in 1966 The most universally accepted method of classifying computer systems Generalises basic idea of Data parallelism and Functional parallelism SISD Single Instruction stream, Single Data stream Conventional sequential (von Neumann) machines Program executed is instruction stream, and data operated on is data stream SIMD Single Instruction stream, Multiple Data streams Vector machines, superscalar machines Processors execute same program, but operate on different data streams MISD Multiple Instruction streams, Single Data stream Systolic array machines Common data is manipulated by separate processors, each executing a different instruction of the overall program MIMD Multiple Instruction streams, Multiple Data streams - Multiprocessor Parallel machines Independent processors execute different programs, using unique data streams Operating systetm An Operating System is a program that acts as an interface between a user of a computer and the computer hardware It is the most important program of a computer because it manages all the computer software and hardware In addition, a modern OS provide a security framework to protect system information and resources Four Main Functions of an OS From the user point of view, an OS should provide the following functions: Managing hardware Enable user to utilise computer hardware efficiently Resolves conflicts for resource contention Managing files Organise information in an efficient manner Providing a user interface Enable user to use the computer conveniently Managing application Control the execution of computer programs

Important point to note: A modern OS has multiple groups of users! Programmers Administrator Professional users Consumers Must adapt to hardware upgrades and new types of hardware

Examples: 3D graphics; multi-touch input; wireless communications, etc. Must be ready to offer new services Examples: Internet support, multimedia, communication, new industry standards Must offer flexibility and support software reuse:- modular construction with clean interfaces; object-oriented design methodology

The operating system is divided into a number of layers (levels), each built on top of lower layers The bottom layer (layer 0), is the hardware; Layer 1 is the HAL the highest (layer N) is the user interface Layers are selected with modularity concept Each level only relies on the function or service of the lower layers for more primitive function This approach decomposes a large problem into a number of more manageable problems - divide and conquer approach Multitasking--OS is doing more than one thing at the same time OS manages sharing of resources between different tasks Cooperative Multitasking Not a true multitasking category (also known as task switching) In this category, if the other task is busy, the user cannot immediately switch to another process Examples: Windows 3.x; Original MacOS; iOS Pre-emptive Multitasking: New tasks can join task queue at any time Genuinely multi-tasks Examples: Windows NT; Mac OS-X; Android; Linux Hardware Abstraction Layer (HAL( The HAL presents a virtual machine to the kernel and device drivers It maps this virtual machine onto the underlying hardware in an efficient manner and eliminates the need for the OS to provide hardware specific kernels This improves overall efficiency, and provides flexibility and portability Kernal Different Types of Kernel Designs: Monolithic kernel Microkernel Hybrid Kernel Monolitic kernel

a.k.a. The Big Mess or spaghetti code Prominent in the early days The structure consists of no structure at all! The system is a collection of procedures Each procedure can call any other procedure No information hiding between procedures (as opposed to modules, packages, classes) All OS services operate inside the kernel space E.g. Multics, Unix, BSD, Linux Advantages: Good performance Tight integration has good potential for efficient use of resources Disadvantages: Unreliable: a single bug anywhere in the kernel can crash the machine Dependencies between system component Complex and huge (millions of lines of code!) Larger size makes it hard to maintain Lacks flexibility (butloadable libraries) Micro kernelMinimalist approach IPC, virtual memory, thread scheduling Put the rest into user space Device drivers, networking, file system, user interface More stable with less services in kernel space Disadvantages Lots of system calls and context switches E.g. Mach, L4, AmigaOS, Minix, K42 Structure Moves as much as possible from the kernel into user space Communication takes place between user modules using message passing Benefits: - easier to extend a microkernel - easier to port the operating system to new architectures - more reliable (less code is running in kernel mode) - more secure (a server crashing in userspace) But not clear what should go into the microkernel e.g. Mach, QNX, WindRiver

Real time o.s definition A hard real-time operating system must, without fail, provide a response to some kind of event within a specified time frame This response must be predictable and independent of other activities undertaken by the operating system on behalf of other tasks Providing this response implies that system calls will have a known and measurable latency period Hard real-time systems often employ specific hardware devices with special device drivers The more deterministic the operating system can be, the more suitable the system will be for real-time applications Hard real-time where it is absolutely imperative that responses occur within the required deadline E.g. Flight control systems Soft real-time where deadlines are important but which will still function correctly if deadlines are occasionally missed E.g. Data acquisition system Real real-time systems which are hard real-time and which the response times are very short E.g. Missile guidance system Firm real-time systems which are soft real-time but in which there is no benefit from late delivery of service A single system may have all of the above! In reality many systems will have a cost function (penalty) associated with missing each deadline Interface System users often judge a system by its interface rather than its functionality A poorly designed interface can cause a user to make catastrophic errors Poor user interface design is the reason why so many software systems are never used Most users of business systems interact with these systems through graphical interfaces although, in some cases, legacy text-based interfaces are still used

The aim of this chapter is to sensitise software engineers to key issues underlying the design rather than the implementation of user interfaces User-centred design is an approach to UI design where the needs of the user are paramount and where the user is involved in the design process UI design always involves the development of prototype interfaces The system should provide some resilience to user errors and allow the user to recover from errors. This might include an undo facility, confirmation of destructive actions, 'soft' deletes, etc. User guidance Some user guidance such as help systems, on-line manuals, etc. should be supplied User diversity Interaction facilities for different types of user should be supported. For example, some users have seeing difficulties and so larger text should be available Direct manipulation advantages Users feel in control of the computer and are less likely to be intimidated by it User learning time is relatively short Users get immediate feedback on their actions so mistakes can be quickly detected and corrected