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2012
1
Courses In
Electrical
Engineering
Volume II
ELECTRICAL, DIGITAL AND INDUSTRIAL CIRCUITS
THIRD SEQUENCE EXAM WITH SOLUTION
By
JeanPaul NGOUNE
DIPET I (Electrotechnics), DIPET II (Electrotechnics)
M.sc. (Electrical Engineering)
Teacher in the Electrical Department, GTHS KUMBO, Cameroon.
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
2
SECTION ONE : TECHNOLOGY
1.1 Define: Combinatory logic circuit; sequential logic circuit, decoder, multiplexer,
flipflop.
1.2 Give the meaning of the following abbreviation: PMOS, ECL, USB, ALU, TTL.
1.3 What are the properties of a linear operational amplifier?
1.4 What are the modes of functioning of an OPMP?
1.5 The following symbol is that of the LM741 which is one of the most commonly
used OPAMP. Give the name of terminals 1, 2, 3,4,5,6 and 7.
3
2
6
7
4
1
5
1.6 Consider the following table. Indicate by putting a cross in the appropriate cell,
the nature of the each component (Active or passive component).
Resistor Transistor Inductor Capacitor Diode
Active
component
Passive
component
1.7 What is the difference between a multiplexer and a demultiplexer?
1.8 Give two protective means against overheat of semiconductors.
REPUBLIC OF CAMEROON
Peace – Work – Fatherland
……………
GTHS KUMBO/ ELECT DPT
THIRD SEQUENCE EXAM
Class: F
3
6
Option: Electrotechnology
Duration: 04H
Coefficient: 4
Written paper
ELECTRICAL, DIGITAL AND INDUSTRIAL CIRCUITS
No document is allowed except the one given to
the candidates by the examiners.
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
3
SECTION TWO: ANALOGUE CIRCUITS
Exercise 1: Alternating current.
Consider the circuit of figure 1 bellow.
L
Z
C
e1 e2
A
B
Figure 1.
3. Using Norton’s equivalent generator, determine the complex value of the
current i flowing in the load Z. Deduce its effective value.
4. Using Thevenin’s equivalent generator, determine the complex value of the
current i flowing in the load Z. Deduce its complex value.
Exercise 2: DC current.
The circuit of the figure 2 bellow is a voltage stabilizer.
RP
R
U1
Uz
U2
IB
Iz
I2
Figure 2.
1. Determine the maximal current I
Zmax
of the Zener diode.
2. For U1 = 16V, determine the values of U2 and RP so that the current in the
diode must be maximal.
3. Using the value of RP obtained in question 2 above, determine the maximal
value of U1 for which the Zener diode is blocked (Iz = 0).
4. Using the value of RP obtained above, determine the current I2 and the
voltage U2 in the following cases: a) U1 = 10V; b) U1 = 14V.
e1 = 220V, e2 = j110V, Z
L
= j10
3
Ω , Z
C
= j500Ω ,
Z = 10
3
Ω .
1. Determine the characteristics of the Norton’s
equivalent generator seen from terminals A
and B.
2. Determine characteristics of the Thevenin’s
equivalent generator seen from terminals A
and B.
The voltage U1 varies
from 10V to 16 V.
The Zener diode is ideal
with P
Zmax
= 15mW;
Uz = 12V. For the bipolar
transistor, take β = 100,
V
BE
= 0.7V. Let
R = 300Ω
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
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Exercise 3: Bipolar transistor amplifier.
Consider the transistor amplifier circuit presented on the figure 3 below.
R G
C 1
R 2
R 1
R C
R E
C E
R U
V C C
C 2
e
M
v 1
v 2
A. Static study:
Determine:
1. The currents flowing through the base (I
B
) and the emitter (I
E
) of the transistor.
2. The voltage V
BM
between the base and the ground M.
3. The current I
P
flowing in the resistor R1.
4. The value of the resistance R2.
B. Dynamic study:
1. Give the name and the role of capacitors C1, C2 and C3.
2. Draw a.c. equivalent circuit of the amplifier.
3. Determine the input resistance and the output resistance of the amplifier.
4. Calculate the voltage amplification factor.
Exercise 4: Operational amplifier.
The OPAMPs of figure 4 bellow are ideal.
R
R2
R1 E
Ve
Vs
V
+Vcc
Vcc
1
2
Figure 4.
2. The voltage Ve is a sinusoidal expressed as: t V
e
100 cos 20 = (mV).
For the transistor:
= 99; r = 2kΩ · = ,
I
CQ
= 4.95mA, V
BEQ
= 0.7V.
Take: Vcc = 12V,
R1 = 2kΩ , R
C
= 2kΩ ,
R
U
= 2kΩ ,
R
E
= 180Ω
Figure 3.
We have R = 10Ω , R1 = 4Ω ,
R2 = 20Ω , E =100mV and
Vcc = 12V
1. Give the operating
modes of the
OPAMPs 1 and 2.
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
5
a. Determine the expression of the of the output voltage V of the
OPAMP1.
b. Represent in terms of time the voltages Ve and V.
3. Draw the waveform of the voltage Vs at the output of OPAMP2 knowing that E is a
DC source.
SECTION THREE: DIGITAL CIRCUITS.
1. Solve the following operations using 2’s complement:
a) 1110000
2
– 110111
2
; b) 100111101
2
– 11011110
2
; c) 10000000
2
– 1111111
2
.
2. The figure 5 bellow represents the circuit of a full adder, where A1 and B1 are
the in put variables. R1 is the carry while So and Ro are the sum and the
reminder respectively.
2.1 Complete the truth table bellow.
A1 B1 R1 So Ro
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
2.2 Simplify the expressions of So and Ro using Boolean algebra method.
2.3 Draw the logigram of this full adder using logic gates.
3. At the input of a decoder, one can place 64 different combinations. Determine:
a) The number of ways at the input of this decoder,
b) The number of ways at the output of this decoder.
SUBJECT MASTER: NGOUNE JeanPaul,
PLET Electrotechnics, GTHS KUMBO.
Full Adder
A1
B1
R1
So
Ro
Figure 5.
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
6
AKNOWLEDGEMENT
All the exercises solved in this document are past “Probatoire Technique”
examination questions proposed by the Cameroon General Certificate of Education
Board (CGCEB) and the “Office du Baccalaureat du Cameroun” (OBC).
SECTION ONE: TECHNOLOGY
1.1 Definition of terms:
Combinatory logic circuit: It is a logic circuit whose outputs depend only on the
combination of its inputs logic states.
Sequential logic circuit: It is a logic circuit whose outputs depend on previous
inputs as well as present ones. Thus a sequential logic circuit has a memory.
Decoder: It is a combinatory circuit which functions in such a way that for a
given input address, only one of its outputs is activated.
Multiplexer: It is a combinatory logic circuit which permits to direct towards
single output information coming from many inputs.
Flipflop: It is a sequential logic circuit which is able to memorise one bit of
information (elementary memory).
1.2 Meaning of abbreviations:
PMOS: Ptype channel metal oxide semiconductor.
ECL: Emitter coupled logic.
USB: Universal serial bus.
ALU: Arithmetic logic unit.
TTL: Transistor transistor logic.
1.3Properties of a linear operational amplifier:
Infinite voltage gain.
Infinite input impedance.
Zero output resistance.
Zero offsets (voltage and current).
Zero bias current.
Infinite common mode rejection ratio (CMRR).
1.4The modes of functioning of an OPAMP are :
Linear mode,
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
7
Saturation mode.
1.5Names of the terminals of the OPAMP LM741.
3
2
6
7
4
1
5
1.6 Nature of the components
Resistor Transistor Inductor Capacitor Diode
Active
component
Passive
component
1.7Difference between multiplexer and demultiplexer.
A multiplexer directs towards one output information coming from many inputs
meanwhile a demultiplexer directs towards many outputs (one amongst those
outputs) information coming from one input. Thus, the demultiplexer is the reverse or
dual circuit of the multiplexer.
1.8 Two protective means against overheat of semiconductors:
Use of fan
Use of radiator or heat sink
SECTION TWO: ANALOGUE CIRCUITS.
Exercise 1: Alternating current.
Let us consider the following network.
L
Z
C
e1 e2
A
B
1. Offset null
2. Inverting input
3. Noninverting input
4. Negative supply
5. Offset null
6. Output
7. Positive supply.
e1 = 220V, e2 = j110V, Z
L
= j10
3
Ω , Z
C
= j500Ω ,
Z = 10
3
Ω .
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
8
1. Norton equivalent generator seen from terminals A and B.
The circuit above can be transformed as follows:
ZL Z ZC
I1 I2
A
B
ZEQ
A
B
Ieq
With
( )
( )
N
C L
C L
C L eq
N eq
C
L
Z j
j j
j j
Z Z
Z Z
Z Z Z
I A j I I I
A
j
j
Z
e
I
A j
j Z
e
I
= O ÷ =
÷
÷ ×
=
+
×
= =
= + ÷ = + =
÷ =
÷
= =
÷ = = =
1000
500 1000
500 1000
1 22 . 0
22 . 0
500
110
22 . 0
1000
220
2 1
2
2
1
1
Hence the Norton generator can be represented as follows
ZN
A
B
IN
2. Thevenin’s equivalent generator seen from terminals A and B.
The circuit can be redrawn as follows:
L
C
e1 e2
A
B
Eth
( ) ( )
O ÷ = =
+ ÷ =
+ ÷
=
+ ÷
× + ÷ ×
=
+
+
=
1000
220 220
500
220 220 500
1000 500
1000 110 500 220 . 2 . 1
j Z Z
V j
j
j j
j j
j j j
Z Zc
Z e Z e
E
N T
L
L C
T
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
9
Hence the Thevenin’s equivalent generator can be drawn as follows.
E t h
Z t h
A
B
3. Determination of the current flowing in the impedance Z, using Norton’s
equivalent generator.
IN ZN
Z
IN
I
A
B
Using current divider theorem, we can write:
( )( ) ( )
( )
( )
( )
180 22 . 0 22 . 0
1
1
22 . 0
1 1000
1 22 . 0 1000
1000 1000
1000 1 22 . 0 .
Z = ÷ =
÷
÷
=
÷
+ ×
=
+ ÷
÷ + ÷
=
+
= A
j
j
j
j j
j
j j
Z Z
Z I
I
N
N N
The effective value of the current can therefore be deduced: I = 0.22A.
4. Determination of the current flowing in the load Z using Thevenin’s equivalent
generator.
E th
Z th
A
B
Z
I
( )
( )
A A
j
j
j
j
Z Z
E
I
T
T
180 22 . 0 22 . 0
1 1000
1 220
1000 1000
220 220
Z = ÷ =
÷
÷ ÷
=
+ ÷
+ ÷
=
+
=
The effective value of the current can therefore be deduced: I = 0.22A.
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
10
Exercise 2: DC current.
Let us consider the following circuit.
RP
R
U1
Uz
U2
IB
Iz
I2
1. Maximal current I
Zmax
of the Zener diode.
mA A
U
P
I U I P
Z
Z
Z Z Z Zùax
25 . 1 00125 . 0
12
10 15
3
max
max
max max
= =
×
= = ¬ × =
÷
.
2. U
1
=16V. Let us determine U
2
and R
P
so that the diode current will be
maximal.
RP
Z
P
BE Z
I
U U
R
V V U U
÷
=
= ÷ = ÷ =
1
2
3 . 11 7 . 0 12
But
max Z B RP
I I I + = . On the other hand we have:
( )
( ) ( ) 1 1
1
2 2
2
+
=
+
= ¬ + = =
R
U I
I I I I
B B E
. By replacing in the initial equation, we
have:
( )
O =
×
+ ×
÷
=
+
÷
~
+
+
÷
=
÷
2460
100 300
3 . 11
10 5 . 1
12 16
1
3 2
max
1
2
max
1
R
U
I
U U
R
U
I
U U
R
Z
Z
Z
Z
P
3. Maximal value of U1 for which I
Z
= 0.( Then I
RP
=I
B
)
V U
R
U
R U I R U
Z P Z B P
92 . 12 12
300 100
3 . 11
2460
2
1
= + 
.

\

×
= +


.

\

= + =
4. For U
1
= 10V, we have U
1
<U
z
, then I
RP
= 0, and U
Z
= 10. Hence,
V U 3 . 9 7 . 0 10
2
= ÷ =
The mA
R
U
I 31 031 . 0
300
3 . 9
2
2
= = = =
For U
1
= 14V. Then; U
z
= 12V and U
2
=11.3V
mA
R
U
I 7 . 37
300
3 . 11
2
2
= = =
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
11
Exercise 3: Bipolar transistor amplifier.
Let us consider the following transistor amplifier circuit.
R G
C 1
R 2
R 1
R C
R E
C E
R U
V C C
C 2
e
M
v 1
v 2
A. Static study.
1. Determination of base and emitter current.
mA mA A I I I
A
I
I
B CQ E
CQ
B
5 95 . 4 50
50 10 5
99
10 95 . 4
5
3
= + = + =
= × =
×
= =
÷
÷
2. Voltage V
BM
between the base and the ground.
V I R V V
E E BE BM
6 . 1 10 5 180 7 . 0
3
= × × + = + =
÷
.
3. Determination of the current flowing in the resistor R
1
.
mA
R
V
I
BM
P
8 . 0
2000
6 . 1
1
= = =
4. Determination of the value of the resistance R
2
.
( )
O =
×
÷
=
× + ×
× × ÷ ÷
=
+
÷ ÷
= ¬ ÷ ÷ + ÷
÷ ÷ ÷
÷
k
I I
I R V V
R I R V I I R V
P B
E E BE CC
E E BE P B CC
235 . 12
10 85 . 0
6 . 1 12
10 8 . 0 10 5
10 5 180 7 . 0 12
3 3 5
3
2 2
B. Dynamic study.
1. Name of the capacitors C1, C2 and C3.
C
1
and C
2
are coupling capacitors.
C
E
is a bypass capacitor.
For the transistor:
= 99; r = 2kΩ · = ,
I
CQ
= 4.95mA, V
BEQ
= 0.7V.
Take: Vcc = 12V,
R1 = 2kΩ , R
C
= 2kΩ ,
R
U
= 2kΩ ,
R
E
= 180Ω
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
12
2. ac equivalent circuit of the amplifier.
RG
R1 R2
r
RC RU
v1
i1 ib iC i2
v2
BiB
e
E
B C
3. Input and output resistances
( ) ( ) O = = = ¬ = k R r R R
i
v
i r R R v
i
924 . 0 // //
1
// // 1
2 1
1
1 2 1
For the output resistance, the input source e should be rendered inactive (replaced
by a short circuit). Then we have,
O = = k R R
C out
2
4. Voltage amplification factor.
By definition,
( ) ( )
r
R R
ri
i R R
v
v
A
u C
B
B u C
v
// //
1
2
÷ =
÷
= =
The negative sign shows that the input and the output voltages are in opposition of
phase.
Exercise 4: Operational amplifier.
The OPAMPs of figure 4 bellow are ideal.
R
R2
R1 E
Ve
Vs
V
+Vcc
Vcc
1
2
1. The OPAMP1 operates in linear mode (because of its negative feedback); The
OPAMP2 operates as a comparator (Saturation mode).
We have R = 10Ω , R1 = 4Ω ,
R2 = 20Ω , E =100mV and
Vcc = 12V
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
13
2.
a. Expression of the output voltage V.
Using the voltage divider theorem, we can write (The voltage Ve is directly applied
across R1since there is no drop across R).
e e e
V
R
R
V
R
R R
V
R R
V
R V


.

\

+ =


.

\
 +
= ¬


.

\

+
=
1
2
1
2 1
2 1
1
1
b. Representation of V
e
and V in terms of time.
t t V V V
e e
100 cos 120 100 cos 20 6 6
4
20 4
= × = =
+
=
20
40
60
80
100
120
120
0
T/4 T/2 3T/4 T 5T/4 6T/4 7T/4 2T 9T/4
t
Ve
V
3. Waveform of the voltage Vs.
The OPAMP2 functions as a comparator. So we have:
If V<E then Vs = Vcc
If V>E then Vs = +Vcc, with E = 100mV.
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
14
20
40
60
80
100
120
120
0
T/4 T/2 3T/4 T 5T/4 6T/4 7T/4 2T 9T/4
t
Ve(mV)
V(mV)
12V
12V
Vs
SECTION THREE: DIGITAL CIRCUITS
1. Let us solve the following operations using 2’s complement.
a) 1110000
2
 110111
2
1110000
2
 110111
2
= 1110000
2
+2’s compl(110111
2
)
1’scompl(0110111) = 1001000 ( an implied zero has been added in front of the
number so that the two numbers should have the same number of digits)
2’s compl(110111) = 1001000 + 1 = 1001001
Hence,
1110000
2
 110111
2
= 1110000 + 1001001 = 10111001
The first 1 is rejected. Hence the result of the operation is 111001.
Using the same principle, we obtain the following results for the other operations.
b) 100111101
2
 11011110
2
= 1011111
2
c) 10000000
2
1111111
2
= 1
2
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
15
2. Full adder.
2.1 Truth table.
A B Ci S Co
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
2.2 Simplification of So and Ro using Boolean algebra method.
i i i i
ABC C B A C B A C B A S + + + = . .
( ) ( )
( ) ( )
i in
i i i i
C B A C B A
BC C B A C B C B A
© + © =
+ + + = .
Let X = ( )
i
C B ©
X A X A S + =
i
C B A
X A
© © =
© =
i i i i
ABC C AB C B A BC A Co + + + = .
The expression will not change if one of the elements of the sum of products is
duplicated (After the Boolean additive identity according to which A + A = A, A being
a Boolean variable). So we will duplicate the product
i
ABC three times in order to
simplify the expression easily.
i i i i i i
ABC ABC ABC C AB C B A BC A Co + + + + + = .
( ) ( ) ( )
AB AC BC
C C AB B B AC A A BC
i i
i i i i
+ + =
+ + + + + =
i
C B A S © © =
AB AC BC Co
i i
+ + =
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
16
2.3 Logigram of the full adder using logic gates.
A B Ri
S
Ro
3. At the input of a decoder, we can place 64 different combinations
a) Number of ways at the input of the decoder.
We know that, with n ways or inputs, we can have up to 2
n
different input
combinations.
6 2 64 = ¬ = n
n
b) Number of ways at the output of the decoder.
The number of outputs is equal to the number of inputs combinations, since each
input combination should permit to select only one output. Hence the number of ways
at the output of the decoder is 64.
Ci
GTHS KUMBO_Electrical Department_Third sequence exam…………….…………...…Jan.2012
17
ABOUT THE AUTHOR
NGOUNE JeanPaul is a teacher in the electrical
department at GTHS KUMBO. He is teaching this year
in the following subjects: Power electronics, Electrical
Machines, Digital and Analogue Circuits, Electricity
Electronics, and Automation.
Any suggestion or critic is welcome…
NGOUNE JeanPaul, PLET, M.sc.(Electrical Engineering).
P.O. Box: 102 NSO, Kumbo, Cameroon.
Phone: (+237) 7506 2458.
Email : jngoune@yahoo.fr
Web site : www.scribd.com/jngoune
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