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Most input supplies used to power series pass regulator circuits consist of a 60 Hz, single phase stepdown transformer followed by a rectifier circuit whose output is smoothed by a choke or capacitor input filter. The type of rectifier circuit used can be either a halfwave, fullwave, or fullwave bridge type, as shown in Figure 81. The halfwave circuit is used in low current applications, while the fullwave is preferable in highcurrent, low output voltage cases. The fullwave bridge is usually used in all other highcurrent applications.

Figure 81. Rectification Schemes

(a) HalfWave

In this section, specification of the filter capacitor, rectifier and transformer ratings will be discussed. The specifications for the choke input filter will not be considered since the simpler capacitor input type is more commonly used in series regulated circuits. A detailed description of this type of filter can be found in the reference listed at the end of this section.

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The best practical procedure for the design of capacitorinput filters still remains based on the graphical data presented by Schade(1) in 1943. The curves shown in Figures 82 through 85 give all the required design information for halfwave and fullwave rectifier circuits. Whereas Schade originally also gave curves for the impedance of vacuumtube rectifiers, the equivalent values for semiconductor diodes must be substituted. However, the rectifier forward drop often assumes more significance than the dynamic resistance in lowvoltage supply applications, as the dynamic resistance can generally be neglected when compared with the sum of the transformer secondarywinding resistance plus the reflected primarywinding resistance. The forward drop may be of considerable importance, however, since it is about 1.0 V, which clearly cannot be ignored in supplies of 12 V or less.

Figure 82. Relation of Applied Alternating Peak Voltage to Direct Output Voltage in HalfWave CapacitorInput Circuits

100 90

VM RS C VC RL

80 70 % VC(DC) / VM 60 50 40 30 20 10 0

0.1

1.0

10 CRL

100

1000

________________________________

(1)From

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Figure 83. Relation of Applied Alternating Peak Voltage to Direct Output Voltage in FullWave CapacitorInput Circuits

100

VM RS RS Full-Wave C VC Full-Wave Bridge RL 0.05 0.1 0.5 1 2 4 6 8 10 12.5 15 20

90

VM

80

% VC(DC) / VM

70

60

25 30 35

50

40 50 60 70 80 90 100

40

30

0.1

1.0

100

1000

= 2 f, f = Line Frequency

Figure 84. Relation of RMS and PeaktoAverage Diode Current in CapacitorInput Circuits

F = IF(R ) I F(AV) (PER DIODE) S 10 7 5 3 2

0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 30 100

% RS /R L

2.0

3.0

5.0

7.0

10

20

30 nCRL

50

70

100

200

300

1000

10 7 5 3 1.0 n= 2.0 3.0 5.0 7.0 10 20 1 for Half-Wave Single-Phase Rectifier Circuits 2 for Full-Wave Single-Phase Rectifier Circuits = 2 f, where f = Line Frequency 30 nCRL 50 70 100 200 300 500 C in Farads RL in Ohms RS = RMS Equivalent Source Resistance

700 1000

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% RS /nR L

% RS /nR L

100 70 50 30 20 Circuit Parameter RS/RL (%) A 0.1 1.0 10 30 0.1 1.0 10 30

A

Half-Wave

10 7.0 5.0 3.0 2.0 1.0 0.7 0.5 0.3 0.2 0.1 1.0

Full-Wave A

2.0

3.0

5.0

7.0

10

20

30

50 CRL

70

100

200

300

500

1000

Returning to the above curves, the fullwave circuit will be considered. Figure 83 shows that a circuit must operate with CRL 10 in order to hold the voltage reduction to less than 10% and CRL 40 to obtain less than 2.0% reduction. However, it will also be seen that these voltage reduction figures require RS/RL, where RS is now the total series resistance, to be about 0.1% which, if attainable, causes repetitive peaktoaverage current ratios from 10 to 17 respectively, as can be seen from Figure 84. These ratios can be satisfied by many diodes; however, they may not be able to tolerate the turnon surge current generated when the inputfilter capacitor is discharged and the transformer primary is energized at the peak of the input waveform. The rectifier is then required to pass a surge current determined by the peak secondary voltage less the rectifier forward drop and limited only by the series resistance R S. In order to control this turnon surge, additional resistance must often be provided in series with each rectifier. It becomes evident, then, that a compromise must be made between voltage reduction on the one hand and diode surge rating and hence average currentcarrying capacity on the other hand. If small voltage reduction, that is good voltage regulation, is required, a much larger diode is necessary than that demanded by the average current rating. Surge Current The capacitorinput filter allows a large surge to develop, because the reactance of the transformer leakage inductance is rather small. The maximum instantaneous surge current is approximately VM/RS and the capacitor charges with a time constant RS C1. As a rough but conservative check, the surge will not damage the diode if VM/RS is less than the diode IFSM rating and is less than 8.3 ms. It is wise to make RS as large as possible and not pursue tight voltage regulation; therefore, not only will the surge be reduced but rectifier and transformer ratings will more nearly approach the DC power requirements of the supply.

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2. Design Procedure

A) From the regulator circuit design (see Section 6), we know: VC(DC) = the required full load average dc output voltage of the capacitor input filter VRipple(pp) = the maximum no load peaktopeak ripple voltage Vm = the maximum no load output voltage IO = the fullload filter output current f = the input ac line frequency B) From Figure 85, we can determine a range of minimum capacitor values to obtain sufficient ripple attenuation. First determine rf: VRipple(pp) 100% rf = (8.1) 2 2 VC(DC) A range for CRL can now be found from Figure 85. C) Next, determine the range of RS/RL from Figure 82 or 83 using VC(DC) and the values for CRL found in part B. If the range of CRL values initially determined from Figure 85 is above ]10, RS/RL can be found from Figures 82 and 83 using the lowest CRL value. Otherwise, several iterations between Figures 82 or 83 and 85 may be necessary before an exact solution for RS/RLand CRL for a given rf and VC(DC)/Vm can be found. D) Once CRL is found, the value of the filter capacitor (C) can be determined from: CRL C= VC(DC) 2f IO

(8.2)

E) The rectifier requirements may now be determined: 1. Average current per diode; IF(avg) = IO for halfwave rectification (8.3) = IO/2 for fullwave rectification 2. RMS and Peak repetitive rectifier current ratings can be determined from Figure 84. 3. The rectifier PIV rating is 2 Vm for the halfwave and fullwave circuits, Vm for the full wave bridge circuit. In addition, a minimum safety margin of 20% to 50% is advisable due to the possibility of line transients. 4. Maximum surge current, Isurge = Vm/(RS + ESR) (8.4) where, ESR = minimum equivalent series resistance of filter capacitor from its data sheet. F) Transformer Specification 1. Secondary leg RMS voltage, VS = {Vm + (n) 1.0}/ 2 where; n = 1 for halfwave and fullwave n = 2 for fullwave bridge 2. Total resistance of secondary and any external resistors to be equal to RS found from Figures 82, 83, and 84 (see Part C). 3. Secondary RMS current; halfwave = Irms fullwave = Irms fullwave bridge = 2 Irms where, Irms = rms rectifier current (from part E.1 and E.2). 4. Transformer VA rating; halfwave = VS Irms fullwave = 2 VS Irms fullwave bridge = VS Irms ( 2 ) where, Irms = rms rectifier current (from part E.1 and E.2) and, where, VS = secondary leg RMS voltage. (8.5)

(8.6)

(8.7)

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3. Design Example

A) Find the values for the filter capacitor, transformer rectifier ratings, given FullWave Bridge Rectification; VC(DC) = 16 V VRipple(pp) = 3.0 V VM = 25 V IO = 1.0 A f = 60 Hz B) Using Equation (8.1), rf = from Figure 8.5, CRL ] 7 to 15 C) Using CRL = 10, RS/RL is found from Figure 83 using, VC(DC) VM = 16 = 0.64 = 64% 25 VC(DC) = 0.2 (16) IO 3 100% = 6.6% 2 2 (16)

D) From Equation (8.2), the filter capacitor size is found: 10 CRL = = 1658 F C= VC(DC) 2f(60)16 2f IO E) The rectifier ratings are now specified: 1. IF(avg) = IO/2 = 0.5 A from Equation (8.3) 2. IF(rms) = 2 IF(AVG) = 1.0 A from Figure 84 3. IF(Peak) = 5.2 IF(AVG) = 2.6 A from Figure 84 4. PIV = VM = 25 V (use 50 V for safety margin) 5. Isurge = VM/(RS + ESR) ] 25/3.2 = 7.8 A from Equation (8.4), neglecting capacitor ESR. F) The transformer should have the following ratings: 1. VS = {VM + n(1.0)}/ 2 = (25 + 2)/ 2 = 19 VRMS {from Equation (8.5)} 2. Secondary Resistance should be 3.2 3. Secondary RMS current rating should be 1.4 A, (from Equation (8.6)). 4. From Equation (8.7), the transformer should have a 27 VA rating. It should be noted that, in order to simplify the procedure, the above design does not allow for line voltage variations or component tolerances. The designer should take these factors into account when designing his input supply. Typical tolerances would be: line voltage = +10% to 15% and filter capacitors = +75% to 10%.

________________________________

REFERENCES 1. O. H. Schade, Proc. IRE, Vol. 31, 1943. 2. ON Semiconductor Silicon Rectifier Manual, 1980.

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