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**DESIGN OF HIGH SPEED AWGN COMMUNICATION
**

CHANNEL EMULATOR

Emmanuel Boutillon

1

, Jean-Luc Danger

2

, Adel Ghazel

3

1

LESTER, University of Bretagne Sud, Centre de recherche - BP 92116, 56321 Lorient Cedex, France

2

Ecole Nationale Supérieure des Télécommunications, ComElec, 46 rue Barrault, 75634 Paris Cedex 13, France

3

UTIC - Ecole Supérieure des Communications, Rte de Raoued km 3.5 – 2083 El Ghazala –Tunisia

emmanuel.boutillon@univ-ubs.fr , danger@enst.fr, adel.ghazel@supcom.rnu.tn,

Abstract: This paper presents a method for designing a high accuracy white gaussian noise

generator suitable for communication channel emulation. The proposed solution is based on the

combined use of the Box-Muller method and the central limit theorem. The resulting architecture

provides a high accuracy AWGN with a low complexity architecture for a digital implementation

in FPGA. The performance is studied by means of MATLAB simulations and various complexity

figures are given.

Keywords: AWGN, channel emulator, FPGA, central limit theorem, Box-Muller

2

1 Introduction

The design of a digital system for a communication application (error control coding,

demodulation) is a very complex task requiring often trade-off between complexity and

performances. In the ideal case, the formal expression of the Bit Error Rate (BER) can generally

be expressed [1] and used to predict the performance of the system. But, in practice, the non-

linearity of the system (fixed precision implementation) and/or the choice of a sub-optimal

algorithm lead to a formal expression of the BER, which is too complex to derive. In that case,

BER is evaluated using Monte-Carlo simulation. The real system is emulated with an exact

software model of the transmission system (transmitter, channel and receiver) and its statistical

behavior is estimated by software emulation of the transmission of thousand of bits. Monte-Carlo

simulations are easy to set-up but they are time consuming. For example, 10

9

calculation iterations

are needed to get an accurate (+-3.3%) estimation of a BER around 10

-6

. Thus, the exploration of

the solution space for obtaining a good trade-off performance/complexity is bounded by the

simulation time needed to obtain reliable estimation of the BER.

To overcome this problem, some authors propose to speed up Monte-Carlo simulation using a

cluster of computer working in parallel. In this method, each computer performs its own Monte-

Carlo simulation of the system with a reduced number of iterations. Then, all the results generated

by each computer are collected and summed to obtain a reliable estimation of the BER. For a

3

turbo-code application, effective data rate of 1.2 Mbit/s can be emulated using a cluster of 14 PCs

for DVB-RCS turbo-decoder [2].

The complementary approach is to replace software emulation by hardware emulation (using

FPGA circuit) in order to speed-up the simulation by a few orders of magnitude. Compared to a

software compilation, this method is less flexible since each modification of the system requires

the synthesis of the design from a Register Transfer Level (RTL) model and the place&route

operations on the FPGA. But, once this is done, the simulation can run at a very high speed and

precise BER evaluation can be obtained. Note that at the moment, the hardware emulation is not

currently used, mainly because it requires both algorithm and hardware skills, but we believe that

this type of method will be much more developed in the future. First, thanks to the progress of the

CAD tools, configuration of FPGA becomes more and more easier for a non-specialist. Second,

the increasing trade of Intellectual Properties (IP), also named Virtual Circuits (VC), generates the

need for a client to evaluate and validate the IP. In that case, hardware emulation can be efficiently

used.

The hardware emulation of a communication link contains at least three parts: the emitter, the

channel and the receiver. In this paper, we are interested on the channel emulation and we focus

specifically on the White Gaussian Noise Generator (WGNG). From this White Gaussian Noise

Generator, the Additive White Gaussian Noise (AWGN) channel can be emulated and, with some

additional computation, a large class of models of channel can also be derived from the WGNG

(using ARMA filter for example) [3].

The main difficulty in emulating the WGNG is the faithful representation of the normal

distribution N(0,σ) that has a zero mean and a standard deviation of σ. The accuracy measurement

of a random variable X(x) is here indicated by the relative error ξ

X

(x) between the probability

density function (p.d.f.) of X and the normal distribution N(0,1).

4

) )( 1 , 0 (

) )( 1 , 0 ( ) (

) (

x N

x N x X

x

X

−

· ξ (1)

The following parameters of the generated random variable X have been considered in the paper:

• ξ

X

(x) < 0.2% for |x| < 4σ (or a (0.2%, 4σ) accuracy);

• b bits (at least 6) of resolution after the decimal point;

• periodicity greater than 10

18

samples (or 2

60

);

• flat spectrum;

• high sampling rate (> 10 MHz).

The rest of the paper is organized in five sections. Section 2 presents the current techniques to

generate AWGN. Then section 3 proposes a new method based on the association of a quantized

version of Box-Muller method and the use of the central limit theorem. Section 4 presents the

architecture of the proposed method. Section 5 gives the design results in accuracy and

complexity for different cases, results of a specific design are also given. Finally, conclusions are

drawn in section 6.

2. State of the art

Different works has been done to generate AWGN. The real WGNG based on the thermal noise of

a resistor is first presented. Then methods emulating the effect of the channel in a simple case are

described. Finally, two methods allowing to generate a gaussian distribution, namely the method

using the central limit theorem and the Box-Muller method are presented.

2.1 Method using thermal noise

The “natural” method to generate AWGN is the use of a true analog white Gaussian noise source

associated to an Analog to Digital Converter (ADC). Generally, the noise source is obtained with

5

the amplification of the thermal noise of a resistor. This method is the only one that gives a true

WGNG but first, its implementation is not really easy (need a costly high-speed high-quality

ADC), second, it is impossible to generate twice the same sequence of data. Unfortunately, this

last feature is particularly useful for the debug of the communication system: if the system has a

transient wrong behavior on a sequence of data, it is important to be able to rerun the same

simulation in order to detect the error. Thus, this solution is not taken into account in the rest of

the paper.

2.2 Method using pre-computed probabilities

When the precision p of the ADC of the emulated system is below 4 bits, the number of possible

received symbol { }

p

j

j

y

2 0 < ≤

is low. In this case, instead of emulating the channel by the addition of

a gaussian noise on the transmitted symbol, it is more efficient to emulate only the effect of the

channel considering directly the received symbol. In fact, for a given Signal to Noise Ratio (SNR),

it is possible to pre-compute the probability p(y

j

/x

i

) of sending symbol x

i

and receiving symbol y

j

.

Thus, the emulation of the WGNG, when symbol x

i

is transmitted, is done by the generation of a

random variable (r.v.) A

i

with a probability law:

p

i j i

j x y p j A P 2 0 ) / ( ) ( < ≤ · · (2)

The r.v. A

i

can also be characterized by its density function F

A

i

(j):

∑

·

· · ≤ ·

j

k

i i A

k A P j A P j F

i

0

) ( ) ( ) ( (3)

An approximation of this law can be obtained when using q Linear Feedback Shift Registers

(LFSR) [4] to obtain an uniformly distributed r.v. U

q

over {0, 1, … 2

q

-1}. (see section 4.2 below).

From a draw u of U

q

, the index j of y

j

is obtained simply as j = F

A

i

-1

(u/2

q

). To perform this

6

operation directly into hardware, the value of u is compared to the 2

p

-1 pre-computed values

2

q

F

A

i

(j), j=1..2

p

-1. The value of j is easily deduced from the results of these comparisons [5].

Note that in the general case, symmetrical considerations on the constellation used for the

transmission and the ADC allows reducing the number of r.v. A

i

needed to emulate the effect of

the AWGN.

In terms of hardware, q LFSRs are needed to generate U

q

and 2

p

-1 q-bit comparators are needed to

compute the index j of the received symbol while the precision of this method depends directly on

the parameter q. When p is important (at least p = 8 for our requirement) and high precision is

required, the complexity of this method becomes very high.

Some authors proposed also the use of the r.v. U

q

as an address in a 2

q

word-RAM containing pre-

defined real draws of the normal distribution. In [6], RAMs of 256 K words (q=18) are used for

the hardward emulation of a Turbo-decoder. Once again, the complexity of this method becomes

very high for a high precision WGNG.

2.3 Method using central limit theorem

The central limit theorem tells us that if X is a random real variable of mean m

x

and standard

deviation σ

x

, the random variable X

N

defined as:

∑

−

·

− ·

1

0

) (

1

N

i

x i

x

N

m x

N

X

σ

(4)

where x

i,

with i=0..N-1, are N independent determinations of the variable X, tends toward the

normal distribution N(0,1) of mean 0 and standard deviation σ=1, when N tends toward infinity.

Let us define the q bits r.v. U

q

N

according to (4) with a number N of independent draws of the r.v.

U

q

. According to the central limit theorem, U

q

N

tends toward N(0,1) but this convergence is very

7

slow. For example, if q=4, N should be greater than 512 to fit the requirements, i.e. 2048 binary

variables are needed to generate one sample of the WGNG. The hardware for the LFSR required

to generate 2048 uniformly distributed random variables, is important.

2.4 Box-Muller method

The Box-Muller method is widely used in simulation software to generate a random variable (see

[7] for a C program example). This method includes 3 steps: the first two ones generate

independent values x

1

and x

2

of a random variable uniformly distributed over [0, 1]. In the third

step, the functions, f(x

1

) and g(x

2

) are derived from x

1

and x

2

by:

) ln( ) (

1 1

x x f − · (5)

) 2 cos( 2 ) (

2 2

x x g π · (6)

Finally,

) ( ) (

2 1

x g x f n · (7)

gives a sample of the N(0,1) distribution.

Using a 32-bit floating point CPU, equations (5), (6) and (7) are efficiently computed in a small

number of clock cycles. Unfortunately, these operations (square root of a logarithm, cosine

function, multiplication) require a lot of hardware.

In conclusion, none of those methods lead to a low complexity high quality WGNG. Other

methods have to be explored.

3. Design of accurate AWGN reference model

In order to obtain a low complexity high precision WGNG, we propose to combine a quantized

version of the Box-Muller method and the central limit theorem. The idea is to generate a

8

Gaussian noise sample in two steps: first, the quantized version of the Box-Muller method is

performed to obtain a good approximation of the Gaussian distribution. Second, several samples

thus obtained are accumulated by taking advantage of the central limit theorem to smooth the

fluctuation of the distribution obtained with the quantized Box Muller method [8], [9].

3.1. Quantized Box-Muller method

To reduce the complexity, a quantized version of (5) and (6) using pre-computed values in Look-

Up Table (LUT) is proposed by the authors. Let us first focus our attention on equation (5).

3.1.1 Non uniform quantization of function f(x

1

)

The plot of the function f(x

1

) is shown in figure 1.

f

-1

(1)=0.36

f

-1

(2)=1.8 10

-2

f

-1

(3)=1.2 10

-4

f

-1

(4)=1.1 10

-7

x

1

0

1

2

3

4

0 0.2 0.4 0.6 0.8 1

) ln( ) (

1 1

x x f − ·

Figure 1: Plot of function f(x

1

)

Since the average of g(x) is close to 1 ( π / 2 2 exactly), a value of f(x) greater than 4 should be

generated in order to generate sample n greater than 4. To do so, the quantized step in segment

[0,1] should be very small, i.e. of the order of f

-1

(4) < 10

-7

. Since only the vicinity of 0 should be

accurately quantized, a recursive non-uniform quantization of segment [0,1] is proposed (see

figure 2):

9

0

2 ∆·1

∆·2

-q

2∆ 3∆

q

rank 1

rank 2

rank K

...

∆

2

∆

K

2∆ 3∆

2∆ 3∆

2

K

2

K

2 ∆ ·∆

2 ∆ ·∆

2

K

q

q

K-1

Figure 2: Non uniform quantization of segment [0,1]

where K is the number of recursions and q is the number of bits required to select one of the 2

q

segments of length ∆

r

= 2

-rq

at the level r of the recursion. Thus, K q-bit random generators s

1

, s

2

...

s

K

are used to define the position of a sub segment of [0,1]. At the first level (r=1), the

quantization step is ∆=2

-q

. The value s

1

defines the segment [∆s

1

, ∆(s

1

+1)[, if s

1

is equal to 0, the

sub-segment [0, ∆[ is sub-divided in 2

q

sub-segments of size ∆

2

indexed with s

2

. Once again, if s

2

is equal to 0, the sub-segment [0, ∆

2

[ is sub-divided in 2

q

sub-segments indexed by s

3

. The process

is repeated recursively K times. The probability to select a segment s of rank r is equal to ∆

r

, i.e.,

the size of the segment. The process is thus uniformly distributed over [0,1]. The quantized value

f

r

(s) associated to this segment is given by:

¸ ]

) 2 ( ) ) (( 2 ) (

m r m

r

s f s f

−

× ∆ + · δ (8)

Where m is the number of fractional bits used to represent f

r

(s) (i.e. f

r

(s) is coded on 3+m bits, 3

for the integer part, m for the fractional part) and

¸ ]

x denotes the largest integer lower than x and

δ, a real number between 0 and 1, gives the relative position of the sample in the segment

[∆

r

s, ∆

r

(s+1)[.

10

3.1.2 Quantization of function g(x)

The problem is easier for the g(x) function. Let us define s’, a q’ bit r.v. U

q’

. ∆’ = 2

-q’

is the

quantization step of segment [0,1/4] (the problem of sign is analyzed later), thus g(x) is quantized

as:

) 2 (

2

’ ’ ( ’

cos 2 2 ) ’ (

’ ’ m m

s

s g ×

1

]

1

¸

,

_

¸

¸ + ∆

·

δ π

(9)

where δ

’

and m’ have the same meanings as those of δ and m of equation (8). The function g(s’) is

coded on 1+ m' bits, 1 for the integer part, m’ for the fractional part.

3.1.3 Final multiplication

From f

r

(s) and g(s’), the quantized Half Box-Muller random variable HBM with b bits after the dot

is obtained using:

) 2 (

2

) ’ ( ) (

’

b

b m m

r

s g s f

n ×

1

]

1

¸

×

·

− +

+

(10)

The probability P of obtaining a given couple (f

r

(s),g(s’)) is:

) ’ (

2 )) ’ ( ), ( (

q rq

r

s g s f P

+ −

· (11)

Let S

n

be the subset of {0, ..., 2

q

-1}x{1, ..., K}x{0,..., 2

q

’-1} of all triplets (s,r,s') giving n

+

using

(10). The probability P(HBM=n

+

) is then given by:

)) ’ ( ), ( ( ) (

’ r s

s g s f P n HBM P

r

S s

n

∑

∈ ) , , (

+

· (12)

Using (10), (11) and (12), the p.d.f. of HBM can easily be computed. Finally, the Box-Muller r.v.

BM is obtained from the Half Box-Muller r.v. HBM using a binary r.v. sign:

+

⋅ − · n sign n ) 2 1 ( (13)

Using (13), the p.d.f. of BM can also be computed.

11

3.2. Mixed method

The curve a of figure 3 illustrates the relative error ξ

X

(x) associated to the distribution BM

1

obtained with the Box Muller method and the parameters of Table 1.

Param. b q K M δ q’ m’ δ’

Matlab

b q_f K m_f d_f q_g m_g d_g

BM

1

6 4 5 7 0.467 8 6 0.5

Table 1: Characteristics of the Box-Muller WGNG. The second line of the array gives the names

of the variables used in the MATLAB program given in the appendix A.

With a reduced complexity (low value parameters) it is hardly possible with The Box-Muller to

reach the initial constraint of (0.2%, 4 σ) accuracy.

To smooth the large variation of the distribution BM

1

, a number N of independent r.v. BM

1

are

accumulated (use of the central limit theorem) to generate a single sample. The resulting

distributions BM

2

and BM

4

. obtained for N = 2 and 4 are shown in figure 3.

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

-0.5

-0.4

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0.4

0.5

x

ξ

X

(x)

BM

1

BM

2

BM

4

Figure 3: ξ

X

(x) for X= BM

1

, BM

2

and BM

4

12

One can note that exact distribution of BM

2

can be computed as the auto-convolution of BM

1

:

BM

2

= BM

1

⊗ BM

1

. The exact distribution of BM

4

can also be exactly computed (BM

4

= BM

2

⊗

BM

2

). Result of figure 3 shows that BM

4

fulfills our initial requirement of a (0.2%, 4σ) accuracy.

Appendix A gives the reference MATLAB program that compute the exact distribution according

to the selected parameters.

4. Architecture

This chapter concerns the architectural aspect of the WGNG. It explains how to get an efficient

and low complexity architecture with a FPGA device.

4.1. Overall architecture

Figure 4 shows the general architecture of the WGNG. The uniformly distributed random

variables are generated by using several Linear Feedback Shift Registers (LFSR) (see chapter 4.2)

q s

1

q s

2

q s

K

q’ s’

1 sign

f

r

(3.m)

2

f

r

(s)

g

g( s’ )

2

) . 4 ( b

trunc .

LFSRs

(4.( m+ m’ ))

2

n

+

n

(4. .b )

2

N iterations

(4+log

2

(N).b)

2

(1.m’)

2

ROMs

Figure 4: Overall architecture where

2

) . ( b a , respectively

2

) . ( b a , indicates an unsigned (a two-

complement) number with a bits before the dot and b bits after the dot.

The targeted FPGA structure is based on logic cells [10] allowing the generation of a logic

function of 4 variables. Every logic cell output can be registered. Larger functions can be obtained

13

by combining logic cells. In Table 1 q=4 allows the designer to perform a f

r

ROM of 3+m bits

with only 3+m logic cells. The logic cells input being 4 uniformly distributed address bits.

As shown in Figure 3 (BM

4

) and Table 1, good results are obtained with K=5 and m=7, which

means that (3+m)K=50 logic cells are needed for the f

r

ROMs. A 256-byte FPGA on-chip RAM

can be used for the g ROM (m’=8-1=7). The parameters of Table 1 offer a good trade-off between

performance and FPGA complexity.

Once the Box-Muller variable is generated a truncation is done to keep only b bits after the

decimal point. In our example we truncated to get 6 bits after the decimal point. The

multiplication by the sign permits to get a p.d.f. centered on 0 by using a 2’s complement

generator when the sign is 1. In this case the zero value of the p.d.f. is twice as big than the normal

distribution (because 2’s complement of 0 is 0). If the 1’s complement is used instead of the 2’s

complement, the mean value becomes –2

-b-1

instead of 0 before accumulation. After accumulation

the mean and standard deviation are given by:

mean

1

,

2 ) (

− −

⋅ − ·

b

b N

N BM (14)

standard deviation N BM

b N

· ) (

,

(15)

To be as close as possible to N(0,1) when the 1's complement is used, a compensation has to be

done at the back end stage. The back end stage consists in multiplying the noise according to the

needed signal power and in adding the result to the signal. For instance if N=4, a mere left shift of

the decimal point is enough to compensate σ (i.e. a division by 4 =2) and the addition with

–2

-b+1

compensates the mean.

4.2. Uniformly distributed variables generation with LFSRs.

A total of K.q + q’ +1 uniformly distributed variables are needed:

14

- K.q to address the K f

r

ROMs,

- q’ to address the g ROM

- 1 to generate the sign.

It is known that a Linear Feedback Shift Register LFSR associated with its characteristic

polynomial G[x] of order n can generate a very good random like binary variable of periodicity

2

n

-1 [4]. Associating q independent LFSRs generate a q bit variable U

q

uniformly distributed over

{0, 1, 2, ..., 2

q

-1

}. The LFSR design in FPGA need only n logic cells, each of them with its own

register. Figure 5 illustrates the LFSR structure called "one to many" with the polynomial x

5

+ x

2

+1:

+

D Q D Q D Q D Q D Q

x x

2

x

3

x

4

x

5

clk

Figure 5: LFSR for x

5

+ x

2

+1

Considering the parameters of Table 1, 29 uniformly distributed variables have to be generated.

the number of LFSRs can be reduced if the address bits are grouped by packet of 4, necessiting

only 7 LFSRs, 2 for the g ROM, one for each f

r

ROM and one for the sign. At every clock cycle, 4

bits are used as outputs and "shifted". For instance for the LFSR of figure 5, t being the clock

period, the register x

5

can be expressed as x

5

(t)= x

4

(t-1) = x

2

(t-3)+x

5

(t-3) = x(t-4)+x

4

(t-4). By

considering operations every 4t, 4 virtual shift operations are done in one clock cycle.

This technique can be easily coded in VHDL and generates almost no extra FPGA logic cells. The

code of the LFSR function generator is given in the Annex B for any number of outputs

(parameter nb_iter in the code). Figure 6 illustrates the LFSR structure with polynomial x

5

+ x

2

+1

and 4 ouputs.

15

+

D Q

D Q

x

4

x

5

clk

D Q

x

D Q

x

2

D Q

x

3

+

+

+

s

0

s

1

s

2

s

3

Figure 6: LFSR for x

5

+ x

2

+1 and 4 outputs

LFSR 1 output LFSR 4 outputs

t

X X

2

X

3

X

4

X

5

X X

2

X

3

X

4

X

5

0 1 0 0 0 0 1 0 0 0 0

1 0 1 0 0 0 0 0 0 0 1

2 0 0 1 0 0 1 0 1 1 0

3 0 0 0 1 0 0 1 1 1 0

4 0 0 0 0 1 1 1 0 1 1

5 1 0 1 0 0 0 0 1 1 0

6 0 1 0 1 0 0 1 1 1 1

7 0 0 1 0 1 0 1 1 0 1

8 1 0 1 1 0 0 1 0 0 0

9 0 1 0 1 1 1 0 1 0 0

10 1 0 0 0 1 0 1 0 1 1

11 1 1 1 0 0 0 0 1 1 1

12 0 1 1 1 0 1 1 0 0 1

Table 2: LFSR sequences

The sequence of the first 12 combinations is indicated in Table 2. The initial value is "00001".

This table shows combinations of the 4-outputs LFSR corresponding to each fourth -combination

of the 1-output LFSR.

In order to meet the periodicity constraint (i.e. a periodicity greater than 2

60

cycles), at least a total

of 60 registers of LFSRs are needed. In order to keep the highest period, the LFSRs need to have

periods prime between them. To meet this condition, we propose to select the LFRS’s length from

the "Mersenne" numbers (number d so that 2

d

–1 is a prime number).

16

5. Results

5.1 Accuracy

By considering the parameters of Table 1 and x between 0 and 4σ, the maximum relative error

ξ

X

(x) between the ideal gaussian distribution N[0,1] and the synthesized one is calculated by using

a MATLAB model. The accuracy is given for different values of the number b of bits after the

decimal point, and the number of accumulations N. Table 3 represents the maximum relative error

expressed in 10

-3

for different values of N and b. For every value of b the optimal value of δ is

indicated.

Max ξ

X

(x) ∗10

-3

Between 0 and 4σ

N=2 N=3 N=4 N=5

1 δ=0.44

0.65 0.08 0.15 0.29

2 δ=0.453

11.5 1.96 0.93 0.43

3 δ=0.445

20.2 2.12 0.56 0.34

b 4 δ=0.467

64.6 5.4 0.71 0.31

5 δ=0.467

57.3 5.4 1.12 0.69

6 δ=0.467

71.9 5.8 1.38 0.93

7 δ=0.467

237 8.4 0.68 0.28

8 δ=0.467

503 26.5 1.76 0.26

Table 3: maximum relative error for different N and b

5.2 Synthesis

Table 4 gives the results obtained with the parameters of Table 1, N=4, b=6 and LFSRs of length

22,21,20,17,13,7,5,15 registers for respectively g, f

r

and sign:

FPGA device Cells mem block clock rate Output rate

10K100ARC240-1 434 1 74MHz 18.5MHz

10K100EQC240-1 437 0.5 98MHz 24.5MHz

Table 4: synthesis results

17

The synthesis has been done using FPGA Express

TM

and MAX+PLUSII

TM

. The number of cells of

the LFSR part is 149. Note that a sample can be obtained at a rate of 98MHz using 4 parallel Box-

Muller generators and one 4-word adder. Figure 7 illustrates the relative error obtained with 10

9

samples.

Figure 7: relative error with 10

9

samples

The difference between the theoretical distribution and the one obtained is due to the low number

of samples obtained for high value of σ. When the number of samples increases, the distribution

converges towards the result of the MATLAB simulation

6. Conclusion

In this work, we use both the Central limit theorem and the Box-Muller methods to obtain a

probability density function with a (0.2%, 4σ) accuracy. Moreover, a MATLAB reference

program is elaborated which takes the hardware architecture characteristics (memory size, data

format,…) into account. For easy evaluation, a linear representation of the distribution, together

with its deviation from the theoretical gaussian distribution, is defined. A generic MATLAB

18

model has been written to allow the designer to adapt the quality of the gaussian distribution to his

needs and consequently to adjust the parameters of the VHDL model.

One can note that using filtering and appropriate mathematical functions, the WGNG can also be

used to emulate the Rayleigh, the Ricean channel or even more complex channels. Studies are

pursued in this direction.

Reference

[1] J.G. Proakis, “Digital communications”, Mc GRAW-HILL International Editions, Electrical

Engineering Series, 1998.

[2] M. Jézéquel, ENST Bretagne, personal communication, june 2001.

[3] J.R. Ball, "A real time fading simulator for mobile radio", The radio and Electronic Engineer,

Vol 52, N°10,October 1982.

[4] E.R. Berlekamp, "Algebric Coding Theory", McGraw-Hill, 1968

[5] J. Touch, Virtual Turbo, personal communication, june 2001.

[6] M. Jézéquel, C. Berrou, J. R. Inisan and Y. Sichez, "Test of a Turbo-Encoder/Decoder",

TURBO CODING Seminar, Lund, Sweden, pp. 35-41, 28-29 August 1996.

[7] Donald E. Knuth, "The Art of computer programming", ADDISON-WESLEY, 1998

[8] J.L. Danger, A. Ghazel, E. Boutillon, H. Laamari, "Efficient FPGA Implementation of

Gaussian Noise Generator for Communication Channel emulation", IEEE ICECS conference,

Laslik, Lebanon, Dec 2000.

[9] A. Ghazel, E. Boutillon, J.L. Danger, G. Gulak, "Design and performance analysis of a high

speed AWGN communication channel emulator", IEEE PACRIM conference, Victoria, B.C.,

Aug. 2001.

[10] ALTERA Data Book 1998

19

Appendix A: Reference MATLAB Program

(See table 1 for the name and the value of the parameters)

for r=1:K % ROM fr(s)

for s=1:pow2(q_f)-1

rom_f(s,r)=floor(sqrt(log((s+d_f)*

pow2(r*q_f)))*pow2(m_f));

end;

rom_f(pow2(q_f), r) = 0;

end;

for u=1:pow2(q_g) %ROM g(x)

rom_g(u)=floor(sqrt(2)*cos(pi*((u-1+d_g)*pow2(-q_g-1)))*pow2(m_g));

end;

% Initialisation of the distribution HBM

scaling = pow2(m_f + m_g - b);

max = floor(1 + rom_f(1,K)*rom_g(1)/scaling)

HBM = zeros(1,max+1);

for s=1:pow2(q_f)-1 %Construction of HBM

for r=1:K

for u=1:pow2(q_g)

n=floor((rom_f(s,r)*rom_g(u)/scaling));

HBM(n+1) = HBM(n+1) + pow2(-(r*q_f + q_g));

end;

end; end;

for i = 1 : max %Construction of BM

BM(i) = 0.5*HBM(max+2-i);

BM(2*max+2-i) = BM(i);

end;

BM(max+1)=HBM(1);

BMi = BM; % Construction of BM_N

for i = 1 : N-1

BMi = conv(BMi , BM);

end;

20

Appendix B: LFSR VHDL code

FUNCTION gen_lfsr(

pol : std_logic_vector;

en : std_logic;

nb_iter : natural

RETURN std_logic_vector IS

VARIABLE pol_int : std_logic_vector(pol’length-1 DOWNTO 0);

VARIABLE pol_gen : std_logic_vector(pol’length-1 DOWNTO 0);

BEGIN

CASE pol’length is

when 22 => pol_gen := "0000000000000000000011";

when 21 => pol_gen := "000000000000000000101";

when 20 => pol_gen := "00000000000000001001";

when 17 => pol_gen := "00000000000001001";

when 13 => pol_gen := "0000000011011";

when 7 => pol_gen := "0000011";

when 5 => pol_gen := "00101"; -- x^5 + x^2 + 1

when 4 => pol_gen := "0011"; -- x^4 + x + 1

when 3 => pol_gen := "011"; -- x^3 + x + 1

when others => pol_gen := "11"; -- x^2 + x + 1

END CASE;

pol_int := pol;

iteration : FOR i in 1 to nb_iter LOOP

IF en = ’1’ THEN

IF pol_int(pol’length-1)=’1’ THEN

pol_int := (pol_int(pol’length-2 DOWNTO 0)&’0’) xor pol_gen;

ELSE

pol_int := (pol_int(pol’length-2 DOWNTO 0)&’0’);

END IF;

ELSE pol_int := pol_int;

END IF;

END LOOP;

RETURN (pol_int);

END gen_lfsr;

1 Introduction

The design of a digital system for a communication application (error control coding, demodulation) is a very complex task requiring often trade-off between complexity and performances. In the ideal case, the formal expression of the Bit Error Rate (BER) can generally be expressed [1] and used to predict the performance of the system. But, in practice, the nonlinearity of the system (fixed precision implementation) and/or the choice of a sub-optimal algorithm lead to a formal expression of the BER, which is too complex to derive. In that case, BER is evaluated using Monte-Carlo simulation. The real system is emulated with an exact software model of the transmission system (transmitter, channel and receiver) and its statistical behavior is estimated by software emulation of the transmission of thousand of bits. Monte-Carlo simulations are easy to set-up but they are time consuming. For example, 10 9 calculation iterations are needed to get an accurate (+-3.3%) estimation of a BER around 10-6. Thus, the exploration of the solution space for obtaining a good trade-off performance/complexity is bounded by the simulation time needed to obtain reliable estimation of the BER. To overcome this problem, some authors propose to speed up Monte-Carlo simulation using a cluster of computer working in parallel. In this method, each computer performs its own MonteCarlo simulation of the system with a reduced number of iterations. Then, all the results generated by each computer are collected and summed to obtain a reliable estimation of the BER. For a

2

generates the need for a client to evaluate and validate the IP. Compared to a software compilation. First. mainly because it requires both algorithm and hardware skills.1). this method is less flexible since each modification of the system requires the synthesis of the design from a Register Transfer Level (RTL) model and the place&route operations on the FPGA. the channel and the receiver.d. the increasing trade of Intellectual Properties (IP). once this is done. The complementary approach is to replace software emulation by hardware emulation (using FPGA circuit) in order to speed-up the simulation by a few orders of magnitude. The main difficulty in emulating the WGNG is the faithful representation of the normal distribution N(0. also named Virtual Circuits (VC). we are interested on the channel emulation and we focus specifically on the White Gaussian Noise Generator (WGNG).f. 3 . a large class of models of channel can also be derived from the WGNG (using ARMA filter for example) [3]. From this White Gaussian Noise Generator. thanks to the progress of the CAD tools. the hardware emulation is not currently used. The hardware emulation of a communication link contains at least three parts: the emitter. In that case.turbo-code application. In this paper.) of X and the normal distribution N(0. The accuracy measurement of a random variable X(x) is here indicated by the relative error ξX(x) between the probability density function (p. with some additional computation. Second. configuration of FPGA becomes more and more easier for a non-specialist. hardware emulation can be efficiently used. effective data rate of 1. but we believe that this type of method will be much more developed in the future. Note that at the moment. the Additive White Gaussian Noise (AWGN) channel can be emulated and. the simulation can run at a very high speed and precise BER evaluation can be obtained. But.σ) that has a zero mean and a standard deviation of σ.2 Mbit/s can be emulated using a cluster of 14 PCs for DVB-RCS turbo-decoder [2].

b bits (at least 6) of resolution after the decimal point. conclusions are drawn in section 6. 2.1 Method using thermal noise The “natural” method to generate AWGN is the use of a true analog white Gaussian noise source associated to an Analog to Digital Converter (ADC).ξ X ( x) = X ( x) − N (0. Then methods emulating the effect of the channel in a simple case are described. Finally. Section 4 presents the architecture of the proposed method. periodicity greater than 1018 samples (or 260). Generally. results of a specific design are also given. Then section 3 proposes a new method based on the association of a quantized version of Box-Muller method and the use of the central limit theorem. State of the art Different works has been done to generate AWGN. Section 5 gives the design results in accuracy and complexity for different cases. the noise source is obtained with 4 . namely the method using the central limit theorem and the Box-Muller method are presented. The real WGNG based on the thermal noise of a resistor is first presented. 4σ) accuracy). 2. Section 2 presents the current techniques to generate AWGN. Finally. flat spectrum. two methods allowing to generate a gaussian distribution.2%. The rest of the paper is organized in five sections.1)( x) (1) The following parameters of the generated random variable X have been considered in the paper: • • • • • ξX(x) < 0.2% for |x| < 4σ (or a (0. high sampling rate (> 10 MHz).1)( x) N (0.

this last feature is particularly useful for the debug of the communication system: if the system has a transient wrong behavior on a sequence of data. is done by the generation of a random variable (r. instead of emulating the channel by the addition of a gaussian noise on the transmitted symbol. To perform this 5 .the amplification of the thermal noise of a resistor. … 2q-1}.v. this solution is not taken into account in the rest of the paper. the number of possible received symbol {y j }0≤ j <2 p is low.v. Thus. it is impossible to generate twice the same sequence of data. In fact. the emulation of the WGNG. From a draw u of Uq. the index j of yj is obtained simply as j = FAi-1(u/2q). In this case. Ai can also be characterized by its density function FAi(j): F Ai ( j ) = P( Ai ≤ j ) = ∑ P( Ai = k ) k =0 j (2) (3) An approximation of this law can be obtained when using q Linear Feedback Shift Registers (LFSR) [4] to obtain an uniformly distributed r. Thus. its implementation is not really easy (need a costly high-speed high-quality ADC). Uq over {0. 2. it is possible to pre-compute the probability p(yj/xi) of sending symbol xi and receiving symbol yj. it is more efficient to emulate only the effect of the channel considering directly the received symbol.2 Method using pre-computed probabilities When the precision p of the ADC of the emulated system is below 4 bits. (see section 4. 1.v. for a given Signal to Noise Ratio (SNR).2 below). second. This method is the only one that gives a true WGNG but first.) Ai with a probability law: P( Ai = j ) = p( y j / x i ) 0 ≤ j < 2 p The r. when symbol xi is transmitted. it is important to be able to rerun the same simulation in order to detect the error. Unfortunately.

q LFSRs are needed to generate Uq and 2p-1 q-bit comparators are needed to compute the index j of the received symbol while the precision of this method depends directly on the parameter q. When p is important (at least p = 8 for our requirement) and high precision is required.3 Method using central limit theorem The central limit theorem tells us that if X is a random real variable of mean mx and standard deviation σx.v.1) but this convergence is very 6 . Once again. the complexity of this method becomes very high. tends toward the normal distribution N(0. Let us define the q bits r. The value of j is easily deduced from the results of these comparisons [5].1) of mean 0 and standard deviation σ=1.N-1. Note that in the general case. the value of u is compared to the 2p-1 pre-computed values 2qFAi(j). In terms of hardware. UqN according to (4) with a number N of independent draws of the r. According to the central limit theorem. Ai needed to emulate the effect of the AWGN. Uq as an address in a 2q word-RAM containing predefined real draws of the normal distribution.v... the complexity of this method becomes very high for a high precision WGNG. j=1. Some authors proposed also the use of the r. 2.2p-1.v. Uq. In [6]. the random variable XN defined as: XN = 1 N −1 i =0 σx N ∑ ( xi − m x ) (4) where xi. are N independent determinations of the variable X. symmetrical considerations on the constellation used for the transmission and the ADC allows reducing the number of r. UqN tends toward N(0. when N tends toward infinity.operation directly into hardware. RAMs of 256 K words (q=18) are used for the hardward emulation of a Turbo-decoder. with i=0.v.

In the third step.4 Box-Muller method The Box-Muller method is widely used in simulation software to generate a random variable (see [7] for a C program example). 2048 binary variables are needed to generate one sample of the WGNG. (7) Using a 32-bit floating point CPU. 1]. f(x1) and g(x2) are derived from x1 and x2 by: f ( x1 ) = − ln( x1 ) g ( x 2 ) = 2 cos(2πx 2 ) (5) (6) Finally. N should be greater than 512 to fit the requirements. 3. equations (5). In conclusion. the functions.1) distribution. Unfortunately. cosine function.slow. 2. Other methods have to be explored. Design of accurate AWGN reference model In order to obtain a low complexity high precision WGNG. multiplication) require a lot of hardware. i. This method includes 3 steps: the first two ones generate independent values x1 and x2 of a random variable uniformly distributed over [0. The idea is to generate a 7 . if q=4. For example. none of those methods lead to a low complexity high quality WGNG. The hardware for the LFSR required to generate 2048 uniformly distributed random variables. we propose to combine a quantized version of the Box-Muller method and the central limit theorem. is important. these operations (square root of a logarithm.e. (6) and (7) are efficiently computed in a small number of clock cycles. n = f ( x1 ) g ( x 2 ) gives a sample of the N(0.

4 x1 0.8 1 Figure 1: Plot of function f(x1) Since the average of g(x) is close to 1 ( 2 2 /π exactly). a quantized version of (5) and (6) using pre-computed values in LookUp Table (LUT) is proposed by the authors. 3. To do so. of the order of f-1(4) < 10-7. 3.2 0. a value of f(x) greater than 4 should be generated in order to generate sample n greater than 4. Second. [9]. the quantized version of the Box-Muller method is performed to obtain a good approximation of the Gaussian distribution.1] is proposed (see figure 2): 8 . f ( x1 ) = -1 − ln( x1 ) -7 4 3 2 1 0 0 f (4)=1. Since only the vicinity of 0 should be accurately quantized.1] should be very small.36 0.e. Let us first focus our attention on equation (5).1. i.8 10 -2 -1 f (1)=0. Quantized Box-Muller method To reduce the complexity. several samples thus obtained are accumulated by taking advantage of the central limit theorem to smooth the fluctuation of the distribution obtained with the quantized Box Muller method [8].Gaussian noise sample in two steps: first.1 Non uniform quantization of function f(x1) The plot of the function f(x1) is shown in figure 1.1 10 -1 f (3)=1.1.2 10 -1 -4 f (2)=1. a recursive non-uniform quantization of segment [0. the quantized step in segment [0.6 0.

The quantized value fr(s) associated to this segment is given by: f r ( s ) = 2 m f (( s + δ )∆r ) (×2 − m ) (8) Where m is the number of fractional bits used to represent fr(s) (i. ∆2[ is sub-divided in 2q sub-segments indexed by s3. fr(s) is coded on 3+m bits. the quantization step is ∆=2-q. Once again.-q 0 ∆= 2 2∆ 3∆ rank 1 rank 2 ∆2 2∆ 2 3∆ 2 2 ∆=1 q 2 ∆2 =∆ q . 3 for the integer part. if s1 is equal to 0. ∆[ is sub-divided in 2q sub-segments of size ∆2 indexed with s2.. K q-bit random generators s1. The process is thus uniformly distributed over [0.e. i. the size of the segment. sK are used to define the position of a sub segment of [0. the sub-segment [0.e. s2. a real number between 0 and 1.1]. m for the fractional part) and x denotes the largest integer lower than x and δ. At the first level (r=1). The process is repeated recursively K times.. if s2 is equal to 0. ∆K 2∆ K 3∆ K 2 ∆K=∆ K-1 q rank K Figure 2: Non uniform quantization of segment [0. gives the relative position of the sample in the segment [∆rs. Thus. ∆r(s+1)[.1] where K is the number of recursions and q is the number of bits required to select one of the 2q segments of length ∆ r= 2-rq at the level r of the recursion. The value s1 defines the segment [∆s1... the sub-segment [0. ∆(s1+1)[. 9 . The probability to select a segment s of rank r is equal to ∆r..1].

the p.2 Quantization of function g(x) The problem is easier for the g(x) function. s ’)∈S n ∑ P( f r ( s ). m’ for the fractional part.v.g(s’)) is: P ( f r ( s ). Let us define s’.3. The function g(s’) is coded on 1+ m' bits. 10 .. 2q-1}x{1.1/4] (the problem of sign is analyzed later).. K}x{0.. g ( s ’)) (12) Using (10). 2q’-1} of all triplets (s. a q’ bit r. r .v. 1 for the integer part. ∆’ = 2-q’ is the quantization step of segment [0. HBM using a binary r. of HBM can easily be computed. of BM can also be computed.r.v. thus g(x) is quantized as: π∆’( s ’+δ ’ g ( s ’) = 2 m’ 2 cos 2 (×2 m ’) (9) where δ’ and m’ have the same meanings as those of δ and m of equation (8). 3. The probability P(HBM=n+) is then given by: P( HBM = n + ) ( s . the p.d..1. ..f.. sign: n = (1 − 2 ⋅ sign)n + (13) Using (13). Uq’.s') giving n+ using (10).1.. BM is obtained from the Half Box-Muller r. .v.f. g ( s ’)) = 2 − ( rq + q ’) (11) Let Sn be the subset of {0.3 Final multiplication From fr(s) and g(s’).. Finally.d. (11) and (12). the Box-Muller r... the quantized Half Box-Muller random variable HBM with b bits after the dot is obtained using: f ( s ) × g ( s ’) n + = r m+ m ’−b 2 (×2 b ) (10) The probability P of obtaining a given couple (fr(s).

2 ξX (x) 0. BM1 are accumulated (use of the central limit theorem) to generate a single sample. obtained for N = 2 and 4 are shown in figure 3. The second line of the array gives the names of the variables used in the MATLAB program given in the appendix A.5 0 0. Mixed method The curve a of figure 3 illustrates the relative error ξX(x) associated to the distribution BM1 obtained with the Box Muller method and the parameters of Table 1.5 x 3 3.1 -0.v.3. a number N of independent r. With a reduced complexity (low value parameters) it is hardly possible with The Box-Muller to reach the initial constraint of (0.2%.5 4 4. Param. To smooth the large variation of the distribution BM1.4 0.2 -0.2.5 2 2. BM2 and BM4 11 .4 -0.5 b q_f 6 4 Table 1: Characteristics of the Box-Muller WGNG. 4 σ) accuracy. The resulting distributions BM2 and BM4.3 -0.467 q’ q_g 8 m’ m_g 6 δ’ d_g 0.1 0 -0. 0.5 0.5 5 BM1 BM2 BM4 Figure 3: ξX(x) for X= BM1.5 1 1. Matlab BM1 b q K K 5 M m_f 7 δ d_f 0.3 0.

The uniformly distributed random variables are generated by using several Linear Feedback Shift Registers (LFSR) (see chapter 4. Result of figure 3 shows that BM4 fulfills our initial requirement of a (0. The exact distribution of BM4 can also be exactly computed (BM4 = BM2⊗ BM2). Overall architecture Figure 4 shows the general architecture of the WGNG. respectively (a.b) 2 .1.One can note that exact distribution of BM2 can be computed as the auto-convolution of BM1: BM2 = BM1⊗ BM1. Larger functions can be obtained 12 .2) N iterations ROMs q s1 q s2 fr LFSRs (4.b)2 ) trunc + .b2 (4.b) 2 ..2%. 4. n n (4+log2(N). 4. The targeted FPGA structure is based on logic cells [10] allowing the generation of a logic function of 4 variables.m)2 fr(s) (1. 4σ) accuracy.b)2 q sK q’ s’ 1 sign g Figure 4: Overall architecture where (a. Appendix A gives the reference MATLAB program that compute the exact distribution according to the selected parameters. Architecture This chapter concerns the architectural aspect of the WGNG.m’)2 g(s’) (4. indicates an unsigned (a twocomplement) number with a bits before the dot and b bits after the dot. It explains how to get an efficient and low complexity architecture with a FPGA device.( m’))2 m+ (3. Every logic cell output can be registered.

After accumulation the mean and standard deviation are given by: mean ( BM N . A total of K. is twice as big than the normal distribution (because 2’s complement of 0 is 0). Uniformly distributed variables generation with LFSRs. In our example we truncated to get 6 bits after the decimal point. 4.d.f. a division by –2-b+1 compensates the mean. centered on 0 by using a 2’s complement generator when the sign is 1. If the 1’s complement is used instead of the 2’s complement.q + q’ +1 uniformly distributed variables are needed: 4 =2) and the addition with 13 . A 256-byte FPGA on-chip RAM can be used for the g ROM (m’=8-1=7). For instance if N=4.2. Once the Box-Muller variable is generated a truncation is done to keep only b bits after the decimal point. the mean value becomes –2-b-1 instead of 0 before accumulation. The back end stage consists in multiplying the noise according to the needed signal power and in adding the result to the signal.b ) = N (14) (15) To be as close as possible to N(0.d. The parameters of Table 1 offer a good trade-off between performance and FPGA complexity. which means that (3+m)K=50 logic cells are needed for the fr ROMs.f.by combining logic cells. In Table 1 q=4 allows the designer to perform a fr ROM of 3+m bits with only 3+m logic cells.b ) = − N ⋅ 2 −b −1 standard deviation ( BM N . As shown in Figure 3 (BM4) and Table 1.1) when the 1's complement is used. a compensation has to be done at the back end stage. The multiplication by the sign permits to get a p. a mere left shift of the decimal point is enough to compensate σ (i. In this case the zero value of the p. The logic cells input being 4 uniformly distributed address bits.e. good results are obtained with K=5 and m=7.

This technique can be easily coded in VHDL and generates almost no extra FPGA logic cells.. Associating q independent LFSRs generate a q bit variable Uq uniformly distributed over {0.. 2. 29 uniformly distributed variables have to be generated. 1. The LFSR design in FPGA need only n logic cells. necessiting only 7 LFSRs. the number of LFSRs can be reduced if the address bits are grouped by packet of 4.. At every clock cycle. Figure 5 illustrates the LFSR structure called "one to many" with the polynomial x5 + x2 +1: D Q x D Q x2 + D Q x3 D Q x4 D Q x5 clk Figure 5: LFSR for x5 + x2 +1 Considering the parameters of Table 1. For instance for the LFSR of figure 5.K. the register x can be expressed as x (t)= x (t-1) = x (t-3)+x (t-3) = x(t-4)+x (t-4). one for each fr ROM and one for the sign.q’ to address the g ROM . 14 .1 to generate the sign. 4 bits are used as outputs and "shifted".. 2q-1}. 4 virtual shift operations are done in one clock cycle. . each of them with its own register. The code of the LFSR function generator is given in the Annex B for any number of outputs (parameter nb_iter in the code). It is known that a Linear Feedback Shift Register LFSR associated with its characteristic polynomial G[x] of order n can generate a very good random like binary variable of periodicity 2n-1 [4]. By considering operations every 4t.q to address the K fr ROMs. 2 for the g ROM. t being the clock 5 5 4 2 5 4 period. . Figure 6 illustrates the LFSR structure with polynomial x5 + x2 +1 and 4 ouputs.

e. at least a total of 60 registers of LFSRs are needed. a periodicity greater than 260 cycles). This table shows combinations of the 4-outputs LFSR corresponding to each fourth -combination of the 1-output LFSR. 15 .D Q x2 s0 + D Q x3 s1 + + clk D Q D Q x4 s2 x + D Q x5 s3 Figure 6: LFSR for x5 + x2 +1 and 4 outputs LFSR 1 output t 0 1 2 3 4 5 6 7 8 9 10 11 12 X 1 0 0 0 0 1 0 0 1 0 1 1 0 2 X 0 1 0 0 0 0 1 0 0 1 0 1 1 3 X 0 0 1 0 0 1 0 1 1 0 0 1 1 4 X 0 0 0 1 0 0 1 0 1 1 0 0 1 5 X 0 0 0 0 1 0 0 1 0 1 1 0 0 LFSR 4 outputs X 1 0 1 0 1 0 0 0 0 1 0 0 1 2 X 0 0 0 1 1 0 1 1 1 0 1 0 1 3 X 0 0 1 1 0 1 1 1 0 1 0 1 0 4 X 0 0 1 1 1 1 1 0 0 0 1 1 0 5 X 0 1 0 0 1 0 1 1 0 0 1 1 1 Table 2: LFSR sequences The sequence of the first 12 combinations is indicated in Table 2. In order to keep the highest period. The initial value is "00001". the LFSRs need to have periods prime between them. we propose to select the LFRS’s length from the "Mersenne" numbers (number d so that 2d–1 is a prime number). To meet this condition. In order to meet the periodicity constraint (i.

1 Accuracy By considering the parameters of Table 1 and x between 0 and 4σ.5MHz Table 4: synthesis results 16 . The accuracy is given for different values of the number b of bits after the decimal point.9 237 503 N=3 0. b=6 and LFSRs of length 22.5MHz 24.08 1.5 20.6 57.467 5 δ=0.4 5.5 clock rate 74MHz 98MHz Output rate 18.13.29 0. the maximum relative error ξX(x) between the ideal gaussian distribution N[0.34 0.21.5.7.71 1.467 8 δ=0.65 11.467 N=2 0.445 4 δ=0.12 5.1] and the synthesized one is calculated by using a MATLAB model.31 0.4 5.17.56 0.44 2 δ=0.93 0.453 3 δ=0.467 7 δ=0.3 71.15 0.43 0.8 8.467 6 δ=0. N=4.20.5 N=4 0.69 0.5. For every value of b the optimal value of δ is indicated.76 N=5 0.28 0.26 Table 3: maximum relative error for different N and b 5. Results 5.38 0.93 0. Table 3 represents the maximum relative error expressed in 10-3 for different values of N and b.2 64.96 2.15 registers for respectively g.2 Synthesis Table 4 gives the results obtained with the parameters of Table 1.68 1. and the number of accumulations N.4 26.12 1. fr and sign: FPGA device 10K100ARC240-1 10K100EQC240-1 Cells mem block 434 437 1 0. b Max ξX(x) ∗10-3 Between 0 and 4σ 1 δ=0.

Conclusion In this work. The number of cells of the LFSR part is 149. When the number of samples increases. 4σ) accuracy. we use both the Central limit theorem and the Box-Muller methods to obtain a probability density function with a (0. For easy evaluation. a MATLAB reference program is elaborated which takes the hardware architecture characteristics (memory size. Figure 7 illustrates the relative error obtained with 109 samples.2%. is defined. together with its deviation from the theoretical gaussian distribution. Moreover. A generic MATLAB 17 . the distribution converges towards the result of the MATLAB simulation 6. Figure 7: relative error with 109 samples The difference between the theoretical distribution and the one obtained is due to the low number of samples obtained for high value of σ.…) into account. a linear representation of the distribution. data format.The synthesis has been done using FPGA ExpressTM and MAX+PLUSIITM. Note that a sample can be obtained at a rate of 98MHz using 4 parallel BoxMuller generators and one 4-word adder.

Electrical Engineering Series. “Digital communications”. H. Vol 52. 1998 [8] J. Proakis. the WGNG can also be used to emulate the Rayleigh. [4] E. J. 1998. Aug. Reference [1] J. Ghazel. 1968 [5] J. "The Art of computer programming". The radio and Electronic Engineer. the Ricean channel or even more complex channels. Mc GRAW-HILL International Editions. G. Virtual Turbo. Gulak. J. IEEE ICECS conference. june 2001. Boutillon.R. "A real time fading simulator for mobile radio". Victoria. Lebanon.G. Laslik. Berrou. [2] M. Sweden. C. Lund. Boutillon. pp. A. "Algebric Coding Theory". Danger. Berlekamp. E. [10] ALTERA Data Book 1998 18 . [3] J. Laamari. Knuth.. 35-41. [6] M.L. McGraw-Hill.model has been written to allow the designer to adapt the quality of the gaussian distribution to his needs and consequently to adjust the parameters of the VHDL model. N°10. One can note that using filtering and appropriate mathematical functions. TURBO CODING Seminar. 2001. Jézéquel. Sichez. ADDISON-WESLEY. "Test of a Turbo-Encoder/Decoder". Jézéquel. B.R. 28-29 August 1996. "Efficient FPGA Implementation of Gaussian Noise Generator for Communication Channel emulation". Dec 2000. "Design and performance analysis of a high speed AWGN communication channel emulator". Touch.October 1982.C. Ghazel. R. ENST Bretagne. Studies are pursued in this direction. Inisan and Y. [9] A. E. Ball. [7] Donald E. june 2001. Danger. personal communication.L. personal communication. IEEE PACRIM conference.

max = floor(1 + rom_f(1.r)=floor(sqrt(log((s+d_f)* pow2(r*q_f)))*pow2(m_f)). rom_f(pow2(q_f).max+1). end. BM(max+1)=HBM(1). BM). BMi = BM. for u=1:pow2(q_g) %ROM g(x) rom_g(u)=floor(sqrt(2)*cos(pi*((u-1+d_g)*pow2(-q_g-1)))*pow2(m_g)). % Initialisation of the distribution HBM scaling = pow2(m_f + m_g .5*HBM(max+2-i).Appendix A: Reference MATLAB Program (See table 1 for the name and the value of the parameters) for r=1:K % ROM fr(s) for s=1:pow2(q_f)-1 rom_f(s. end. end. for i = 1 : max %Construction of BM BM(i) = 0. % Construction of BM_N for i = 1 : N-1 BMi = conv(BMi . BM(2*max+2-i) = BM(i).K)*rom_g(1)/scaling) HBM = zeros(1. HBM(n+1) = HBM(n+1) + pow2(-(r*q_f + q_g)). end. r) = 0. end. for s=1:pow2(q_f)-1 %Construction of HBM for r=1:K for u=1:pow2(q_g) n=floor((rom_f(s. 19 . end. end.b). end.r)*rom_g(u)/scaling)).

x^5 + x^2 when 4 => pol_gen := "0011". en : std_logic. ELSE pol_int := (pol_int(pol’length-2 DOWNTO 0)&’0’).x^2 + x + END CASE. when 20 => pol_gen := "00000000000000001001". RETURN (pol_int). when 17 => pol_gen := "00000000000001001". when 21 => pol_gen := "000000000000000000101". pol_int := pol. when 5 => pol_gen := "00101". -. END IF.Appendix B: LFSR VHDL code FUNCTION gen_lfsr( pol : std_logic_vector. iteration : FOR i in 1 to nb_iter LOOP IF en = ’1’ THEN IF pol_int(pol’length-1)=’1’ THEN pol_int := (pol_int(pol’length-2 DOWNTO 0)&’0’) xor pol_gen. END IF.x^4 + x + when 3 => pol_gen := "011". when 13 => pol_gen := "0000000011011". + 1 1 1 1 20 . END LOOP. ELSE pol_int := pol_int. -. nb_iter : natural RETURN std_logic_vector IS VARIABLE pol_int : std_logic_vector(pol’length-1 DOWNTO 0). -. -.x^3 + x + when others => pol_gen := "11". END gen_lfsr. VARIABLE pol_gen : std_logic_vector(pol’length-1 DOWNTO 0). when 7 => pol_gen := "0000011". BEGIN CASE pol’length is when 22 => pol_gen := "0000000000000000000011".

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