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Chapter 3: 8088/80x86 Addressing Modes

Qi Cheng

Chapters 3: Overview
Memory/IO addressing details focus on locations of two operands Instruction addressing Stack addressing

3.4 MOV Instruction


MOV
Note: e.g.,

Destination, Source (Move byte or word data)


Destination and Source should be of the same size. MOV MOV AL,30H DL,AL ; AL 30H ; DL AL

but not MOV DX,AL ; illegal

Note that MOV DS,1000H is an illegal instruction (not defined). initializing segment register: MOV MOV AX,1000H DS,AX

3.5 Addressing Modes


way to define addresses of operands By default, CPU uses DS as segment register (because operands are data), and offset should be specified in instructions. BP and SP use SS as segment register.

Physical address: combination of segment register content and an offset

3.5 Addressing Modes


(1) Immediate addressing

Example: What is the function of MOV CX,7? Sol: CX=16bit, then 7=0007H,

Machine code: B9 07 00 (3 bytes)

(2)

Register addressing

Example: If AX=1000H, BL=80H, what is the result of MOV AL,BL? Sol: BLAL, result is AX=1080H.

Machine code: 88 B8 (2 bytes)

3.5 Addressing Modes

3.5 Addressing Modes

3.5 Addressing Modes


(3) Direct addressing
(square brackets refer to memory location(s))

Example: MOV [7000H],AX ? If DS=1000H. Sol: copy 16-bit number in AX 2 memory locations DS:7000H, DS:7001H but where? Physical address=10000H+7000H=17000H. Result: copy AL to 17000H and AH to 17001H.

Machine code: A3 00 70 (3 bytes)

3.5 Addressing Modes

MOV [7000H],BX ? If DS=1000H.

Can you have MOV 7000H,BX ? Why?

3.5 Addressing Modes


(4) Register indirect addressing (square brackets refer to memory location(s))

Example: Assume that SI=2000H, DS=0800H. MOV DL,[SI] ? Sol: copy 8-bit number in a memory location DL but where? Physical address = 08000 H+2000H = 0A000H. Result: copy the number in 0A000H to DL Machine code: 8A 14 (2 bytes) MOV MOV DL, ES:[SI] ? ES:[DI],AL ? 10

3.5 Addressing Modes


(5) Based addressing (square brackets refer to memory location(s))

Example: MOV AX,[BX+4] ? if DS=0100H, BX=0600H. Sol: copy 16-bit number in 2 memory locations AX but where? Physical address=01000H+0600H+0004H=01604H Result: copy the number in 01604H to AL the number in 01605H to AH Machine code: 8B 47 04 (3 bytes)

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3.5 Addressing Modes


(5) Based addressing (square brackets refer to memory location(s))

Example: MOV AX,[BP+4] ? if SS=0200H, BP=0100H. Sol: copy 16-bit number in 2 memory locations AX SS:0104H, SS:0105H but where? Physical address=02000H+0100H+00004H=02104H Result: copy the number in 02104H to AL the number in 02105H to AH

Machine code:

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3.5 Addressing Modes


More examples on segment override prefix: MOV MOV MOV MOV AX, [3000H]
( AX 16-bit number in DS:3000H, DS:3001H)

AX, ES:[3000H] ( AX 16-bit number in ES:3000H, ES:3001H) AX, SS:[3000H] ( AX 16-bit number in SS:3000H, SS:3001H) AX, CS:[3000H] ( AX 16-bit number in CS:3000H, CS:3001H)

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3.5 Addressing Modes


Examples for arithmetic/bit instructions

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3.5 Addressing Modes


Examples for program transfer instructions

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3.5 Addressing Modes (week 5)


(7) Indexed addressing (8) Based indexed addressing (left as exercise) (left as exercise)

(9) Based indexed with displacement addressing (left as exercise) (10) String addressing MOVSB move a string one byte

before
SI DI DS ES 8760H 7860H

after
8761H 7861H

not affected in this example not affected in this example

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3.5 Addressing Modes

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3.5 Addressing Modes


(11) 8088 Port addressing (review) IN OUT AL,40H 80H,AL

Total no. of ports is 256.

80x86

MOV IN OUT

DL,80H AX,38H DL,AX

Total no. of ports is 65,536.


(12) 32-bit addressing not covered in this subject

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3.5 Addressing Modes (supp.)


(1) Instruction addressing: way to specify the address of next instructions

JMP, JZ, CALL RET, IRET


CPU uses CS and IP to generate address of instructions. Continuous execution of instructions is accomplished by adjusting IP

(2) Stack addressing: way to specify the address of data in stack

PUSH, POP

CPU uses SS and SP to generate address of top memory location in stack.

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3.5 Addressing Modes (supp.)

Instruction Addressing Use of CS & IP

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3.5 Addressing Modes (supp.)

Stack Addressing Use of SS & SP

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3.5 Addressing Modes (supp.)


Stack Addressing Use of SS & SP

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3.5 Addressing Modes (summary)


Summarydirect & indirect addressing Direct ---the instruction specifies the address Indirect ---the instruction specifies where to find the address Memory indirect---A memory location contains the address Register indirect---A register contains the address

Indirect addressing is needed for array/list processing

Summaryregister indirect addressing

[BX],[BP] [SI],[DI] [BX+disp],[BP+disp] [SI+disp],[DI+disp]

Based Index Based + displacement Index + displacement

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3.5 Addressing Modes (summary)

Type of Memory Reference

Default Segment Base Alternate Segment Base CS SS DS DS ES SS DS None None CS, ES, SS CS, ES, SS None CS, DS, ES CS, ES, SS

Offset IP SP Physical Address SI DI Physical Address Physical Address

Instruction Fetch/Program transfer Stack Operation Data Transfer (except following) - String Source - String Destination - BP used as Base Register - BX Used as Base Register

Type of Memory Reference Arithmetic operations Logic operations Shift/rotate operations

Default Segment Base Alternate Segment Base DS DS DS CS, ES, SS CS, ES, SS CS, ES, SS

Offset IP SP Physical Address

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Chapter 3: Summary
1 Addressing modes

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