 Need for Hyper Transport Technology  Definition of Hyper Transport Technology  Foundation of Hyper Transport Technology  Multiple Topology  Hyper Transport Technology  Command/Address/Data packet protocols  Hyper Transport Packet Format  A Low Latency Solution  Conclusion


 Unrealistic and expensive both in actual costs and power consumption.  Wider buses for higher performance through

higher bandwidth.  Due to ever shrinking desktop and server form factors required by IT.

Support for 64 bit Address .Error Recovery Protocol 3. Flexibility Scalability Adoption Networking Extensions 1.Differential signaling.Supports Peer-To-Peer Transfer 4.Foundation of Hyper Transport Technology  Signaling Basics     1.Message Passing Protocol 2.Use of advanced LVDS. 2.

Distributes HTT links in a spoke fashion. .MULTIPLE TOPOLOGIES  Daisy chain topology.HTT Tunneling makes daisy chains unto 31 independent devices  Switch Topology.  Star Topology.HTT Switch is designed for use in latency sensitive environment supporting multiple processes.

Topology (Daisy chain) .

Topology (Switch) .


Hyper Transport Technologies  Support for Multiple Packages  Easier to Layout  Electrical Considerations  Signal Routing  Reduction of Electrical Noise  Better Grounding  Other Issues .

 Reduced inductance and capacitance on the signals. .Supports for Multiple Packages  HTT uses Flip-Chip Package. BENEFITS ARE:  Lower inductance power Connection.

Easier to Layout  SKEW is caused due to path difference in different paths.  With the use of an independent clock for every grouping of 8 LVDS signals. SKEW is reduced significantly. .

Signal voltage on each wire line is symmetrical and of opposite polarity. ensuring the highest noise immunity.Electrical Considerations The Hyper Transport link uses balanced LVDS lines. .

Has smaller matching requirements. 2. Is far easier to implement. 2. HTT has advantages: 1. 3. To facilitate better bandwidth within the video system. To relieve the PCI bus of work with graphics data. Is faster than AGP.Signal Routing AGP was designed with two purposes: 1. .

.crosstalk is reduced.Reduction of Electrical Noise  Figure shows crosstalk due to electrical/magnetic field affecting the signals of adjacent links in PCI buses  By the use of differential signaling used in HTT.

complement and ground.BETTER GROUNDING  It has three linkstrue.  Complementary link can be used as secondary link when required. .

OTHER ISSUES EMI Elimination Easier To Power ON-Chip Termination .

Command/Address/Data packet protocols  The Hyper Transport dual. Address and Data are carried in packets over the data path.  System level control lines RESET# and PWROK complete the required set of signal lines . one or more clock signals and a single control line. point-to-point unidirectional links include a data path.  Commands.

one control line per link. and one clock line per eight bits of CAD. .Command/Address/Data packet protocols The Hyper Transport link consists of a set of command/ address/data (CAD) lines.

Command/Address/Data packet protocols .

. Data packets consist of 4.Hyper Transport Packet Format Hyper Transport control packets consist typically of 4 to 8 bytes of command information. With optional 64-bit extended 64-byte data payloads (in increments of 4 bytes) and directly follow either (1) an 8byte read request followed by a 4-byte read response or (2) an 8-byte write request control packet. control packets can be 12 bytes.

followed by the actual read data packet. Writes require only an 8-byte Write Request control packet followed by the data packet. followed by a 4-byte Read Response packet from the receiver.Hyper Transport Packet Format Hyper Transport reads and writes are very low overhead. Reads require an 8-byte Read Request control packet. .

 Lowest possible overhead in supporting packet-based data streams. focused on creating a unified chip-to-chip communications channel that exhibits  Lowest possible latency.Low-latency Solution Hyper Transport. Priority Request Interleaving (PRI) .

Low-latency Solution Packet overhead comparison between Hyper Transport and PCI Express. .


speed chips and interconnect standards. Support for asymmetrically links and scalability in speed. Hyper Transport technology extends the lifespan of devices by providing enough bandwidth headroom to allow system designers to add new high performance parts. frequency. drivers.voltage differential signaling helps to eliminate many of the problems associated with single-ended signaling. width. The use of enhance low . and operating systems while eliminating bottlenecks and providing the bandwidth necessary for future high . Hyper Transport technology extends the lifespan of PCI by providing full backwards compatibility for PCI software. .CONCLUSION  The tunneling capability enables up to 31 devices to be connected     in a chain. including crosstalk and EMI. and direction allows system designers to have the flexibility to trade performance for cost and power savings where it is appropriate.

Thank You .

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