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2013/2/6

IP RAN Network Planning Basics

Contents IP RAN Overview Key Technologies of IP RAN

RAN Overview

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Positioning of the RAN in a UMTS

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RAN Architecture A RAN is composed of RNCs, NodeBs, and the M2000. RNCs and NodeBs are network elements; the M2000 is an Element Management System (EMS). RNCs, NodeBs, and the M2000 are connected to each other, forming a RAN.

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Outward Interfaces of the RAN


The RAN provides outward interfaces that comply with 3GPP standards such as Uu, Iu, and Itf-N interfaces. Uu and lu are open interfaces and devices made by different vendors can interconnect through them. Itf-N interfaces are private interfaces.

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Inward Interfaces of the RAN


The RAN provides interfaces that comply with 3GPP standards such as Iub, Iur, and ItfS interfaces to interconnect the devices inside the RAN. Iub and Iur are open interfaces and devices made by different vendors can interconnect through them. ItfS interfaces are private interfaces.

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Session services: have very high requirements for real-time transmission and allow error codes to a certain extent. Session services include the voice service and video phone service. Flow services: have high requirements for real-time transmission and are transmitted through stable and continuous data flows. An example of flow services is the multi-media service. Interaction services: have only moderate requirements for real-time transmission but require integrity and accuracy of data. Interaction services include webpage browsing and location-based services. Background services: do not require real-time transmission but require integrity and accuracy of data. An example of background services is the e-mail service.

RAN Services

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NodeB Overview
Being a base station in the UMTS, a NodeB can transmit RF signals to a UE or receive RF signals from a UE to implement wireless coverage. A NodeB is connected to an RNC through an Iub interface.

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RNC Overview
Physically, an RNC can be divided into the hardware and software; logically, an RNC can be divided into the switching sub-system and service processing system. The hardware of an RNC is composed of a switching cabinet, service cabinet, Local Maintenance Terminal (LMT), and alarm console. Besides ports for inputting power and clock signals, an RNC provides ports for communicating with NodeBs, Serving GPRS Support Nodes (SGSNs), Mobile Switching Center (MSCs), other RNCs, and the M2000.The software system of an RNC is composed of several pieces of software which supports the operation of the entire system. The RNC software adopts a distributed structure design, including the foreground host software and BAM software, which can communicate with each other. The switching sub-system and service processing sub-system form the host system (also called foreground administration module). The operation and maintenance sub-system includes the background administration module (BAM) and LMT.
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IP RAN

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What Is an IP RAN?
On an IP RAN, Iub interfaces can transmit traffic based on IP. At present, Iu and Iur/Iub earth interfaces of RANs based on WCDMA R99 and R4 perform ATM transmission. In addition, RNCs and NodeBs are tightly coupled. Consequently, both the CapEx and OpEx are high. To effectively protect carriers' investment, reduce CapEx, and achieve smooth evolution of 3G networks, IP will be introduced for RANs in the WCDMA R5 phase. The IP RAN solution aims to fix these issues. In summary. Summarily, on an IP RAN, IP replaces ATM as the transmission technique.

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Why IP RAN?
Air Interface Technology
3G(R99/R4) UL: 384 Kbps DL: 384 Kbps 3G+HSxPA(R6/R7) UL: 5.76 Mbps DL: 14.4 Mbps 3G+E-HSPA(R8?) UL: 12.5 Mbps? DL: 25 Mbps?

LTE UL: 50 Mbps DL: 100 Mbps

3G+HSDPA(R5) UL: 384 Kbps DL: 14.4 Mbps

20-100 Mbps 10-50 Mbps 3-20 Mbps 64-384 Kbps 384 K5 Mbps

Service Bandwidt h
64-144 Kbps

2002-2003 2003-2004 2005-2006 2006-2007 2008-2010 2010-2012


Due to the growth of the mobile broadband service, the bandwidth of bearer networks are multiplied about 50 times, and the cost of backbone networks are multiplied about 10 times. In the mobile broadband era, data services have consumed more resources than ever, whereas the profit per bit decreases. Reducing the cost of backbone networks becomes a big challenge to carriers.

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Why IP RAN?

Sharing the rich access resources of IP datacom networks

Being the mainstream of datacom networks, IP datacom networks are of large scales and provide a great variety of access modes. By introducing the IP RAN function, carriers can efficiently use the resources of IP networks and perform Iub-based networking.

Benefiting the low CapEx of IP transmission networks


Compared with the ATM transmission technology, IP transmission gains support from more equipment vendors because of its low CapEx.

Following the network evolution trend and protecting carriers' investment IP transmission is the prevailing technology of datacom networks and is the direction for the further development of datacom networks. Introducing the IP RAN technology, you can follow the network evolution trend and protect your investment.

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IP RAN Typical Networking


FE ADSL Modem Copper DSLAM FE NodeB

Adaptive clock recovery or Synchronous Ethernet

NodeB

Ethernet/IP/MPLS

RNC RNC

TDM PWE3

RNC RNC GSM BTS TDM E1 BSC

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Contents
IP RAN Overview Key Technologies of IP RAN

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Key Technologies of IP RAN


PWE3 Clock QoS OAM

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PWE3
Introduction to PWE3 TDM to PWE3 ATM to PWE3 Eth to PWE3 Applications of PWE3 PWE3 for PTN devices PTN planning rules

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What is PWE3
PWE3
Pseudo Wire Emulation Edge-to-Edge
CE

PE PW1 PW3

AC PE PW2

PE
CE

CE

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PWE3 Reference Model


Emulated Service Pseudo Wire PSN

AC
CE1

PE1

Tunnel Tunnel

PE2

AC
CE2

Custo Provid m er Edge 1Native Edge 1 Servic e AC: Attachment Circuit


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Provid er Edge 2

Custo m Edge 2 Native Servic e

PWE3
Introduction to PWE3 TDM to PWE3 ATM to PWE3 ETH to PWE3 Applications of PWE3 PWE3 for PTN devices PTN planning rules

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TDM PWE3 Reference Model


SAToP CESoPSN

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SAToP
SAToP: is short for Structure Agnostic TDM over PSN
Payload
Ch0

E1
Ch31

Ch1

E1 data

Header

PTN
Ch31

Ch1

Ch0

E1 data

Header

E1 data flow being transmitted over a PSN

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Features of SAToP
The features of SAToP are as follows: 1. Does not need to protect the integrity of the structure, or explain or control the channels. 2. Applicable to PSNs of higher transmission performance. 3. Does not need to distinguish channels and disrupt TDM signaling.

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SAToP Encapsulation
Three optional PW external tunnel encapsulation modes are listed in RFC 4553:
IP/UDP mode, L2TPv3 mode, and MPLS mode. In IP/UDP and L2TPv3 modes, a SAToP PW can be carried on an IPv4/IPv6 PSN. If the PSN is an MPLS network, the carrying mechanism in MPLS mode is adopted. At present, TDM emulation on PTN devices supports the MPLS mode.

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CESoPSN Transmission Mode


CESoPSN: is short for Circuit

Emulation Services over PSN


E1

Channels may come from any E1 stream (IP/UDP/RTP/PW) Payload


Ch1 Ch0

Ch31

PTN

Ch31

Ch22 Ch21 Ch20

Ch1

Ch0

Header

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Features of CESoPSN
The features of CESoPSN are as follows: 1. When services are sent to PSN, TDM structure needs to be protected. 2. The transmission of sensible structure can be applied to PSN network with lower performance. The mode can improve the reliability of the transmission.

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CESoPSN Encapsulation
Three optional PW external tunnel encapsulation modes are available for CESoPSN: IP/UDP mode, L2TPv3 mode, and MPLS mode. Different from that of SAToP, the TDM data borne by PW through CESoPSN adopts a frame structure. Domain M is added to the PW control field in the PW packet to indicate the detection of AC-side signaling. Huawei TDM transparent transmission devices support CESoPSN of the MPLS mode.

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Key Technologies of TDM PWE3 Data Jitter Buffer


After traversing a PSN and reaching the egress PE, PW packets may have different arrival intervals or packet disorder may occur. To reconstruct TDM service flows on the egress PE, you need to maintain the intervals of receiving PW packets through the jitter buffer technology and rearrange the sequence of distorted PW packets. The jitter buffer of a larger capacity can accept a greater jitter in the transmission interval of packets on the network, but causes a longer delay in the reconstruction of TDM service flows. A jitter buffer can be configured by users under different delay and jitter conditions.

At present, the TDM circuit emulation boards of Huawei PTN devices allow you to set the jitter buffer capacity through commands.

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Key Technologies of TDM PWE3

Analysis of data delay Encapsulation Delay Encapsulation delay occurs when TDM service flows are encapsulated into PW packets. Service Processing Delay Service processing delay refers to the delay when the device processes packets, including packet legality check, packet filtering, check and calculation, packet encapsulation, packet receiving, and packet sending. This delay is related to the service processing capacity of devices, and is therefore, remains unchanged.
Network Transmission Delay

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Key Technologies of TDM PWE3


Clock recovery mode Adaptive Clock Recovery (ACR) External clock QoS processing TDM services require low delay, low jitter, and fixed bandwidth, that is, high priority of QoS and forwarding. On a PTN, TDM services are forwarded with the priority of EF.

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PWE3

Introduction to PWE3 TDM to PWE3 ATM to PWE3 ETH to PWE3 Applications of PWE3

PWE3 for PTN devices


PTN planning rules

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ATM PWE3 Encapsulation Format


0 1 2 3 PSN Transport Header Pseudo Wire Header ATM Control Word ATM Service Payload

The OptiX PTN supports the following encapsulation types:


No. 3 9 10 12 13 PW Type 0x0003 0x0009 0x000A 0x000C 0x000D Indication ATM transparent cell transport (V1R2) ATM n-to-one VCC cell transport ATM n-to-one VPC cell transport ATM one-to-one VCC Cell Mode ATM one-to-one VPC Cell Mode

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Encapsulation Mode
N-to-one ATM cell encapsulation mode This mode is a standard-defined encapsulation mode and allows one or more ATM connections to be mapped to one PW. In this mode, the CW is optional.
0000 ATM payload48bytes VPI VCI ATM payload48bytes PTI C Tunnel Label PW Label Length Flags rsv VPI EXP S EXP S Sequnce Number VCI TTL TTL PTI C

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Encapsulation Mode
One-to-one ATM cell encapsulation mode

In this mode, one PW can bear one VPC/VCC. One or more cells can be encapsulated to improve bandwidth usage. VPC VCC
0 1 2 3 0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1

PSN Transport Header in PWE3 Pseudo Wire Header in PWE3


0 0 0 0 Resvd Sequence Number M V RES PTI C 0 0 0 0 Resvd

PSN Transport Header in PWE3 Pseudo Wire Header in PWE3 Sequence Number VCI
M V RES PTI C

Payload48 octets
M V RES PTI C

Payload48 octets Payload48 octets


M V RES PTI C VCI

VCI

Payload48 octets

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Key Technologies of ATM PWE3


Analysis of data delay Packet encapsulation delay, service processing delay, and network transmission delay QoS processing mechanism The ATM service transmission capability depends on the requirements for delay and jitter. Generally, the forwarding classes are as follows: CBR service flow: EF RT-VBR service flow: AF3

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NRT-VBR service flow: AF2


UBR service flow: BE

PWE3

Introduction to PWE3 TDM to PWE3 ATM to PWE3 ETH to PWE3 Applications of PWE3

PWE3 for PTN devices


PTN planning rules

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Eth PWE3 Reference Model


Emulated Ethernet Emulated Ethernet (including VLAN) Emulated Service (including VLAN) Service Service Demultiplexer PSN MPLS/IP Physical Pseudo Wire PSN Tunnel Demultiplexer PSN MPLS/IP Physical

PSN

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Eth PWE3 Encapsulation Format


0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1

PSN Transport Header in PWE3

Pseudo Wire Header in PWE3

0000

Reserved

Sequence Number

ETH Payload

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PWE3

Introduction to PWE3 TDM to PWE3 ATM to PWE3 ETH to PWE3 Applications of PWE3 PWE3 for PTN devices PTN planning rules

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Bearing of Multi-services: TDM Solution


Line Interface
Abis TDM E1 Abis MPLS TDM PPP/ PWE3 ML-PPP HDLC POS/E1 GE Abis TDM PWE3

Network Interface
CESoPSN SAToP
MAC

Line Interface
Abis TDM E1/ch STM-1

idle timeslot regenerated

1+1/1:1 APS

2G BTS
TS# 1-9

E1 E1 E1

---PoC3

STM-1

----

PSN
PoC1 BSC
MSP

-Idle TS suppression TS# 1-6

-Idle TS suppression TS# 1-8

E1/POS/GE/ch STM1

Tunnel
--

Idle TS suppression

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Bearing of Multi-services: ATM/IMA Solution


Line Interface
lub UP AAL2 ATM IMA E1 --lub UP AAL2 ATM PWE3 lub UP AAL2 ATM PWE3 MPLS lub UP AAL2

Network Interface

Line Interface

N:1 ATM PWE3 Encapsulation

ATM STM-1

3G Node B

E1 E1 E1

1+1/1:1 APS

STM-1

PSN
PoC3
E1 E1 E1

PoC1

RNC

E1/POS/GE Tunnel
Legend EF AF3

3G Node B

BE

IMA is short for Inverse Multiplexing for ATM. As shown in the above figure, the sender schedules and distributes a high speed ATM cell stream to multiple low speed physical links for transmission, and then the receiver schedules and recombines them into one cell stream and submits the cell stream to the ATM layer.
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Bearing of Multi-services: IP/Eth Traffic Solution


Line Interface
lub UP 802.1Q Eth lub UP 802.1Q Eth PWE3 lub UP 802.1Q Eth PWE3 MPLS --lub UP 802.1Q Eth

Network Interface

Line Interface

N:1 Eth PWE3 Encapsulation

3G Node B

1+1/1:1 APS GE/FE

PSN
PoC3 PoC1

GE

RNC

E1/POS/GE Tunnel
Legend EF AF3 BE

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PWE3

Introduction to PWE3 TDM to PWE3 ATM to PWE3 ETH to PWE3 Applications of PWE3 PWE3 for PTN devices PTN planning rules

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PTNs Support to PWE3


PWE3 supports all kinds of streams such TDM, ATM, and ETH MPLS and PWE3 provide a unified mobile backhaul network solution MPLS TE provides a service high QoS solution MPLS and PWE3 provide carrier-class protection

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PWE3 Signal: RSVP TE and LDP


Using LDP to establish an end-to-end PW RSVP TE for LSP signaling Routing protocol that supports IS-IS

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PWE3

Introduction to PWE3

TDM to PWE3
ATM to PWE3 ETH to PWE3

Applications of PWE3
PWE3 for PTN devices PTN planning rules

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PWE3 planning rules


To sense the structure of an E1 frame, you can select CESoPSN. Timeslots are not fully occupied; therefore, you can compress timeslots to save link bandwidths.
If you do not need to sense the structure of an E1 frame, you can adopt transparent transmission to simulate TDM services of every type. In this case, you can select SAToP. The PTN device provides three CES service clock synchronization schemes: CE synchronization, PE synchronization, and adaptive synchronization. The adaptive synchronization mode applies to an entire bearer network rather than a synchronization network. The PE connected to the CE recover and synchronizes clocks according to the simulation CES. There cannot be more than five intermediate nodes and the jitter must be lower than 1 ms. The PE synchronization mode: The entire bearing network is a synchronous network (or synchronization sources are introduced to PEs at both ends); the CE clock is synchronized to the PE clock. The CE synchronization mode: A synchronization source is introduced to the CE; the PE clock is synchronized to the CE clock. The PE synchronization mode is much common; the adaptive synchronization mode requires high network performance and is a complementary only. You can configure TPS protection on LPUs according to the service significance. The default forwarding class of services is EF; you need not set a bandwidth. Instead, the network elements work out and assure bandwidth automatically. You need to set the packet frame assembly time (1 ms recommended) and jitter buffer time (5 ms recommended) as required. At present, only the point-to-point service emulation type is supported. That is, services of only one E1 interface can be mapped to the PW.

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Key Technologies of IP RAN


PWE3 Clock QoS OAM

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Clock
Brief Introduction TOP Clock Synchronization at the Ethernet Physical Layer IEEE 1588v2 Clock Planning

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Basic Concepts
What Is Clock Synchronization
Clock synchronization: refers to a strict relationship between signals based on a constant frequency offset or phase offset, in which signals are sent or received at an average rate in an epoch. That is, the difference of phases between signals is a constant value.

Frequency synchronization Clock synchronization (phase synchronization)


Why Clock Synchronization
Frequency offset causes a clock slip. Clock offset causes base station switching.

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Implementing clock synchronization through a PSN

With the fast growth in data services, PSNs are widely applied. The PSN, however, was developed to transfer asynchronous data. If you want to transmit TDM, IPTV, and 3G services on PSNs, you have to considers the high synchronization requirements of these services. This leads to the integration of packet switching technologies and the conventional TDM system. It is required that PSNs should implement clock synchronization.

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Precision Requirements
Clock1 Clock2

The frequency variance between Clock 1 and Clock 2 must be less than 50 ppb; the clock variance between Clock 1 and Clock 2 must be less than 3 us.

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Clock
Brief Introduction TOP Clock Synchronization at the Ethernet Physical Layer IEEE 1588v2 Clock Planning

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Timing Over Packet-switching network (TOP)

TOP is a clock recover technique in which local clock information in a certain encapsulation format is transmitted through a packet. The receiver can recover the clock from the received packet. In this manner, the clock is not affected during the transmission over a PSN. The device that supports TOP can implement clock synchronization on an entire PSN and on a synchronous PSN connected to an asynchronous PSN.
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TOP Technologies
Recovering clock through the timing information in a packet

Generating a packet which carries timing information

TOP Client
Timing packet

queue

PSN
Time Stamp

Frequency recovery

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TOP Technologies
TOP supports the following operation modes:

1. Adaptive
2. Differential

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Application of TOP
TOP Server
TOP Packets

Conventional PSN

TOP Client

TOP Packets

TOP Client

TOP allows you to synchronize the clocks on the devices at the two ends of a PSN.
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TOP Technology
Advantages Supports PSN transparent transmission; the intermediate devices do not have to support TOP; can be applied flexibility. Many chip vendors support TOP; Huawei has developed TOP technologies. Limitations

The clock recovery precision depends on the performance of the PSN. The clock is likely to be affected by network delay, packet loss, and disordering. High QoS has to be ensured.
No standard for TOP has ever been published. Device compatibility is limited. In addition, clock synchronization is not supported.

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Clock
Brief Introduction TOP Clock Synchronization at the Ethernet Physical Layer IEEE 1588v2 Clock Planning

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Synchronization at the Ethernet Physical Layer


It is another technique to implement synchronization on a PSN. This
technique transforms existing asynchronous networks and synchronizes every node on a PSN. Unlike TOP, this technique adopts an SDH-like mode and uses the

feature of the physical layer of an Ethernet. In addition, this technique


recovers clocks from serial data flows, thus synchronizing clocks to the upstream device. This technique is unrelated to upper layer services. This technique adopts clock quality classification information that is

similar to SDH. Instead of being transmitted over the packet cost, this
technique uses a special type of packet to transmit the Synchronous Status Message (SSM).

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Synchronization at the Ethernet Physical Layer


PHY PHY Clock Board System clock Obtaining clock signals
The Ethernet physical layer is capable of recovering clock from serial flows and extracting the source clock.

PHY

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Synchronization at the Ethernet Physical Layer (Synchronization on the Entire PSN)

SSM

PRC

PSN

Implementing synchronization on the entire PSN

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Synchronization at the Ethernet Physical Layer


Advantages The clock synchronization quality is close to SDH. Unaffected by the PSN. The system clock architecture is similar to SDH. The technique is mature. Limitations

Needs to be deployed on the entire network.


Not all Ethernet interfaces allow clock recovery. In addition, clock synchronization is not supported.

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Clock
Brief Introduction TOP Clock Synchronization at the Ethernet Physical Layer IEEE 1588v2 Clock Planning

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IEEE 1588v2
Why IEEE 1588v2
The techniques of clock synchronization at the Ethernet Physical Layer and TOP can implement only frequency synchronization instead of clock synchronization. What is IEEE 1588v2 IEEE 1588 is a precision clock synchronization standard for the network measuring and control system. IEEE 1588 is based on Precision Time Protocol (PTP) and can achieve a clock precision of milliseconds. This standard aims to unify dependently running clocks in the measurement and control system.

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IEEE 1588v2
The key points of IEEE 1588 are as follows:

Best master clock (BMC) algorithm


Master/slave synchronization principle Transparent clock (TC) model

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IEEE 1588v2
Three models are defined in the network architecture of the IEEE 1588: Original Clock (OC) Boundary Clock (BC)

Transparent Clock (TC)

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Principle of IEEE1588v2

Adopting the handshake mode and using precise timestamps to achieve time synchronization
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IEEE1588v2 (simultaneous synchronization of frequency and clock)

TC TC 1588 Master

TC TC 1588 Slave

PSN
RNC

Implementing simultaneous synchronization of frequency and clock between NodeBs and RNCs
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IEEE 1588v2
Advantages
Can implementing clock synchronization The clock synchronization quality is high, and the effect of PSNs is limited. A standard has been released to support this technology. Devices of various vendors can interwork with one another.

Limitations
- All the devices along clock links need to support IEEE 1588. - The protocol has been finalized. This technique has not been commercially

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TOP Based on IEEE 1588v2


IEEE 1588 is developed based on entire network synchronization. The master and slave clocks implement synchronization by means of handshaking. Using the packets defined in IEEE 1588 and synchronization process, you can implement clock frequency synchronization on an asynchronous PSN. It is a means to implement TOP. The clock recovery precision depends on the

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Comparison of the Three Techniques


Technique Advantages Disadvantage Every node on the network needs to support synchronization Ethernet to achieve clock synchronization on the entire network. The number of PHYs that allow clock extraction is limited. Likely to be affected by the PSNs; to be standardized; devices of various vendors could hardly interwork with one another. Usage scenarios Easy to implement. The impact of PSNs is slight. The quality of clock synchronization is close to SDH. The architecture is similarly to that of SDH. The technique is mature. Can transmit clocks transparently across networks. Not all the nodes on the network need to support processing of TOP packets. The application is flexible. The clock frequency can be recovered accurately. A standard is published to approve this technique. Devices of various vendors could interwork with one another with ease.

Ethernet Synchronizati on

PSN frequency synchronization

TOP

Inter-network synchronization and service clock transparent transmission on PSNs

IEEE1588 V2

There is little impact from the PSN. Each node on the network needs to support IEEE 1588.

Use this technique to synchronize clock on the PSN.

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Clock
Brief Introduction TOP Clock Synchronization at the Ethernet Physical Layer IEEE 1588v2 Clock Planning

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Clock Planning Rules


The clock for the backbone and aggregation layer of a network must be well protected. In addition, the clock needs to work in master/slave mode. Generally, at the access layer, only one clock source needs to be set at the central station. The other stations track the clock of the central station. The clock of the central node or at a high-reliability station provides clock sources. If a BITS or a high-precision external clock is available, it is recommended that a network element adopts the external clock. If no BITS or highprecision external clock is available, it is recommended that a network element adopts the line clock. The internal clock acts as a clock of the lowest tracking level. Plan the clock synchronization network properly. Avoid clock inter-locking and clock loops. Line clock tracing needs to follow the rule of the shortest path. For a ring network composed of less than six network elements, you can trace clock source from one direction. For a ring network composed of at least six network elements, the shortest path needs to be tracked. That is, if a network is composed of N network elements, N/2 network elements should track the benchmark clock from one direction; the rest of network elements track the benchmark clock from another direction. For a long link of clocks, clock compensation must be offered. There are at most 10 slave G.812 clocks along a transmission link. There are at most 20 units of G.813 clocks between two slave G.812 clocks. There are at most 20 units of G.813 clocks between G.812 and G.811 clocks. There are at most 60 G.813 clocks. If SSM is not set, do not set clocks to a ring on an network element. The attenuation of received SSM information must be within a certain range. Otherwise, SSM information fails to be received. A site needs to obtain clocks from STM-N rather than branch signals.
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OptiX PTN Clock Protection


If SSM is disabled, the choosing and switchover of clock sources are based on the priority table. In this case, do not add the two clocks of both directions of a network element to the priority table. Otherwise, a lock ring is formed. When standard SSM is enabled, the priority table needs to be set. This is to ensure that the OptiX PTN automatically selects the clock source with the best quality and priority and no clock ring is generated. When extended SSM is enabled, bits 5 to 8 of the S1 byte indicate the clock source quality; bits 1 to 4 of the S1 byte indicate the clock source ID. This aims to prevent clock loops. When setting the clock ID, obey the below rules: - Every BITS needs to be assigned an ID. - The internal clock source of every node connected to a BITS needs to assigned a clock ID. - If a node enters a ring network from a link or another link network, its internal clock source needs to be assigned an ID. - If a node enters a ring network from a link or another link network, its line clock source needs to be assigned an ID, if the clock tracking level is a line clock source.
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Clock configuration for a link network


If SSM is enabled, clock inter-locking does not occur on a link network. If a link network includes more than 20 nodes, the BITS clock needs to be introduced for compensation.

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Clock Configuration for a Tangent Ring


For a tangent ring, you can configure BITS on the tangent point as the benchmark clock for the network.

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Clock Configuration for a Tangent Ring

For a intersectant ring, you can configure master BITS on one intersectant point as the benchmark clock for the network; configure slave BITS on another intersectant point for switchover.

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Key Technologies of IP RAN


PWE3 Clock QoS OAM

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Key Technologies and Planning Rules of QoS


Classification and marking technique: DSCP, IP precedence, and NBAR
When simple flow classification is performed for the access services of the V-UNI user side, you are recommended not to set the traffic forwarding class to a level higher than EF. CS7 and CS7 are reserved for internal protocol packets of the device and network control packets only. When accessing the CES service, by default, the device offers QoS of the EF level for it.

When accessing the ATM service, you are recommended to adopt the default service class in the default template 1. That is, the forwarding class of the CBR service is EF; the forwarding class of the rt-VBR service is AF3; the forwarding class of the nrt-VBR service is AF2; the forwarding class of the UBR service is BE.
For the PTN devices on the border nodes in the DS domain, the recommenced mapping for PHB is as follows: For the service flows from non-DS domains, you are recommended to use complex traffic classification for PHB mapping on the V-UNI. For the service flows from other domains, you are recommended to use simple traffic classification for PHB mapping on the V-UNI. On the intermediate nodes of the DS domain, perform forwarding based on PHB and performs QoS configuration. The nodes in a DS domain need to use the same simple classification rule. For user services without configured bandwidth, you need to set the forwarding class to BE, and the discarding priority is not limited (green by default). Congestion avoidance mechanism: policy and shaping For V-UNI, you are recommenced to set the CAR to limit the access services. When the rate of service flows of the same user or CQ queues on interfaces, the maximum rate variance must be within 100 times.
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Key Technologies and Planning Rules of QoS


Congestion avoidance mechanisms: FIFO, PQ, and WFQ - When planning interface bandwidth, 10% of the bandwidth needs to be reserved for protocol packets. This is to ensure that the control layer and management layer can work efficiently. - It is recommended that the traffic volume of high-priority services (for example, service flows of the EF class) over a PW should not exceed 25% of the PW bandwidth. This is to ensure that low-priority services can pass through the PW. - The tunnel bandwidth must be specified. In addition, the total bandwidth of the TE tunnels over an interface cannot exceed the max. physical bandwidth of the interface.

- Bandwidth allocation for the V-UNIs in a V-UNI group must meet the following rules:
The sum of CIRs of all V-UNIs cannot exceed the CIR of the V-UNI Group. The PIR of any V-UNI cannot exceed the PIR of the V-UNI Group. Bandwidth allocation for the PWs of a TE-Tunnel must meet the following rules:

- The sum of CIRs of all PWs cannot exceed the rate of the TE tunnel.
- The PIR of a PW cannot exceed the rate of the TE tunnel. Congestion avoidance mechanisms: RED and WRED You are recommended to adopt WRED rather than dropping at the queue tail as the congestion avoidance measure for V-UNI, PW, QinQ, and CQ (port queue). DO not change the default WRED threshold.
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Key Technologies of IP RAN


PWE3 Clock QoS OAM

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OAM
MPLS OAM Ethernet interface OAM Ethernet service OAM ATM OAM

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Functions of MPLS OAM


The main function of MPLS OAM is to manage and maintain MPLS LSPs and involves the following operations: - Connectivity Verification (CV) and Fast Failure Detection (FDD): for proactive connectivity

verification
- Forward Defect Indication (FDI) and Backward Defect Indication (BDI): for forward and backward defect indication - LSP ping: for on-demand detection of MPLS LSP connectivity

- LSP TraceRoute: for on-demand tracing of MPLS LSPS and fault location
- PM and LSP detection: detection of delay, jitter, and packet loss rate

OAM packets can detect the connectivity of service channels. Different sites communicate with each other through APS packets and perform switchover. The switchover time reaches the carrier class of less than 50 ms.
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Ethernet interface OAM


Ethernet interface OAM can automatically detect the connectivity and performance of the physical links below the MAC layer. Ethernet interface OAM performs maintenance based on interfaces. It is mainly applied in a scenario where Ethernet physical interfaces are directly connected. Ethernet interface OAM does not perform end-to-end detection across network elements.
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Functions of Ethernet service OAM The major function of Ethernet Service OAM is to manage and maintain end-toend Ethernet virtual links. Ethernet Service OAM involves the following operations: (1) Fault Management

Continuity Check (CC): for end-to-end proactive continuity check


Loopback (LB): for on-demand connectivity check Link Trace (LT): for on-demand Ethernet link tracing and fault location

Ethernet remote defect indication (RDI): for indication of remote defects


(2) Performance Monitoring Performance Monitoring (PM): for detecting the performance such as packet loss ratio, delay, jitter, and throughput of point-to-point Ethernet virtual links.

OAM packets are distinguished by Ethernet Type and passes the same path with service packets.
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ATM OAM Overview


ATM OAM can monitor the operation of ATM links and verifies the connectivity of services without interrupting services. When a link fails, you can locate the fault.
ATM OAM can provide certain information about the network by adding OAM cells with a standard cell structure to user cell flows. ATM OAM can provide end-to-end OAM for services and can detect the quality of ATM links that cross multiple cells.

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Terms
BITSBuilding Integrated Timing Supply System BSC Base Station Controller BTSbase transceiver station CSCircuit Switched IMAInverse Multiplexing on ATM Iuban interface between an RNC and a NodeB NodeB3G BTS PSPacket Switched PTN Packet Transport Network RANRadio Access Network RNCRadio Network Controller SSMSynchronization Status Message TDMTime Division Multiplex(ing)

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Thank you. www.huawei.com

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