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By Asawari Dudwadkar Dept.

of Electronics VESIT

Asawari 2012

IC 8253 is popularly known as Programmable Interval Timers IC (PITs).


Why it is referred as PITs? IC 8253 / 8254 is used as a: 1. COUNTER. 2. TIMER. Why to use 8253? conventional method of doing the same thing? Advantages of using 8253? Earlier Applications.

FEATURES OF PITs:

1. 2. 3. 4. 5. 6. 7.

There are 3 independent 16 bit down counter. Programmable counter modes. Counting facility in both Binary & BCD. Compatible with 8085. 24 pin DIP. Single +5v supply. For 8253 2MHz frequency range & for 8254 10MHz.
IC 8253 IC 8254 1. DC to 10MHz 2. Uses H-MOS technology 3. Read Back command available

1. DC to 2.6 MHZ 2. Uses N=MOS technology. 3. Read back command not available

4. Read and Write of same 4. Read and Write of same counter cannot be interleaved 2012 counter can be interleaved Asawari

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1. Do-D7: Data bus ___ 2. CS : Chip Select. ____ 3. RD : Read ____ 4. WR : Write

5. A0-A1: Address lines


A1 0 0 1 A0 0 1 0 Selected Part Counter 0 Counter 1 Counter 2

1 6. CLK: Clock Input 7. GATE:: Gate Control 8. OUT: Output

Control Register

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The programmable timer IC provides following modes of operation selected by control word M2 M1 M0 :
Mode 0 Interrupt on terminal count

Mode 1
Mode 2 Mode 3

Programmable one-shot
Rate Generator Square wave rate generator

Mode 4
Mode 5

Software triggered strobe


Hardware trigger strobe
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GATE PIN SUMMARY:

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The programming procedure for the 8253 is very flexible. Only two conventions needs to be remembered: 1. For each Counter the control word must be written before the initial count is written. 2. The initial count must follow the count format specified in CWR. (LSB only, MSB only, LSB first then MSB) Since the CWR and the three counters have separate address (selected by A1 A0 inputs) and each Control word specifies the counter it applies to (SC1 SC0 bits), no special instruction is Sequence is required. The two generally used formats for initialising control register and loading count values are as follows:
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FORMAT 1:
A1 1 1 A0 1 1 Details Control word register for counter 0 Control word register for counter 1

1 0
0 0 0 1 1

1 0
0 1 1 0 0

Control word register for counter 2 LSB count register value for counter 0
MSB count register value for counter 0 LSB count register value for counter 1 MSB count register value for counter 1 LSB count register value for counter 2 MSB count register value for counter 2
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FORMAT 2:
A1 1 0 A0 1 0 Details Control word register for counter 0 LSB count register value for counter 0

0 1
0 0 1 1 1

0 1
1 1 1 0 0

MSB count register value for counter 0 Control word register for counter 1
LSB count register value for counter 1 MSB count register value for counter 1 Control word register for counter 2 LSB count register value for counter 2 MSB count register value for counter 2
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There are 2 methods in 8253 and 3 methods in 8254 available for reading the content of counters without disturbing the actual count in progress: 1) Method 1: i.) Simple I/O read operation. ii.) A0-A1 select counters iii.) Read signal is then issued iv.) Counter should be inhibited (latched) by using GATE i/p v.) RL0-RL1 bits should be taken care off. vi.) Chances of missing some of the pulses. 2) Method 2: i.) A special internal logic is accessed by issuing WRITE signal to the control register. ii.) A special code is loaded in the control register which ultimately latches the count value at that instant. iii.) Then Read command is issued. SC1 SC0 0
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3) Method 3 (only available in 8254):

i.) Counter is latched with a read back command.


1 1 ______ COUNT ______ STATUS CNT2 CNT1 CNT0 0

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The status word available when the status is latched is as follows:

The advantage of using method 3 for read operation is that You can latch one, two or all three counters by putting 1 in appropriate select counter bits
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