8086 Assembly

-All addresses of 8086 are of 16-bits. -Address bus of 8086 is of 20bit,so addressable RAM is 220=1MB. -Concept of Segments is used.


-DS:0000 , ES:0000 ,CS:0000 ,SS:0000 Segment address: Starting address of each segment. (16-bit). Offset address: Distance of memory location from start of segment(16-bit). Logical address: 32 bit segment: offset address. Physical address: 20 bit address calculated from 32 bit logical address. -32 bits converted to 20 bit.




How 32 bit address converted into 20bits address. -For conversion segment address is multiplied by 10h (shift left one time) and then adds offset to it. To get physical address. Example: 1000: 1F00 10000 1F00 11F00

1000 x 10

offset address physical address


Segment Registers Instruction Register

Decoder General Purpose Register Index Register Special Registers ALU Flag Registers

CPU Organization of 8086

• Segment Registers (16-bits) -used to store the starting address of the segments of the program.
DS used to hold starting address of Data segment. CS used to hold the starting address of Code segment. SS used to hold the starting address of Stack segment. ES used to hold the starting address of Extra segment.

General Purpose Registers(16-bits)

16 bits registers used for any purpose but some have specific uses. Each of these registers has 2 parts which can be separately used. AX is Accumulator used for addition



BX is Base Register used to hold the address.



CX is counter register used to run loop



DX is data register used in addition and multiplication.



• •

Index Registers Special Purpose Registers

DI Destination Index and SI Source Index registers are used to hold address. IP Instruction Pointer is used to hold the address of the next instruction to be executed. SP Stack Pointer is used to hold the address of the top of stack. BP Base pointer is used to hold address.

FLAG Register

A 16-bit register, each bit reflects some condition and can be accessed individually. Each bit is called a flag which is set (1) or clear /Reset(0).


Status Flags
-Carry -Zero -Sign -Overflow -Auxiliary Carry -Parity

Control Flag
-interrupt -Trap -Direction

















Control Flags

DF used for specifying the direction of copying a string. 0=Left to Right 1=Right to Left IF used to enable or disable interrupts. 0=Interrupt Enable 1=Interrupt Disable TF used to debug one instruction at a time. 0=Normal Execution 1=Step by Step Execution

Status Flags

CF set when carry generated and clear otherwise. AH=0FFh AH +1 =00000000 and carry generated. OF set when results overflow into sign bit and reset otherwise. BH=7Fh BH +1 =80 OF=set SF set when result is –ve and reset otherwise. ZF set when result of computation is zero and reset otherwise. AF set when carry generated out of lower nibble to higher nibble and reset otherwise. 0000 1001 + 0000 1000 AC PF set when parity (no of 1’s ) is Even and reset otherwise.

Control Signals

4 to 10 parallel signal lines. CPU sends signals on control bus. -read signal ,write signal ,clock signal, reset signal ,memory signal ,IO device signal, Bus Requested and Bus Granted signal.

Program Structure

Title Dosseg .Model

128 characters long title (optional) Directs Assembler to arranger segments in order (optional) Specifies one of the following memory models Tiny Code Segment + Data Segment together must not be exceed 64k Small One of the Code Segment or Data Segment can exceed 64k Medium Code Segment can exceed 64k Compact Data Segment can exceed 64k Large Both code and Data Segment can exceed 64k Huge All available memory can be used. .Stack 10h Specifies space for stack (optional) .Code Specifies the start of code Segment Main Proc Indicates start of main procedure Instructions

Main Endp Other procedures .data Specifies start of data Segment Data Definitions End Main

Instruction Format
Mnemonic Mov Operand Ax,10 Comments ;Accumulator loaded

Uni-operand Instructions have single operand. One operand can be Register or Memory. Bi- operand Instructions register, register register, memory register, constant Memory, register memory, constant have two operands. Following can be combinations of operands.

• •

Both operands can never be memory locations. Constants can never be destination operands.

Data Transfer Instructions

Mov Destination ,Source Possible moves Mov Register ,Register Mov Register ,Memory Mov Memory ,Register Mov Register ,Segment Register Mov Segment Register ,Register Mov Register ,Immediate Operand Mov Immediate Operand, Register Mov Segment Register ,Memory Mov Memory, Segment Register

• CS register can never be destination operand. • Segment register to segment register move is not allowed. • Operand size must be match. • Memory to memory move is not allowed. • Immediate operand can never be destination. • If source operand is an constant ,must be in range of the destination operand. Example Array DB10h,20h,30h,40h,50h Mov AL,Array Mov BL,Array +1 Mov CL,Array+3 Mov Array+2,DL

XCHG (Exchange)

-Used to exchange contents of two operands.

XCHG operand1,operand2 -one operand must be a register. -Memory to Memory Exchange. Mov AL,VAR1 XCHG AL,VAR2 MOV VAR1,AL

Addressing modes

Flexible ways to access memory. Bx, Bp, Si and Di are the registers used by user to access memory. Bx ,Bp Base register Si ,DI  Index Register. 6. 7. 8. 9. 10. Displacement only/Direct address mode. Register indirect addressing mode Indexed addressing mode. Based addressing mode Based indexed addressing mode.

1.Direct Addressing mode;
-Direct address used .(offset) mov dl,[1234] mov al,[3475] mov [1234],al mov [FFFF],var1 -By default offset is from DS, segment prefix used otherwise.

2.Register In-direct Addressing mode;
-Access memory indirectly by registers. -Example Mov al, [si] Mov bl, [di] Mov cl, [bx] Mov dl, [bp] Bx =offset of variable [Bx]=value of variable DS



3.Indexed Addressing Mode
-Final offset =displacement +offset -mov al, 20h[bx] -If bx=1000 , Final offset =1020 al Mov al , disp[bx] Mov bl, disp [bp] Mov cl, disp [si] Mov dl, disp [di] Bx 20h

4.Based Addressing Mode -Both base and index registers used.
Mov al, [bx],[si] Mov bl , [bp],[di] Mov cl , [bp],[di]

al Si

If bx=1000h si=0880h Mov al, [1000+880] Mov al,[1880]


5.Based Indexed Addressing Mode
-Base and index register used with displacement. Mov al, [bx] [Si] Mov bl, disp [bx] [di] Mov cl, disp [bp] [Si] Mov dl, disp [bp] [di] If bx =0010 Si = 0010 disp=0020 Mov al, [bx+SI+disp] Mov al,[0010+0010+0020] Mov al,[0040]

disp SI

Mov al , [bx+Si+disp] Mov al, disp[bx+Si] Mov al , disp[bx[[Si]

17 ways to Access Memory [ bx ]
Displacement [ bp ] [ di ]

[ Si ]

Column A

Column B

Column C

-Choose one item from one column at a time.

19. 20. 21. 22. 23. 24. 25.

disp disp[ bx ] disp[ bp] disp[ SI] disp[ di] disp[ bx][Si] disp[ bx][di]

8. disp[ bp] [di] 9. disp[bp] [si] 10. [bx] 11.[bp] 12.[bx][Si] 13.[bx][di] 14.[bp][Si] 15. [bp][di]

16.[si] 17.[di]


-Whenever normal execution of program is stopped due to some H/w or S/W activity, the interrupt is said to be generated. -There are two types of interrupts. 5. Hardware Interrupt 6. Software Interrupt Hardware Interrupt occurs when only h/w device needs attention from microprocessor. -Controlled by 8259A PIC (Programmable Interrupt Controller). -Each H/w has its own interrupt request pin attached to PIC. -Only one interrupt can be passed to microprocessor at one time. -Interrupt pin can be enabled or disabled by changing the interrupt flag. Software Interrupt -Calls to subroutines located in operating system or BIOS. -Generated by user through instructions -Execute predefined code -Subroutines are identified by a number in range 0-FFh. -Addresses of routines are saved in IVT (interrupt vector table). -Lowest 1024 bytes of memory. -Contains addresses of all interrupts. -Each entry of IVT is of 32 bits. segment : offset (address of interrupt). 32bits = 4bytes. No. of entries =1024 /4 = 256

Process fallowed by an INT
-S/w Interrupts called by instruction int Syntax int number -Whenever microprocessor receive int instruction. -pushes segment address to stack. -pushes IP address to stack. -pushes flag register to stack. -Multiplies int no by 4 to get address of ISR (INT service routine). -Jumps to that address and starts execution. -Reads IRET instruction of each ISR to specify the end of ISR. -Whenever CPU finds IRET instruction -Pops flag register from stack -Pops IP from stack -Pops segment address (CS) from stack. -Control Transferred back to calling program.

int 21 h (DOS int for I/O)
Int 21h

-Each interrupt is further divided into smaller routines called services. -Each service is assigned a number. -No. must be loaded into AH register before calling interrupt.

0 11 1 1 2 1

mov ah,3 int 21h


Services of DOS int 21h
Service no. 1 mov ah,1 int 21h mov char, al

1.Char input with echo

-character input by the user would be available in al register after above two instructions, and then it is moved to any char variable for its further use. 2.Char output Service no. 2 mov ah,2 mov dl, ‘ * ’ int 21h Example mov ah, 1 int 21h mov dl , al int 21 h

;dl must be loaded before calling int with character.

3.Char input without echo Service no. 3 mov ah,7 int 21h -character input by user would be contained in al 4.String output Service no. 9 -offset of string must be loaded into dx. mov ah,9 mov dx, offset str1 int 21h .data str1 db ‘----------’ -String terminator is $ -Each string must include $ for proper output. -ASCII control characters: -0Dh used for carriage return (cursor go at the start of that line) -0Ah used for line feed (cursor move to next line)

5.Buffered String input Service 0Ah -Input a string up to 255 characters. -Maximum limit should be given first -Actual input is stored automatically. -Offset of buffer must be loaded in dx. -One space is reserved for enter key rest of space is available to store string entered by user. Example mov ah, 0Ah mov dx, offset max int 21h. .data max db 6 0 1 2 Input input actual db? max actual string db 6 dup(0) -one character less than the maximum length is stored. 6.Buffered String input Service 4 mov dl =(bit data) mov ah=4 int 21h -Outputs a character to the current auxiliary device.






String stored

7. Normal Termination Service 4c00h mov ax,4c00h int 21h

ADD instruction
-Adds an operand (source operand 8/16bit) to destination operand of same size. Syntax add destination, source -Source remain unchanged. -Destination contains result of addition. Possible adds add register, register add memory, register add register, memory add register, memory add register, Immediate operand add memory , Immediate operand Limitations -operands must be of same size. -Both operands can’t be memory location. -Segment register can never be destination. add ax, bx add a, al add ah, c add ah, c add ax, 10h add b , 10h

Example J = K +M mov ax ,K add ax, M mov J , ax A= B +C +D+E mov ax , B add ax , C add ax, D add ax, E mov A ,ax

INC Instruction
-adds 1 to destination operand. -uni-operand instruction Syntax inc dest -dest = dest +1 Possible increments -inc register -inc memory

(8/16 bit) (8/16 bit)

Subtract Instruction
Syntax sub destination, source -dest = dest – source -source remains unchanged. Possible subtracts sub register, register sub memory, register sub register, memory sub register, memory sub register, Immediate operand sub memory , Immediate operand Limitations -operands must be of same size. -Both operands can’t be memory location. -Segment register can never be destination sub ax, bx sub cx, ax sub a, al sub bl, c sub ah, 2 sub var , 2

Example mov al ,4 sub al ,8 al =0000 0100 0000 1000 1111 1100 0000 0011 1 0000 0100

DEC Instruction
-subtracts 1 from destination operand. -uni-operand instruction Syntax dec dest dest = dest -1 Possible increments -dec register (8/16 bit) -dec memory (8/16 bit) FLAG Effected ZF=1 AC =1

CF =1


Used to give symbolic names to constants.

1. EQUAL SIGN -redefined able equate Syntax name=expression count=50 2. EQU -non-redefined able equate -assigns name to a string or numeric constants. Syntax name equ string/constant e.g. Continue equ ‘Do you want to continue’ move equ mov address equ offset .code move ax, bx move bx, address string


Arithmetic Operators + , - , * , / ,Mod,+, -. ( ) ,* ,/,Mod, +,_


7. Offset Operator -return offset (address) of variable. -e.g. mov bx , offset array 11. Segment Operator -return segment’s address. e.g. mov ax, segment array 15. PTR operator -identifies attributes of memory operand. -Forces a variable to be used as of specified type. Syntax e.g. mov ax, word ptr var1 -ptr can also override operands default type. e.g. Mov al ,byte ptr wordval ; al=26 -wordval dw 1026h -When indirect addressing is used,ptr used to identify memory operan’s size . e.g. if source operand is an immediate operand and is less than 256,assembler does’nt know destination is 8 /16 bit,and generate syntax error. e.g. mov [bx] ,10h ; error mov byte ptr [bx] ,10h ;correct But no need of using ptr if it s greater than 256 value. e.g. mov [bx],1000h ; no error

-If one of operand is register, assembler deduces size of indirect operand by register size. e.g. mov dl, [bx] ;8 bit move mov [bx] , dx ;16 bit move -When only operand is indirect operand then ptr is needed. inc [bx] inc byte ptr [bx]


inc word ptr [bx]

Transfer of control instruction normal execution of program is in sequence ,this sequence of
execution can be altered. TOC Instructions



Conditional jumps

Unconditional jumps

Conditional loops

Unconditional loops

Jumps (unconditional) -CPU causes or start execution at a new location. -Location is specified by a label ,converted into address by assembler.

Unconditional jumps

Intra segment

Inter segment




Intra-segment jumps:
a- Short Jump Syntax jmp destination or jmp short destination -destination is a label. -label must be in range of -128 - +127 bytes from the point of the jmp. -It can be a forward or backward jump. -8 bits signed value move to IP. Example Example mov ah,1 mov dx , offset str1 mov al,2 mov ah,9 jmp F1 int 21h mov bh,7 F2: mov bl,8 move ah,1 F1: int 21h mov ah,2 jmp F2 mov dl , ‘@’ int 21h ( forward jump) (backward jump)

Near Jumps

Syntax jmp dest or jmp near ptr dest -destination is specified by a label. -label must be within same segment. -16 bits displacement address to IP. -If we don’t use short or near ptr assembler automatically converts it into short or near. -If intrasegment jumps only IP is changed. i.e IP =IP + dest Or

IP =IP - dest

Inter-Segment Jumps

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