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Input range limitations

Where the input swing is nearly equal to output swing. In this case the voltage swings are limited by the input differential pair rather than the output cascode branch.

What happens if Vin falls below the minimum value?

The MOS transistor operating as Iss enters the triode region, decreasing the bias current of the differential pair and hence lowering the trans -conductance.

To extending the input CM range is to incorporate both NMOS and PMOS differential pairs such that when one is active , other is off . The idea to combine two folded cascode op amps with NMOS and PMOS input differential pairs. Here as the input CM level approaches the ground potential, the NMOS pairs trans-conductance drops , eventually falling to zero .nonetheless the PMOS pair remains active , allowing normal operation Input CM level approaches to VDD , M1p,M2p is off and M1 , M2 is on.

Slew Rate

Op amps used in feedback circuits exhibit a large signal behavior called slewing Consider the simple RC network, where the input is an ideal voltage step of height Vo. Since , we have

Op amp is assumed linear,

Slope of step response is proportional to final value of the output ; for large input step , output rises more rapidly. This is fundamental property of linear systems: if the

input amplitude is , say , double while other parameters remain constant, the output signal level must double at every point, leading to a twofold increase in the slope.

The response to sufficiently small inputs follows the exponential, but with large steps the output displays a linear ramp having a constant slope . Under this condition , op amp experiences slewing and call the slope of the ramp the slew


With a small input step. If Vin =

ID1 increases , ID2 decreases . Since mirror action of M3 and M4 raises ID4 , the total smallsignal current provided by the op-amp equal .

This current begins to charge the CL, but as Vout raises , so does Vx reducing the difference between VG1 and VG2 . As a result ,

With large input step. If Vin = V

M1 absorbs all of ISS, M2 off .Generating a ramp output with a slope equal to ISS/CL.
As long as M2 off, the feedback loop is broken and the current charging CL is constant and independent of the input level.

As Vout raises, Vx eventually approaches Vin, M2 on and the circuit returns to linear operation.

Power supply Rejection

The power supply rejection ratio is

defined as the gain from the input to the output divided by gain from the supply to the output. At low frequencies:

Noise in Op Amps
At relatively low frequencies, the cascode devices contribute negligible noise , leaving M1M2 and M7-M8 as the primary noise sources . The input-referred noise voltage per unit bandwidth is

Where KN and KP denote the 1/f noise coefficients of NMOS and PMOS devices.

Noise behavior of the folded-cascode op amp

Considering only thermal noise at this point . Again , the noise of the cascode devices is negligible at low frequencies, leaving M1-M2, M7-M8 and M9-M10 as potentially significant sources. Change the gate voltage of M7 by a small amount , noting that the output indeed change considerably.


Rout denotes the open-loop output resistance of the op amp.

Dividing these quantities by Overall noise: and adding the contribution of M1-M2,

To calculate the input-referred thermal noise of the two-stage op amp. Beginning with the second stage , noise current of M5and M7 flows through ro5||ro7 . Dividing the resulting output noise voltage by total gain , and doubling the power.

To obtain the input-referred contribution of M5-M8:

The noise due to M1-M4 is simply equal to

The noise resulting from second stage is usually negligible because it is divided by the gain of the first stage when referred to the main input.