You are on page 1of 14

Presented By: Mehul Patel Ravi Patel

Different Types of special cell

Decap Cell
Well Tap Cell End Cap Cell

Filler Cell
Tie cell Spare cell

Decap cell
Decap cells are on-chip decoupling capacitors that

are attached to the power network to decrease noise effects Decap cells are most effective when placed closest to the flops After power planning we add the decap cell

Why we need it?

De cap cells are temporary capacitors added in the

design between power and ground rails to counter functional failures due to dynamic IR drop. when Sequential and Digital elements are switched at that time Dynamic I .R. drop happens . Due to this simultaneous switching a high current is drawn from the power grid for a small duration. If the power source is far away from a flop the chances are that this flop can go into a metastable state due to IR Drop. To overcome this decap cells are added. During the switching of elements at that time the current requirement is high , these decap cell discharge and provide boost to the power grid.

Well Tap cell

It is technology dependent
Tap cell is placed at every X microns

Well Tap cont..

well tap cells are used to limit resistance between

power or ground connections to wells of the substrate. taps are traditionally used so that your VDD and GND are connected to substrate and n-wells respectively. This is to help tie them to VDD and GND levels so that they don't drift too much (especially towards the middle of the chip) and cause latchup.

End Cap Cell

End cap cells are preplaced physical only cells that

are required to meet certain design rules They are placed at the right or left most ends of the site rows, and are used in some technology for power distribution End cap does not allowed to routing comeout side beyond endcap
End cap cell is used at the every standard cell row

Filler Cell
Filler cells should be included in standard cell library

filler cells provide continuity for VDD/GND rails, as well as for n-well
2) Std. Filler cell

Two types of Filler cell : 1)I/O filler cell

For PAD ring continuity, we use IO filler cells Std. Filler cells are also used in the std cell region(inside

core area). The reason is to fulfill the continuity of N-Well thought the std cell area.

Filler cell cont..

Some of the small cells also doesn't have the bulk

connection (substrate connection) because of their small size. In those cases, the abutment of cells through inserting filler cells can connect those substrates of small cells to the power/ground nets
After the std. cell placement we use the Filler cell

Tie cells
Tie-high and Tie-Low cells are used to connect the

gate of the transistor to either power or ground. These cells are part of standard-cell library
The cells which require Vdd (Typically constant signals

tied to 1) connect to Tie high cells

The cells which require Vss/Gnd (Typically constant

signals tied to 0) connect to Tie Low cells

Tie Cell cont..

Spare Cell
Spare cells are extra cells placed at regular interval in

the chip. This cells are placed in a group of functional cells like(and, or, nor, mux, flop, inverter, buffer)
Once the chip is taped out and if any functional issue

is found or any feature enhancement is required, these pre-placed cells can be used to add functionality without redoing the entire design

cells I/O filler cell Tap Cell End Cap Cell Decap cell Std. Filler Cell

When Put? floorplanning In Macro placement before std. cell placement After Power planning Placement

why For I/O pad continuity To prevent latch Up Power ditribution To prevent IR drop & voltage flactuation For continutity between cell

Thank You