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LABORATORY 2 - Synchronous and Asynchronous Counters

Lab Goals
The main purpose of this lab is to introduce the basic laboratory procedures necessary to evaluate simple digital circuits:
how to convert logic diagrams into circuit diagrams, how to use breadboards to build the circuits, and how to use an oscilloscope to test the circuit. learn about the experimental realization of logical zeros and ones.

Logic and wiring diagrams are different

+5V

x x y z y
7400 7404

Logic Diagram

TTL Wiring Diagram

The (CMOS) chips that may be utilized for this lab:


4001 : 2-input NOR gates 4002 : 4-input NOR gates 4011 : 2-input NAND gates 4013 : D flip-flops 4030 : 2-input XOR gates 4049 : INV gates 4069 : INV gates

The Digital chip tester

Read the manual about testing procedure


Place the chip as low as possible
pin #1

Breadboard

Clock

+5V

Ground

7476

Connect Vcc, ground and clock to the breadboard

In lab #2 you will use only this output

to AC outlet

5 V 0-20 V fixed variable

0-20 V variable

Vcc ground clock


GND

+ +

Floating DC Power supply

to AC outlet

Function Generator sync out

Breadboard
Buffer

to AC outlet

Figure 2.16. The power breadboard connections.

4013 D Flip-Flop Chip


+5V

What kind of counter is this? Mod-8 asynchronous What kind of drawing is this? Logic diagram
output
least significant bit most significant bit

+5V

J clock

SET

SET

SET

K CLR Q clear

K CLR Q

K CLR Q

000 001010011 111110101100

What outputs do we expect to see ?


Clock
1

Q0
0 1

Q1

0 1

Q2
0

000 001 010 011

100

101

110

111

000

PSpice simulation

clock Q0

Q1
Q2

How do you make an asynchronous mod-6 counter?

000 001010011

clear 111110101100

When the counter reaches 110 we clear the flip-flops

How do you we know that the output reached 110?


Q0 current flow Q1
clear

Q0 A Q1 B Q2 C

Q2

B
C
1K 1K 1K +5 V

The output of XOR gate is zero if the two inputs are equal
XOR

0
0 1 0 1

1 1 0

T0

T1

T2

resistance can't be too high due to current flow

In the lab you may use DIP switches to set M=6


In PSpice simulation you can hard wire the connections
Q0 current flow Q1
clear

Q0 current flow Q1
clear

Q2

Q2

B
C
1K 1K 1K +5 V

A B C
1K 1K 1K +5 V

T0

T1

T2 T0 T1 T2

What happens when the count gets to 110 ?


000 001 010 011
1

100

101

000 110 001 111 010 000

Q0
1

Glitch!
Q1 0
1

Q2
0

This glitch can be avoided using a synchronous counter

We need a three input OR gate.


Q0
current flow Q1
clear

Thats not on any of our chips

Q2

A B C
1K 1K 1K +5 V

Possible solution: use a three input NOR gate followed by an inverter

T0

T1

T2

PSpice simulation of mod-6 counter


Zoom in

500ns
What are the gate delays?

What kind of counter is this?


+5V

J
clock

SET

SET

SET

K CLR Q clear least significant bit

K CLR Q

K CLR Q

most significant bit output

Mod-8 synchronous counter

How do you make a synchronous mod-6 counter?


Detect when the circuit reaches 101 Clear on the next clock cycle

Glitch will be avoided

Design and simulate it in pre-lab.

Helpful Hints
1. VERY IMPORTANT! - The pins are not numbered on DIP packages. Pin 1 can be found by looking at the top of the DIP, finding the notch (half-circle) at the edge of one of the narrow sides, and orienting the notch on the left side. Almost always this corresponds to the printed characters on the chip being right-side up. The bottom pin on the left is denoted pin 1 and the pins increase in number as you go counter-clockwise around the chip (left to right along the bottom; then right to left along the top). It is important to orient the DIP correctly before inserting it into the breadboard. Placing it upside down could result in one or more chips being blown out (i.e., destroyed). On many chips, placing it upside down results in connecting the ground pin to Vcc and the Vcc pin to ground!

Helpful Hints
2. If a chip gets hot / smells funny / is smoking (!) it is probably not connected properly. Turn off the power supply immediately and check that the chips are inserted properly (not upside down, shorted out by the breadboard, etc.) and that the wires are connected properly. Note that connecting the outputs of two different components together is a frequent cause of circuit malfunction. Use the chip tester (prfer-20) to verify that heated chips still function properly.

Helpful Hints 3. Check to make certain that none of the chip pins are bent or broken before you insert them into the breadboard. Make certain that the chips are completely inserted and that they dont pop back up.

Helpful Hints 4. Complicated circuits should be built in stages, and whenever possible checked to verify that the individual stages are operational. If a circuit is first turned on only after it has been completely constructed, it is much harder to troubleshoot.

Resistor color code


C1 C2 C3 C 4

Figure 2.6 Resistor Color Code

R C1C2 10

C3

Lab report procedure Preparation of the PRE-LAB, including all questions, designs, and PSpice simulations is an individual effort. Make a COPY of your pre-lab. As soon as you enter the laboratory, you will hand your TA the COPY of the pre-lab, and you will keep the original with you during the lab. You wont be allowed to do the lab if you dont turn in a COMPLETED pre-lab.

Experimental Procedure
During this experiment, be certain that you: Read the post-lab questions CAREFULLY to make sure that you can answer them all. Sometimes these questions involve making measurements that are not explicitly called for in the lab procedure. Ask the TA questions regarding any procedures about which you are uncertain. Turn off all power supplies any time that you make any change to the circuit. Do NOT apply more than 5 V to the circuit at any time. Arrange your circuit components neatly and in a logical order. Compare your breadboards carefully with your circuit diagrams before applying power to the circuit. Complete the required tasks

Post-Lab Analysis
Generate a lab report following the outline available in Canvas. Mention any difficulties encountered during the lab. Describe any results that were unexpected and try to account for the origin of these results (i.e. explain what happened). In ADDITION, answer post-lab questions, if any.