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# EE 321 : Analog Circuits

## SPICE Simulation Program with Integrated Circuit Emphasis

Introduction
Microelectronic circuits may contain a few devices or a few million devices Hand analysis becomes increasingly difficult

## SPICE : a versatile tool used to predict the behavior of circuits

Simulation Procedure
Ex: To study the frequency response of an RC circuit

(1) Define the circuit in a language (format) that SPICEunderstands (2) Use an appropriate command to tell SPICE to determine the frequency response

## Label each node in out 0 (for GND)

Label each element with a specific letter that SPICE recognizes

Construct netlist : precise description of each element alongwith the nodes to which it is tied elementlabel node1 node2 value

*Title of the file r1 in out 1k c1 out 0 10p vin in 0 ac 1 .ac dec 200 1meg 50meg

Simulation Procedure

Terminology

Simulating MOSFETs
Syntax: M1 Nd Ng Ns Nsub MyMOSFET L=.18u W=10u .MODEL MyMOSFET NMOS ( parameters.. .. .. ) M2 Nd Ng Ns Nsub MyMOSFET L=.18u W=10u .MODEL MyMOSFET PMOS ( parameters.. .. .. )
The model of the MOSFET must provide various parameters of the transistor, e.g., mobility (uo), gate oxide thickness (tox), threshold voltage (vth), channel-length modulation coefficient (lambda), etc.

Problem1: Plot the input/output characteristic of the stage for 0<Vin<1.8V At what value of Vin does the slope (gain) reaches the max value?
*The program to compute gain**** r1 1 2 500 vin 3 0 vdd 1 0 1.8

## Mn 2 3 0 0 CMOSN L=.18U W=10U

.dc vin 0 1.8 .00002 .MODEL CMOSN NMOS ( LEVEL = 8 +VERSION = 3.1 TNOM = 27 TOX = 4E-9 +XJ = 1E-7 NCH = 2.3549E17 VTH0 = 0.3802346 +K1 = 0.5780058 K2 = 3.629306E-3 K3 = 0.0898746 +PU0 = 10.0307445 PUA = 2.32731E-11 PUB = 0 +PVSAT = 1.299662E3 PETA0 = 1.003159E-4 PKETA = -1.154913E-3 )

## If Rd is increased from 500 to 5k?......

Id reduced from 3mA to 360uA (Reduction in driving capability; which means if there is a Capacitor at the output, it will take more charging and discharging time)

Av increased (gm reduced less and Rd increased more so Av=gm*Rd increased) Smoother Vout/Vin curve as Vout approaches close to zero [Vout=Ron/(Rd+Ron)]

## Problem2: Plot and compare Ix as a function of Vx if 0<Vx<1.8 for both circuits.

*Ix and Vx**** vin 2 0 0.9 vx 1 0 Mn 1 2 0 0 CMOSN L=.36U W=5U .dc vx 0 1.8 .00002 .MODEL CMOSN NMOS ( LEVEL = 8 +VERSION = 3.1 TNOM = 27

## *Ix and Vx**** vin 2 0 0.9 vx 1 0

Mn1 1 2 3 0 CMOSN L=.36U W=5U Mn2 3 2 0 0 CMOSN L=.36U W=5U .dc vx 0 1.8 .00002
.MODEL CMOSN NMOS ( LEVEL = 8

TOX

= 4E-9

## Problem3: Plot and analyse Ix as a function of Vx if 0<Vx<1.8

*Ix and Vx****

vdd 1 0 1.8
vx 2 0 Mn1 2 1 0 0 CMOSN L=.18U W=5U Mp 2 0 1 1 CMOSP L=.18u W=5u .dc vx 0 1.8 .00002 .MODEL CMOSN NMOS ( LEVEL = 8 +VERSION = 3.1 TNOM = 27 TOX = 4E-9 +PVSAT = 1.299662E3 PETA0 = 1.003159E-4 PKETA = -1.154913E-3 ) .MODEL CMOSP +VERSION = 3.1 ..) PMOS ( TNOM = 27 LEVEL = 8 TOX = 4E-9

## Check what happens if Wp is doubled?

If Wp is doubled.

Making PMOS wider is equivalent to equating mobility of PMOS with NMOS Current matched (amost equal currents) For same dimensions,due to low mobility of PMOS, it has lesser drive capability, thus most of the circuits which you have studied are based on NMOS as drivers

Thank you..!!