Microprocessor and Interface Systems

Dr. Hassanein Shaban Ahmed

Kafrelsheikh Univerisity Faculty of Engineering

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Course Content
Microprocessor Architecture Addressing Modes Data Movement, Arithmetic logic, and Program control Instructions Programming the Microprocessor Memory Interfacing Interrupts Sensor and Transducer

Digital and analog interface

D/A and A/D Converter Input / Output Interfacing Microprocessor Based Control
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Microprocessor Architecture
Introduction
Writing a program in assembly language requires knowledge of the Microprocessors hardware (or Architecture) and the details of its instruction set. An explanation of the basic hardware : bit, bytes, registers, memory, microprocessor, and buses is provided in this lecture. The instruction set are listed in the rest lectures[2].

Components of a Microcomputer system.

A microcomputer contains a microprocessor, but also contains other circuits such as memory devices to store information, interface adapters to

connect it with the outside world, and a clock circuit to act as a master
timer for the system[3]
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Major components of Microcomputer

Clock

Microprocessor

Memory

Interface adapter

Input/Output Device

A Basic Microcomputer[3]
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Memory
Information processed by the computer is stored in its memory [1]. A memory circuit element can store one bit of data. The memory circuits are usually organized into groups that can store eight bits which its called byte. Each memory byte is identified by a number that is called its address, like the street address of a house. The first memory byte has address 0. The data stored in a memory byte are called its contents. The main difference between address and contents 1. The address of memory byte location is fixed but the contents of memory location can be changed 2. The contents of a memory location are always 8-bits, the number of bits in an address depends on the processor. For example, the Intel 8086 microprocessor assigns a 20-bit address, and the Intel 80286 microprocessor uses a 24-bit address
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Memory
Example: Suppose a processor uses 20-bits for address. How many memory locations can be accessed[1]. Solution: The number of bits used in the address determines the number of memory locations that can be accessed by the precursor a bit can have two possible values, so in a 20-bit address there can be 220 =1,048,576 or 1 megabyte
Memory Address
0 0

Binary Contents
0 0 0 0
1 0

0 1

0 0

1 0

0 1

3 2 1 0 0 0 0 0 0 1 0 0

The organization of memory locations

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Memory
Depending on model, the processor can access one or more bytes at a time[2]. In the case two byte word, the processor allows any pair of successive memory locations to be treated as a single unit. The lower address of the two memory locations is used as the address of the memory word Figure (1.3) shows the bit position in a microcomputer word and byte. The position are numbered from right to left starting from 0. in a word, the bits 0 to 7 form low-order least significant byte and bits 8 to 15 form high order most significant byte [1]
7 6 5 4 3 2 Byte Bit Positions 15 14 13 12 11 10 9 8 7 6 5 4 3 2 Word Bit Positions High Byte Low Byte 1 0 1 0

Figure (1.3) Example: Consider the hex number 0529H, requires 2 bytes or 1 word
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Addressing data in Memory

Example : Consider the hex number 0529H, requires 2 bytes or 1 word. The most significant byte,05, and least significant , 29. The Microprocessor stores the data in memory in reverse-byte sequence Low order byte in low memory address and the high order byte in the high memory address

Register Memory Memory Address

05 29 7612

29 05 7613

The processor reverses the bytes again to retrieve the word from memory
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Memory Operations
The processor perform two operations on memory : Read operation Fetch, the contents of a memory location the original contents of the location are unchanged. Write operation Store, data at memory location the data written become the new contents of the location and the original contents of the location are lost [1]. The processor communicates with memory and I/O circuits by using signals that travel along a set of wires called buses. There are three kinds of signals : address, data, and control. Also there are three buses: address bus, data bus, and control bus[1].
address bus

Microprocessor
control bus

Memory

I/O Devices

data bus
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Instruction Execution
Any machine instruction has two parts: Opcode : to specify the type of operation. Operands : which are often given as memory address to the data The microprocessor goes through the following steps to execute a machine instruction (fetch and execute cycle) Fetch cycle Fetch an instruction from memory Decode the instruction to determine the type of operation Execute cycle Retrieve data from memory if necessary Perform the operation on the data Store the result in memory if needed
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Execution a Program
To understand how the microprocessor operates, consider the following sample of a program Example LDA 7 ADD 10 HLT

1st instruction LDA 7

2st instruction ADD 10 3st instruction HLT

1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Opcode for LDA Operand (7) Opcode for ADD Operand (10) Opcode for HLT

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Execution a Program
Before a Program can be run, it must be placed in memory To begin executing the program, the program counter must be set to the address of the first instruction i.e 0000 0000 zero
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 0 0

Program Counter Address Register

Instruction Decoder

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100

Binary

Assembly Code
LDA 7 ADD 10 HLT

1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

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Fetch Cycle of LDA instruction

1. The contents of the program counter (0000 0000) are transferred to the address register
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 0 0

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100

Binary

Assembly Code
LDA 7 ADD 10 HLT

1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

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Fetch Cycle of LDA instruction

2. The program counter incremented by one is
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 0 1

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100

Binary

Assembly Code
LDA 7 ADD 10 HLT

1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

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Fetch Cycle of LDA instruction

3. The address is placed on the address bus
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 0 1

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 0 Address bus

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Binary

Assembly Code
LDA 7 ADD 10 HLT

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Fetch Cycle of LDA instruction

4. The contents of the selected memory location are transferred to the data register
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 0 1

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 0

1 0 0 0 0 1 1 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Data bus

Binary

Assembly Code
LDA 7 ADD 10 HLT

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Fetch Cycle of LDA instruction

5. The contents of the data register are decoded by the instruction decoder. The instruction decoder informs the controller sequencer to produce the necessary control signal to carry out the instruction
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer
LDA

0 0 0 0 0 0 0 1

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 0

1 0 0 0 0 1 1 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100

Binary

Assembly Code
LDA 7 ADD 10 HLT

1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

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Execute Cycle of LDA instruction

1. The contents of the program counter (0000 0001) are transferred to the address register
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 0 1

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 1

1 0 0 0 0 1 1 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100

Binary

Assembly Code
LDA 7 ADD 10 HLT

1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

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Execute Cycle of LDA instruction

2. The program counter is incremented by one for the next fetch cycle
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 1 0

Program Counter

Instruction Decoder

0 0 0 0 0 0 0 1

Address Register

1 0 0 0 0 1 1 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Binary

Assembly Code
LDA 7 ADD 10 HLT

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Execute Cycle of LDA instruction

3. The address of the operand is placed on the address bus
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

Controller Sequencer

0 0 0 0 0 0 1 0

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 1 Address bus

1 0 0 0 0 1 1 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Binary

Assembly Code
LDA 7 ADD 10 HLT

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Execute Cycle of LDA instruction

4. The contents of the selected memory location are transferred to the data register and also transferred into the accumulator
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

0 0 0 0 0 1 1 1

Controller Sequencer

0 0 0 0 0 0 0 1

Program Counter Address Register

Instruction Decoder

0 0 0 0 0 0 0 0

0 0 0 0 0 1 1 1

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Data bus

Binary

Assembly Code
LDA 7 ADD 10 HLT

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Fetch Cycle of ADD instruction

1. The contents of the program counter (0000 0010) are transferred to the address register 2. The program counter is incremented by one 3. The address is placed on the address bus 4. The contents of the selected memory location are transferred to the data register 5. The contents of the data register are decoded by the instruction decoder. The instruction decoder informs the controller sequencer to produce the necessary control signal to carry out the instruction
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

0 0 0 0 0 1 1 1

Controller Sequencer ADD

2
0 0 0 0 0 0 1 0

Program Counter Address Register

Instruction Decoder 5
1 0 0 0 1 1 0 1

1
0 0 0 0 0 0 1 0
Address bus 3

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Data bus

Binary

Assembly Code
LDA 7 ADD 10 HLT

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Execute Cycle of ADD instruction

1. The contents of the program counter (0000 0011) are transferred to the address register 2. The program counter is incremented by one for the next fetch cycle 3. The address of operand is placed on the address bus 4. The operand (1010) is transferred to the data register 5a. The operand (1010) is transferred into one input of the ALU 5b. Simultaneously, The other operand (710) is transferred from the accumulator to the other input of the ALU 6. The ALU adds the two operands. The sum (1710) is loaded into the accumulator
Microprocessor UNIT
5a

Arithmetic Logic Unit (ALU)

5b

Accumulator

0 0 0 1 0 0 0 1

Controller Sequencer

2
0 0 0 0 0 0 1 1

Program Counter Address Register

Instruction Decoder

1
0 0 0 0 0 0 1 1
Address bus 3 0 0 0 0 1 0 1 0

Data Register

MEMORY
Address Contents
0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Data bus

Binary

Assembly Code
LDA 7 ADD 10 HLT

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Fetch and Execute Cycle of HLT instruction

Fetch cycle
1. The contents of the program counter (0000 0100) are transferred to the address register 2. The program counter is incremented by one 3. The address is placed on the address bus 4. The contents of the selected memory location are transferred to the data register
Microprocessor UNIT
Arithmetic Logic Unit (ALU)

Accumulator

0 0 0 1 0 0 0 1

Controller Sequencer
HLT

2
0 0 0 0 0 1 0 0

Program Counter Address Register

Instruction Decoder 5
0 0 0 0 1 0 1 0

1
0 0 0 0 0 1 0 0
Address bus 3

Data Register

5. The contents of the data register are decoded by the instruction decoder.

MEMORY
Address Contents
Binary Assembly Code
LDA 7 ADD 10 HLT 0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 1000 0110 0000 0111 1000 1011 0000 1010 0011 1110

Data bus

Execute cycle
1. The execution of the HLT instruction is very simple. The instruction sequencer stops producing control signals then all computer operations stop.
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Machine Cycle
A clock circuit controls the microprocessor by generating a train of clock pulses as shown
Voltage Time

One machine cycle

A one machine cycle can be defined as the minimum time required to fetch a data from memory[1,12],[3,76]. If the microprocessor speed is one megahertz 1MHz, the machine cycle is expressed as: T=1/f =1/1000000 =1 micro second Thus, the fetch cycle of an instruction requires one machine cycle. In inherent and immediate addressing modes ,the execute cycle also requires one machine cycle. Therefore, the minimum time required to fetch and execute any instruction is two machine cycle. As will see later in a lecture of addressing modes
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Programming languages
We know that, the operations of the computers hardware are controlled by its software. The software program is written by one of the following programming languages:

Machine language
A microprocessor can only execute machine language instructions. As weve seen, they are bit strings from 0 or 1.

Assembly language
A more convenient language to use is the assembly language. In assembly language, we use symbolic names to represent operations, register, and memory location. Such as, mov ax,7 A program written in assembly language must be converted to machine language before the microprocessor can execute it. The assembler is used to translated from assembly language into machine language

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Programming languages
High-Level language
Different high-level languages are designed for different applications, but they generally allow programmers to write programs that look more like natural language text than is possible in assembly language A program called a compiler is needed to translate a high-level language program into machine code

Advantages of High-Level Language

1. Because high-level languages are closer to natural languages, it easer to convert a natural language algorithm to a high-level language program than to an assembly language program 2. Assembly language program generally contains more statements than an equivalent high-level language program. So more time is needed to code the assembly language program 3. Assembly instruction sets are unique for each type of the microprocessor, but high-level language program can be executed on any machine

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Programming languages
Advantages of Assembly Language
1. Assembly language is so close to machine language, so the assembly language program is efficiency because it produces a faster, shorter machine language program 2. Some operations, such as reading or written to specific memory locations I/O ports, can be done easily in assembly language than high level language 3. Assembly language helps to understand why the operations are executed inside the computer

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Representation of Numbers and Characters

Numbers can be expressed in any of the following number system
Decimal number system Binary number system Hexadecimal number system

Decimal number system

Number : 0 to b-1 where b is the base of the number system Numbers : 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 (ten digit) Base = 10

Example :
3932=3x103+9x102+3x101+2x100

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Representation of Numbers and Characters

Binary number system Numbers : 0, 1 (two digit) Base = 2 Example : 1001 Hexadecimal number system Numbers : 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, and F (sixteen digit) Base = 16 Example : 3EF1 Advantages of hexadecimal number system The conversion between binary and hex is easy but decimal to binary is difficult The binary system is long and difficult to represent the content of memory. For example, word needs 16 bits

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Conversion between Number Systems

Converting binary to decimal 11101b = 1x24+1x23+1x22+0x21+1x20 = 16+8+4+0+1=29d Converting Hex to decimal 8A2Dh = 8x163+Ax162+2x161+Dx160 = 8x163+10x162+2x161+13x160 = 35373d

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Conversion between Number Systems

Converting decimal to binary Example : Convert the decimal number 25 into its binary equivalent 25 2 = 12 with remainder 1 LSB 12 2 = 6 with remainder 0 62 = 3 with remainder 0 32 = 1 with remainder 1 12 = 0 with remainder 1 MSB Then,

25d = 11001b

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Conversion between Number Systems

Converting decimal to Hex Example : Convert the decimal number 11172 into its Hex equivalent 11172 16 = 698 with remainder 4 698 16 = 43 with remainder 10 (A) 43 16 = 2 with remainder 11 (B) 2 16 = 0 with remainder 2 Then, 11172d = 2BA4h

LSB

MSB

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Conversion between Number Systems

Converting Hex to Binary Example : Convert 2B3Ch to binary
Solution :

2 B 3 = 0010 1011 0011 = 0010101100111100

C 1100

Then, 2B3Ch = 0010101100111100b

Converting Binary to Hex Example : Convert 1110101010b to Hex
Solution :

0011 1010 = 3 A = 3AAh

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Addition in The Number Systems

Decimal addition Example : 2546 + 1872 4418

The units digit = 6+2 = 8 The tens digit = 4+7 = 11 we write down 1 and carry 1 to hundreds column The hundreds digit = 5+8+1 = 14 we write down 1 and carry 4 to the last column The last digit = 2+1+1 = 4

Hex addition Example :

5B39h + 7AF4h D62Dh

The units column = 9h+4h = 13h=Dh The next column = 3h+Fh = 12h write down 2 and carry 1 to the next column The next column = Bh+Ah+1h = 16h write down 6 and carry 1 to the next column The last column = 5h+7h+1 = Dh
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Addition in The Number Systems

Binary addition Example : 100101111 + 110110 101100101

The units column = 1+0= 1 The next column = 1+1= 10 The next column = 1+1+1= 11 And so on

write down 0 and carry 1 to the next column write down 1 and carry 1 to the next column

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Subtraction in The Number Systems

Decimal subtraction Example : bb 9145 - 7283 1862
=53 = 14 - 8 = 11 2 -1 =9 -71 =2 =6 =8 =1 we first borrow 1 from the hundreds column we borrow 1 from the next column

The units digit The tens digit The hundreds digit The last digit

By the same way the Hex and Binary subtraction can be computed

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Integer Number Representation in the Computer

Unsigned Integers
An unsigned integer is an integer that represents a magnitude, so it is never negative no bit is needed to represent the sign, and so all 8 bits in a byte, or 16 bits in a word, are available to represent the number The largest unsigned integer in a byte is 1111 1111=FFh=255d while in the word is 1111 1111 1111 1111=FFFF=65535 If the least significant bit LSB of an integer is 1, the number is odd, and its even if the LSB is 0

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Integer Number Representation in the Computer Signed Integers

A signed integer can be positive or negative The most significant bit MSB is reserved for the sign : 1 means negative and 0 means positive Negative integers are stored in the computer in a special

way known as twos complements

Example: Find the twos complement of 5 5 = 0000 0000 0000 0101 Ones complement of 5 = 1111 1111 1111 1010 +1 Twos complement of 5 = 1111 1111 1111 1011 =FFFBh
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Integer Number Representation in the Computer

Example: Find the twos complement of the twos complement of 5 Twos complement of 5 = 1111 1111 1111 1011 ones complement of 1111 1111 1111 1011 = 0000 0000 0000 0100 +1 Twos complement of 1111 1111 1111 1011 = 0000 0000 0000 0101 =5 Example: show how the decimal integer -97 would be represented a) in 8 bits and b) in 16 bits. Express the answers in Hex. 97d in Hex is 61h = 0110 0001b ones complement of 61h = 1001 1110 +1 Twos complement of 61h = 1001 1111=9Fh in 8bits Twos complement of 61h =FF9Fh in 16bits
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Decimal Interpretation
We show how signed and unsigned decimal integers may be represented in the computer. In reverse way. Now, we attempt to interpret the contents of a byte or word as signed or unsigned decimal integer Unsigned decimal interpretation Just do a binary to decimal conversion (b to h and then h to d) Signed decimal interpretation If the MSB is 0, the number is positive, the signed decimal is the same as the signed decimal If the MSB is 1, the number is negative, so call it N. To find N, just take the twos complement and the convert to decimal

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Decimal Interpretation
Example: Suppose AX contains FE0Ch. Give the unsigned and signed decimal interpretations Solution: Unsigned decimal interpretation, convert FE0Ch to decimal yields 65036 For the signed interpretation, FE0Ch=1111 1110 0000 1100. So the sign bit is 1 i.e negative number, call it N. To find N, get the twos complement FE0Ch = 1111 1110 0000 1100 ones complement of FE0Ch = 0000 0001 1111 0011 +1 Twos complement of FE0Ch = 0000 0001 1111 0100 Then, AX contains -500 =01F4h=500d
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The 8086 family Microprocessors

The Intel 8086 family microprocessors includes the 8086, 8088, 80186, 80286, 80386, 80386sx, 80486, and 804 86sx [4] Evolution of Intels Microprocessors
Product Year introduced Clock Rate (MHz) 8088 1974 2-3 8085 1976 3-8 8086 1978 5-10 8088 1979 5-8 80286 1982 6-16 80386 1985 16-23 80486 1989 25-50

No. Transistors
Physical Memory Internal data bus External data bus Address bus Data type (bits)

4500
64K 8 8 16 8

6500
64K 8 8 16 8

29000
1M 16 16 20 8, 16

29000
1M 16 8 20 8, 16

130000
16M 16 16 24 8, 16

275000
4G 32 32 32 8, 16, 32

1.2million
4G 32 32 32 8, 16, 32

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The 8086 family Microprocessors

8086 major improvement over the 8088/8085 The 8086 has 1M memory capacity while 8088/8085 has 64K The 8086 is a 16 bit microprocessor which can access 16bit at a time

The 8086 was a pipelining processor as opposed to the nonpipelined

8080/8085. In a system with pipelining, the data and address buses are busy transferring data while the CPU is processing information Notes Internally, the 8088 is essentially the same as the 8086 Externally, the 8086 has a 16bit data bus while the 8088 has 8bit The 8086 also has a faster clock rate and better performance The 8088 is less expensive than 8086

The 8086 and 8088 have the same instruction set[4]

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The 8086 family Microprocessors

The main features of 80286 microprocessor

Two mode of operation, real mode or protected mode. In protected

mode, the 80286 supports multitasking which is the ability to execute several programs a the same time More memory capacity (224 = 16megabytes) Virtual memory in protected mode. The processor 286 can treat external storage (HD) as if it were physical memory up to 1 gigabyte (230 byte) [1]

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The 8086 family Microprocessors

The main features of 80386 microprocessor
The 80386 also can operate in either real or protected mode. More memory capacity data bus 32bit (232 = 4gigabytes) Virtual memory in protected mode up to 64 terabyte (246 byte) [1] The 80386SX microprocessor has the same internal structure as

386 but it has only a 16 bit external data bus and 24 bit address
bus (16`MB)

The main features of 80486 microprocessor

The 80486 also is 32 bit microprocessor. The 80486 has a numeric coprocessor 80487 and cash memory The 80486SX microprocessor has the same internal structure as

486DX but without coprocessor

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Inside The 8080/8086 Microprocessors

Pipelining
There are two ways to make the processor execute program faster By increasing the working frequency, which depends on the Integrated Circuit ICs technology. This way is highly cost By changing the internal working of the microprocessor In 8085 microprocessor fetch an instruction from memory then execute it and so on. The idea of pipelining in its simplest form is to allow the processor to fetch and execute at the same time as shown
Nonpipelined 8085 Pipelined 8086
Fetch1
Execute1 Fetch2

Execute2

Fetch3

Execute3

Fetch1

Execute1
Fetch2 Execute2

Fetch3
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Inside The 8080/8086 Microprocessors

Execution Unit EU Bus Interface Unit BIU General registers

AX BX CX DX SP BP SI DI CS DS SS ES IP

Internal Block Diagram of The 8080/8086 Microprocessor

Internal Bus

Bus Controller Logic

Temporary registers

ALU
Flags

Instruction queue

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External Bus

Intel 8086 Microprocessors Organization

The 8086 microprocessor is organized into main components: the execution unit EU and the bus interface unit BIU. The purpose of the execution unit is to execute instructions. It contains ALU and a eight registers (AX, BX, CX, DX, SP, BP, SI, and DI) for storing date. In addition, the EU contains temporary registers for holding operands for the ALU, and the Flags register The bus interface unit BIU facilitates communication between the EU and memory or I/O devices. It also contains a five registers (CS, DS, ES, SS, and IP); they hold the address of memory locations. The EU and BIU are connected by and internal bus. While the EU is executing an instruction, the BIU fetches up to 6 bytes (8086) or 4 bytes (8088) of the next instruction.This operation is
called instruction prefetch [1].
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Intel 8086 Microprocessors Organization

Notes Intel implemented the concepts of pipelining in the 8088/8086 by splitting the internal structure of the microprocessor into two sections the EU and BIU. These two units work simultaneously[4]. The BIU of 8086 contains a buffer or instruction queue. A register is like a memory location except that we normally refer to it by a name rather than a number

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8086 Registers
AX AH BH CH DH

Data Registers AL BL CL DL

The 8086 has four general date registers; the address registers are divided into segment, pointer, and index registers; and the status

BX CX DX

Segment Registers CS DS SS ES

register is called the Flags register. In

total, there are fourteen 16 bit registers

SI DI

SP
BP IP Flags Register

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8086 Registers

Pointer and Index Registers

Data Registers : AX, BX, CX, DX

These four registers are available to the programmer for general data manipulation, also they perform special functions such as: AX ( accumulator register ) AX is used for the accumulator BX ( Base register ) BX is used as a base addressing register CX ( Counter register ) CX is used as a counter in loop operation DX ( Counter register ) DX is used to point data in I/O operation

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Flags Register
The Flags register is an individual 16 bits reflect the result of a computation. There are two kinds of flags:

Status flags : many instructions involving comparison

and arithmetic change the status flags (such as ZE zero flag)

Control flags : which enable or disable certain operations

of the processor ( such as IF interrupt flag )

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Segment Registers CS, DS, SS, ES

The address (segment) registers store addresses of instructions and data in memory

CS : Code Segment
SS : Stack Segment

DS : Data Segment
ES : Extra Segment

A typical assembly language program consists of at least three

segments: a code segment, a data segment, and a stack segment.

The code segment contains the assembly language instructions that perform the tasks. The data segment is used to store information (data) that needs to be processed by the instructions in the code segment. The stack is used to store information temporarily If a program needs to access a second data segment, it can use the ES register
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Memory Segment
A segment is an area of consecutive memory bytes up to 216 (64kb). Each segment is identified by a segment number, starting

with 0. A segment number is 16 bit, so the highest segment number

is FFFFh. A memory location may be specified by providing a segment number and an offset, written in the form segment:offset .
For example Segment 0 start at address 0000:0000=00000h and ends at 0000:FFFF=0FFFFh. Segment 1 starts at address 0001:0000=00010h and ends at 0001:FFFF==1000Fh

In the 8085 there are only 64 kb of memory for all code, data,

and stack information, but in the 8086 there can be up to 64kb of

memory assigned to each category

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Logical and Physical address

In the Intel 8086, there are three type of addresses: the physical address, the offset address, and the logical address. The physical

address is the 20 bit address that is actually put on the address pins
of the 8086 microprocessor and decoded by address decoder. This address range from 00000h to FFFFFh for the 8086. The offset address is the location within a 64KB segment range. So the offset range from 0000h to FFFFh. The logical address consists of a segment value and an offset address. To obtain a 20 bit physical address, the 8086 microprocessor first

shifts the segment address 4 bit to the left, and then adds the offset.

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Example
If CS=24F6 and IP=634Ah, show 1. The logical address 24F6:634A

2. The offset address

And calculate : 3. The physical address

634A

24F60+634A=2B2AA

4. The lower and upper rang of that segment Lower range=24F60+0000=24F60 Upper range=24F60+FFFF=34F5F

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Pointer and Index Registers: SP, BP, SI, DI

The registers SP, BP, SI, and DI normally point (contain the offset address of) memory locations. Unlike segment registers, the pointer and index register can be used in arithmetic and other operations. SP: Stack Pointer The stack pointer register is used in connection with SS for accessing the stack segment. BP: Base Pointer The base pointer register is used primarily to access data on the stack. However, unlike SP, we can also use BP to access data in the other segments SI: Source Index The SI register is used to point the memory locations in the data segment addressed by DS. DI: Destination Index The DI register is used to point the memory locations in the extra segment addressed by ES
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Instruction Pointer: IP
To access instructions in the code segment, the 8086 uses the registers CS and IP. The CS register contains the segment number and the IP contains the offset

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8086 Addressing Modes

The microprocessor can access operands (data) in various ways called addressing modes. The 8086 provides a total of seven distinct addressing modes:
1. Register 2. Immediate 3. Direct 4. Register indirect 5. Based relative 6. Indexed relative 7. Based index relative

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Register Addressing Mode

The register addressing mode involves the use of registers to hold
the data to be manipulated. Memory is not accessed when this addressing mode is executed; therefore, it is relatively fast. As example:

MOV BX,DX
MOV ES,AX MOV AL,BH

;copy the content of DX into BX

;copy

the content of AX into ES

;add the content of BH to the content of AL

It should be noted that the source and destination registers must match in size. In other words coding MOV CL,AX will give an error. Since the source is a 16-bit register and the destination is an 8bit

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Immediate Addressing Mode

In the immediate addressing mode,

the source operand is a constant.

When the instruction is assembled, the operand comes immediately after the opcode. For this reason, this addressing mode executes

quickly. As an example:
MOV AX,2550H MOV CX,625 MOV BL,40H ;move 2550h into AX ;load the decimal value 625 into CX ;load 625 into BL

In the first two addressing modes, the operands are either inside the microprocessor or tagged along with the instruction which that are not referred to the memory. There are many ways of accessing

the data in the data segment as the following of addressing modes.

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Direct Addressing Mode

In the direct addressing mode the data is in some memory
locations and the address of the data in memory comes immediately after the instruction. Note that in immediate addressing, the operand

itself is provided with the instruction, whereas in direct addressing

mode, the address of the operand is provided with the instruction. As an example MOV DL,[2400] ;move contents of DS:2400H into DL In this case the physical address is calculated by combining the contents of offset location 2400 with DS, the data segment register. Note, if the absence of the bracket it will give an error since it is

interpreted to move 16bit into 8bit

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Example
Find the physical address of the memory location and its contents
after the execution of the following, assuming that DS=1512H. MOV AL,99

MOV [3518],AL
Solution First AL is initialized to 99H, then in line two, the contents of AL are stored to logical address DS:3515 which is 1512:3518. shifting DS left and adding it to the offset gives the physical address of (15120H+3518H=18638H). That means after execution of the second instruction, the memory location with address 18638H will contain

the value 99H

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Register indirect Addressing Mode

In the register indirect addressing mode, the address of memory location where the operand resides is held by a register. The registers

used for this purpose are SI, DI, and BX as a pointer. For example
MOV AL,[BX] ;moves into AL the contents of the ;memory location pointed to by DS:BX Example : assume that DS=1120, SI=2498, and AX=17FE. Show the contents of memory locations after the execution of

MOV [SI],AX
Solution The contents of AX moves into memory locations with The logical address DS:SI and DS:SI+1; therefore the physical address starts at DS (shifted left) +SI=13698. Low address 13698Hcontains FE, low byte, and high address 13698H will contain 17, the high byte
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Based relative Addressing Mode

In this mode, base registers BX and BP, as well as a displacement

value, are used to calculate the offset address. The physical address
(PA) are DS for BX and SS for BP, For example MOV CX,[BX]+10 MOV AL,[BP]+5

;move DS:BX+10 and DS:BX+10+1 into CX ;physical address=DS(shifted left)+BX+10 ;physical address=SS(shifted left)+BP+5

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indexed relative Addressing Mode

The indexed relative addressing mode works as the same as the

based relative addressing mode, except that registers DI and SI hold

offset address. For examples MOV DX,[SI]+5 MOV CL,[DI]+20

;PA=DS(shifted left)+SI+5 ;PA=DS(shifted left)+DI+20

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Based indexed Addressing Mode

By combining based and indexed addressing modes, a new

addressing mode is derived called the based indexed addressing mode.

In this mode, one base register and one index register are used. For examples MOV CL,[BX][DI]+5 MOV CH,[BX][SI]+20 MOV AH,[BP][DI]+12

;PA=DS(shifted left)+BX+DI+5 ;PA=DS(shifted left)+BX+SI+20 ;PA=SS(shifted left)+BP+DI+12

MOV AH,[BP][SI]+29

;PA=SS(shifted left)+BP+SI+29

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Example
Assume that DS=4500,SS=2000,BX=2100,SI=1486,DI=8500,BP=7814, and AX=2512. Show the exact physical memory location where AX is stored in each of the following. All value are in hex a) MOV [BX]+20,AX c) MOV [DI]+4,AX
b) MOV [SI]+10,AX

d) MOV [BP]+12,AX

Solution
In each case PA = segment register (shifted left)+ offset register +

displacement

a) DS:BX+20 b) DS:SI+10 c) DS:DI+4 a) SS:BP+12

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location 47120=(12) location 46496=(12) location 4D504=(12) location 27826=(12)

and 47121=(25) and 46497=(25) and 4D505=(25) and 27827 =(25)

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References
1. Assembly Language Programming and Organization of the IBM PC, Ytha Ya and charles marut
2. Fundamentals of PC Hardware and Software

3. Microprocessors a step by step introduction

4. 8086 Microprocessor assembly language and experimental October

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Thank You Welcome to any Question

End

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