You are on page 1of 42


Spring 2004
Group: Wilber L. Duran
Duo (Steve) Liu

Multilevel Routing
Multilevel Approach to Full-
Chip Gridless Routing
Jason Cong, Jie Fang, and Yan Zhang
Computer Science Department, UCLA
Traditional Routing System
Global routing
Partitions the entire routing region into tiles or
channels and a rough route for each net is
determined among these tiles to minimize the
overall congestion
Detailed routing
Performed at each tile, where the exact
implementation of each net is determined
Uses flat approaches or two level approaches
Maze searching algorithm, line-probe algorithm
All flat approaches have a scaling problem when it
comes to large designs
Proposed Solution
As the designs grow, more levels of
routing are needed for larger designs
Rather than a predetermined, manual
partition of levels which may have
discontinuity between levels, an
automated flow is needed to enable
seamless transitions between the levels
Propose a novel multilevel routing
framework for the gridless routing

The multilevel framework
features an iterative coarsening
algorithm and an iterative
refinement algorithm in a V-
shaped flow
On the downward pass, the
design is recursively coarsened
and an estimation of routing
resources is calculated at each
At the coarsest level, a
multicommodity flow algorithm
is used to generate an initial
routing result
On the upward pass, a modified
maze searching algorithm is
carried out iteratively to refine
the results from level to level
Multilevel vs. Hierarchical
Multilevel vs. Hierarchical
In Multilevel approach, the uncoarsening pass
allows the fine level router to refine the
coarse level result and the coarse level
solution only provides a guide to fine level
path searching
Provides the flexibility to deviate from the coarse
level path when more detailed information about
local resource and congestion is considered
This feature makes the multilevel method
converge to better solutions with higher
Build Multilevel Routing
The routing region is first partitioned
into an array of fine tiles, each with the
same height and width. This level is
denoted as level 0
Then build a three-dimensional routing
graph, denoted as G
The edge capacity represents the routing
resources at the common boundary of two

Line-sweeping Algorithm
Boundary capacity is
computed by the
following formula:

The inter-layer edge
capacity is computed as
the sum of empty slices
intersections between
the two tiles connected
by the edge
Coarsening Process
The grid graph G
stores accurate routing capacity
estimation at the finest level
At a coarser level (level i+1), the tiles are built from
the finer level tiles (level i) by merging neighboring
can be derived from the fine level graph G

) on G
is the sum of the capacities of the
edges in G
that connect the tiles merged into u

and the tiles merged into v
Iteratively coarsen the tiles and the routing graphs
until the size of the graph falls below a
predetermined threshold
Initial Routing
A set of tile-to-tile paths are computed
for the nets crossing the coarsest tile
It is quite important to the final result
of multilevel routing
Capability of handling performance issues
caused by long interconnects
A bad initial routing solution can slow down
the refinement process and may even
degrade the final solution
Initial Routing (cont.)
Use multicommodity flow based algorithm
It is fast enough for a relatively big grid size
It considers all the nets at the same time
It can be integrated with other optimization algorithms to
consider special requirements of certain critical nets
The objective is to minimize the congestion on the
routing graph G
Current implementation does not consider delay
minimization and focuses mainly on routability and
wire length optimization
Use only the shortest paths as candidates for each net
Multicommodity Flow
= {P
, , P
} be the set of possible paths of
given net i
C(e) is the capacity of each edge on the routing
is the cost for net i to go through edge e
is an integer variable with possible values 1 or 0
indicating if path P
is chosen or not
Multicommodity Flow Algorithm
Relax X
>= 0 to convert the problem to a linear
programming problem
A maximum flow approximation algorithm is used to
compute the fraction value of X

After picking a path, increase the flow along the path as
much as possible to saturate the minimum capacity edge
along the path
After the fractional result for each path are
computed, map the fractional results to integer
Use a randomized rounding algorithm
Does not guarantee that there is no overflow at the tile
Upward Pass of Multilevel
Paths computed by the initial flow-
based algorithm are refined from level
to level until the finest tiles are finally
Multilevel framework allows the finer
level to change coarser-level routing
Constrained Maze Refinement
Local Nets are the
nets that are relatively
short and do not cross
coarser tile
boundaries. Finding
paths for them is
relatively easy
Another set of nets
are those carried over
from the previous
coarser-level routing
Constrained Maze Refinement
A preferred region is defined
as the set of tiles that the
coarse level path goes
Weights and penalties
associated with each routing
graph edge are computed
Additional penalties are
assigned to graph edges
linking to and going between
the graph nodes
corresponding to tiles that
are not located within the
preferred region
Dijkstras shortest path
algorithm is used to find a
weighted shortest path for
each net
Experiments Results
Experiment Results (cont.)
Experiment Results (cont.)
Present a novel routing system using a
multilevel method
It scales well on larger designs and provides
a good framework for integrating different
algorithms and allows different algorithms to
be used on different levels
A flow-based algorithm is used to compute
the initial routing results
A modified maze-searching algorithm is used
to iteratively refine the results
Full-chip Multilevel Routing for
Power and Signal Integrity
Authors: Jinjun Xiong and Lei He
EE Department
University of California, Los Angeles
Design Constraints
Problem derivation
Power Net Estimation Formula
Algorithm Description
Experimental Results
Major Concern in wire-limited deep sub-micron designs
- Power Distribution Networks
- Signal networks
Designed Separately
- PDN First
- SN second
- Iteration between both in order to find best design
Existing Approaches
1) Feedback between Power Network and Signal Network
- Design Convergence is very slow
- Results in small benchmarks reported

2) Three Step design:
Signal Routing->Power Network->Signal Routing
- Requires iteration
- Is applied to real industrial practices
Design Constraints
Power Network
- Designed as a mesh to provide a low impedance current return path
for signals
- Power Pitch (max. separation between 2 adj. Power lines in a mesh
Signal Integrity
- Crosstalk reduction via shielding
- Assumes shielding requirements for nets are inputs
- Signal nets that require:
I 2 adj. Shields: S2_nets
II - 1 adj. Shield : S1_nets
III 0 adj. Shield : S0_nets

- I & II are critical nets

Design Constraints
Tessellate routing area into routing tiles
- Formulated into an undirected graph G(V,E).
- Each Vertex V = 1 routing tile
- Each edge e E = routing area between 2 adj. Tiles.
Capacity = # tracks available
In Multi-layer design an edge consists of more than 1
- Each layer is composed of eq. Spaced tracks.
- Each track is used by one net segment.
Design Constraints
-Assuming uniform wire sizing for all power nets and
uniform lengths for all finest routing tiles:
Model for total power network area:
St = #power nets in Rt
Rt = Routing region
Routing Density:
Ct = routing capacity and Gt = # signal nets
But, if Rt > 1 then overflows in Rt exists
Problem Formulation
-Shields inserted after Power Network Design
- Typically during or after signal routing
shields consume the already tight routing budget left for signal routing
-If no solution possible then,
- Go back to modify power network design to min. area
and allocate routing resources for shielding purposes.
Problem Formulation
-Apply co-design to the power and signal Networks
- Co-design is formulated as follows:
* Given a power pitch PGP, a placement solution, a netlist and the shielding
requirements for all signal nets.
* GSPR synthesizes a Power Network and an extended global routing solution
such that power pitch < PGP.
* It satisfies the shielding constraints for all nets and total Power Network area
defined in ( 1 ) is minimized.
Design Methodology
-GSPR synthesizes a global routing solution with power net
estimation considering Power Pitch and shielding requirements
- Then the Power Network is synthesized to satisfy the Power
Pitch constraint.

-Goal: Provide a simple & accurate Power estimation formula that
calculates min. # Power nets that satisfies power pitch and net shielding
constraints without knowing the Power Network solution.
Power Net Estimation
-A valid track in Rt = solution that meets Power Pitch and signal
shielding constraint.
- The exact # of Power Nets is only known after we have fixed
track assign. Solution.
- At this point is too late to correct bad routing solutions
A formula is developed to estimate # power nets
Lemma 1:
- Given Rt with Capacity Ct, Min. # of Power Nets in Rt must be:
Pt = Ct/ PGP in order to satisfy PGP
Power Net Estimation
-Need to satisfy shielding requirements
Lemma 2:
- Given Rt with m2 (#s2_nets), m1, m0
* Min. # of Power Nets:
St = ( m1/2 - b2) + (m2 + 1)*b2
Where, b2=1 , for m2>0
b2=0 Otherwise
Power Net Estimation
-In order to satisfy PGP and Shield constraints:
Theorem 1:
* Given routed nets and shielding requirements for signal integrity, Min #
Power Nets as (Pt 1)^2
Then, upper bound on Min. # of Power Nets is:
GSPR Algorithm
1) Power Integrity aware multi-level signal routing
2) Power Network synthesis and track assignment to
satisfy both Power and Signal integrity constraints.
Multi-level routing framework consists in 2 parts:
- Coarsening Process
- un-coarsening Process
GSPR Algorithm
1) Coarsening Process:
- Fine routing tiles merged recursively into coarser tiles.
- Stops when # of tiles in coarsest level is < threshold
2) Un-coarsening Process:
- Determines tile to tile solution for un-routed nets left
by coarsening stage.
- Refines the routed solution
GSPR Algorithm
GSPR Algorithm
-For each determined path, its cost function is defined as:
Gt = # of nets
St= # of Power Nets
Ct = Capacity of Rt
t = Dynamically factor to penalize for paths that tend to cause
GSPR Algorithm
-Power Network Synthesis & track assignments:
* 2 step hierchical procedure
1) Synthesize a global Power Network -> 2 power nets
along the 2 edges of every routing region.
2) Synthesize local Power Networks & track assignment
-Optimal local power network and track assignment in each
routing region is decided by Theorem 1.
-Results in no iteration.
Implementation Results
-GSPR is implemented in C++ on
-10 Industrial benchmarks are
involved for testing.
-It is assumed that the required
power pitch PGP = 10 for the
benchmarks shown in table 1.
GSPR Vs. 3-step Algorithm
Problem: Iterative process between Power Distribution
and Signal Networks.
Formulation of Theorem 1 used in GSPR
Novel Design Methodology to co-design of Power and
Signal Networks under integrity constraints
Algorithm Flow
Results: reduction of power network area of 19.4%
compared to 3 step approach.