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ALLAH the most Merciful, the most Beneficent”

Pulses & switches


 Idealand real switches.

 Pulse Fundamentals.
 Propagation Delay.
 Pulse Distortion.
 Square wave and rectangular waveforms.
 Timing Diagram and Synchronous Logic.
Electronic Switch

An electronic device whose output varies between two or more

distinct voltage levels is called an electronic switch.
Ideal switches
Logic circuits are called switching circuits because the electronic devices from
which they are constructed effectively switch their output between two distinct
voltage levels. In connection with logic circuitry an ideal switch is one that has
following characteristics

1. It has zero resistance when closed (short circuit)

2. Infinite resistance when open (open circuit

Ideal switches
3. Can switch between one voltage level to other voltage level in zero time
Real switches
• The switching action in most logic circuits is performed by an active output
device such as transistor which can only approximate the characteristics of
ideal switch

1. A real switch has small but non-zero resistance when closed.

2. has large but finite resistance when opened and
3. it requires a short but non-zero time when changes its output voltage
level from one state to another state.
4. Fig shows an equivalent circuit of a real switch which has resistance Ron
when it is closed and resistance Roff when open (the term on and off
conveys the idea that the switch is conduction when closed and non-
conducting when open)
Real switches
output voltage is no longer zero when the switch is closed because of the
voltage division that takes place between R and Ron

VO (LOW) = (RON/R+RON)*VCC ------------ (1)

Resistive loading of switches:
The output of every practical switching circuit is connected to some sort of
load; it may be an indicating device, a recording instrument or more often
the input to another switching circuit. The characteristics of the load
particularly its resistance and capacitance further effect the behavior of
real switch and determine the extent to which to which its non ideal
character is determined to circuit performance, fig show the equivalent
circuit of the real switch with load resistance RL connected to its output.
For the moment neglect the capacitance that is present in the circuit or in
the load. The equivalent resistance of the parallel combination of RL and
the resistance of the real switch is

Switch closed: Rp (on) = Ron||RL= RonRL/Ron+RL

Switch closed: Rp (OFF) = Roff||RL= RoffRL/Roff+RL

Resistive loading of switches:
Switch closed: Rp (on) = Ron||RL= RonRL/Ron+RL

Switch closed: Rp (OFF) = Roff||RL= RoffRL/Roff+RL

Resistive loading of switches:
When the switch is closed in this way the output voltage are found again by
voltage division
VO (low) = [Rp (on)/R+Rp (on)) Vcc

VO (high) = [Rp (off)/R+Rp (off)) Vcc

Switch closed: Rp (on) = Ron||RL= RonRL/Ron+RL Switch closed: Rp (OFF) = Roff||RL= RoffRL/Roff+RL
Resistive loading of switches:
Since Rp(on ) is smaller than Roff Vo(low) is close to ideal value of 0 volt
when the switch is loaded. However Rp (off) is smaller than Roff, so VO (high)
deviates from the ideal value of the Vcc when the switch is loaded.
Manufactures of commercially available logic gates specify the maximum
voltage that a particular gate will interpret as a low input and minimum voltage
that it will interpret as a high input. Loading of a gate output is therefore
particularly relevant to applications where the output is input of other gates.
Many particular switching circuits are non-linear, as a result of which the
values of the parameters such as R and RL depend upon whether the switch
output is on or off
Propagation delay:
Output of a logic gate does not change at the same instant of time that its input
changes. Because of internal capacitance and irrespective of the external stray
capacitance, the response of every practical logic gate is delayed with respect
to an input pulse. This delay is called propagation delay tp. Propagation delay
associated with a low to high level transition in a particular logic circuit may
differ from the propagation delay associated with a high to low level transition.
To distinguish between these two delays we define
tplh=propagation delay when output switches from low to high
tphl=propagation delay when output switches from high to low
As different gates may require different input voltages to initiate response.
Manufactures generally specify and measure propagation delays between
voltage points equal to 50% of input and output pulse amplitudes, fig show the
definition of tplh and tphl. For and inverter note that tplh is measured at the
low to high change of output of the inverter and tphl refers to the high to low
change of output voltage. For tphl & tplh are given for the case in which
specific amount of load capacitance is connected to the output of the gate.
Such as 10pf, any additional capacitance in a particular application can be
expected to increase propagation delays.
Propagation delay:
tplh=propagation delay when output switches from low to high

tphl=propagation delay when output switches from high to low

Capacitance Effects
Capacitance exists between two conducting paths, objects, surfaces and
terminals that are separated by and insulator, consequently capacitance
is always present at the output of a real switching circuit. It is found
between the output terminals of a gate, between the input terminals of
load (another gate) and between the conducting paths that connects the
gate to the load. These are the examples what we called call stray
capacitance. Capacitance is also present between semiconductor
surfaces inside a gate or in load. This interelectrode capacitance is an
inherent property of every semiconductor device because the PN
junctions they contain are themselves conducting surfaces separated by
depletion (non-conducting) regions

To switch the output of a gate from low to high the voltage across the
output capacitance must be increased by charging the capacitance.
Capacitance Effects
To switch the output from high to low the capacitance must be discharged. Since it
is impossible to change the voltage across the capacitance instantaneously. There
is always time delay associate with switching the output of a real gate from one
level to another level. Large scale digital systems contain many logic gates and
switching circuits. None of which initiate a change in output level until after the
time delays of the circuits driving them have elapsed. Thus delay accumulates in
such a system and we can say this capacitance is the main culprit in reducing the
speed to the digital system and increasing the time delays.

To study the effect of capacitance on a switching circuit we can lump all output
capacitance into a single equivalent capacitor that shouts the output. The
equivalent capacitor is connected parallel to output terminals. We cal also lump
the effective resistance into a single equivalent resistance. The result is an RC
circuit such as shown in fig. to charge the capacitor we close the switch. The
capacitor voltage is a function of time when the switch is closed at time t=0 is
given as
Capacitance Effects
VC (t) =E (1-e-t/T) volts

Where τ=RC seconds is a time

constant of the circuit
a plot of vc(t) versus time from
where it is apparent that the
time required to charge the
capacitor fully to E volts is
approximately 5T
Capacitance Effects
When the switch is closed at time t=0 the capacitor discharges and its voltage is
given by It is apparent that delay of 5τ is required to discharge the capacitor fully

VC (t) =Ee-t/τ
Effect of “RC” on pulse shaping:
The resister and capacitor form a voltage divider act as filter circuit. Every digital
signal is made of “Sum of infinite number of sinusoidal waves, contains
fundamental and harmonic components”.
The frequency, amplitude and phase angle of these sine waves
determine shapes of pulse. The fundamental and harmonic sine waves have
amplitude by following formula V0ut = 2A/n pi
For fundamental sine wave n=1, For harmonic sine waves n=3,5,7,9………

The effect of RC circuit on the voltages is given by following formula.

Vo = A/((f/fo)2+1)1/2
fo = cutoff of RC circuit.
f = Harmonic sine wave frequency.
Capacitance Effects

the RC filter cut the first harmonic sine waves about 15% and second cut about
50% and so on. The harmonics are the parts of the digital or any periodic
waves. So this digital wave is attenuated
For ideal digital wave shape bandwidth of RC circuit is infinite witch is
impossible. The bandwidth is limited by RC time constant and affect the wave
Capacitance Effects

If time constant is small, as compare to the period T of the square wave, the
capacitor charges and discharges rapidly and square wave is only slightly
rounded. This is time-based conclusion. From a frequency domain standpoint,
cutoff frequency is inversely proportional to RC. So, a small value of RC means
a high cutoff frequency, which in term means that more high frequency
harmonics are passed, as shown in fig.(b

If time constant is long, it takes longer time for the capacitor to charge and
discharge. in fact, it may not fully chage before it begins to discharge, as
shown in fig (d).
A Positive voltage pulse is a change in voltage from low to high, as illustrated in fig
A Positive voltage pulse is a change in voltage from low to high, as illustrated in fig

There are some important terms regarding to pulse such as

1. Edges of pulse.
2. Pulse width
3. Rise-time
4. Fall-time
These are the points in witch a real pulse differ from an ideal pulse.

1. Edges of puls
There are the two edges of a pulse
Leading edge
trailing edge
The leading edge of a pulse is the first level transition of LOW to HIGH that
occurs and trailing edge is second transition from HIGH to LOW
This is very important aspect of pulse to the devices because devices respond
only to a leading or trailing edge
2. Pulse-width
In periodic waves, the total time between the leading and the trailing edge,
measured between corresponding levels on each edge.
But in real pulse the reach edge is in transition state, so we define that level
for this definition is the 50% value on each edge, as illustrated in figure.
Rise-Time (tr)
This is define as “ The total time required for its leading edge to change from
10% of its amplitude to 90% of its amplitude”.
This time delay is due to charging of capacitor. “tr” can be seen in fig
Fall-Time (tf)
“The total time required for its trailing edge to change from 90% of its
amplitude to 10% of its amplitude”.
This time delay is due to discharging of capacitor. “tf” is shown in fig.

Pulse distortion
Distortion is the change in the shape of the signal (pulse). Shunt capacitance
distorts the pulse (i.e. changes its shape) by rounding the leading edge and
drawing out the trailing edge. Since the rise and fall times of most of the pulses
are very small compared to their pulse width, a typical pulse viewed on the
oscilloscope will appear perfectly sharp and ideal. It can be viewed on the
oscilloscope by expanding the horizontal sweep so that only leading or trailing
edge is displayed.
Different types of pulse distortion :
1. droop
2. ringing
3. dc and ac noise contamination
4. contact bounce
1. Droop :
Pulse droop is also called tilt and it is characterized by the falling off of the high
level. Droop is usually caused by series capacitance and is most often found in
wide pulses,The Percentage droop is defined by
% droop = (change in pulse amplitude / average pulse amplitude ) * 100%

Where, Change in pulse amplitude = VHI (max) - VHI (min)

Average pulse amplitude = [VHI (max) + VHI (min)] / 2.

Pulse distortion
1. Ringing: “The amplification of one frequency and the suppression of others
called ringing When inductance as well as capacitance is present
at the output of switching circuit, an oscillatory switching may occur when
output switches level. The inductance and capacitance form a resonant
circuit that m like a filter, responds vigorously to a particular frequency (the
resonant frequency) and suppresses others. An abrupt change in level m
such as the leading or trailing edge of the pulse, contains a broad band of
frequencies, and rhe LC filter effectively amplifies the frequency at which it
is resonant. The amplification of one frequency and the suppression of
others are responsible for the pulse distortion we call ringing, It is an
example of damped oscillation i.e an oscillation whose amplitude dies out

Pulse distortion
dc and ac noise contamination
Overshoot“ The maximum voltage excursions beyond the nominal high levels of a
The percentage overshoot is defined to be,
%overshoot = [overshoot / VHI – VLOW] * 100%

Undershoot: “The maximum voltage excursions beyond the low levels of a pulse”
The percentage undershoot is defined to be,
%undershoot = [undershoot / VHI – VLOW] * 100%

Problems associated with the ringing

If the leading edge overshoots the nominal high level by too great a value or the
trailing edge undershoots the nominal low level too far, voltage breakdown may
occur in the devices where signal is applied

( Generation of false low and high due to severe ringing )

If the magnitude of the ringing is too great, the high level may drop to a value
that is interpreted as low, or the low level may rise to a value that is interpreted
as a high overshoot.
Noise is any alteration of the signal that makes the signal more difficult to
interpret or detect, under that definition ringing and droop are the examples of
DC Noise :“The shifting of DC level of a pulse is called DC noise”
Noise is responsible of the misinterpretation of the signal.DC noise is possible
when different parts of the digital system have different power supplies.If the dc
voltage in one part of the system drifts(changes) and the dc voltage in another part
does not or if it drifts in opposite direction,then pulses produced in the first part
offset(shifted) with respect to common cicuit ground in such a way that the low
level in the first is interpreted as high or vice versa.the same may occur if the
ground level in the different part of the system drifts(changes) with respect to each
other i.e , if the voltage difference is developed across the circuit commons. The
problem of the dc noise is compounded by the fact that the gate typically interpret
as high even when that input is smaller than the nominal high level and interpret
the input as low even when that input is greater than nominal low level. If dc noise
shifts a pulse so that its high level is in the range between the maximum level that
is interpreted as low and the minimum level that is interpreted as high,then the
response of the gate will unpredictable
Noise is any alteration of the signal that makes the signal more difficult to
interpret or detect, under that definition ringing and droop are the examples of
AC Noise:- AC noise in a digital system typically appears in the form of very
narrow pulses called spikes that are superimposed on the signal line. these spikes
can be positive or negative, negative spikes superimposed on a positive pulse
create false lows and positive spikes superimposed on the low level and create
false high. spikes are induced in the signal line through electromagnetic coupling,
similar to transformer action. when large currents are switched on and off,rapidly
changing magnetic fields are created, and many conductors in the presence of
magnetic field generates voltages in response to them. Power supplies are also
responsible for transmitting ac noise to digital circuitry because they are
connected to many different parts of the system. if the impedence of the power
supply is not small, noise generated in one part of the circuit is developed across
the impedence of the supply and is thereby coupled to other components of the

Minimization of ac noise
Ac noise is minimized when
Gates have low output impedances
Signal and power lines are shielded
Power supply has low output impedances (decoupling capacitors are often
connected between power supply outputs and ground to provide a low-
impedance path that shunt high frequency signal ground)
Shunt capacitance across signal lines is increased (at the expense of greater
propagation delays).
Contact bounce :

When the mechanical switch, such as push button on the keyboard, is used to
produce a pulse for input to a digital system, the switch contacts may open and
close several times before they set into a permanently open and close position.
This behavior is called contact bounce, and depending on how the switch is
used into the circuit, it may create a series of narrow pulses at the leading or
trailing edge of the pulse.).

Bouncing typically lasts 5-20ms. In some circuits , the presence of the few on-
off pulses before of after the opening or closing of the switch has no detrimental
effects. In others contact bounce is not tolerable, and special circuitry called
hardware debouncing, must be used to “shield” the input from bounces. In the
case of computers, programming techniques can also be used to eliminate the
effect of contact bounce. Such techniques are called software debouncing.
Square waves and rectangular waves
A square wave is a series of reoccurring pulses whose pulse width are equal to
the time interval between them. In other words, it is a wave form that is
alternately high and low for equal intervals of time. A square wave is an
example of periodic waveform. One that repeats the same pattern of values at
regular intervals. The period t of such waveform is the time between repetitions
that is, the time required for one complete cycle of values. The frequency is the
number of cycles that occur in one second and is related to the period by
F=1/t Hz
Square waves are present in many digital systems where they are used to
synchronize logic operation, or to perform such operations at prescribed
instants of time. In digital computer applications synchronizing waveforms such
as these are called as clocks.
Square waves are also used in wave shaping applications to produce other
periodic waveforms having the same frequency. In digital applications, the
period t of a square wave is often called as the pulse repetition time (PRT) and
the frequency is called the pulse repetition frequency (PRF), with the units of
pulse per second (PPS). Thus,
Square waves and rectangular waves
PRF=1/PRT pulse per second (PPS)
Rectangular waveform is any reoccurring is any reoccurring sequence of
pulses, periodic or otherwise periodic. An example is square wave, a
special case of a periodic rectangular waveform. Many digital systems are
periodic, rectangular waveform having pulse rate different from intervals
between the pulses. For such waveforms PRF and PRT are defined in the
same way as they are for square waves. A pulse train in any sequence of
pulses, reoccurring or otherwise. A sequence of eight pulses that occur
in one second interval and then cease is an example of a non recurrent
pulse train. Rectangular waveforms are pulse trains of indefinite duration.
The duty cycle of a periodic, rectangular waveform is the ratio of total time it is
high during one cycle to the period, often express as a percent
%duty cycle = PW/t*100%
PW is the pulse width of one pulse in the waveform.
From this definition we see that one square wave have the duty cycle of
50%. Recall that the average value of any waveform, also called the dc value, is
computed by finding the net area of the waveform over one cycle and
dividing by the period
Square waves and rectangular waves
For a rectangular waveform that alternate between 0V and Vhi , it is easy
to see from the definition that the average value Vavg is
Vavg = duty cycle * Vhi
The duty cycle is expressed in decimal form

The mark to space ratio is defined to be the ratio of time interval that the
waveform is high to the time interval that it is low, as a percent,
%MS=PW/ (t-PW)*100%.
Timming Diagram And Synchronous Logic

A timing diagram is a diagram that shows the waveform appearing at several

different points in a digital system. A separate set of axes is used for each
waveform, and each horizontal (time) axis is aligned with all the others. Thus it is
possible to select a time point and readily determine the state (high or low) of
each wave form at that same instant of time. Dashed vertical lines are often
drawn through the wave forms to show states, or changes of states, at important
time points
Timing diagram are particularly useful in synchronous logic circuits, those in
which logic operations are controlled by a rectangular wave form, or clock. In
these systems, gate output is considered valid, or useful, only when the clock
waveforms are high. the gates are said to be pulsed or clocked. Figure Shows an
AND gate, one input of which is the digital variable A and the other input of which
is a clock waveform. In general, A may change asynchronously (at any time) but
the output of the gate equals when the clock is high. This fallows from the
definition of an AND gate. Note that A is gated by the clock and write the output
Timming Diagram And Synchronous Logic

This figure is an example of a timing diagram, showing some arbitrary,

asynchronous changes in A, and showing CLOCK, And A.CLOCK.
Electronic Gates