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Topic : Interfacing and
(I/O Techniques)
Compiled by
Salehah Hamzah
Comp.Science Dept, UiTM Perlis

Programmed I/O
Interrupt-Driven I/O
Direct Memory Access


Input-output interface provides a method

for transferring information between
internal storage and external I/O devices.
Peripherals connected to a computer need
special communication links for interfacing
them with the central processing unit.
The purpose of the communication link is to
resolve the differences that exist between
the central computer and each peripheral.

2. The data transfer rate of peripherals is usually
slower than the transfer rate of the CPU, and
consequently, a synchronization mechanism may be
3. Data codes and formats in peripherals differ from
the word format in the CPU and memory.
4. The operating modes of peripherals are different
from each other and each must be controlled so as
not to disturb the operation of other peripherals
connected to the CPU.


To resolve these differences, computer systems include

special hardware components between the CPU and
peripherals to supervise and synchronize all input and
output transfers.

These components are called interface units because

they interface between the processor bus and the
peripheral device.

Interfaces include addressable ports. In addition, each

device may have its own controller that supervises the
operations of the particular mechanism in the

The I/O bus consists of data lines, address lines, and control lines.
Each peripheral device has associated with it an interface unit.
Each interface decodes the address and controlreceived from the I/O bus,
interprets them for the peripheral, and provides signals for the peripheral
It also synchronizes the data flow and supervises the transfer between
peripheral and processor.
Each peripheral has its own controller that operates the particular
electromechanical device.
For example, the printer controller controls the paper motion, the print timing,
and the selection of printing characters

I/O interface/I/O Module Functions

Recognizes messages from device(s) addressed to

it and accepts commands from the CPU
Provides a buffer where the data from memory
can be held until it can be transferred to the
Provides the necessary registers and controls to
perform a direct memory transfer
Physically controls the device
Copies data from its buffer to the device/from the
CPU to its buffer
Communicates with CPU

Copyright 2010 John Wiley & Sons,



I/O Fundamentals

Relation between computer and peripheral

Three strategies
Programmed (polled) I/O
Interrupt-driven I/O
Direct memory access (DMA)

I/O Techniques

Data transfer to and from peripherals

may be handled in one of three possible
Programmed I/O
CPU controlled I/O

Interrupt Driven I/O

External input controls

Direct Memory Access Controllers

Method for transferring data between main

memory and a device that bypasses the CPU

Programmed I/O Example


In this example, the processor schedules data transfer to a

peripheral device by first reading the port status register to
see if the peripheral device is ready to transmit or receive

In the case that the I/O device is ready because the

examine flag is asserted, data is transferred and the
processor loops back.

In the case that the I/O device is not ready because the
examine flag is negated, the processor loops back.

The major disadvantage of programmed I/O is the polling

loop, or busy waiting, can waste large amounts of CPU
time, and it is therefore inefficient in terms of CPU usage.

Programmed I/O is slow and is suitable for character


What it is?

A signal that causes the CPU to alter

its normal flow on instruction
executionfrees CPU from waiting for
events provides control for external input

Interrupt-Driven I/O

A method that is no polling loop

I/O can request service from the CPU
by interrupting the CPU
CPU responds to the interrupt by
executing interrupt handling routine
CPU returns from interrupt handling
routine to the former execution



Interrupt organization



The message sent through the IRQ line will

cause an interrupt
The interrupt will cause the computer to
suspend the program being executed and
jump to a special interrupt processing
Interrupt Handler Program is the action
taken by the microprocessor when an
interrupt occurs
This is also known as interrupt routine


There are many circumstances under

which it would be desirable to interrupt
the normal flow of a program in the
computer to react to special event.
User command from keyboard
Command from other external input
Abnormal situation power failure
Execution of an illegal instruction
Completion signaling of an I/O task

Types of interrupt

There are two type of interrupts

Hardware interrupt this interrupt is

being sent by the peripheral devices to

indicate certain conditions such as
keyboard entry, printing problem, and
power failure
Software interrupt modern CPU has a

set of instructions to simulates an

interrupt for examples are HALT and INT

Usage of interrupt
The way in which an interrupt is used depends on the nature of
the device.
There are several different ways in which interrupt are used:
As an external event notifier.
Interrupt are useful as notifiers to the CPU of external
events that require action.
Frees the CPU from necessity of performing polling.
Example: Keyboard input.
As a completion signal.
Controlling the flow of data to an output device.
Interrupt serves to notify the computer of completion of a

particular course of action.

Example: Printer

Usage of interrupt
As a means of allocating CPU time.
Interrupt is used as a method of allocating CPU

time to different programs that are sharing the

The CPU can only execute one program at a time.
Time share multiple programs implies that the
computer system must share the CPU by
allocating small segments of time to each
program, in rapid rotation among them.
Each program is allowed to execute some
After a certain period of time, that program is
interrupted and relinquishes control to a
dispatcher program within the operating system

Usage of interrupt
As an abnormal event indicator.

The events are directed at the problems within

the computer system itself.

Example: Execution of an illegal instruction.
Divide by zero
Nonexistent op code
Hardware error detected

Servicing an interrupt

There are four steps taken by

microprocessor to handle an interrupt:
1. The microprocessor finished the current

instruction until the end of an instruction

2. Normal operation is suspended
3. The microprocessor jumps to the location in
memory where the interrupt service routine
has been stored and executes the routines
4. When the interrupt routines complete, it
would return control to the interrupted

Types of interrupt

Interrupt can be divided into TWO categories:

1. Maskable
2. Non-maskable

Maskable interrupt that can be selectively disabled.

interrupt that not be accepted.

Non-maskable - interrupt that never disabled.
interrupt that will always be acknowledged and
example: power failure.

Multiple interrupt

Multiple interrupts will occur from time to time.

Multiple interrupt can be handled by assigning priorities to

each interrupt handle top priority first.

A higher priority interrupt will be allowed to interrupt an

interrupt of lower priority.

Lower priority interrupt will have to wait until a higher priority

interrupt is completed.

This leads to hierarchy of interrupts, in which higher-priority

interrupts can interrupt other interrupts of lower priority, back
and forth, eventually returning control to the original program
that was running.

Two different processing method used for

determining which device initiated
1. Vectored interrupt
2. Polling


Technique/approach to taking care of peripheral

Microprocessor checking each device in rotation at
frequent intervals to see if it need service.
The computer time spent in polling is largely
Not efficient when the processor needs to perform
other tasks.
Need better system that allow processor to be free
to continue normal sequential execution and only
stop to deal with a peripheral when it specially
needed attention.

Vectored Interrupt

Address of the interrupting device is included

as a part of the interrupt.
When the interrupt request occurs, the
microprocessor will automatically load the
program counter with the assigned address.
Assigned address contains the address of the
routine to be executed.
The interrupt will then check the assigned
address to get the interrupt routine.

Direct Memory Access

Many device controllers, particularly those used

for block devices such as magnetic disks use
is employed to transfer a block of data faster /
more efficient
Under DMA, the I/O transfer the data directly to
or from memory without the intervention of the
Data is directly transferred between a peripheral
device from main memory and the CPU is
Once the data has been transferred the
Interface module notifies the CPU, so that the

Comparison of
Three I/O Techniques
- Reading a data block


Because of the different speeds and data

requirements of I/O devices, different I/O
strategies may be useful, depending on the type
of I/O device which is connected to the computer.

Because the I/O devices are not synchronized

with the CPU, some information must be
exchanged between the CPU and the device to
ensure that the data is received reliably.

This interaction between the CPU and an I/O

device is usually referred to as ``handshaking''.





For a complete ``handshake,'' four events are

The device providing the data (the talker) must
indicate that valid data is now available.
The device accepting the data (the listener) must
indicate that it has accepted the data. This signal
informs the talker that it need not maintain this data
word on the data bus any longer.
The talker indicates that the data on the bus is no
longer valid, and removes the data from the bus. The
talker may then set up new data on the data bus.
The listener indicates that it is not now accepting any
data on the data bus, the listener may use data
previously accepted during this time, while it is
waiting for more data to become valid on the bus.