# Karnaugh Maps (K-Maps

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• A visual way to simplify logic expressions
• It gives the most simplified form of the expression

•By simplifying an expression to the one that uses the least number of literals for each terms. •By simplifying an expression to the one that uses the minimum number of terms.Rules to obtain the most simplified expression •Simplification of logic expression using Boolean algebra is awkward because: – it lacks specific rules to predict the most suitable next step in the simplification process – it is difficult to determine whether the simplest form has been achieved. •The simplest form of an expression is the one that has the minimum number of terms with the least number of literals (variables) in each term. we ensure that the function will be implemented with gates that have the minimum number of inputs. •A Karnaugh map is a graphical method used to obtained the most simplified form of an expression in a standard form (Sum-of-Products or Product-ofSums). . we ensure that the function will be implemented with the minimum number of gates.

4)  A C BC A 00 01 11 10 f   (4.4)  B C BC A f   (4.4.2.1.6)  A C f   (0.5)  A B 00 01 11 10 BC A 00 01 11 10 f   (0.4.5)  B f   (0.1.6)  C BC BC BC A 00 01 11 10 A 00 01 11 10 A 00 01 11 10 0 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 .2)  A C f   (0.Three-Variable K-Maps f   (0.2.3)  A BC BC A 00 01 11 10 A 00 01 11 10 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1 1 1 0 0 0 1 1 1 0 0 1 1 1 0 0 1 0 0 0 0 f   (0.

Three-Variable K-Map Examples BC A 00 01 11 10 0 1 BC A A 1 1 1 1 00 01 11 10 1 0 1 BC 1 1 1 00 01 11 10 0 1 1 1 BC A 1 1 1 1 1 1 A 1 0 1 1 00 01 11 10 0 BC 1 BC A 0 1 00 01 11 10 1 1 1 1 00 01 11 10 .

11)  B  C f   (0.2.8.15)  A  B  D f   (4.12.10)  B  D .10.14)  B  D f   (2.6.13)  B  C  D f   (13.6.Four-Variable K-Maps CD CD 00 01 11 10 AB 00 1 0 0 0 AB 00 01 0 0 0 0 11 0 0 0 10 1 0 0 CD 00 01 11 10 0 0 0 0 AB 00 01 0 1 0 0 0 11 0 1 0 0 10 0 0 0 f   (0.8)  B  C  D CD 00 01 11 10 AB 00 0 0 1 1 CD 00 01 11 10 0 0 0 0 AB 00 01 0 0 0 0 0 11 0 1 1 0 10 0 0 0 00 01 11 10 0 0 0 0 01 1 0 0 1 0 11 0 0 0 0 0 10 0 0 0 0 f   (5.6)  A  B  D CD CD CD 00 01 11 10 AB 00 0 0 0 0 00 01 11 10 AB 00 0 0 1 1 00 01 11 10 AB 00 1 0 0 1 01 0 0 1 1 01 1 0 0 1 01 0 0 0 0 01 0 0 0 0 11 0 0 0 0 11 1 0 0 1 11 0 0 0 0 11 0 0 0 0 10 0 0 0 0 10 0 0 0 0 10 0 0 1 1 10 1 0 0 1 f   (2.3.3.7)  A  C f   (4.

9.9.11. 9. 7.14) f  A  B C D f  A  BC D CD 00 01 11 10 AB 00 1 0 0 1 CD 00 01 11 10 AB 00 0 0 0 0 00 01 11 10 AB 00 1 1 1 1 01 0 1 1 0 01 1 0 0 1 01 1 1 1 1 01 0 0 0 0 11 0 1 1 0 11 1 0 0 1 11 1 1 1 1 11 0 0 0 0 10 0 1 1 0 10 1 0 0 1 10 0 0 0 0 10 1 1 1 1 f   (1.7.Four-Variable K-Maps CD AB 00 CD 00 01 11 10 0 0 0 0 AB 00 01 1 1 1 1 11 0 0 0 10 0 0 0 CD 00 01 11 10 0 0 1 0 AB 00 01 0 0 1 0 0 11 0 0 1 0 10 0 0 1 f   (4. 6.3.12.4.15)  C  D CD 00 01 11 10 AB 00 0 1 1 0 CD 00 01 11 10 f   (0. 7.15) fB f   (0. 7.15) f   (1.8.6.8.2. 3. 7)  A  B CD 00 01 11 10 AB 00 0 1 0 1 1 0 1 0 01 0 1 0 1 01 1 0 1 0 0 11 1 0 1 0 11 0 1 0 1 0 10 0 1 0 1 10 1 0 1 0 f   (3.12.8.5.5. 3.10. 4.1.10.2.6.13. 6.12.13.11.11) fB .5. 2.15) fD f   (0.14) f D f   (4. 5.11.13.10.14.

Four-Variable K-Maps Examples CD 00 01 11 10 AB 00 1 1 1 CD 00 01 11 10 AB 00 1 1 1 01 1 1 1 01 11 1 1 1 11 10 1 1 CD AB 00 00 01 11 10 01 1 11 1 10 10 CD AB 00 1 1 1 1 00 01 11 10 CD 00 01 11 10 AB 00 01 1 1 11 1 1 10 1 CD AB 00 1 1 1 1 1 01 01 1 1 11 11 10 10 1 1 1 00 01 11 10 .

Four-Variable K-Maps Examples CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 01 01 01 11 11 11 10 10 10 CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 01 01 01 11 11 11 10 10 10 .

Four-Variable K-Maps Examples CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 01 01 01 11 11 11 10 10 10 CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 CD 00 01 11 10 AB 00 01 01 01 11 11 11 10 10 10 .

7) BC A X 00 01 11 10 X  AC  AB  BC A B C .Design of combinational digital circuits • Steps to design a combinational digital circuit: – – – – From the problem statement derive the truth table From the truth table derive the unsimplified logic expression Simplify the logic expression From the simplified expression draw the logic circuit • Example: Design a 3-input (A. 6.C) digital circuit that will give at its output (X) a logic 1 only if the binary number formed at the input has more ones than zeros. 0 Inputs A B C 0 0 0 Output X 0 1 0 0 1 0 2 0 1 0 0 3 0 1 1 1 0 0 0 1 0 4 1 0 0 0 1 0 1 1 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 X   (3.B. 5.

9) X CD 00 01 11 10 AB 00 0 0 1 1 01 1 1 1 1 11 0 0 0 0 10 1 1 0 0 Same X  AC  AB  A B C A B C D X .B.5.) • Example: Design a 4-input (A.8.4.C.3. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Inputs B C 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Output X 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 X   (2.Design of combinational digital circuits (Cont.6.7.D) digital circuit that will give at its output (X) a logic 1 only if the binary number formed at the input is between 2 and 9 (including).

B. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Inputs B C 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 Output D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X= CD 00 01 11 10 AB 00 01 11 10 X= A B C D X X .D) digital circuit that will give at its output (X) a logic 1 only if there more ones than zeros in the binary number formed at the input.Design of combinational digital circuits (Example) • Example: Design a 4-input (A.C.