ELECTRONIC

PACKAGING

By: Paul Matthew S. Bentor

INTRODUCTION TO ELECTRONIC PACKAGING

What is Electronic Packaging?
 refers to the method of enclosing, protecting
or providing physical structure to either
electronic components, assemblies of
components or finished electronic devices
 for example, a DVD player is an electronic
assembly packaged in a rectangular metal
case that both protects it and allows for the
placement of buttons that are used to operate
the device as well as the connectors needed
to connect the DVD player to other devices

Electronic Packaging Considerations:
• Hazards to be protected against: mechanical
damage, exposure to weather and dirt,
electromagnetic interference, etc.
• Heat dissipation requirements
• Tradeoffs between tooling capital cost and perunit cost
• Tradeoffs between time to first delivery and
production rate
• Availability and capability of suppliers
• User interface design and convenience
• Ease of access to internal parts when required for
maintenance
• Product safety, and compliance with regulatory
standards
• Aesthetics, and other marketing considerations
• Service life and reliability

YIELD. PHYSICS. COST.Issues In Electronic Packaging CHEMISTRY. MARKET NEED/TIMING . MATERIAL ENGINEERI NG MANUFACT U-RING AND INDUSTRIAL ENGINEERI NG ELECTRICA L ANALYSIS AND TESTING RELIABILITY. PERFORMAN CE. MANUFACTU RA-BILITY MARKET ANALYSIS MECHANIC AL ANALYSIS AND TESTING THERMAL ANALYSIS AND TESTING .

for example a rack 4 • Connections between physically Level separate systems.HIERARCHY OF INTERCONNECTION LEVELS • Gate-to-gate interconnections on the Level silicon die 0 • Connections from the chip to its Level package 1 • PCB. using for example an Ethernet LAN 5 . Level including backplanes or motherboards 3 • Connections between Level subassemblies. from component to component Level or to external connector 2 • Connections between PCBs.

Example of Connection Hierarchy: BLUE GENE .

CHIP PACKAGING TECHNOLOGY .

Through (Thru)-Hole Mounting  involves different components which have lead wires that are led to the board through holes. In this method. The leads are then finally soldered to offer permanent mounting  technology finds usage in: • DIP aka Dual Inline Packaging • Pin Grid Array Package . hence the name. leads rely on holes in a multilayer PCB.

Through (Thru)-Hole Mounting Benefits:  Easy to solder. either automatically (wave) or by hand  Easy to desolder and test  Implement interconnections between upper and Lower layers (vias) in nonplated hole technologies Drawbacks: • Signals must necessarily go through all PCB layers • Low density due to minimum pin diameter and only one-sided mounting .

other devices in DIP packages include resistor packs. DIP switches. LED segmented and bargraph displays. and electromechanical relays .DIP: Dual Inline Packaging  electronic component package with a rectangular housing and two parallel rows of electrical connecting pins  commonly used for integrated circuits (ICs).

DIP: Dual Inline Packaging Variants  Ceramic Dual In-line Package (CERDIP or CDIP)  Plastic Dual In-line Package (PDIP)  Shrink Plastic Dual In-line Package (SPDIP) – A denser version of the PDIP with a 0.300 in. (1.g. wide DIP package. wide DIP. normally when clarification is needed e.778 mm) lead pitch. which usually come in "wide" 0. for DIP with 24 pins or more. .07 in.  Skinny Dual In-line Package (SDIP or SPDIP) – Sometimes used to refer to a "narrow" 0.600 in.

 often mounted on printed circuit boards using the through hole method or inserted into a socket  allow for more pins per integrated circuit than older packages such as dual in-line package (DIP) .Pin Grid Array Package  often abbreviated PGA. is an electronic component package that is square or rectangular.54 mm (0.1") apart. and the pins are arranged in a regular array on the underside of the package  pins are commonly spaced 2. and may or may not cover the entire underside of the package.

used by Intel with the Coppermine core Pentium III and Celeron processors based on Socket 370.used by Intel for late model Mendocino core Celeron processors based on Socket 370  Flip-Chip Pin Grid Array (FC-PGA or FCPGA) .Pin Grid Array Variants  Plastic Pin Grid Array (PPGA) . and was later used for Socket 478based Pentium 4[2] and Celeron processors .is a form of PGA in which the die faces downwards on the top of the substrate with the back of the die exposed. This allows the die to have a more direct contact with the heatsink or other cooling mechanism.

Put differently: within a square boundary the pins form a diagonal square lattice. Staggered Pin Grid Array (SPGA) . such as microprocessors.is used by Intel processors based on Socket 5 and Socket 7. There is generally a section in the center of the package without any pins. It consists of two square arrays of pins. offset in both directions by half the minimum distance between pins in one of the arrays. SPGA packages are usually used by devices that require a higher pin density than what a PGA can provide. . Socket 8 used a partial SPGA layout on half the processor.

 Ceramic Pin Grid Array (CPGA) . Socket 939. Socket AM2. Some CPUs that use CPGA packaging are the AMD Socket A Athlons and the Duron  Organic Pin Grid Array (OPGA) . was originally introduced for the AMD Athlon XP processors based on Socket A. also used for AMD processors using Socket 754. Socket 940.is a form of PGA where the silicon die is attached to a plate made out of an organic plastic which is pierced by an array of pins which make the requisite connections to the socket.uses a ceramic substrate with pins arranged in a pin grid array. and Socket AM2+ .

PPGA FCPGA SPGA CPGA OPGA .

Surface Mount Technology (SMT or SMD)  is a method for producing electronic circuits in which the components are mounted or placed directly onto the surface of printed circuit boards (PCBs)  technology finds usage in: • QFP: Quad Flat Package • TSOP: Thin Small-Outline Package • SOIC: Small Outline Integrated Circuit • BGA: Ball Grid Array .

devices can be mounted on both sides of the PCB.Surface Mount Technology (SMT or SMD) Benefits:  Much higher density: pins can be thinner. components do not block signals in inner layers  Higher degree in the automation of the mounting process  Less parasitic inductance and capacitance  Reduced costs (^ to %) and size (% to one tenth) Drawbacks: • Poor manual solderability and reparability • Reliability issues due to thermal/mechanical stress during soldering and operation (different thermal expansion coefficients) • Classic verification procedures no longer valid .

QFP: Quad Flat Package  is a surface mount integrated circuit package with "gull wing" leads extending from each of the four sides  socketing such packages is rare and through-hole mounting is not possible  versions ranging from 32 to 304 pins with a pitch ranging from 0. other special variants include low profile QFP and thin QFP .0 mm are common.4 to 1.

.QFP: Quad Flat Package Variants  BQFP: Bumpered Quad Flat Package .is a package with no component leads extending from the IC.is a QFP with extensions at the four corners to protect the leads against mechanical damage before the unit is soldered  BQFPH: Bumpered Quad Flat Package with heat spreader  CQFP: Ceramic Quad Flat Package  EQFP: Plastic Enhanced Quad Flat Package  FQFP: Fine Pitch Quad Flat Package  HQFP: Heat sink Quad Flat Package and HVQFN: Heat sink Very-thin Quad Flat-pack No-leads . Pads are spaced along the sides of the IC with an exposed DIE that can be used as ground. Spacing between pins can vary.

help solve issues such as increasing board density.  VQFP: Very small Quad Flat Package  VTQFP: Very Thin Quad Flat Package . body sizes range from 5 mm x 5 mm to 20 x 20 mm.is a thinner QFP. die shrink programs. lead counts range from 32 to 176. thin end-product profile and portability. LQFP: Low Profile Quad Flat Package – a QFP with component leads extending from each of the four sides  MQFP: Metric Quad Flat Package  NQFP: Near chip-scale Quad Flat Package  SQFP: Small Quad Flat Package  TQFP: Thin Quad Flat Package .

BQFP HQFP TQFP LQFP .

memory modules.TSOP: Thin Small-Outline Package  is a type of surface mount IC package with a very low-profile (about 1mm) and have tight lead spacing (as low as 0. flash memory. netbooks and countless other product applications  is the smallest leaded form factor for flash memory . PC Cards (PCMCIA cards). cellular.5mm)  are frequently used for RAM or Flash memory ICs due to their high pin count and small volume  prime application for this technology is memory i. wireless. FSRAM and E2PROM that are used in telecom. SRAM.e.

the convention for naming the package is SOIC or SO followed by the number of pins. a 14-pin 4011 would be housed in an SOIC-14 or SO-14 package . for example. with a typical thickness that is 70% less  they are generally available in the same pinouts as their counterpart DIP Ics.SOIC: Small Outline Integrated Circuit  is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent DIP.

the leads are also on average shorter than with a perimeter-only type.  soldering of BGA devices requires precise control and is usually done by automated processes and are not suitable for socket mounting .e. instead of just the perimeter. the whole bottom surface of the device can be used. leading to better performance at high speeds.BGA: Ball Grid Array  is a type of surface-mount packaging (a chip carrier) used for integrated circuits and is used to permanently mount devices i. microprocessors  can provide more interconnection pins than can be put on a dual in-line or flat package.

based on ball grid array technology. also known as FineLine BGA by Altera.CBGA and PBGA denote the Ceramic or Plastic substrate material to which the array is attached.BGA: Ball Grid Array Variants  CABGA: Chip Array Ball Grid Array . It has thinner contacts and is mainly used in system-on-a-chip designs. Not to be confused with Fortified BGA  FCmBGA: Flip Chip Molded Ball Grid Array  LBGA: Low-profile Ball Grid Array  LFBGA: Low-profile Fine-pitch Ball Grid Array .  CTBGA: Thin Chip Array Ball Grid Array  CVBGA: Very Thin Chip Array Ball Grid Array  DSBGA: Die-Size Ball Grid Array  FBGA: Fine Ball Grid Array .

 MBGA: Micro Ball Grid Array  MCM-PBGA: Multi-Chip Module Plastic Ball Grid Array  PBGA: Plastic Ball Grid Array  SuperBGA (SBGA): Super Ball Grid Array  TABGA: Tape Array BGA  TBGA: Thin BGA  TEPBGA: Thermally Enhanced Plastic Ball Grid Array  TFBGA or Thin and Fine Ball Grid Array  UFBGA and UBGA and Ultra Fine Ball Grid Array -based on pitch ball grid array.  VFBGA: Very Fine Pitch Ball Grid Array  WFBGA: Very Very Thin profile Fine Pitch Ball Grid Array .

direct surface mountable package with an area of no more than 1. decoupling capacitors) .Chip Scale Packages (CSP)  based on IPC/JEDEC J-STD-012 definition.2 times the original die area  CSP is not a new mounting technology. is an evolution of SMD  The passive components surrounding the chips must also be miniaturized (resistors. is a single-die.

Chip Scale Packages (CSP)  Chip scale packages can be classified into the following groups: • • • • • Customized leadframe-based CSP (LFCSP) Flexible substrate-based CSP Flip-chip CSP (FCCSP) Rigid substrate-based CSP Wafer-level redistribution CSP (WL-CSP) .

5 mm)  Long-term reliability not studied  Not serviceable .Chip Scale Packages (CSP) Benefits:  CSP is the only way to achieve pervasive and ubiquitous computing  Further improvement in high-speed performance Drawbacks:  Difficulty of PCB fabrication and mounting due to minute pin pitches (0.

improved thermal performance and finer pitch interconnection to the printed circuit board  all of the manufacturing process steps are performed in parallel at the silicon wafer level rather than sequentially on individual chips to achieve a package that is essentially the same size as the die .Wafer-Level Redistribution CSP (WLCSP)  one of the most compact package footprints. providing increased functionality.

it allows for a smaller form factor due to increased routing density. and the elimination of wire-bond loops .Flip-Chip CSP (FCCSP) • a flip chip solution in a CSP package format • it provides enhanced electrical performance over standard wirebond technology.

Three Packaging Technologies: Summary Through Hole Surface Mount CSP/WLP •CSP/WLP 25 mil pitch TSOP • Limited by perimeter leads • 100 mil pitch DIP • Limited by through hole spacing • Area array 0.8 mm to 0.5 mm • Limited by substrate wiring .

laminated epoxy/glass substrates: polyimide dielectric: benzoyclobutene. SiO. silicones. CuO. Ag. Au. silicate glasses for sealing: borosilicate glass substrates.Materials Used in Electronic Material Application Packaging Semiconduct ors Si.0. CuBe. substrates modified with BaO. copper traces in substrates. and nickel diffusion barrier metallizations. and . GaAs Metals Solders for interconnects (Sn-Ph. molybdenum traces in co-fired ceramics. SiN dielectrics: diamond heat sinks. Sn-Ag: gold wirebonds. Polymers Epoxies (overmold).. tungsten. conductive adhesives (die bonding. tilled epoxies (overmold). Glasses SiO. Alloy 42). silica-tilled anhydride resin (underfills). fibers for optoelectronics. I’d for thin/thick films on ceramics. interconnects). and photosensitive polymers for photomasks.etc. copper leadframes (Kovar. Ceramics AI-..

the outer electrons are shared among all the atoms in the solid • Each atom gives up its outer electrons and becomes slightly positively charged – The negatively charged electrons hold the metal atoms together – Since the electrons are free to move. they lead to good thermal and electrical conductivity • It is impossible to see through metals.Metals • In a metal. since these valence electrons absorb any photons of light which reach the metal – No photons pass through .

Adding other metals can affect the density.Metal Alloys Alloys are compounds consisting of more than one metal .Instead. electrical conductivity and environmental degradation Unlike pure metals. plastic deformation. they have a melting range in which the material is a mixture of solid and liquid phases. strength. . fracture toughness.Alloys can be designed with a single melting point. . many alloys do not have a single melting point. .

but usually excellent thermal and electrical conductivities • Relatively high densities.Properties of Metals and Metal Alloys • At least good. and are used in applications that require other metallic properties but low weight • Fracture Toughness – Ability to avoid fracture. some metals such as aluminum or magnesium have low densities. such as gold – However. especially compared to polymers – Materials with high densities often contain atoms with high atomic numbers. especially when a flaw is introduced • Plastic deformation .

Examples of such materials can be anything from NaCl (table salt) to clay (a complex silicate). polycrystalline or amorphous.Ceramics Ceramics: Often broadly defined as any inorganic nonmetallic material. • • Metallic plus nonmetallic elements joined together by ionic and/or covalent bonds Crystalline. Examples of glasses range . The last one is sometimes treated as a different category. glasses Glasses: An inorganic nonmetallic amorphous material (does not have a crystalline structure).

Superconductors at very low temperatures .Piezoelectric materials .Properties of Ceramics and Glasses • • • • • • High melting temperature Low density High strength and Hardness Water resistance Corrosion resistance Many ceramics are good electrical and thermal insulators • Low to null ductility .Graphite: electrical and thermal conductor • Low fracture toughness • Some ceramics have special properties: .Magnetic materials .