EC6504

MICROPROCESSOR
AND
MICROCONTROLLER
S
(Regulation 2013)

OBJECTIVES

Study the Architecture of 8086Microprocessor

Learn the design aspects of I/O and Memory
Interfacing circuits

Study about communication and bus interfacing.

Study the Architecture of 8051 microcontroller.

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SYLLABUS

UNIT I - THE 8086 MICROPROCESSOR (9)
Introduction to 8086 – Microprocessor architecture – Addressing modes Instruction set and assembler directives – Assembly language
programming – Modular Programming - Linking and Relocation - Stacks Procedures – Macros – Interrupts and interrupt service routines – Byte and
String Manipulation.

UNIT II - 8086 SYSTEM BUS STRUCTURE (9)
8086 signals – Basic configurations – System bus timing –System design
using 8086 – IO programming – Introduction to Multiprogramming –
System Bus Structure - Multiprocessor configurations – Coprocessor,
Closely coupled and loosely Coupled configurations – Introduction to
advanced processors.

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SYLLABUS

UNIT III - I/O INTERFACING (9)
Memory Interfacing and I/O interfacing - Parallel communication interface
– Serial communication interface – D/A and A/D Interface - Timer –
Keyboard /display controller – Interrupt controller – DMA controller –
Programming and applications Case studies: Traffic Light control, LED
display , LCD display, Keyboard display interface and Alarm Controller.

UNIT IV - MICROCONTROLLER (9)
Architecture of 8051 – Special Function Registers(SFRs) - I/O Pins Ports
and Circuits - Instruction set - Addressing modes - Assembly language
programming. 44

UNIT V - INTERFACING MICROCONTROLLER (9)
Programming 8051 Timers - Serial Port Programming - Interrupts
Programming – LCD & Keyboard Interfacing - ADC, DAC & Sensor
Interfacing - External Memory Interface- Stepper Motor and Waveform
generation.
TOTAL: 45 PERIODS
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[2] Mohamed Ali Mazidi.Hall.2012 8/14/15 5 . Rolin McKinlay. [3] Doughlas V. 2011. 2007. Second Edition. Programming and Design”. Janice Gillispie Mazidi.Gibson. “Microprocessors and Interfacing. Glenn A. “Microcomputer Systems: The 8086 / 8088 Family . Programming and Hardware”. Pearson Education. Second Edition.TEXT BOOKS [1] Yu-Cheng Liu. Prentice Hall of India.Architecture. “The 8051 Microcontroller and Embedded Systems: Using Assembly and C”. TMH.

UNIT-I THE 8086 MICROPROCESSOR OBJECTIVE  Study the Architecture of 8086 Microprocessor  Write 8086 Assembly Language Programs 8/14/15 6 .

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 7 .

INTRODUCTION TO 8086 Overview of Microcomputer Systems  Two principal components 1. Software  System Software  User Software 8/14/15 8 .  Timing circuits  Memory Units  Input / Output Subsystems  Bus control Logic  System Bus 2. Hardware  CPU.

.) 8/14/15 9 ...LIST OF INTEL MICROPROCESSORS Introduction to 8086 (continued..

..) 8/14/15 10 .MICROPROCESSORS BY OTHER COMPANIES Introduction to 8086 (continued...

) 8/14/15 11 ..ARCHITECTURE OF A TYPICAL MICROCOMPUTER SYSTEM Introduction to 8086 (continued....

) 8/14/15 12 .SOFTWARE HIERARCHY Introduction to 8086 (continued.....

High Level Language     Uses English-like program statements Programs can usually be written faster & easily Compiler needed to translate high-level language statement to machine code Executed slowly .. Machine Language  Binary form of program (Instructions / data in1’ and 0’s form)  Difficult for programmer to memorize  Error occurs easily 2.THREE LEVELS OF PROGRAMMING used to write a program for a microcomputer 1. Assembly Language  More readable form of machine language  Uses mnemonic codes  Assembler needed to translate to machine code 3.) 8/14/15 13 .... Require more memory Introduction to 8086 (continued.

.ASSEMBLER  An assembler translates the assembly language program into machine language program  Assembly language program à source codes  Machine language program à object codes Introduction to 8086 (continued...) 8/14/15 14 ..

16] ◦ Floating Point (or Real) ◦ Binary Coded Decimal (BCD) (or Decimal)  Alphanumeric Codes ◦ EBCDIC-Extended Binary Coded Decimal Interchange Code ◦ ASCII – American Standard Code for Information Interchange Introduction to 8086 (continued. 10. Base 2.) 8/14/15 15 . -ve Integers....DATA REPRESENTATION  Number Formats ◦ Binary (or Integer)  [+ve.. 8.

...GENERAL OPERATION OF A COMPUTER Introduction to 8086 (continued.) 8/14/15 16 ..

GENERAL OPERATION OF A COMPUTER Introduction to 8086 (continued.....) 8/14/15 17 .

Decode 3... Execute Introduction to 8086 (continued..) 8/14/15 18 .. Fetch 2.OPERATION OF ΜP 1.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 19 .

8086 ARCHITECTURE 8/14/15 20 .

8086 CHIPSET

8086 Architecture

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8086 ARCHITECTURE
Features

16-bit microprocessor , most of instructions are designed to
work with 16 bit binary words

Data bus : 16 bit (read data from or write data to memory
and ports either 16 bits or 8 bits at a time

Address bus : 20 bit (can address upto 220=1048576 = 1MB
memory locations). [Address range : 00000H to FFFFFH]

It provides 14, 16-bit registers.

It has multiplexed Address and Data bus AD0- AD15 and
A16 – A19.

8086 Architecture (continued…)

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8086 FEATURES
 Has

‘Look ahead’ feature to increase the
throughput. (i.e) It can prefetch upto 6 bytes from
memory and queues them in order to speed up
instruction execution.

 40

pin dual in line package

 Supply

Voltage: +5V ; Clock Speed: 5MHz, 8MHz,

10MHz

8086 is designed to operate in two modes,
Minimum and Maximum.

8086 Architecture (continued…)

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CPU-MEMORY INTERFACE
Addess Bus

CPU
8086

20
Data Bus

Memory

16
Control Bus
8086 Architecture (continued…)

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8086 ARCHITECTURE

8086 Architecture (continued…)

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8086 ARCHITECTURE

8086 Architecture (continued…)

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8086 ARCHITECTURE
The 8086 has two parts:
 the Bus Interface Unit (BIU)
Fetches instructions,
Reads and Writes data, and
computes the 20-bit address for memory operands
Transfers instruction bytes into the 6 byte FIFO queue
the Execution Unit (EU)
Decodes and
Executes the instructions using the 16-bit ALU.
Both units operate asynchronously to give the 8086 an
overlapping instruction fetch and execution mechanism
which is called as Pipelining.
8086 Architecture (continued…)

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8086 INTERNAL REGISTERS 16 BITS (2 BYTES
EACH)
CS
DS
ES
SS
IP

BIU
Registers

EU
Registers

Code Segment
Data Segment
Extra
Segment
Stack
Segment
Instruction
Pointer

AX

AH

AL

BX

BH

BL

CX

CH

CL

DX

DH

DL
SP
BP
SI
DI
Flags

Accumulat
or
Base
Register
Count
Register
Data
Register
Stack
Pointer
Base
Pointer

Source Index
Register
Destination Index
Register

Flag Register

8086 Architecture (continued…)

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THE 8086 MICROPROCESSOR: REGISTERS In total there are Fourteen 16-bit registers in an 8086 8086 Architecture (continued…) 8/14/15 29 .

BP.The 8086 Microprocessor: Registers Registers – Registers are in the CPU and are referred to by specific names – Data registers  Hold data for an operation to be performed  There are 4 data registers (AX. ES. DI) – Status register  Keeps the current status of the processor  The status register is called the FLAG register 8086 Architecture (continued…) 8/14/15 30 . SS)  Pointer registers (SP. DS. DX) – Address registers  Hold the address of an instruction or data element  Segment registers (CS. CX. BX. IP)  Index registers (SI.

CX. DH are the high bytes – AL. CX. BX. DX • Instructions execute faster if the data is in a register • Data Registers are general purpose registers but they also perform special functions • AX. CH. DX are the data registers • Low and High bytes of the data registers can be accessed separately – AH.Data Registers: AX. BH. BX. CL. BL. DL are the low bytes 8086 Architecture (continued…) 8/14/15 31 .

Logic and Data Transfer instructions – Used in Multiplication and Division operations – Used in I/O operations BX – Base Register – Also serves as an address register – Used in array operations – Used in Table Lookup operations (XLAT) CX – Count register – Used as a Loop Counter – Used in shift and rotate operations DX – Data register – Used in Multiplication and Division – Also used in I/O operations 8086 Architecture (continued…) 8/14/15 32 .    AX – Accumulator Register – Used in Arithmetic.

Pointer and Index Registers  Contains the offset addresses of memory locations  Can also be used in Arithmetic and other operations  SP: Stack pointer – Used with SS to access the stack segment  BP: Base Pointer – Primarily used to access data on the stack – Can be used to access data in other segments 8086 Architecture (continued…) 8/14/15 33 .

Pointer and Index Registers  SI: Source Index register – is required for some string operations – SI is associated with the DS in string operations. The SI and the DI registers may also be used to access data stored in arrays 8086 Architecture (continued…) 8/14/15 34 .  DI: Destination Index register – is also required for some string operations. – DI is associated with the ES in string operations.

SS and ES  Are Address registers  Stores the memory addresses of instructions and data  Memory Organization – – – – – 20 bit address line addresses 1 MB of memory Each byte in memory has a 20 bit address Addresses are expressed as 5 hex digits from 00000 .536) (i. a particular memory location is specified with an offset  An offset also ranges from 0000 to FFFF 8086 Architecture (continued…) 8/14/15 35 .CS. DS.FFFFF Problem: 20 bit addresses are TOO BIG to fit in 16 bit registers! Solution: Memory Segment  A segment number is a 16 bit number  Segment numbers range from 0000 to FFFF  Block of 64K (65.e 216)consecutive memory bytes  Within a segment.Segment Registers .

 16 bit words will be stored in two consecutive memory locations. 8086 reads the first byte and stores the data in BL and reads the second byte and stores the data in BH. If first byte of the data is stored at an even address. [00520]. 8086 reads the entire word in one operation. then for instruction MOV BX.Segmented Memory Architecture Memory space is divided into overlapping segments  Each segment is of 64 Kbytes  Segment address begins at an address that is divisible by 1610 or 1016  Segment register contains the starting address of a segment. Example if the 16 bit data 2607H is stored at even address 00520H. BL ß (00520) BH ß(00521)  8086 Architecture (continued…) 8/14/15 36 .

In first operation.If the first byte of data is stored at an odd address. then for instruction MOV BX. 8086 reads the 16 bit data from the 00522 location and stores the data of 00522 location in register BH and discards the data of 00523 location. Example if the 16 bit data F520H is stored at odd address 00521H. In second operation. 8086 reads the 16 bit data from the 00520 location and stores the data of 00521 location in register BL and discards the data of 00520 location. [00521]. 8086 Architecture (continued…) 8/14/15 37 . 8086 needs two operation to read the 16 bit data.

1MB Memory Space divided into non-overlapping segments 64 KB 00000 20000 Seg-1 Seg-3 Seg-5 Seg-7 0FFF F 1000 0 2FFF F Seg-15             Seg-2 Seg-4 Seg-6 Seg-8 EFFF F Seg-16 FFFF F 1FFF F 8086 Architecture (continued…) 8/14/15 38 .

Starting Address of each segment Segmented memory addressing: Absolute Address = Four bit left shifted16-bit segment value added to a 16-bit offset F0000 E0000 D0000 C0000 B0000 A0000 90000 80000 70000 60000 50000 40000 30000 20000 10000 00000 1 MB Memory Space 5000:FFF F 5000:025 0 5000:000 0 SegAddr:Offse t 8086 Architecture (continued…) 8/14/15 39 .

Physical Memory Address Generation  The BIU has a dedicated adder for determining Physical memory addresses Offset Value or Effective address (16 bits) Segment Register (16 bits) 0 0 0 0 Adder Physical Address (20 Bits) 8086 Architecture (continued…) 8/14/15 40 .

Physical Memory Address Generation • Logical Address is specified as Segment:Offset • Physical address is obtained by shifting the segment address 4 bits to the left and adding the offset address • Thus the physical address of the logical address A4FB:4872 is A4FB0  + 4872  A9822 1010 0100 1111 1011 0000 0100 1000 0111 0010 1001 1001 1000 0010 0010 8086 Architecture (continued…) 8/14/15 41 .

Overlapping segments 8086 Architecture (continued…) 8/14/15 42 .

Permit a program and/or its data to be put into different areas of memory each time the program is executed. its data and the stack. Even though addresses associated with the instructions are 16 bits only. 2. 8086 Architecture (continued…) 8/14/15 43 . allows the memory capacity to be 1MB More than one Code. Data or Stack segment can be used for programs more than 64KB long. Facilitates. 4.Advantages of using Segment Registers 1. use of separate memory areas for a program. 3.

Separation of a program’s Code. Data and Stack segment & Program relocation using the CS register 8086 Architecture (continued…) 8/14/15 44 .

Flags Carry flag Overflow flag Direction flag Parity flag Auxiliary flag Interrupt enable Trap flag Zero flag 6 .control flags 8086 Architecture (continued…) 8/14/15 45 .status flags Sign flag 3 .

8086 Architecture (continued…) 8/14/15 46 . in order to achieve some specific purposes.  Control flags: – Used to control some operations of the MPU.Flags  Status or Conditional flags: – These are set according to the results of the arithmetic or logic operations. – These flags are to be set by the user. – Need not be altered by the user.

8086 Architecture (continued…) 8/14/15 47 . (1=yes) SF (sign) Contains the resulting sign of an arithmetic operation (1=negative) OF (overflow) Indicates overflow of the leftmost bit during arithmetic.(1=even) AF (auxiliary carry) Contains carry out of bit 3 into bit 4 for specialized arithmetic (BCD). PF (parity) Indicates the number of 1 bits that result from an operation. ZF (zero) Indicates when the result of arithmetic or a comparison is zero.Status or Conditional or Condition Code Flags       CF (carry) Contains carry from leftmost bit following arithmetic. also contains last bit from a shift or rotate operation.

 IF (interrupt) Indicates whether external interrupts are being processed or ignored. 8086 Architecture (continued…) 8/14/15 48 .  TF (trap) Permits operation of the processor in single step mode.Control flags:  DF (direction) Indicates left or right for moving or comparing string data.

Example  Assume that the previous instruction performed the following addition. SF= 0 ZF= 0 AF= 0 0101 0101 0101 1110 PF= 0 CF= 0 OF= 0 0101 0100 0011 1001 SF= 1 ZF= 0 AF= 1 PF= 1 CF= 0 OF= 0 0010 0011 0100 0101 0011 0010 0001 1001 0100 0101 0110 1010 1001 1001 0101 0011 8086 Architecture (continued…) 8/14/15 49 .

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 50 .

ADDRESSING MODES 8/14/15 51 .

 Memory  I/O ports.  Three basic modes of addressing are  Immediate  Register  Memory  Addressing Modes 8/14/15 52 .ADDRESSING MODES  Various methods used to access instruction operands is called as Addressing Mode  General Instruction Format OPCODE Operand  Operand Operands may be contained in  Registers.

Solution: Example: If CS=24F6h & IP=634Ah.. 1.The lower range of the segment 5..The physical address: Addressing Modes (continued.The offset address 3.The logical address 2.The physical address 4.The logical address is the CS: IP content which is: 24F6:634A 2.The upper range of the segment 1.) 8/14/15 53 . show the.The offset address is the content of the IP register which is: 634A 3.

. 8086 Addressing modes ..classified according to flow of instruction execution A. Sequential flow instructions  Arithmetic  Logical  Data transfer  Processor control B.) 8/14/15 54 . Control transfer instructions  INT  CALL  RET  JUMP Addressing Modes (continued.

Relative Based Indexed addressing mode B. Based Indexed addressing mode 9. Control transfer instructions 1. Intra segment Direct addressing mode 4. Register Indirect addressing mode 6. Intersegment Direct addressing mode 2.A. Direct addressing mode 4.) 8/14/15 55 .. Sequential flow instructions 1.. Register Relative addressing mode 8. Indexed addressing mode 7. Immediate addressing mode 3. Register addressing mode 5. Intersegment Indirect addressing mode 3. Implied Addressing mode 2. Intra segment Indirect addressing mode Addressing Modes (continued.

) 8/14/15 56 . Implied Addressing ..The data value/data address is implicitly associated with the instruction.. ◦ ◦ ◦ ◦ ◦ ◦ ◦ AAA AAS AAM AAD DAA DAS XLAT Addressing Modes (continued.Sequential Flow Instructions 1.

25BF . Immediate Addressing – Data / operand is part of the instruction Destinati on Source MOV AX.. Effective Addr = 5000 PhyAddr = 10H*DS + 5000H Addressing Modes (continued. [5000H] ..Sequential Flow Instructions 2. [ AL8E ] 16 Bit Data 8 Bit Data 3. Direct Addressing – Data is pointed by 16 bit offset value specified in the instruction MOV AX. [ AX25BF H ] MOV AL. 8EH .) 8/14/15 57 .

. AX No PhyAddr. DL.4. BP 8 BIT Operand Registers . Register Addressing – Data is in the register specified in the instruction MOV BX. DH Addressing Modes (continued.) 8/14/15 58 .. 16 BIT Operand Registers - since data is in regr AX. BX. CH. SI. AH. BL. CL.AL. DI.DX. BH. SP. CX.

) 8/14/15 59 . Then EffectiveAddr = 10FF and PhyAddr = 10H*5000H + 10FFH = 510FFH Addressing Modes (continued.5.DS or ES Offset – BX or SI or DI PhyAddr = 10H * DS ES + BX SI DI If DS=5000H. [BX] Default Segment .. Register Indirect Addressing – Data is pointed by the offset value in the register. specified in the instruction MOV AX.. BX=10FF.

) 8/14/15 60 . Indexed Addressing  Data is pointed by the offset in the index register specified in the instruction  DS is the default segment register for SI and DI MOV AX... [SI] Data is available in the logical address [DS:SI] Effective Addr = [SI] PhyAddr = 10H * DS + SI DI Addressing Modes (continued.6.

. 50H [BX] EffectiveAddr = 50H+[BX] PhyAddr = 10H * DS ES + BX BP SI DI Addressing Modes (continued. BP. SI.7. ES MOV AX.. Register Relative Addressing  Data is pointed by the sum of 8 bit or 16 bit displacement specified in the instruction plus  Offset specified in the registers –BX. DI  Default segment registers – DS.) 8/14/15 61 .

ES MOV AX.8. Based Indexed Addressing  Data is pointed by content of base register specified in the instruction plus  Content of index register specified in the instruction  Default segment registers – DS... [BX] [SI] EffectiveAddr = BX BP PhyAddr = 10H * DS ES + SI DI + BX BP + Addressing Modes (continued.) SI DI 8/14/15 62 .

. ES 8 bit EffectiveAddr = 16 bit PhyAddr = 10H * DS ES + + 8 bit 16 bit BX BP + + BX BP Addressing Modes (continued. BP plus  Offset specified in the index registers – SI.9. Register Relative Addressing  Data is pointed by the sum of 8 bit or 16 bit displacement specified in the instruction plus  Offset specified in the base registers –BX.. DI  Default segment registers – DS.) SI DI SI DI + 8/14/15 63 .

.e (-215 < d <16 +215 (-32768 < d < + 32768‘d’ )  Example: JMP SHORT LABEL LABEL lies within (-128 to +127 ) from the current IP content Addressing Modes (continued..r.) 8/14/15 64 .e (-27 < d < +2 8 7bit -1) signed = (-128 displacement < d < +127 ) ‘d’ = (-80H < d < +7FH )  Long jump – bit) =signed displacement  i.Control Transfer Instructions  Intrasegment Direct Addressing –  Control transfer instruction and  Address where control is transferred lies in the same segment  Immediate displacement value specified in instruction  Displacement is w.t IP register content  Short jump – i.

) 8/14/15 65 . only the contents of Instruction Pointer (IP) register needs to be changed CS: 3000H IP: 0000H CS: 3000H IP: 0010H Code Segment JMP NEXT CS: 3000H NEXT: INC BX IP: 0020H Addressing Modes (continued.Intrasegment Direct Addressing –   Short Jump or Near Jump  The jump destination is in the same code segment  To execute the jump...

.) 8/14/15 66 . Intrasegment Indirect Addressing –  Control transfer instruction and  Address where control is transferred lies in the same segment  Displacement value specified indirectly – as content of a register or a memory location in the instruction  Used in unconditional instructions  Example: JMP [BX] EffectiveAddr = [BX] PhyAddr = 10H*[CS]+[BX] Addressing Modes (continued..

BX JMP [BX] BX = 75ABH Effective Addr = [BX] PhyAddr = 10H*[CS]+[BX] Displacement from current location: 675AB ..61000 = +65AB H= +2602710 6000 0 Addressing Modes (continued..) 8/14/15 67 .Intrasegment Indirect Addressing Code Segment 6FFF F 675A B 6100 0 CS = 6000H MOV AX.

 Intersegment Direct Addressing –  Control transfer instruction and  Address where control is transferred lies in the different segments  Branching from one code segment to another code segt  CS and IP of destination address are specified in instruction  Example: JMP 5000H: 2000H EffectiveAddr = 2000H PhysicalAddr = 10H * 5000H + 2000H = 52000H Addressing Modes (continued.) 8/14/15 68 ...

) 8/14/15 69 . 8086 has to change the contents of Code Segment (CS) register and IP register JMP NEXT Code Segment B CS: 6000H IP: 0000H CS: 6000H NEXT: INC BX IP: 0050H Addressing Modes (continued.Intersegment Direct Addressing  Code Segment A Long Jump or Far Jump CS: 3000H IP: 0000H  The jump destination is in a different code segment CS: 3000H IP: 0010H  To execute the jump...

IP(MSB).. CS(LSB). Intersegment Indirect Addressing –  Control transfer instruction and  Address where control is transferred lies in the different segments  Branching from one code segment to another code segt  CS and IP of destination address are specified indirectly in the instruction  Starting address of a memory block specified in instn (i.) 8/14/15 70 .e) content of a memory block containing 4 bytes IP(LSB).. CS(MSB)  Example: JMP [2000H] EffectiveAddr = 2000H PhysicalAddr = 10H * DS + 2000H Addressing Modes (continued.

.) 8/14/15 71 ..Intersegment Indirect Addressing DS = 6000H 6FFF F 7FFF F 7446 6 6200 6200 3 6200 2 6200 1 0 70H 00H 44H 66H 6010 0 6000 0 JMP [2000H] MSB LSB IP 44 66 CS 70 00 7000 0 Addressing Modes (continued.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 72 .

8086 INSTRUCTION SET 8/14/15 73 .

.) 8/14/15 74 . 5. 4. 5. 2. 3. 6.8086 INSTRUCTION SET 1. Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions Instruction Set (continued. 6..

1.Register / Gen.. DATA TRANSFER INSTRUCTIONS  Transfers data from one register or memory location to another register or memory location  Source: Seg.Locn Instruction Set (continued.Register /Mem.Register / Gen.location  Destination: Seg.location  Note: Both Source and Destination cannot be Mem.Register /Mem..) 8/14/15 75 .

) 8/14/15 76 .General purpose byte or word transfer instructions MOV Copy byte or word from specified source to specified destination PUSH POP Copy specified word to top of stack Copy word from top of stack to specified location XCHG XLAT Exchange bytes or exchange words Translate a byte in AL using a table in memory Simple input and output port transfer instructions IN Copy a byte or word from specified port to accumulator OUT Copy a byte or word from accumulator to specified port Instruction Set (continued...

..Special address transfer instructions: LEA Load effective address of operand into specified register LDS Load DS register and other specified register from memory LES Load ES register and other specified register from memory LAHF Flag transfer instructions Load (copy to ) AH with the low byte of the flag register SAHF Store (copy) AH register to low byte of flag register PUSHF POPF Copy flag register to top of stack Copy word at top of stack to flag register Instruction Set (continued.) 8/14/15 77 .

5000H Comments Not Valid. AX Immediate addressing Register addressing MOV AX. MOV DS. 5000H followed by 5001H in DS are pushed into the stack Instruction Set (continued. SPSP-2 • Content of loc.) 8/14/15 78 . 50H[BX] Direct addressing Indirect addressing Register relative / Indexed addr PUSH AX PUSH DS PUSH [5000H] • Push Higher Byte AH into the location pointed by SP and Push Lower Byte AL into the location pointed by SP-1. [SI] MOV AX . immediate addressing with segment registers not permitted MOV AX. 5000H.. [2000H] MOV AX..Instruction MOV DS.

.) DS=20420H 8/14/15 79 . AX AH 21 AL 4E 21 20921H 4E 20920H SI=500 DS=2042H Instruction Set (continued.. SI=500H. MOV [SI]. DS=2042H.Do not click the mouse to see the full animation Example 1 : *Knowing that. AX=214E.

) 8/14/15 80 .Example 2 : PUSH AX Physical Address Stack Segment 20000 AH AL 88 44 SS = 2000 SP = 44 2FFFB FFFB 88 2FFFC FFFC XX 2FFFD FFFD XX 2FFFE FFFE XX 2FFFF FFFF Instruction Set (continued...

DX 3.. XCHG [5000H]. DX • Exchanges data b/w AX & mem. •Exchange data b/w AX & BX 03H is 8-bit port address [DX] is 6-bit port address Instruction Set (continued.. AX XCHG BX.) 8/14/15 81 . location 1. IN AX. 0800H IN AX.loc [5000H] in data seg.Instruction Comments • Pops stack top content pointed by SP into Lower Byte of the register / mem. location . MOV DX. IN AL. POP DS of the register / mem. SPSP+2 3. 2. 03H 2. POP AX and next byte in the stack into Higher Byte 2. AX 1. POP [5000H] • Content of stack top and next byte in the stack are popped into 5000H & 5001H in DS 1.

..) 8/14/15 82 .Example 3 : POP AX Physical Address Stack Segment 20000 AH AL xx 88 xx 44 SS = 2000 SP = 44 2FFFB FFFB 88 2FFFC FFFC XX 2FFFD FFFD 2FFFE FFFE 2FFFF FFFF Instruction Set (continued.

MOV DX.Instruction Comments 1. OUT 03H. OUT DX. Send data in AX to a port whose address is in DX 3. Send data in AX to a port whose OUT DX.. 0300H 3. Send data in AL to a port whose address is 03H 2.) 8/14/15 83 . AL Instruction Set (continued. AX 2. set as 0300H 1. AX address is in DX..

.  The operation of XLAT is to change the value of AL with the memory pointed to by (AL+BX) AL Mem[AL+BX] dddd+mmmm data AL=dddd BX=mmmm AL=data for the example slides do not click the mouse to see the full animation Instruction Set (continued.) 8/14/15 84 ..Example 4 :  XLAT called translate instruction.

 XLAT is the only instruction that adds 8 bit number to 16 bit number!  XLAT does not Affect the flags.. Instruction Set (continued. using a table.More clearly the XLAT instruction converts the content of register AL...) 8/14/15 85 . Its beginning address is contained in register BX. The content of register AL is interpreted as a relative address in the table.

SEG TABLE MOV DS.. AL [10*SEG + BX+AL] 8086 Instruction Set (continued. CODE MOV BX. AX MOV AL. Offset of code LUT into BX used as Base Addr by XLAT EffectAddr =10*SEG + BX+AL 4. Address of seg containing LUT is stored in DS 2.) 8/14/15 86 .. Code of key pressed transferred to AL 3.Mem. OFFSET TABLE XLAT 83 6 8086 CPU 4 AL 7 BX 5 - User KB(0-F) 16-Keys 2 LUT 1 Comments 1.7-seg Display 9 8255 KBD interface LUT.Seg Example 5 : Program using XLAT MOV AX.

5000H 3. BX(LB) BX(HB) DS/ES(LB) DS/ES(HB) 4. LES BX.Instruction Comments 1.) 8/14/15 87 . SI  Offset (ADR) + [BX] 3. ADR[BX] 2. 5000H     [5000H] [5001H] [5002H] [5003H] Note: Effective Address is also called as Offset 8086 Instruction Set (continued. BX  Offset (ADR) 2.. LEA BX.. LDS BX. ADR 1. LEA SI.

LAHF 1.. Pop into FlagRegr(LB) followed into FlagRegr(HB) from stack SS:SP 3. PUSHF 4. for each PUSH operation. POPF 8086 Instruction Set (continued. Set/Reset all condition code flags except Overflow flag 3.) 8/14/15 88 . for each POP operation. SP  SP-2.. SP  SP+2. SAHF 2. Push FlagRegr(HB) followed by FlagRegr(LB) into the stack SS:SP 4. AH  [Flag (LB)] 2.Instruction Comments 1.

. Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions 8086 Instruction Set (continued.) 8/14/15 89 . 5. 6. 4. 3.8086 INSTRUCTION SET 1. 5. 6.. 2.

) 8/14/15 90 ..  Note: Flag bits in flag register are affected 8086 Instruction Set (continued.  Increment.  Division.  Multiplication.2..  Subtraction. ARITHMETIC INSTRUCTIONS Performs  Addition.  Decrement along with ASCII and Decimal adjustment   Operands in : Immediate / Register / Memory locn.

..ADD Addition instructions: Add specified byte to byte or specified word to word ADC Add byte + byte + carry flag (or) word + word + carry flag INC Increment specified byte or specified word by 1 AAA DAA ASCII adjust after addition Decimal (BCD) adjust after addition MUL Multiplication instructions Multiply unsigned byte by byte or unsigned word by word IMUL Multiply signed byte by byte or signed word by word AAM ASCII adjust after multiplication 8086 Instruction Set (continued.) 8/14/15 91 .

SUB Subtraction Instructions: Subtract byte from byte or word for word flag from word.) 8/14/15 92 . (form 2’s complement) CMP Compare two specified bytes or two specified words AAS ASCII adjust after subtraction DAS Decimal (BCD) adjust after subtraction 8086 Instruction Set (continued. SBB Subtract byte and carry flag from byte or word ad carry DEC Decrement specified byte or specified word by 1 NEG Negate – invert each bit of a specified byte or word and add 1...

..DIV Division Instructions: Divide unsigned word by byte or unsigned DW by word IDIV AAD Divide signed word by byte or signed DW by word ASCII adjust before division CBW Fill upper byte of word with copies of sign bit of lower byte CWD Fill upper word of DW with sign bit of lower word 8086 Instruction Set (continued.) 8/14/15 93 .

Indexed / indirect addressing 4.. [5000H] 4. Immediate addressing 6..Locn 8086 Instruction Set (continued. Direct addressing 5. 0100H 5.Locn / immediate immediate addressing Destination : Regr / Mem. ADD AX.• • • • Result is in destination operand All the condition code flags are affected Content of segment registers cannot be added Memory to memory addition not possible ADD Add 1. ADD AX. Immediate addressing 2. Register addressing 3. Implicit addressing (destination AX) & Source : Regr / Mem. ADD [5000H]. ADD 0100H • • 6. [SI] 3. 0100H 1. ADD AX. BX 2. ADD AX.) 8/14/15 94 .

ADC AX. 0100H 5. Direct addressing 5.Locn 8086 Instruction Set (continued. [5000H] 4. All the condition code flags are affected ADDC Add with carry 1.• • • Same as ADD instruction Adds the carry flag bit with the result. Implicit addressing (destination AX) & Source : Regr / Mem. Immediate addressing 6. ADC [5000H]. ADC 0100H 1. Immediate addressing 2. ADD 0100H • • 6. ADC AX. BX 2.) 8/14/15 95 .Locn / immediate immediate addressing Destination : Regr / Mem. Indexed / indirect addressing 4.. [SI] 3.. ADC AX. Register addressing 3.

Register indirect addressing 3..• • • Register/Mem. Register addressing 2.. INC [5000H] 3. INC AX Increment 1. DEC AX Decrement 1. Register addressing 2. INC [BX] 2. Direct addressing 8086 Instruction Set (continued.content incremented / decremented by 1 All the condition code flags are affected except CF Immediate operand cannot be incremented INC 1. DEC [BX] 2.) 8/14/15 96 . Direct addressing DEC 1. DEC [5000H] 3. Register indirect addressing 3.

SUB AX. BX 2.. Immediate addressing • • Subtract Source : Regr / Mem.. Register addressing 3. SUB AX. Immediate addressing 2.operand  Destn.Locn 8086 Instruction Set (continued. SUB AX. 0100H 1. [5000H] 4.Locn / immediate Destination : Regr / Mem.) 8/14/15 97 . Direct addressing 5. SUB AX.• • Destn. Indexed / indirect addressing 4.operand – Source operand All the condition code flags are affected SUB 1. [SI] 3. 0100H 5. SUB [5000H].

[SI] 3.. SBB AX. 0100H 1.operand  Destn. Register addressing 3.) 8/14/15 98 . Immediate addressing • • Subtract with borrow Source : Regr / Mem. BX 2. SBB [5000H].operand – (Source operand + CF) All the condition code flags are affected SBB 1. Indexed / indirect addressing 4. [5000H] 4. SBB AX. Direct addressing 5.• • Destn.Locn / immediate Destination : Regr / Mem..Locn 8086 Instruction Set (continued. 0100H 5. SBB AX. Immediate addressing 2. SBB AX.

CY =0. CX 4.operand – Source operand Result not stored anywhere All the condition code flags are affected ZF=1(equal). CMP [5000H]. Register addressing 5. 0100H 2.Locn / immediate Destination : Regr / Mem. Direct/Immediate addressing • • Compare Source : Regr / Mem.. ZF=0 (src < destn) CMP 1.• • • • Destn. Indexed / indirect addressing 4. 0100H 1. CMP BX. CMP BX.. 0100H 5. CMP BX.) 8/14/15 99 . Immediate addressing 3. CY=1 (src > destn). [SI] 3. Immediate addressing 2. CMP AX.Locn 8086 Instruction Set (continued.

AAA • • • ASCII Adjust after addition Executed after ADD ADD must have added two ASCII no’s & result is in AL AAA converts AL to unpacked decimal digits(Implicit addressing) A X AH (8 bits) AL (8 bits) ALHIGH ALLOW (1) If 0 < ALLOW < 9 and AF=0. then AL=AL+06H and ALHIGH = 0 and AH=AH+1. then ALHIGH = 0 (2) If 0 < ALLOW < 9 and AF=1.. then ALLOW = ALLOW +06 and ALHIGH = 0 and AH=AH+1 (3) If ALLOW > 9.. ACF=CF= 1 8086 Instruction Set (continued.) 8/14/15 100 .

) 8/14/15 101 . if ALHIGH > 9 OR if CF=1.DAA • • • Decimal Adjust Accumulator Executed after adding two packed BCD numbers Converts packed BCD numbers to unpacked BCD no’s Result has to be in AL A X AH (8 bits) AL (8 bits) (1) If ALLOW > 9 ALHIGH ALLOW OR if AF=1.. 8086 Instruction Set (continued. then DAA adds 60H to AL. then DAA adds 06H to AL (2) After adding 06H to AL..

.) 8/14/15 102 . 2.. Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions 8086 Instruction Set (continued. 5. 6. 3.8086 INSTRUCTION SET 1. 4. 5. 6.

LOGICAL INSTRUCTIONS Logical Instructions: NOT Logical Invert: Invert each bit of a byte or word in another byte or word AND Logical AND: AND each bit in a byte or word with the corresponding bit OR Logical OR: OR each bit in a byte or word with the corresponding bit in another byte or word XOR Logical XOR: Exclusive OR each bit in a byte or word with the corresponding bit in another byte or word TEST Logical Compare: AND operation to update flags. PF] but don’t change operands 8086 Instruction Set (continued.3.) 8/14/15 103 . CF. ZF. SF... [OF.

AND [5000H]. CX 8086 Instruction Set (continued. OR DX. XOR AX. XOR XOR AX..) 8/14/15 104 . TEST [5000H] 06H. BX. 0008H. [5000H]. BX. 0098H. LOGICAL INSTRUCTIONS Logical Instructions: NOT NOT AX. TEST TEST AX. DX. [5000H]. XOR AX. AND AX. AND AND AX. OR AX. OR OR AX. NOT [5000H]. TEST [BX][DI].3.. BX. 0008H. BX.

6. 4. 5.. 3. 6. 2.) 8/14/15 105 .. Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions 8086 Instruction Set (continued. 5.8086 INSTRUCTION SET 1.

4. copy old MSB into new MSB 8086 Instruction Set (continued.. put zero(s) in LSB(s).) 8/14/15 106 . SAR Shift Arithmetic Right: Shift bits of word or byte right. put zero(s) in MSB(s).. SHIFT AND ROTATE INSTRUCTIONS SHIFT INSTRUCTIONS Shift Instructions (count is either 1 or specified by CL) SHL/ SAL Shift Left / Shift Arithmetic Left: Shift bits of byte or word left. SHR Shift Right: Shift bits of byte or word right.

..SHL/ SAL Shift bits of byte or word left. All flags are affected 2. Shift is through Carry Flag 3. Location but not immediate 0 x Carry Flag SHL / SAL 1st execution MSB LSB 10 1 01 10 01 0 10 01 1 Carry Flag SHL / SAL 2nd execution MSB LSB 1 0 1 0 0 1 0 0 8086 Instruction Set (continued.) 8/14/15 107 . Operand may reside in Register or Mem. put zero(s) in LSB(s) 1.

SHR Shift bits of byte or word right..) 8/14/15 108 . Location Carry Flag MSB LSB 0 1 1 0 1 0 0 1 x SHR 1st execution 0 0 1 1 0 1 0 0 1 SHR 2nd execution 0 0 0 1 1 0 1 0 0 8086 Instruction Set (continued. 1. Shift is through Carry Flag 3. All flags are affected 2.. put zero(s) in MSB(s). Operand may reside in Register or Mem.

SAR Shift bits of word or byte right. Shift is through Carry Flag 3.. All flags are affected 2. Operand may reside in Register or Mem..) 8/14/15 109 . Location Carry Flag MSB LSB 1 0 1 0 1 0 0 1 x SHR 1st execution 1 1 0 1 0 1 0 0 1 SHR 2nd execution 1 1 1 0 1 0 1 0 0 8086 Instruction Set (continued. copy old MSB into new MSB 1.

LSB to CF and CF to MSB 8086 Instruction Set (continued. SHIFT AND ROTATE INSTRUCTIONS ROTATE INSTRUCTIONS Rotate Instructions (count is either 1 or specified by CL) ROL Rotate Left without Carry: Rotate bits of byte or word left.4. LSB to MSB and to CF RCL Rotate Left through Carry: Rotate bits of byte or word left. MSB to CF and CF to LSB RCR Rotate Left through Carry: Rotate bits of byte or word right...) 8/14/15 110 . MSB to LSB and to CF ROR Rotate Right without Carry: Rotate bits of byte or word right.

MSB to LSB and to CF RCL Rotate bits of byte or word left..ROL Rotate bits of byte or word left. MSB to CF and CF to LSB  ROL vs.) 8/14/15 111 . RCL 0 1 x Carry Flag MSB ROL st execution 21nd execution LSB 10 01 10 01 01 10 01 10 1 0 x RCL 321 execution execution rd nd st MSB Carry Flag LSB 01 10 01 01 10 x10 0x1 10x 8086 Instruction Set (continued..

8086 INSTRUCTION SET 1. 5.) 8/14/15 112 .. 6. 6.. 4. 3. 5. 2. Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions 8086 Instruction Set (continued.

5. STRING MANIPULATION INSTRUCTIONS String Instructions REP An instruction prefix..) 8/14/15 113 . Repeat following instruction until CX=0 REPE/REPZ Repeat while equal/zero REPNE/REPNZ Repeat while not equal/zero MOVX/MOVSB/ MOVSW Move byte or word from one string to another COMPS/COMPSB/ COMPSW Compare two string bytes or two string words SCAS/SCASB/ SCASW Scan a string. Compare a string byte with a byte in AL or a string word with a word in AX LODS/LODSB/ LODSW Load string byte into AL or string word into AX STOS/STOSB/STOSW Store byte from AL or word from AX into string 8086 Instruction Set (continued..

4. 5.. 3. 6.8086 INSTRUCTION SET 1. 6. Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions 8086 Instruction Set (continued. 5. 2..) 8/14/15 114 .

6.. BRANCH AND LOOP INSTRUCTIONS 1. Conditional Branch Instructions 3. Loop Instructions Unconditional Branch Instructions: CALL Call a procedure (subprogram).) 8/14/15 115 . save return address on stack RET JMP Return from procedure to calling program Go to specified address to get next instruction 8086 Instruction Set (continued.. Unconditional Branch Instructions 2.

Conditional Branch Instructions JA/JNBE JAE/JNB Jump if above/ jump if not below or equal JB/JNAE Jump if below/ jump if not above or equal JC JBE/JNA JE/JZ Jump if carry =1 JG/JNLE JGE/JNL JL/JNGE JLE/JNG JNC JNE/JNZ Jump if greater/ jump if not less than or equal Jump if above or equal/ jump if not below Jump if below or equal/ jump if not above Jump if equal/ jump if zero Jump if greater than or equal/ jump if not less than Jump if less than/ jump if not greater than or equal Jump if less than or equal/ jump if not greater than Jump if no carry Jump if not equal/ jump if not zero 8086 Instruction Set (continued..) 8/14/15 116 ..

. call service procedure INTO Interrupt program execution if OF=1 IRET Return from interrupt service procedure to main program 8086 Instruction Set (continued..Conditional Branch Instructions JNO Jump if no overflow JNP/JPO Jump if not parity/ jump if parity odd (PF = 0) JNS Jump if not sign JO JP/JPE Jump if overflow Jump if parity/ jump if parity even JS Jump if sign Interrupt Instructions: INT Interrupt program execution.) 8/14/15 117 .

.Loop Instructions LOOP Loop through a sequence of instructions until CX=0 LOOPE/LOOPZ Loop through a sequence of instruction while ZF=1 and CX !=0 LOOPNE/LOOPNZ Loop through a sequence of instruction while ZF=0 and CX!=0. JCXZ Jump to specified address if CX=0. 8086 Instruction Set (continued.) 8/14/15 118 ..

Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions 8086 Instruction Set (continued. 2.. 6. 8. 7..8086 INSTRUCTION SET 1.) 8/14/15 119 . 3. 5. 4.

.7..) 8/14/15 120 . FLAG MANIPULATION INSTRUCTIONS Flag Manipulation Instructions: STC Set carry flag CLC Clear carry flag CMC Complement the status of carry flag STD CLD Set direction flag Clear direction flag STI Set interrupt enable flag (enable INTR) CLI Clear interrupt enable flag (disable INTR) 8086 Instruction Set (continued.

6. Data Copy / Transfer Instructions Arithmetic Instructions Logical Instructions Shift and Rotate Instructions String Manipulation Instructions Branch and Loop Instructions Flag Manipulation Instructions Machine Control Instructions 8086 Instruction Set (continued. 8.. 4. 2.. 7.8086 INSTRUCTION SET 1.) 8/14/15 121 . 5. 3.

8. Prevents another processor from taking the bus while the adjacent instruction executes NOP No action except fetch and decode 8086 Instruction Set (continued.) 8/14/15 122 ... MACHINE CONTROL INSTRUCTIONS Machine Control Instructions: HLT Halt until interrupt or reset WAIT Wait until signal on the TEST pin is low LOCK An instruction prefix.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 123 .

ASSEMBLER DIRECTIVES 8/14/15 124 .

Called as OPERATORS -. Initialize particular memory locations or labels with constants .. to assign a particular constant with a label or 2. Assembler Directives (continued. OPERATORS perform arithmetic and logical tasks..) 8/14/15 125 .ASSEMBLER DIRECTIVES & OPERATORS Hints given to the assembler using predefined alphabetical strings to correctly understand the assembly language programs and prepare machine codes – called as ASSEBLER DIRECTIVES Hints given to the assembler 1.

. SEGMENT Logical segment Assembler Directives (continued.ASSEMBLER DIRECTIVES USED IN CROSOFT MACRO ASSEMBLER OR TURBO ASSEMBL 1.) 8/14/15 126 . DQ DIRECTIVES Define Byte Define Word Define Quadword 4.. ASSUME Assume Logical Segment Name 9. DT 5. ENDS End of Segment 8. END Define Ten Bytes End of Program 6. DW 3. ENDP End of Procedure 7.DB 2.

.) 8/14/15 127 . LENGTH Byte length of a label 18. EVEN Align on even memory address 12.DIRECTIVES (continued…. ORG Origin 20. GROUP 16..) 10. LOCAL Local 14. PROC Procedure Assembler Directives (continued. LABEL Group the related segments Label 17. GLOBAL Global 15. NAME Logical name of a module 19. EQU Equate 11. EXTRN and External and Public PUBLIC 13.

SEG OPERATORS Offset of a label Pointer Segment of a label 4. FAR PTR Near pointer 22..) 8/14/15 128 . PTR 3. TYPE Short Addition and subtraction operators Type Assembler Directives (continued. SHORT 5..OPERATORS USED IN CROSOFT MACRO ASSEMBLER OR TURBO ASSEMBL DIRECTIVES (continued…. NEAR PTR Far pointer 1. ‘+ and -’ 6.) 21.OFFSET 2.

.DB DIRECTIVES DB directive is used to reserve bytes or bytes of memory location . 29h .1 PRICE DB 49h.. Directs assembler to reserve an array of 3 bytes named as PRICE and initialize. Assembler Directives (continued.1. 98h. with data type that may be a -Constant -Variable -String etc Example .) 8/14/15 129 .

2 MESSAGE DB ‘GOOD MORNING’.Example . Set 100 bytes of storage in memory and give it the name as TEMP... Program instructions will load values into these locations.Duplicates Assembler Directives (continued. DUP . but leave the 100 bytes uninitialized. Reserve an array of bytes equal to the number of characters in the string named as MESSAGE and initialize by the ASCII equivalent of these characters Example – 3 TEMP DB 100 DUP(?) .) 8/14/15 130 .

. 1F98h.1 WORDS DW 4987h.2.. with data type that may be a -Constant -Variable -String etc Example . DW DIRECTIVES DW directive is used to reserve words (16 bits) or words of memory location .) 8/14/15 131 . AB29h . Directs assembler to reserve an array of 3 Words named as WORDS and initialize. Lower bytes stored in lower and upper bytes stored in higher addresses Assembler Directives (continued.

2 STAR DW 5 DUP (1234H).) 8/14/15 132 .Example . Directs assembler to reserve an array of 5 Words named as STAR and initializes all the locations with Lower bytes stored in lower and upper bytes stored in higher addresses Assembler Directives (continued...

DT DW directive is used to reserve 10 bytes (i. DQ DIRECTIVES DW directive is used to reserve 4 word bytes (i.. and may be initialized DIRECTIVES 4. with data type that may be a -Constant . Variable.) 8/14/15 133 .Generally processed by numerical processors Assembler Directives (continued..e 10 x 8 bits) of memory location .e 4 x 8 bits) of memory location . String etc and may be initialized . with data type that may be a -Constant -Variable -String etc.3.

END END of program directive marks the end of an assembly language program (ALP).subroutines are called procedure. 2.) 8/14/15 134 .DIRECTIVES 5. -Ignores all source lines available after this line -Must be used as the last statement in the file 6. ENDP END of procedure directive marks the end of procedure.. PROCEDURE STAR STAR ENDP Assembler Directives (continued.. A procedure is an independent program module 3. In an ALP . 1.

7. -Logical segments are assigned with names using ASSUME directive -Must be used the last statement in the segment along with segment name as prefix 8.marks the end of logical segment. ENDS DIRECTIVES END of Segment directive .. SEGMENT -Marks the starting of logical segment -Also assigns a name to the logical segment Assembler Directives (continued. ASSUME -This directive is used to assign name for logical segments -ASSUME directive is a MUST at the beginning of each ALP.) 8/14/15 135 .. 9.

..EXAMPLE ASSUME CS : CODE. DS : DATA DATA SEGMENT STAR DB 20 DUP (?) : : DATA ENDS CODE SEGMENT : : : CODE ENDS END Assembler Directives (continued.) 8/14/15 136 .

) 8/14/15 137 .DIRECTIVES 10.. EQU EQU directive is used to assign a label with a value or symbol -Used to reduce recurrence of numerical values or constants in ALP code -One change in the EQU statement will give correct and modified code. it substitutes the numerical values EXAMPLE CONST1 EQU 0510H assigns constant 0510h with label CONST1 ADDITION EQU ADD assigns another label ADDITION with mnemonic ADD Assembler Directives (continued.. -When assembler comes across the label.

. EVEN Align on even memory address directive updates the location counter to next even address. constants .DIRECTIVES 11. . the assembler initializes a location counter and updates it sequentially to the program variables. EXAMPLE EVEN PROCEDURE : : ROOT ROOT ENDP Assembler Directives (continued.While starting the assembling process.. modules etc.) 8/14/15 138 . as required.

.DIRECTIVES 12.) 8/14/15 139 . labels actually appear must be declared PUBLIC EXAMPLE MODULE1 SEGMENT PUBLICFACTORIAL FAR MODULE1 ENDS MODULE2 SEGMENT EXTRN FACTORIAL FAR MODULE1 ENDS Assembler Directives (continued.. EXTERN • EXTERN directive informs the assembler and that the names / procedures / labels declared PUBLIC after this directive have already been defined in some other ALP module • In the module where the names. procedures.

DIRECTIVES 13.) 8/14/15 140 .. ROUTINE Assembler Directives (continued.. • Single statement can be used to declare all labels / variables /constants / procedures EXAMPLE LOCAL a. b. ARRAY. LOCAL • LOCAL directive informs the assembler that the labels / variables /constants / procedures declared after this directive are used ONLY by that particular module • In some other module same labels / variables /constants / procedures can be used for different purposes. DATA.

) 8/14/15 141 .DIRECTIVES 14. GLOBAL • LOCAL directive informs the assembler that the labels / variables /constants / procedures declared after this directive can be used by OTHER modules in the program EXAMPLE ROUTINE PROC GLOBAL Procedure ROUTINE is declared as a global label Assembler Directives (continued...

GROUP • Forms logical groups of segments with similar purpose or types • Assembler informs loader/linker to place group declared segments or operands must lie within 64KB memory segment EXAMPLE PROGRAM GROUP CODE. STACK CODE..DIRECTIVES 15.) 8/14/15 142 . DATA. STACK segments lie within 64 KB which is named as PROGRAM Assembler Directives (continued. DATA..

.. LABEL • Used to assign a name to the current content of the location counter •The type of the label must be specified (i. BYTE or WORD label EXAMPLE DATA SEGMENT DATAS DB 50H DUP (?) DATA-LAST LABEL BYTE FAR DATA ENDS After reserving 50 locations for DATAS. the next location will be assigned a label DATA-LAST and its type will be Byte and Far Assembler Directives (continued.) 8/14/15 143 .e) NEAR or FAR label.DIRECTIVES 16.

NAME EXAMPLE Used to assign a name to an ALP module MULTI_PGM : : : END NAME Assembler Directives (continued. LENGTH Used to refer to the length of a data array or string EXAMPLE MOV CX..) 8/14/15 144 . LENGTH ARRAY Substitutes the length of the array ARRAY in bytes DIRECTIVES 18..DIRECTIVES 17.

) 8/14/15 145 .DIRECTIVES 19. ORG EXAMPLE Directs the assembler to start the memory allotment for the particular block or code from the declared address in the ORG statement Without ORG location counter is initialized to 0000 ORG 200H Initializes the location counter to the address 0200h instead of 0000h Assembler Directives (continued...

) 8/14/15 146 ..called by the main program located within 64K of physical memory FAR – Called by the main program located at a more than 64K of physical memory EXAMPLE RESULT PROC NEAR ROUTINE PROC FAR Procedure RESULT is placed in the same segment Procedure ROUTINE is placed in some other segment Assembler Directives (continued. PROC Marks the start of a named procedure NEAR / FAR specify the type of the procedure NEAR..DIRECTIVES 20.

DIRECTIVES 21..) 8/14/15 147 . FAR PTR EXAMPLE • Indicates the assembler that the label following FAR PTR is not within the same segment • Address of label is of 32 bits (4 bytes) [2 bytes offset followed by 2 bytes segment address] JMP FAR PTR LABEL1 CALL FAR PTR ROUTINE Assembler Directives (continued..

. NEAR PTR • Indicates the assembler that the label following FAR PTR is in the same segment • Address of label is of 16 bits (2 bytes) [2 bytes offset only] EXAMPLE JMP NEAR PTR LABEL1 CALL NEAR PTR ROUTINE Assembler Directives (continued.DIRECTIVES 22.) 8/14/15 148 ..

labels and procedures to decide their offset in their default segments EXAMPLE CODE SEGMENT MOV SI. OFFSET OFFSET operator indicates the assembler to compute the16 bit displacement (offset) of the label and replace the string ‘OFFSET LABEL’ by the computed displacement Used with arrays.) 8/14/15 149 ..OPERATORS 1. OFFSET LIST CODE ENDS DATA SEGMENT LIST DB 10H DATA ENDS Assembler Directives (continued. strings..

OPERATORS 2..) 8/14/15 150 . PTR .PTR operator is prefixed by BYTE or WORD EXAMPLE MOV AL.Moves 16 bit content of memory location 2000h to BX (i. variable or memory operand.Moves content of memory location addressed by SI to AL INC BYTE PTR [BX] . BYTE PTR [SI] .Increments word content of memory location 3000h and 3001h as a 16 bit number Assembler Directives (continued.PTR operator is used to declare the type of a label. WORD PTR [2000H] . .Increments byte content of memory location addressed by BX MOV BX.e) [2000h] to BL.. [2001h] to BH INC WORD PTR [2000H] .

.OPERATORS 3.) 8/14/15 151 . variable or procedure and substitutes the segment base address in place of ‘SEG’ label EXAMPLE MOV AX. SEG SEG operator is used to decide the segment address of the label.. AX Moves the segment address of ARRAY in which it is appearing into the register AX and then into DS Assembler Directives (continued. SEG ARRAY MOV DS.

. [OFFSET LABEL +10H] Assembler Directives (continued. SHORT SHORT operator indicates to the assembler that only one byte is required to code the displacement for a jump By specifying this way the assembler saves memory. - OPERATORS Represents arithmetic addition and subtration EXAMPLE MOV AL. [SI +2] MOV DX. [BX -5] MOV BX. EXAMPLE JMP SHORT LABEL 5.OPERATORS 4. +.) 8/14/15 152 ..

) 8/14/15 153 . EXAMPLE MOV AX. the data type is 1. TYPE TYPE operator directs the assembler to decide the data type of the specified label and replace the ‘TYPE’ label by the decided data type.. the data type is 4. the data type is 2. then the value 0002h is moved in AX Assembler Directives (continued. For word type variable. TYPE STRING If STRING is a word array..OPERATORS 6. For byte type variable. For double word type.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 154 .

ASSEMBLY LANGUAGE PROGRAMMING 8/14/15 155 .

code ..) 8/14/15 156 .data .stack size Assembly Language Programming (continued..PROGRAM SEGMENT STRUCTURE  Data Segments ◦ Storage for variables ◦ Variable addresses are computed as offsets from start of this segment  Stack Segment ◦ used to set aside storage for the stack ◦ Stack addresses are computed as offsets into this segment  Code Segment ◦ contains executable instructions  Segment directives .

protected mode only (80386 and higher) Assembly Language Programming (continued. one code segment : multiple code and data segments : allows individual arrays to exceed 64K : no segments.. one data segment : code<=64K.MEMORY MODELS  Model memory_model        tiny small medium compact large huge flat : code+data <= 64K (. one of each : data<=64K.) 8/14/15 157 . 32-bit addresses.. data<=64K.com program) : code<=64K.

other procs end main  Select a memory model  Define the stack size  Declare variables  Write code ◦ organize into procedures Mark the end of the source file ◦ optionally.code main endp ..stack 100H .code main proc .model small .) 8/14/15 158 ..data .declarations .PROGRAM SKELETON . define the entry point  Assembly Language Programming (continued.

........initialize data segment register .... ax mov ah..DOS service interrupt ...Set maximum stack size to 256 bytes (100h) hellostk ENDS hellodat dos_print strng hellodat SEGMENT BYTE 'DATA' ........ ......... character string "Hello World" to the DOS standard output .... ....Define the data segment EQU 9 .beginning of string ... It prints the .....10. SEG hellodat mov ds... 4c00h int 21h ENDS END START hellocod the Code segment . ....... ....dx <-.....Define mov ax... ‘END label’ defines program entry Assembly Language Programming (continued.OFFSET strng int 21h mov ax..) 8/14/15 159 ..ah <-..DOS service interrupt .............ax <-...ax <-.data segment start address ....4c DOS 21h program halt function . . This is an example program..... ....9 DOS 21h string function .ds <-. .............. .. using the DOS service interrupt.........define a constant via EQU DB 'Hello World'...'$' ................ .ASSEMBLY LANGUAGE PROGRAM EXAMPLE .......Define the stack segment DB 100h DUP(?) .. hellostk SEGMENT BYTE STACK 'STACK' ....13... function 9..Define the character string ENDS hellocod START: SEGMENT BYTE 'CODE' . dos_print mov dx..

....... dos_print . ds:hellodat..ax <-................DOS service interrupt ENDS START START: hellocod END Assembly Language Programming (continued......ANOTHER WAY TO DEFINE SEGMENTS . .4c DOS 21h program halt function int 21h .....ds <-.....beginning of string int 21h .data segment start address mov ds..........9 DOS 21h string function mov dx.....OFFSET strng ...dx <-......10........define a segment EQU 9 . .....DOS service interrupt mov ax... . 4c00h . hellostk SEGMENT ....Define a segment DB 100h DUP(?) hellostk ENDS hellodat dos_print strng hellodat SEGMENT .... Use 'assume' directive to define segment types ......... .....define a segment assume cs:hellocod.....Define the character string ENDS hellocod SEGMENT .. hellodat ..define a constant DB 'Hello World'..... ss: hellostk mov ax...........13..............initialize data segment register mov ah.....ax <-......ah <-..... ax ....) 8/14/15 160 ...'$' .

.....ax <-........data dos_print EQU 9 strng DB 'Hello World'..ah <-...Define the character string ..... ax ......stack 100h .... Use .9 DOS 21h string function ........ reserve 256 bytes of stack space ..initialize data segment mov mov int mov .. .......YET ANOTHER WAY TO DEFINE SEGS .13..............DOS service interrupt START Assembly Language Programming (continued....data...beginning of string ...code START: mov ax......4c DOS 21h program halt register ah.. .DOS service interrupt ...data segment start address .. .....code directives to define segment types ..ax <-....) 8/14/15 161 ..... SEG strng mov ds.....stack.......... 4c00h function int 21h END ......ds <-.....'$' ... .......................10..define a constant ... dos_print dx..OFFSET strng 21h ax.dx <-. ........

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 162 .

MODULAR PROGRAMMING 8/14/15 163 .

MODULAR PROGRAMMING Reasons for breaking a program into small parts: 1. Debugging and testing done in orderly fashion 4.. Different modules can be assigned to different programmers 3.) 8/14/15 164 .. Frequently used tasks can be programmed into modules that are stored in libraries and used by several programs. Modules are easy to comprehend 2. Modular Programming (continued. Modifications – localized 6. Documentation – easily understood 5.

ASSEMBLER . LINKER AND RELOCATOR 8/14/15 165 .

Linker. but logical errors are not found For completing these tasks assembler needs hints from the programmer . Relocator (continued.. etc. Logical names of the segment. which may further be converted to executable codes Assembler does the following in steps: • Decides the address of each label • Substitutes the values for each of the constants and variables • Forms the machine code for mnemonics and data in the assembly language program During the above process. Types of the different routines and modules. like • • • • Storage required for a particular constant or a variable.ASSEMBLER A Program that converts assembly language program into equivalent machine codes.) 8/14/15 166 . End of files. Assembler.. assembler finds out syntax errors.

) 8/14/15 167 ...ASSEMBLER  An assembler translates the assembly language program into machine language program     Assembly language program à source codes Machine language program à object codes Assembler converts Source code into Object code Linker converts Object code into executable code Assembler. Relocator (continued. Linker.

) 8/14/15 168 .LST). In the second pass. In the first pass.ASSEMBLER Assembler works in passes: 1. Relocator (continued... it determines the displacement of the named data items.OBJ) and assembler list file (. Linker. 3. the offset of labels etc. It generates two files namely object file (. it produces the binary codes for each instructions and inserts the offsets etc. Assembler. and puts this information to in a symbol table. 2. that it calculated in the first pass.

1. Linker. Relocator (continued. debugged independently and then use linker to combine the modules to form the actual program.) 8/14/15 169 .link file which contains the binary codes of all the combined modules and a link map file which contains the address information about the linked files. It produces two files . Assembler. 2.LINKER Linker is a program used to join several object files into one large object file.. While writing large programs it is good to divide them into modules so that each modules can be written.. tested.

2. Converts .) 8/14/15 170 . Relocator (continued. Linker. 1.exe to ...LOCATORS A locator is the program used to assign the specific addresses of where the segments of object code are to be loaded in to main memory. Examples include EXE2BIN which comes with the IBM PC DOS.bin files which has physical addresses Assembler.

1. 3. Linker. Relocator 8/14/15 171 . It allows to find the source of the problem into the program. Microsoft’s Code view debugger etc. 4. There are lots of debuggers available like Borland Turbo Debugger. It also allows to set breakpoints at any points in the program. 2.DEBUGGER A debugger is the program which allows to load the object code program in to system memory. Assembler. It allows to look at the contents of the registers and memory locations after a program is run.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 172 .

STACKS 8/14/15 173 .

e) data segment  It is a top-down data structure.STACK A STACK is a Last-Input-First-Output (LIFO) read/write memory (i. whose elements are accessed using SS and SP registers  Stack pointer is decremented by 2 while ‘pushing into’ the stack  Stack pointer is incremented by 2 while ‘poping off’ the stack  Stacks (continued .) 8/14/15 174 . . .

.STACK Stack is used to:  Store return addresses whenever a procedure is called  Save contents of registers / register status of the processor while calling a procedure  Hold data or addresses that will be acted upon by the procedure Stacks (continued .) 8/14/15 175 . .

) 8/14/15 176 . LEA SP.program instructions ENDS Stacks (continued .....initialize stack Seg.. STACK MOV SS. . STACKTOP .. Regr.. AX . .. SS: STACK STACK SEGMENT STACKDATA DW 40 DUP(0) STACKTOP LABEL WORD STACK ENDS CODE CODE END SEGMENT MOV AX..initialize stack pointer ..INITIALIZING STACK MEMORY ASSUME CS:CODE.

and the least significant byte to location pointed by SP-2.) 8/14/15 177 . the most significant byte is stored in stack segment pointed to by SP-1. .STACK INSTRUCTIONS PUSH AND POP PUSH always transfers 2 bytes of data to the stack. . Stacks (continued . Syntax : PUSH <src>. <src> could be any 2 byte Register or Memory location or Immediate value When PUSH is executed.

) 8/14/15 178 .Do not click the mouse to see the full animation  Example -1 : Let SS=2000H. . SP=100H. PUSH AX AX 31 F2 F2 200FD 31 200FE 20100 SP=00FD SP=00FE SP=0100 SS=2000H Stacks (continued . . AX=31F2H.

Example . BX=413AH.2 Assume SS=2000H. . CX=FFFFH. Show the changes in the stack after executing the following instructions: PUSH AX PUSH BX POP CX POP AX Stacks (continued . SP=100H.) 8/14/15 179 . AX=31F2H. .

SP=100H. .SS=2000H. CX=FFFFH. BX=413AH. PUSH PUSH POP POP AX BX CX AX CH CL 41 FF 3A FF B H BL 41 3A AH AL 31 F2 SP=0100h SP=00FEh SP=00FCh 3A 41 200F C 200F F2 D 200FE 31 200FF XX 2010 0 SS=2000H Stacks (continued . AX=31F2H. .) 8/14/15 180 .

REVSTR NEXT-CHAR: MOV AL. .count number of bytes LEA SI. STR DB ‘HELLO’. LEA DI. [SI] CMP AL. 00H . check if cx =0 or the string is null JE DONE-REV Stacks (continued . 0000H. 0000H . . only care about AL INC CX. JMP NEXT-CHAR NEXT: CMP CX. 00 JE NEXT PUSH AX .) 8/14/15 181 .Example 11: Write an ALP to reverse string using stack operations. REVSTR DB 256 DUP(?) MOV CX. STR.

JMP NEXT DONE-REV: MOV [DI]. . . to terminate with null Stacks (continued .POP AX MOV [DI].) 8/14/15 182 .00.AL INC DI DEC CX.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 183 .

PROCEDURES 8/14/15 184 .

.PROCEDURES ◦ A procedure is a sequence of instructions written to perform a particular task ◦ Replacing a set of frequently used instructions by a procedure saves program memory space ◦ A CALL instruction in the main program causes 8086 to the execute the set of instructions contained in a procedure ◦ A RET instruction at the end of procedure returns execution to the next instruction in the main program Procedures (continued . .) 8/14/15 185 .

.MAINLINE OR CALLING PROGRAM PROCEDURE INSTRUCTIONS CALL NEXT MAINLINE INSTRUCTIONS Procedures (continued . .) RET 8/14/15 186 .

.) 8/14/15 187 . .Procedures (continued .

. .ADVANTAGES OF USING PROCEDURES ◦ Saves program memory space ◦ Problem can be divided into small modules ◦ Allows reusability of code Disadvantage ◦ Takes more time to execute Procedures (continued .) 8/14/15 188 .

Changes the contents of Instruction Pointer (IP) register and in some cases the Code Segment (CS) register to contain and point to the starting address of the procedure Procedures (continued .) 8/14/15 189 .8086 CALL INSTRUCTION 8086 performs the following operations when a CALL instruction is executed 1. Stores the address of the instruction after the CALL instruction on to the stack 2. . .

. .TYPES OF CALL INSTRUCTION ◦ Direct Near (within segment) CALL ◦ Direct Far (inter segment) CALL ◦ Indirect Near (within segment) CALL ◦ Indirect Far (within segment) CALL Procedures (continued .) 8/14/15 190 .

it pushes the instruction pointer (IP) value (for the instruction after CALL) on to the stack  A RET instruction at the end of a procedure pops this value back to instruction pointer (IP) to return to the calling program (main program). . . Procedures (continued .8086 RET INSTRUCTION  When 8086 does a NEAR CALL.) 8/14/15 191 .

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 192 .

MACROS 8/14/15 193 .

.) 8/14/15 194 ..  A macro can be defined anywhere in a program using the directives MACRO and ENDM Defining a Macro: name MACRO [optional arguments] statements. that is given a name at the start of the program.. ENDM Macros (continued .MACROS  A macro is the repeatedly appearing group of instructions. . statements.

. Macros (continued .• Macro name can be used in the actual program • Every occurrence of the macro name (apart from the definition) is replaced by the statements in the macro definition. .) 8/14/15 195 .

Repeated small group of instructions replaced by one macro 2. Errors in macros are fixed only once. Generally quicker in execution than subroutines Disadvantages In large programs.MACROS Advantages 1. macros produce larger code size than procedures Macros (continued . Programming is made easier and less error prone 5. Duplication of effort is reduced 4.) 8/14/15 196 . in the definition 3. . .

2. Disadvantage using the procedures is the need for the stack. 1. Advantage of using macro is that it avoids the overhead time involved in calling and returning from a procedures. Disadvantage is that macros make the program occupy more memory than using a procedure. Advantage of using procedures is that the machine codes for the group of instruction in the procedures needs to be loaded into main memory only once. . Macros (continued . 2. .) 8/14/15 197 .COMPARISON OF MACROS AND PROCEDURES 1.

. OFFSET MSG MOV AH. . SEG MSG MOV DS. 09H INT 21H ENDM Macros (continued .DEFINING AND CALLING A MACRO WITHOUT PARAMETERS Example: To display the message MSG on CRT DISPLAY MACRO MOV AX. AX MOV DX.) 8/14/15 198 .

“Retry.ODH. AX MOV DX. ----------------------------------------------------------------- : : DISPLAY MSG1 : : DISPLAY MSG2 : : MSG1 DB OAH.“$” Macros (continued . .0AH.DEFINING AND CALLING A MACRO WITH PARAMETERS Example: To display two different messages MSG1 and MSG2 on the CRT DISPLAY MACRO MSG MOV AX. “Program terminated NORMALLY”. Abort. . 0DH.ODH. Fail”. OFFSET MSG MOV AH.“$” 8/14/15 199 .0AH. 09H INT 21H ENDM The parameter MSG can be replaced by MSG1 and MSG2 while calling the macro.) MSG2 DB OAH. SEG MSG MOV DS. 0DH.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 200 .

INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 201 .

WHAT IS AN INTERRUPT?  Capability to suspend the execution of running program and execution of another program to fulfill specific requirement upon request  After finishing the second program. .) 8/14/15 202 . automatically return to the first program and start execution from where it was left Interrupts and ISR (continued . .

Interrupts and ISR (continued .review of how µP/µC communicate with the outside world must be understood.WHY INTERRUPT CAPABILITY IS NECESSARY?  To understand this . . .) 8/14/15 203 .

.BASIC BLOCK DIAGRAM OF A ΜC BUS µP MEMORY I/O DEVICES Interrupts and ISR (continued . .) 8/14/15 204 .

FIRST TYPE OF COMMUNICATION .) 8/14/15 205 . .DEDICATED I/O BUS µP I/O DEVICE 1 Single I/O device Interrupts and ISR (continued . .

.SECOND TYPE OF COMMUNICATION .. .. You? You? You? Disadvantage:  Not fast enough  Wastes too much microprocessor time Interrupts and ISR (continued .POLLED I/O OR PROGRAMMED I/O µP BUS I/O I/O .) 8/14/15 206 . Device-n Device-1 ...

THIRD TYPE OF COMMUNICATION .. . INT I/O Device-n INT Interrupts are useful when I/O devices are slow Interrupts and ISR (continued .INTERRUPTED I/O BUS µP INT I/O Device-1 INT  ... .) 8/14/15 207 ...

 Most microprocessors allow normal program execution to be interrupted by some external signal or by a special instruction in the program.  A special instruction --. . . the microprocessor stops executing its current program and calls a procedure which “services” the interrupt.) 8/14/15 208 .  In response to an interrupt.IRET --.at the end of interrupt-service procedure returns execution to the interrupted main program. Interrupts and ISR (continued .

) 8/14/15 209 . . e. INTR pins ii) Software interrupt Execution of interrupt instruction INT Interrupts and ISR (continued . (Interrupt due to exceptions)  2) User defined interrupt i) Hardware interrupt An external signal applied to NMI.. .SOURCES OF 8086 INTERRUPTS 8086 interrupts can be classified into two types:  1) Predefined interrupt Some error condition produced by execution of an instruction. trying to divide some number by zero.g.

INT: This is a software interrupt. type is implicit INTR: This hardware interrupt can be masked using Interrupt Flag (IF). to handle more than one interrupts that occur at a time. . then 8086 responds to the interrupt by stepping through the following series of actions: Interrupts and ISR (continued . If yes.) 8/14/15 210 . the type is specified in the instruction At the end of each instruction cycle. Programmable Interrupt Controller is required. . 256 Types (00h to FFh). 8086 checks if any interrupt service has been requested.NMI (Non Maskable Interrupt): Any interrupt request at NMI input pin cannot be masked or disabled by any means.

2. 8086 decrements SP by 2 and pushes flag register content into the stack. . 3. Interrupts and ISR (continued . Decrements SP again by 2 and pushes current IP content into the stack. 4. 5. .) 8/14/15 211 . 6.1. Does an indirect far jump to the start of the procedure written to respond to the interrupt. 8086 disables INTR input by clearing IF flag in flag register The TF (trap) flag in flag register is Reset Decrements SP again by 2 and pushes current CS content into the stack.

Push FLAGS 2..... ..main Program 1. POP registers IRET Interrupts and ISR (continued . .. . Push IP 6...) 8/14/15 212 .. Clear TF 4.. Clear IF 3. . POP IP POP CS POP FLAGS .... Push CS 5. . .. Fetch ISR address Interrupt Service Routine (ISR) PUSH registers . ...

So.HOW DOES 8086 GET TO INTERRUPT SERVICE ROUTINE? 1. .) 8/14/15 213 . 2. 8086 loads its CS and IP registers with the address of ISR. . the next instruction to be executed is the first instruction of ISR Interrupts and ISR (continued .

In an 8086 system.) type# of the interrupt. 8086 reads 4 consecutive bytes starting from this location to get the starting address of ISR First 2 bytes are loaded in to IP Second 2 bytes to CS Interrupts and ISR (continued . 2. 8086 treats this id# as interrupt-type# After receiving INTR signal. 8.e. 7. 6. 8086 sends an INTA signal After receiving INTA signal. 8086 multiplies this id# or type# by 4 to produce the desired address of the location in the Interrupt Vector Table (IVT).HOW DOES 8086 GET THE ADDRESS OF INTERRUPT SERVICE ROUTINE (ISR)? 1. each “interrupter” (external and internal ) has an id#. interrupter releases it’s id#. where ISR address is stored. .) 8/14/15 214 . . 5. (i. 3.

from 00000 to 003FF. the first 1Kbytes (1024 bytes) of memory.  So the Table is referred to as interrupt-vector table or interrupt-pointer table.  Since 4 bytes are required to store CS and IP values for each ISR.) 8/14/15 215 . the Table can hold the starting addresses for up to 256 ISRs. is set aside as a Table for storing the starting addresses of interrupt service routines.INTERRUPT VECTOR TABLE (IVT)  In an 8086 system. Interrupts and ISR (continued .  The starting address of an ISR is often called the interrupt vector or the interrupt pointer. . .

.) 8/14/15 216 . . Note :  The IP value is put in as the lower word of the vector and CS as higher word of the vector  Each double word interrupt vector is identified by a number from 0 to 255 (00h to FFh)  INTEL calls this number as the TYPE of the interrupt Interrupts and ISR (continued . The 256 interrupt vectors are arranged in the table in memory as follows in the next slide.

FOR USER (224) TYPE 255 080H TYPE 32 TYPE 31 . RESERVED (27) 014H TYPE 5 TYPE 4 010H Overflow INTO TYPE 3 Predefined/ 00CH Dedicated/Internal Interrupts Pointers TYPE 2 008H (5) NON-MASKABLE TYPE 1 004H CS Base Address One Byte INT SINGLE STEP TYPE 0 ..AVAILABLE 3FFH ....

.) 8/14/15 218 .WHAT HAPPENS IF TWO OR MORE INTERRUPTS OCCUR AT THE SAME TIME? Higher priority interrupts will be served first Interrupts and ISR (continued . .

. INT0 NMI INTR SINGLE STEP Priority HIGHEST LOWEST Interrupts and ISR (continued . INT N. .PRIORITIES OF 8086 INTERRUPTS Interrupt Type DIVIDE ERROR.) 8/14/15 219 .

) 8/14/15 220 . . 2 The user can insert in the Can occur at any time activated sequence of instructions of a by hardware program Once initiated it cannot be Can be masked masked 3 4 5 When initiated .No CALL Instruction INTn instruction 1 Upon the execution .it stores the When initiated .it stores the CS:IP of the next instruction on CS:IP of the next instruction and the stack also the flag register on the stack. .the control Upon execution the control will will jump to any one of the 1 MB jump to a fixed location in the of memory locations .DIFFERENCES BETWEEN CALL AND INT: S. vector table. The last instruction of the The last instruction of the ISS subroutine will be RET will be IRET Interrupts and ISR (continued .

to the Interrupt Request (INTR) pin.) 8/14/15 221 . 4. The interrupt type N is sent to the Central Processor Unit (CPU) via the Data bus from the hardware interface. 3.THE INTERRUPT SEQUENCE OF 8086 MICROPROCESSOR: 1. External interface sends an interrupt signal. . This disables the INTR pin and the trap or single-step feature. 5. Interrupts and ISR (continued . 2. or an internal interrupt occurs. Both the interrupt (IF) and (TF) flags are cleared. The CPU finishes the present instruction (for a hardware interrupt) and sends Interrupt Acknowledge (INTA) to hardware interface. . The contents of the flag registers are pushed onto the stack.

CS and Flag (PSW) registers are popped from the stack and returns to the state prior to the interrupt. 8. Interrupts and ISR (continued . 10. The contents of the instruction pointer (IP) are pushed onto the Stack. Where N is the ‘type’ of interrupt. . the IP. While returning from the ISR by the Interrupt Return (IRET) instruction. so that the next instruction is executed from the ISR addressed by the interrupt vector.) 8/14/15 222 . .6. In the IVT. the first 2 bytes starting from 4 x N is placed into the IP and the next 2 bytes from (4xN +2) is placed into the CS. The ISR address from the interrupt vector table (IVT) is fetched. 7. by finding (4 x N). The contents of the code segment register (CS) are pushed onto the Stack. 9.

OVERVIEW            INTRODUCTION TO 8086 8086 ARCHITECTURE ADDRESSING MODES 8086 INSTRUCTION SET ASSEMBLER DIRECTIVES ASSEMBLY LANGUAGE PROGRAMMING MODULAR PROGRAMMING STACKS PROCEDURES MACROS INTERRUPTS AND INTERRUPT SERVICE ROUTINES 8/14/15 223 .

BYTE AND STRING PROGRAMMING

8/14/15

224

STRINGS
• A string is a series of bytes or words stored in
successive memory locations
• 8086 can perform the following operations on
strings
– Moving a string from one place in memory to
another
– Compare two strings
– Search a string for a specified character

Strings (continued . . .)

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225

STRING INSTRUCTIONS
String instructions

MOVS

MOVSB

MOVSW

LODS

LODSB

LODSW

STOS

STOSB

STOSW

B stands for byte, and W stands for word

Strings (continued . . .)

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226

MOVING A STRING
MOVSB/ MOVSW Instruction
 Copies a byte or word from a location in the data
segment (DS) to the location in the extra segment
(ES)
 Offset of source in data segment must be in SI
register
 Offset of destination in extra segment must be in
DI register
 For multiple byte/word moves the count is stored
in CX register
Strings (continued . . .)

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227

ROLE OF DIRECTION FLAG
IN MOVING A STRING
• DF = 0
– SI & DI will be incremented by 1 or 2 after
every byte or word is moved
• DF = 1
– SI & DI will be decremented by 1or 2 after
every byte or word is moved

Strings (continued . . .)

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228

A PROGRAM TO COPY A
STRING OF BYTES FROM
ONE LOCATION IN MEMORY
TO ANOTHER
Strings (continued . . .)

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229

LEA, CLD & REP INSTRUCTIONS
FOR MOVING A STRING
LEA (Load Effective Address)
◦ this instruction determines the offset of the
variable or memory location named as the source
and puts it in the specified 16-bit register
 CLD (Clear Direction Flag)
 REP (Repeat)
◦ A prefix written before one of the string
instruction
◦ Causes string instruction to be repeated until
CX=0

Strings (continued . . .)

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230

DATA SEGMENT
MSG1 DB ‘TIME FOR A NEW HOME’
MSG2 DB ‘JUMP OVER TO MSG3’
MSG3 DB 23 DUP(0)
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE, DS: DATA, ES: DATA
START: MOV AX, DATA
MOV DS, AX ;initialize data segment register
MOV ES, AX
;initialize extra segment register
LEA SI, MSG1 ;point SI at source string
LEA DI, MSG3 ;point DI at destination string
MOV CX, 19
;use CX register as counter
CLD ;clear direction flag, so counter decrements
REP MOVSB ;move string bytes until all moved
CODE ENDS
Strings (continued . . .)

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231

.LODSB AND LODSW For LODSB this is how it is done ◦ AL = DS:[SI] ◦ if D = 0 then SI = SI + 1 ◦ else SI = SI – 1 ◦ And LODSW is the same except that SI by 2 Strings (continued .) 8/14/15 232 . .

Update DI. How STOSB executes?  ES:[DI] = AL if DF = 0 then DI = DI + 1  Else DI = DI .STOSB AND STOSW For STOSB Store byte in AL into ES:[DI]. Update DI. .) 8/14/15 233 . For STOSW Store word in AX into ES:[DI].1  And STOSW executes the same as STOSB but DI is incremented or decremented by 2 Strings (continued . .

DOS CALLS       INPUT /OUTPUT SERVICES On the machines based on Intel 80xx series (8086. monitor. .). printer. running on DOS. usually related to the services related to the external devices connected to the machine. Interrupts are generated for a variety of reasons. the input/output is carried out in the form of services provided by the hardware and the operating systems. trap etc. etc. like an error condition. and are in the form of interrupts. and DOS services respectively.INTERRUPTS . There can be other reasons for the interrupts. example: keyboard. They are called as ROM-BIOS. Interrupts An interrupt occurs when any currently executing program is interrupted.8088 etc.

A software interrupt is a call to a subroutine located in the operating system. The syntax is INT number • The CPU processes an interrupt instruction. Hardware interrupts are generated when the peripheral.INT 8086 recognizes two kinds of interrupts. The actual address in this table varies from machine to machine. in the range 0 .FFh. usually the input-output routine. or ROM-BIOS. each of 4bytes. • INT (interrupt) instruction is used within application programs to request the services of DOS. . using the interrupt vector table (IVT). hardware interrupts and software interrupts. The entry in the interrupt vector table. identified by a number. is identified by the number. • It is situated in the first 1K bytes of memory. connected to the CPU requests for some service. • The INT instruction calls an operating system subroutine. and has a total of 256 entries. given in the interrupt instruction. and in turn points to an operating system subroutine.

PROCESSING AN INTERRUPT .

3. IRET (interrupt return) causes the program to resume execution at the next instruction in the calling program. The CPU jumps to the address stored in the interrupt vector table. 4. .STEPS 1. while for INT 3h will be placed at OCh. 2. The number following the INT mnemonic tells the CPU which entry to locate in the interrupt vector table. The actual routine for servicing the INT 10h. is placed at this address. The CPU loads the CS register and the IP register. with this new address in the IVT. The address of the entry can be found by multiplying the number by 4. Example: the subroutine corresponding to INT 10h will be placed at address a 40h . just like a far CALL. and transfers the control to that address.

identified by a function number placed in the AH register. There are some 100 different functions supported by this interrupt. prior to calling INT.DOS FUNCTION CALLS  INT 21 H is called a DOS function call. .

If no character is ready. waits until one is available.  Calls with: AH = 01  Returns: AL = 8 bit data input  . and echoes the character on the monitor.INT 21 FUNCTION 01 H Reads the character from the keyboard.

and store it in the variable VAR 1  PGM: MOV AH. with echo.01H INT 21 H MOV VAR1.AL VAR1 DB 0  .INT 21 FUNCTION 01 H Example: Read one character from the keyboard into register AL.

if you • want it printed on the screen) • Returns: nothing • Example: transmit the character '*' on the screen MOV AH. 02 MOV DL.INT 21 FUNCTION 02 H Outputs the character on the monitor • Calls with: AH = 02 • DL = 8 bit-data (usually ASCII. '*' INT 21h • .

INT 21 FUNCTION 08 H Reads a character from the input device.  Rest all other things are same as that of function 01  . without echoing it on the output device.

newline. including the control codes. can be embedded in the string  Calls with: AH = 09  DS:DX = segment:offset of string  Returns: nothing  . tab etc. Any other code. which is not transmitted.  A string must be terminated by a '$' character.INT 21 FUNCTION 09 H Output a string on the standard output device. like..

'$' DATA ENDS CODE SEGMENT MOV AH.DX MOV DX.09 MOV DX.CR. code for line feed DATA SEGMENT STR DB 'Hello world!'.INT 21 FUNCTION 09 H Example: CR EQU ODh .LF. code for carriage return LF EQU OAh . -DATA MOV DS. OFFSET -STR INT 21h • .

Backspace key may be used to erase the characters. including the carriage return (initialized by the user). Call with: AH = OA h DS:DX = segment: offset of buffer Returns: nothing . All the characters are echoed on the console. Before the function is called. the second byte is supplied by MS-DOS to signal the number of characters actually read.INT 21 FUNCTION 0A H • • • • • Reads a character string of up to 255 characters from the console and stores it in a buffer. equal to the maximum length of the string required plus two. a buffer is initialized of length. excluding the carriage return. ENTER is used to terminate the string. The first byte of the buffer specifies the maximum number of bytes it can hold.

including CR. max length of string..Example: DATA SEGMENT  BUFF DB 81 . 81 characters  DB 0 . actual length of string used  DB 81 DUP(0)  DATA ENDS  .

EXAMPLE CODE SEGMENT  MOV AH.DX  MOV DX.0A H  MOV DX.DATA  MOV DS.OFFSET BUFF  INT 21 H  CODE ENDS  .

4Ch MOV AL.INT 21 FUNCTION 4C H • • • • • • • • Terminate with a return code. and updates the directory. Calls with: AH = 4Ch AL = return code Returns: nothing Example: return to DOS normally MOV AH. Performs a final exit to DOS. passing back a return code. MS-DOS closes all the previously opened files. 00 INT 21h .

.) 8/14/15 24 9 ..END OF UNIT-1 Introduction to 8086 (continued...