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EE314

Microprocessor Systems
Chapter 2
An Introduction to the 80x86
Microprocessor Family
Objectives:
Real-mode and protected-mode operation
The register set of 80x86 family
The addressing capabilities and data types that may be used
Based on "An Introduction to the Intel Family of Microprocessors" by James L. Antonakos

2.2 Real mode and Protected mode


operation
Addressable memory:
8086 20 address lines => 1MB (Mega Byte)

Pentium 32 address lines => 4096MB


For compatibility, all the 80x86 family members start running in Real Mode,
emulating the 8086 features (i.e. 1MB RAM)
Beginning with 80286, the Protected Mode is also available, allowing direct
control of all address lines (all addressable memory), multitasking support,
virtual memory addressing, memory management and protection (against
violation from other task), control over internal data and instruction cache.

2.3 The Software Model of 80x86 Family


15 . . . 8,7 . . . 0
AH
BH
CH
DH

AL
BL
CL
DL

15 . . . 8,7 . . . 0
A
B
C
D
B
S
D

X
X
X
X
P
I
I

CS
DS
SS
ES
FS
GS

IP
SP
FLAGS

8 bit registers

16 bit registers

Accumulator
Base
Count
Data
Base Pointer
Source Index
Destination Index

31 . . . . . . 16,15 . . . 8,7 . . . 0
EAX
EBX
ECX
EDX
EBP
ESI
EDI

AH A
BH B
CH C
DH D
B
S
D

X
X
X
X
P
I
I

AL
BL
CL
DL

Code Segment
Data Segment
Stack Segment
Extra Segment
Extended registers, only
on 80386 and higher CPUs
Instruction Pointer
Stack Pointer
Flags

IP
EIP
SP
ESP
EFLAGS FLAGS

32 bit registers,
80386 or higher only

2.4 Processor Registers

A prefix (66H) allows 15 . . . 8,7 . . . 0


Accumulator
Multiply, divide, accessing I/O...
AX
using 32 bit registers in
Base
BX
the real mode:
Count
Counter in loop operations
CX
db 66h
DX
Data
Multiply, divide, pointer to I/O...
;EAX instead AX
BP
Base Pointer
SI
mov ax,1140h
Source Index
Source index in string operations...
DI
;less significant 16 bits
Destination Index Destination index in string operation
db 058bh
Segment = a 64kbyte memory block
;most significant 16 bits
CS
Code Segment beginning at a multiple by 10H
DS
Data Segment address.
Shift
An effective address is generated as
SS
Stack
Segment
to left
16 bit
ES
Extra Segment combination between a segment
4 bits
register and another register as in
FS
the example.
GS
A000 + Add
Each segment register has a default usage
5F00 16 bit
(class of instructions where apply).
A5F00
Instruction Pointer Pointer in program flow
IP
Stack Pointer
Pointer in Stack
SP
Effective
Flags
Control and status flags
FLAGS
Address
16 bit registers
(20bits)

2.4 Processor Registers


Flag register
15
-

14
NT
CF
PF
AF
ZF
SF
TF
IF
DF
OF
IOPL
NT

13 12
IOPL

11
OF

10
DF

Carry Flag
Parity Flag
Auxiliary carry Flag
Zero Flag
Sign Flag
Trace Flag
Interrupt enable Flag
Direction Flag
Overflow Flag
I/O Priority Level
Nested Task

9
IF

8
TF

7
SF

6
ZF

5
-

4
AF

3
-

2
PF

1
-

0
CF

Contains Carry out of MSB of result


Indicates if result has even parity
Contains Carry out of bit 3 in AL
Indicates if result equals zero
Indicates if result is negative
Provides a single step capability for debugging
Enables/disables interrupts
Controls pointer updating during string operations
Indicates that an overflow occurred in result
Priority level of current task (two bits)
Indicates if current task is nested

2.5 Data Organization


Bits, Bytes, Words, Double-words

Name

Size

Binary

Possible Values
Hexadecimal
Decimal

Bit
Nibble
Byte
Word
Double Word

BInary digiT
4 bits
8 bits
16 bits = 2 bytes
32 bits = 4 bytes

0,1
0...1111
01111,1111
0(16 1s)
0(32 1s)

0,1
0...F
0FF
0FFFF
0FFFFFFFF

0,1
015
0255
065,535
0...4,294,967,295

Byte swapping: if a word has to be stored into an 8 bit wide memory at address adr, its
low byte is stored at adr and its high byte at adr+1. If a word is read from an 8 bit
memory at address adr, the low byte is loaded from adr and the high byte from adr+1.

Rule: low significance <=> low address

2.5 Data Organization


Assembler directives DB, DW, DUP and EQU.
Example
0000
0000 03
0001 04
0002 00
0003 0D
0008 48
000E
0010
0012
0016

...
0003
0004
0005
0006
0007
...
30 C8
69 24

0006
03E8
1234
0000

0018 000A
0022 0007

Define Byte reserves memory for a byte and assign to it the specified
value. Decimal, binary, octal or hexadecimal numbers can be used.

0D
30
C8
3A
CE
3A CE

Byte
swapping
0012 34
ABCD 0013 12
0014 CD
0015
AB
...
[00]
[0000]

.DATA
NUM1 DB
NUM2 DB
NUM3 DB
NUMS DB
MSG DB
WX
WY
WZ
TEMP

DW
DW
DW
DW

SRS DB
TIME DW

A list of values can be used.


A character
3
string generates
100B
the associate
?
15O,48,200,3AH,0CEH ASCII bytes
Hi$
Similarly, Define Word reserves
memory space for a word and assign
6
1000 to it the specified value.
1234H,0ABCDH
? A numerical value begins with a decimal
digit, or a non-significant 0 is added
10 DUP(0)
Duplicate repeats
7 DUP(?)
n times the value
between ( ).
13
A label is assigned the address of the
5500 first byte involved in its statement.

Equate directive assign


=000D
TOP EQU
a value to a constant
=157C
MORE EQU
without memory space
reservation.
A ? reserves memory space without assigning values.

2.6 Instruction types


Data transfer instructions
8086 instruction set
IN
LAHF
LDS
LEA
LES
MOV
OUT
POP
POPF
PUSH
PUSHF
SAHF
XCHG
XLAT

Input byte or word from port


Load AH from flags
Load pointer using data segment
Load effective address
Load pointer using extra segment
Move to/from register/memory
Output byte or word to port
Pop word off stack
Pop flags off stack
Push word onto stack
Push flags onto stack
Store AH into flags
Exchange byte or word
Translate byte

Additional 80286 instructions


INS
OUTS
POPA
PUSHA

Input string from port


Output string to port
Pop all registers
Push all registers

Additional 80386 instructions


LFS
Load pointer using FS
LGS
Load pointer using GS
LSS
Load pointer using SS
MOVSX Move with sign extended
MOVZX Move with zero extended
POPAD Pop all double (32 bit) registers
POPD
Pop double register
POPFD Pop double flag register
PUSHAD Push all double registers
PUSHD Push double register
PUSHFD Push double flag register

Additional 80486 instruction


BSWAP Byte swap

Additional Pentium instruction


MOV

Move to/from control register

2.6 Instruction types


Arithmetic instructions
8086 instruction set
AAA
AAD
AAM
AAS
ADC
ADD
CBW
CMP
CWD
DAA
DAS
DEC
DIV
IDIV
IMUL
INC
MUL
NEG
SBB
SUB

Additional 80386 instructions

ASCII adjust for addition


CDQ
Convert double-word to
ASCII adjust for division
quad-word
ASCII adjust for multiply
CWDE Convert word to double-word
ASCII adjust for subtraction
Add byte or word plus carry
Additional 80486 instructions
Add byte or word
CMPXCHG
Compare and exchange
Convert byte or word
XADD
Exchange and add
Compare byte or word
Convert word to double-word
Decimal adjust for addition
Additional Pentium instruction
Decimal adjust for subtraction
CMPXCHG8B Compare and
Decrement byte or word by one
exchange 8 bytes
Divide byte or word
Integer divide byte or word
Integer multiply byte or word
Increment byte or word by one
Multiply byte or word (unsigned)
Negate byte or word
Subtract byte or word and carry (borrow)
Subtract byte or word

2.6 Instruction types


Bit manipulation instructions
8086 instruction set
AND
NOT
OR
RCL
RCR
ROL
ROR
SAL
SAR
SHL
SHR
TEST
XOR

Logical AND of byte or word


Logical NOT of byte or word
Logical OR of byte or word
Rotate left trough carry byte or word
Rotate right trough carry byte or word
Rotate left byte or word
Rotate right byte or word
Arithmetic shift left byte or word
Arithmetic shift right byte or word
Logical shift left byte or word
Logical shift right byte or word
Test byte or word
Logical exclusive-OR of byte or word

Additional 80386 instructions


BSF
BSR
BT
BTC
BTR
BTS
SETcc
SHLD
SHRD

Bit scan forward


Bit scan reverse
Bit test
Bit test and complement
Bit test and reset
Bit test and set
Set byte on condition
Shift left double precision
Shift right double precision

2.6 Instruction types


String instructions
8086 instruction set
CMPS
LODS
MOVS
MOVSB(MOVSW)
REP
REPE (REPZ)
REPNE (REPNZ)
SCAS
STOS

Compare byte or word string


Load byte or word string
Move byte or word string
Move byte string (word string)
Repeat
Repeat while equal (zero)
Repeat while not equal (not zero)
Scan byte or word string
Store byte or word string