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LectureNotes

InsulatedGateBipolarTransistors(IGBTs)

Outline
ConstructionandIVcharacteristics
Physicaloperation
Switchingcharacteristics
Limitationsandsafeoperatingarea
PSPICEsimulationmodels

CopyrightbyJohnWiley&Sons2003 IGBTs1
MulticellStructureofIGBT

IGBT=insulatedgatebipolartransistor.
contact to source
emitter
diffusion
conductor
field
oxide

gate
oxide

gate
width
N+ N+ N+ N+
P P
N-
buffer layer
N+ (not essential)

P+ collector
metallization
gate
conductor

CopyrightbyJohnWiley&Sons2003 IGBTs2
CrosssectionofIGBTCell
gate
emitter
SiO
2 + +
J N N
3 P
Ls
J
2
-
N
+
N
+
P

J - Unique feature of IGBT collector


1 Buffer layer
Parasitic thyristor (not essential)

CellstructuresimilartopowerMOSFET(VDMOS)cell.
PregionatcollectorenduniquefeatureofIGBTcomparedtoMOSFET.
Punchthrough(PT)IGBTN+bufferlayerpresent.
Nonpunchthrough(NPT)IGBTN+bufferlayerabsent.
CopyrightbyJohnWiley&Sons2003 IGBTs3
CrosssectionofTrenchGateIGBTUnitCell
Emitter

boddy-source short
Oxide

N+ N+
Gate
Channel NonpunchthruIGBT
P conductor P
length
Parasitic
I N- I
SCR D D

+
P

Collector

Emitter

boddy-source short
Oxide

N+ N+
Gate
P Channel
P conductor
length PunchthruIGBT
Parasitic
ID N- ID
SCR
N+
+
P

Collector

CopyrightbyJohnWiley&Sons2003 IGBTs4
IGBTIVCharacteristicsandCircuitSymbols
increasing V
i GE
C i
v C
GE4
No Buffer Layer
v GE3
VRM BV
CES
v
v V GE
With Buffer Layer GE2 GE(th)
v GE1
V 0
RM Transfercurve
v
CE
V BV
RM Outputcharacteristics CES

drain collector

gate
gate NchannelIGBTcircuitsymbols

source
emitter

CopyrightbyJohnWiley&Sons2003 IGBTs5
Blocking(Off)StateOperationofIGBT
gate
emitter
SiO
2 + +
J N N
3 P
Ls
J
2
-
N
+
N
+
P

J - Unique feature of IGBT collector Buffer layer


1 (not essential)
Parasitic thyristor

Blocking state operation - V GE < V GE(th) With N+ buffer layer, junction J 1 has
J unction J 2 is blocking junction - n+ drift small breakdownvoltage and thus IGBT
region holds depletion layer of blocking has little reverse blocking capability -
junction. anti-symmetric IGBT

Without N+ buffer layer, IGBT has large Buffer layer speeds up device turn-off
reverse blocking capability - so-called
symmetric IGBT

CopyrightbyJohnWiley&Sons2003 IGBTs6
IGBTOnstateOperation
gate
emitter

+ +
N N

P MOSFET section designed


lateral (spreading)
N-
to carry most of the IGBT
resistance
+
collector current
N

+ + + + P+ + + + +

collector On-state V CE(on) =


V J 1 + Vdrift + ICRchannel
gate
emitter

+ +
N N

P Hole injection into drift


N-
region from J 1 minimizes
N
+
V drift .
P+

collector

CopyrightbyJohnWiley&Sons2003 IGBTs7
ApproximateEquivalentCircuitsforIGBTs

Conduction path resulting collector


drift region
resistance in thyristor turn-on (IGBT
V latchup) if current in this
V J1
drift path is too large

gate
I R gate
C channel

Principal
(desired) Body region
path of spreading
resistance
Approximateequivalentcircuitfor collector
current emitter
IGBTvalidfornormaloperating
conditions.
IGBTequivalentcircuitshowing
V CE(on) = VJ 1 + V drift + IC Rchannel transistorscomprisingtheparasitic
thyristor.
CopyrightbyJohnWiley&Sons2003 IGBTs8
StaticLatchupofIGBTs
lateral (spreading)
resistance gate
J emitter
3

+ +
N N

J2 N-
+
N
J 1
+ + + P+ + + + +

collector
Conduction paths causing lateral voltage drops and turn-on
of parasitic thyristor if current in this path is too large

Lateralvoltagedrops,iftoolarge,willforwardbiasjunctionJ3.
ParasiticnpnBJTwillbeturnedon,thuscompletingturnonofparasiticthyristor.
LargepowerdissipationinlatchupwilldestroyIGBTunlessterminatedquickly.
Externalcircuitmustterminatelatchupnogatecontrolinlatchup.

CopyrightbyJohnWiley&Sons2003 IGBTs9
DynamicLatchupMechanisminIGBTs
J emitter gate
3

+ +
N N

J 2 P

lateral
(spreading) expansion of
resistance N- depletion region
+
N
J 1
P+
collector

MOSFETsectionturnsoffrapidlyanddepletionlayerofjunctionJ2expandsrapidlyinto
Nlayer,thebaseregionofthepnpBJT.
ExpansionofdepletionlayerreducesbasewidthofpnpBJTanditsaincreases.
MoreinjectedholessurvivetraversalofdriftregionandbecomecollectedatjunctionJ2.
IncreasedpnpBJTcollectorcurrentincreaseslateralvoltagedropinpbaseofnpnBJTand
latchupsoonoccurs.
Manufacturersusuallyspecifymaximumallowabledraincurrentonbasisofdynamic
latchup.

CopyrightbyJohnWiley&Sons2003 IGBTs10
InternalCapacitancesVsSpecSheetCapacitances

C gc C
bridge
G C
+V -
C ge Cce b

E C gc
Bridge balanced (Vb=0) Cbridge = C gc = C res
G C

G C
Cies

E
C oes

Cies = C ge + C gc E

C oes = C gc + Cce

CopyrightbyJohnWiley&Sons2003 IGBTs11
IGBTTurnonWaveforms

v (t) V
GE GG+
Turn-on waveforms for
IGBT embedded in a t
stepdown converter.

Very similar to turn-on t


waveforms of MOSFETs. d(on)
Io
Contributions to t vf2 . i (t)
C
t
Increase in Cge of t
ri
MOSFET section at low
collector-emitter
V
voltages. V CE(on)
DD
Slower turn-on of pnp v (t)
CE
BJT section. t fv1 t
t fv2

CopyrightbyJohnWiley&Sons2003 IGBTs12
IGBTTurnoffWaveforms
Turn-off waveforms for IGBT
V embedded in a stepdown
GE(th V
GG- converter.
)
v (t)
GE
t Current tailing (t fi2 ) due to
stored charge trapped in drift
region (base of pnp BJ T) by rapid
turn-off of MOSFET section.
t
fi2 MOSFET
current Shorten tailing interval by either
t d(off)
reducing carrier lifetime or by
BJT
i (t)
t current putting N+ buffer layer adjacent to
C rv t
t injecting P+ layer at drain.
fi1

Buffer layer acts as a sink for


excess holes otherwise trapped
V
DD in drift region becasue lifetime in
t buffer layer can be made small
v (t) without effecting on-state losses -
CE
buffer layer thin compared to drift
region.
CopyrightbyJohnWiley&Sons2003 IGBTs13
IGBTSafeOperatingArea

Maximum collector-emitter
i voltages set by breakdown
C
voltage of pnp transistor -
2500 v devices available.
-5
10 sec

-4 Maximum collector current set


10 sec
FBSOA by latchup considerations - 100
A devices can conduct 1000 A
DC
v for 10 sec and still turn-off
CE via gate control.
dv
i re-applied CE
C
dt
1000 V/
s Maximum junction temp. = 150
C.

RBSOA 3000 V/ s Manufacturer specifies a
maximum rate of increase of
v
CE re-applied collector-emitter
voltage in order to avoid latchup.
CopyrightbyJohnWiley&Sons2003 IGBTs14
DevelopmentofPSpiceIGBTModel
Cm
gate
source Coxs

Coxd
+ +
N N
Cgdj
P

Ccer Cdsj
-
Drain-body or N
+ Rb
base-collector N
Cebj + Cebd
depletion layer +
P

drain

NonlinearcapacitorsCdsjandCcerduetoNPjunctiondepletionlayer. Reference"An
ExperimentallyVerified
NonlinearcapacitorCebj+CebdduetoP+N+junction IGBTModel
Implementedinthe
MOSFETandPNPBJTareintrinsic(noparasitics)devices SABERCircuit
Simulator",AllenR.
NonlinearresistorRbduetoconductivitymodulationofN draindriftregionof Hefner,Jr.andDaniel
MOSFETportion. M.Diebolt,IEEETrans.
onPowerElectronics,
NonlinearcapacitorCgdjduetodepletionregionofdrainbodyjunction(N Pjunction). Vol.9,No.5,pp.532
542,(Sept.,1994)
Circuitmodelassumesthatlatchupdoesnotoccurandparasiticthyristordoesnotturn.

CopyrightbyJohnWiley&Sons2003 IGBTs15
ParameterEstimationforPSpiceIGBTModel
BuiltinIGBTmodelrequiresnineparametervalues.
ParametersdescribedinHelpfilesofPartsutilityprogram.

Partsutilityprogramguidesusersthroughparameterestimationprocess.
IGBTspecificationsheetsprovidedbymanufacturerprovidesufficient
informaitonforgeneralpurposesimulations.
Detailedaccuratesimulations,forexampledevicedissipationstudies,may
requiretheusertocarefullycharacterizetheselectedIGBTs.
Drain

Cebj +
Cgdj Cebd Builtinmodeldoesnotmodel
Ccer ultrafastIGBTswithbuffer
Coxd Rb
layers(punchthroughIGBTs)or
Gate Cdsj
Cm +
reversefreewheelingdiodes
Coxs
Source

CopyrightbyJohnWiley&Sons2003 IGBTs16
PSpiceIGBTSimulationVsExperiment

0V 5V 10 V 15 V 20 V 25 V
1
nF
Data from IXGH40N60 spec sheet

Simulated C versus VCE


GC
0.75
nF for IXGH40N60

V =0V
GE

0.5
nF

0.25
nF

0
100 V 200 V 300 V 400 V 500 V
Collector - emitter Voltage

CopyrightbyJohnWiley&Sons2003 IGBTs17