You are on page 1of 7

Lecture Notes

Gate Turn-off Thyristors (GTOS)

OUTLINE

• GTO construction and I-V characteristics.
• Physical operation of GTOs.
• Switching behavior of GTOS

Copyright © by John Wiley & Sons 2003 GTOs - 1

• Highly interdigitated gate- cathode structure (faster switching) • Etched cathode islands (simplify electrical contacts) • Anode shorts (speed up turn-off) • GTO has no reverse blocking capability because of anode shorts • Otherwise i-v characteristic the same as for standard SCR anode GTO circuit symbol gate cathode Copyright © by John Wiley & Sons 2003 GTOs .2 . GTO (Gate Turn-off Thyristor) Construction • Unique features of the GTO.

1. Short lifetime in n1 region to remove excess carriers rapidly so Q 1 can turn off • Turn off GTO by pulling one or both of the BJTs out • Short lifetime causes higher on-state losses of saturation and into active region. GTO Turn-off Gain I A • Large turn-off gain requires 2 .2) geometry to minimize cathode current crowding and di/dt limitations. 1 << 1 Q 1 • Make 1 small by I' Q G 1.I' G < = heavily (same basic steps used in making 2 2 beta large in BJTs). Wide n 1 region (base of Q1) .1) (1 . off = = turn-off gain • Use highly interdigitated gate-cathode off (1 . I C2 = (1 . IA 2 • I' G < .1 ) IA • Make 2 . • Anode shorts helps resolve lifetime delimma • Force Q 2 active by using negative base current I G ’ to 1.2) IA relatively thin and doping in n 2 region • 1 IA .reduces turn-off time • IB2 = 1 IA . N+ anode regions provide a sink for excess holes .1) IA (1 .unity by making p 2 layer (1 . Copyright © by John Wiley & Sons 2003 GTOs . Reduce lifetime only moderately to keep IC2 on-state losses reasonable make I B2 < 2 2.also needed 2 for large blocking voltage 2.I' G .3 .1 .

4 .max by I A < P off N Copyright © by John Wiley & Sons 2003 GTOs .max and so anode current restricted IG. Maximum Controllable Anode Current K G N+ G • Large negative gate current creates shrinking lateral voltage drops which must be plasma kept smaller than breakdown voltage of J3. P • If J3 breaks down. it will happen at N gate-cathode periphery and all gate current will flow there and not sweep K out any excess carriers as required to G turn-off GTO. N+ • Thus keep gate current less than IG.

Turn-off snubber to limit rate-of-rise of voltage . free.  to avoid retriggering the GTO into the on-state. f wheeling diode D F. GTO Step-down Converter • GTO used in medium-to-high power applications I where electrical stresses are large and where other D o solid state devices used with GTOs are slow e. C s • Hence should describe transient behavior of GTO in circuit with snubbers. Turn-on snubber to limit overcurrent from D F reverse recovery. Copyright © by John Wiley & Sons 2003 GTOs .5 . D L s 2. + • GTO almost always used with turn-on and turn-off snubbers.g. V d R s 1.

i A tw • Backporch current I GT needed to insure all t cathode islands stay in conduction during 1 entire on-time interval. K t • Anode-cathode voltage drops precipitiously v because of turn-on snubber GK t Copyright © by John Wiley & Sons 2003 GTOs . v • Anode current overshoot caused by free- A wheeling diode reverse recovery current. GTO Turn-on Waveforms IG • GTO turn on essentially the same as for a iG standard thyristor M t I "backporch" • Large I GM and large rate-of-rise insure all td GT current cathode islands turn on together and have good current sharing.6 .

Anode current falls rapidly as load current t tail commutates to turn-offsnubber capacitor Io 2. Rapid rise in anode-cathode voltage due to stray i inductance in turn-off snubber circuit A t • tw2 interval t fi 1. Most power dissipation occurs during tailing time. Copyright © by John Wiley & Sons 2003 GTOs . Long tailing time required to remove 2 . 2. 3. for analysis purposes • ttail interval v G t 1. Anode-cathode voltage growth governed by turn-off snubber. so anode current = negative K tw V GG gate current. Start of anode current tail. Junction J3 blocking.7 . Permits negative gate tg dt dt max current to continuing flowing and sweeping out charge from p2 layer. remaining stored charge. Reduction in gate current with time means rate of v A t anode current commutation to snubber capacitor K approximate waveform slows. Junction J3 goes into avalanche breakdown because ts V dv < dv d of inductance in trigger circuit. q 2. GTO Turn-off Waveforms iG • ts interval t Time required to remove sufficient stored charge to IG approximate bring BJTs into active region and break latch condition T waveform for analysis • tfi interval purposes 1.