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16-bit Arithmetic Logic Unit
16-bit data bus (8088 has 8-bit data bus) 20-bit address bus - 220 = 1,048,576 = 1 meg The address refers to a byte in memory. In the 8088, these bytes come in on the 8-bit data bus. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15). The 8086 can read a 16-bit word at an even address in one operation and at an odd address in two operations. The 8088 needs two operations in either case. The least significant byte of a word on an 8086 family microprocessor is at the lower address.
Simplified CPU Design Data B s Data R gist rs Control Unit Addr ss R gist rs Arithm tic Logic Unit Stat s lags M mory Addr ss B s .
Intel 16-bit Registers General Purpose AH AL Index BP SP AX BH BL BX SI CH CL DI CX DH DL DX Segment CS Status and Control lag IP SS DS ES .
the Code Segment Register DS . The BIU fetches instructions.the Extra Segment Register The BIU fetches instructions using the CS and IP. the Bus Interface Unit (BIU) and the Execution Unit (EU). to contract the 20-bit address. The EU decodes and executes the instructions using the 16-bit ALU. written CS:IP.the Data Segment Register SS .the Stack Segment Register ES . reads and writes data. Data is fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU depending on the addressing mode. and computes the 20-bit address. . The BIU contains the following registers: IP .8086 rc itecture The 8086 has two parts.the Instruction Pointer CS .
This allows byte operations and compatibility with the previous generation of 8-bit processors. although.the Base Register CX .the Data Register SP . the 8080 and 8085.the Stack Pointer \ defaults to stack segment BP . they often have a special-purpose use for some instructions. CX. BX. a High byte and a Low byte. and DX registers can be considers as two 8-bit registers.BL CX --> CH.AL BX --> BH. The AX.DL . 8085 source code could be translated in 8086 code and assembled.The EU contains the following 16-bit registers: AX .the Count Register DX .the Base Pointer / SI .CL DX --> DH.the Destination Register These are referred to as general-purpose registers. as seen by their names.the Source Index Register DI .the Accumulator BX . The 8-bit registers are: AX --> AH.
Re isters .
8086 r ra er¶s el BIU registers (20 bit adder) ES CS SS DS IP AX BX CX DX AH BH CH DH SP BP SI DI FLAGS AL BL CL DL Extra Segment Code Segment Stack Segment Data Segment Instruction Pointer Accumulator Base Register Count Register Data Register Stack Pointer Base Pointer Source Index Register Destination Index Register EU registers .
CX and DX are two bytes wide and each byte can be accessed separately These registers are used as memory pointers. Flags will be discussed later Segment registers are used as base address for a segment in the 1 M byte of memory .8086/88 internal registers 16 bits (2 bytes each) AX. BX.
BP.The 8086/8088 Microprocessors: Registers Registers ± Registers are in the CPU and are referred to by specific names ± Data registers Hold data for an operation to be performed There are 4 data registers (AX. DI) ± Status register Keeps the current status of the processor On an IBM PC the status register is called the FLAGS register ± In total there are fourteen 16-bit registers in an 8086/8088 . DS. CX. SS) Pointer registers (SP. IP) Index registers (SI. BX. DX) ± Address registers Hold the address of an instruction or data element Segment registers (CS. ES.
BH. BX. BX.Data Registers: AX. CH. DX are the data registers Low and High bytes of the data registers can be accessed separately ± AH. CX. CL. CX. DX Instructions execute faster if the data is in a register AX. DH are the high bytes ± AL. logic and data transfer instructions because it generates the shortest Machine Language Code ± Must be used in multiplication and division operations ± Must also be used in I/O operations . BL. and DL are the low bytes Data Registers are general purpose registers but they also perform special functions AX ± Accumulator Register ± Preferred register to use in arithmetic.
BX ± Base Register ± Also serves as an address register CX ± Count register ± Used as a loop counter ± Used in shift and rotate operations DX ± Data register ± Used in multiplication and division ± Also used in I/O operations .
. the SI register points to memory locations in the data segment which is addressed by the DS register.Pointer and Index Registers Contain the offset addresses of memory locations Can also be used in arithmetic and other operations SP: Stack pointer ± Used with SS to access the stack segment BP: Base Pointer ± Primarily used to access data on the stack ± Can be used to access data in other segments SI: Source Index register ± is required for some string operations ± When string operations are performed. SI is associated with the DS in string operations. Thus.
± When string operations are performed. The SI and the DI registers may also be used to access data stored in arrays . DI: Destination Index register ± is also required for some string operations. DI is associated with the ES in string operations. the DI register points to memory locations in the data segment which is addressed by the ES register. Thus.
CS. SS and ES Are Address registers Store the memory addresses of instructions and data Memory Organization ± Each byte in memory has a 20 bit address starting with 0 to 220-1 or 1 meg of addressable memory ± Addresses are expressed as 5 hex digits from 00000 .536) consecutive memory bytes A segment number is a 16 bit number Segment numbers range from 0000 to FFFF Within a segment. DS.FFFFF ± Problem: But 20 bit addresses are TOO BIG to fit in 16 bit registers! ± Solution: Memory Segment Block of 64K (65. a particular memory location is specified with an offset An offset also ranges from 0000 to FFFF .Segment Registers .
Se Se e te c bi ati e te e r e r a ressi : abs lute (li ear) a ress is a f a 16-bit se e t value a e t a 16-bit ffset F0000 0000 D0000 0000 0000 0000 90000 80000 70000 60000 50000 40000 30000 20000 10000 00000 se fs 8000:0000 0250 8000:FFFF e se e t 8000:0250 .
Intel Memory Address Generation The BIU has a dedicated adder for determining physical memory addresses Offset Value (16 bits) Segment Register (16 bits) 0000 Adder Physical Address (20 Bits) .
Intel Example Address Calculation If the data segment starts at location 1000h and a data reference contains the address 29h where is the actual data? 2 Offset: Segment: Address: 9 0000000000101001 0001000000000000 0000 0001000000000010 1001 .
Segment:Offset Address Logical Address is specified as segment:offset Physical address is obtained by shifting the segment address 4 bits to the left and adding the offset address Thus the physical address of the logical address A4FB:4872 is A4FB0 + 4872 A9822 .
Your tur . . .
W at li ear address corresponds to t e se address 028F:0030? ent/offset
028F0 + 0030 = 02920
Alwa s use exadeci al notation for addresses.
Your turn . . .
W at se 28F30 ? ent addresses correspond to t e linear address
any different se ent-offset addresses can produce t e linear address 28F30 . For exa ple: 28F0:0030, 28F3:0000, 28 0:0430, . . .
The Code Segment
0400H IP 0056H
CS:IP = 400:56 Logical Address Memory
Segment Register Offset Physical or Absolute Address +
0400 0 0056 04056H
The offset is the distance in bytes from the start of the segment. The offset is given by the IP for the Code Segment. Instructions are always fetched with using the CS register.
The physical address is also called the absolute address.
.The Data Segment 0H DS: 05C0 SI 0050 05C00H 05C50H DS:EA Memory Segment Register Offset Physical Address + 05C0 0050 0 05C50H 0FFFFFH Data is usually fetched with respect to the DS register. The effective address (EA) is the offset. The EA depends on the addressing mode.
pre-decrement the SP POP . The stack is always referenced with respect to the stack segment register. The SP points to the last or top item on the stack. The stack grows toward decreasing memory locations. PUSH .post-increment the SP .The Stack Segment 0H SS: 0A00 SP 0100 0A000H 0A100H SS:SP Memory Segment Register Offset Physical Address + 0A00 0 0100 0A100H 0FFFFFH The offset is given by the SP register.
Flags Overflow Direction Interrupt enable Trap 6 are status flags 3 are control flag Sign Zero Carry flag Parity flag Auxiliary flag .
Fla Bit no. Control flags: ± Used to control some operations of the MPU. 15 14 13 12 O 11 D 1 0 9 T 8 S 7 Z 6 5 A 4 3 P 2 1 C 0 CF (carry) Contains carry from leftmost bit following arithmetic. . You do not need to alter the value yourself. These flags are to be set by you in order to achieve some specific purposes. also contains last bit from a shift or rotate operation.Fla Re ister Conditional flags: ± They are set according to some results of arithmetic operation.
TF (trap) Permits operation of the processor in single step mode.Fla Re ister OF (overflow) Indicates overflow of the leftmost bit during arithmetic. IF (interrupt) Indicates whether external interrupts are being processed or ignored. . DF (direction) Indicates left or right for moving or comparing string data.
PF (parity) Indicates the number of 1 bits that result from an operation. (1=yes) AF (auxiliary carry) Contains carry out of bit 3 into bit 4 for specialized arithmetic. SF (sign) Contains the resulting sign of an arithmetic operation (1=negative) ZF (zero) Indicates when the result of arithmetic or a comparison is zero. .
1 MOV BX. Addressing modes ± Register and immediate seen MOV AX.AX re ister i ediate odes we ave already .
80x86 asse bler Typical addressing ± Absolute address ode odes MOV AX. value stored in e ory location DS:0200 .3F03 .
[BX] value stored at address contained in DS:BX .80x86 asse bler Typical addressing ± Register indirect odes MOV AX.3F03 .
80x86 asse bler Typical addressing ± Displace ent odes MOV D .3F03 .[0200+D ] value stored at DS:0204 .4 MOV AX.
3F03 .4 MOV AX.0200 MOV DI.[BX+DI] value stored at DS:0204 odes .80x86 asse bler Typical addressing ± Indexed MOV BX.
0204 MOV BX.[DI] MOV AX.3F03 .[BX] If DS:0204 contains 0256.80x86 asse bler Typical addressing ± Me ory indirect MOV DI. t en AX will contain w atever is stored at DS:0256 odes .
[BX] 0250 odes Byte addresses in memory 0200 0204 DI 56 02 BX 0256 If DS:0204 contains 0256.0204 MOV BX.80x86 asse bler Typical addressing ± Me ory indirect MOV DI.3F03 .[DI] MOV AX. t en AX will contain w atever is stored at DS:0256 AX = 1234 34 12 .
The M/IO¶. DT/R¶.I/O write command AMWC¶ . IV-1 . The system can support multiple processors on the system bus by the use of an 8289 Bus Arbiter.I/O read command IOWC¶ .8086 in Maxi u Mode The IBM PC is a maximum mode 8088 system.Advanced memory write command AIOWC¶ . and INTA¶.memory write command IORC¶ . and WR¶ signals are replaced by: MRDC¶ . The following signals now come from the 8288: ALE.memory read command MWTC¶ . When an 8086/8088 is used in the maximum mode (MN/MX pin grounded) it requires the use of an 8288 Bus Controller.Advanced I/O write command The advanced commands become active earlier in the cycle to give devices an earlier indication of a write operation. RD¶. DEN.
AIOWC¶ none MRDC¶ MRDC¶ MWTC¶. the 8086/8088 has 3 status lines that are connected to the 8288 and provide it with the information it needs to generate the system bus signals. S2¶ S1¶ S0¶ 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 operation Interrupt Acknowledge Read I/O port Write I/O port Halt Instruction Fetch Read Memory Write Memory Passive signal INTA¶ IORC¶ IOWC¶. AMWC¶ none IV-2 .8086 Maxi u Mode When in the maximum mode. The information provided by the status bits is as follows.
and control bus.Direct Me ory Access . Figure 11-4 is a simplified block diagram showing the use of a DMA controller. 7. The DMA controller then takes control of the buses. 2.DMA DMA allows data to go between memory and a peripheral. The cpu responds with a hold-acknowledge HLDA and floats its buses. 3. such as a disk drive. the DMA controller sends a hold-request HQR to the cpu. The 8237A DMA Controller is a commonly used device and is in the IBM PC. For example. Send a series of commands to the disk controller to find and read a block of data. data bus. The DMA controller sends out the memory address and DMA acknowledge DACK0 to the disk controller. 5. 6. When the controller has the first byte of the block. The DMA controller asserts the MEMW¶ and IOR¶ lines. to read a disk file the following operations occur. 1. IV-4 . The DMA controller takes over the address bus. without going through the cpu. If that input of the DMA controller is unmasked. 4. it sends a DMA request DREQ to the DMA controller.
Read Only Memory.retains data when powered off. ROM . PROM. FLASH Disk. tape. Examples VOLATILE Static RAM Dynamic RAM NONVOLATILE ROM.g. Nonvolatile . e. although random access memory. magnetic bubble IV-6 . EPROM. EEPROM. Random Access .Random Access Memory By convention. is not referred to as RAM.all data locations accessed in the same amount of time..data is lost when power is turned off. RAM in a PC is really Read/Write Memory and ROM (EPROM) in a PC.Me ory Terminology Volatile . RAM . tape Magnetic core.data accessed in varying amounts of time. Sequential Access .
BHE* A(11-1) D(7-0) A(19-12) 16 6116 (2K x8) A(10-0) D(7-0) __ R/W OE* CS* Latch low byte (even) Addr Decoder RAMCS* __ M/IO ___ WR ___ RD READY RLH .Interface 8086 to 6116 static RAM 8086 A ____ BHE ALE D 20 21 A0.Fall 1997 A0 MEM* A(11-1) D(15-8) BHE* Wait State Gen A(10-0) D(7-0) __ R/W OE* CS* hi byte (odd) 47 .
Introduction to 8086 Assembly Language Programming .
W at Is Asse bly Language Mac ine-Specific Progra ing Language ± one-one correspondence between state ents and native ac ine language ± matc es mac ine instruction set and arc itecture IBM-PC Assembly Language ± refers to 8086. 80286. 80386. and Pentium Processors . 80486. 80186. 8088.
contains a record of t e translation process. generated code and data.W at Is An Assembler? Systems Level Program ± translates assembly language source code to mac ine language object file . initial data. and information used w en loading t e program listing file .contains mac ine instructions. and a symbol table . addresses. line numbers.
W y Learn Assembly Language? Learn ow a processor works nderstand basic computer arc itecture xplore t e internal representation of data and instructions Gain insight into hardware concepts Allows creation of small and efficient programs Allows programmers to bypass high-level language restrictions Might be necessary to accomplish certain operations .
Data Representation Binary 0-1 ± represents the state of electronic components used in computer systems Word .8 Bits ± smallest addressable memory location (on the IBM-PC) Doubleword .Binary digit Byte .64 Bits Nybble .16 Bits ± Each architecture may define its own ³wordsize´ Bit .32 Bits Quadword .4 Bits .
«. 1 Raw Binary format ± All information is coded for internal storage ± Externally. «. F . « 7 Decimal . we may choose to express the information in any numeration system. 1.Base 2 ± 0. 9. 1.Base 8 ± 0.Base 10 ± 0. B. 9 Hexadecimal (Hex) ± 0. A. 2. 2. 1.Numbering Systems Binary . «. or in a decoded form using other symbols Octal .
Decoding a Byte Raw ± 01010000b Machine Instruction ± Push AX Hex ± 50h ASCII Character code ± µP¶ Octal ± 1208 Integer ± 80 (eighty) Decimal ± 80d BCD ± 50 (fifty) Custom code ??? .
called the Processor¶s Instruction Set ± The set of basic operations a processor can perform Each instruction is coded as a number Instructions may be one or more bytes Every number corresponds to an instruction .Machine Language A language of numbers.
Assembly Language vs Machine Language Programming Machine Language Programming ± Writing a list of numbers representing the bytes of machine instructions to be executed and data constants to be used by the program Assembly Language Programming ± Using symbolic instructions to represent the raw data that will form the machine language program and initial data constants .
or variable Assembler Directives . address.Assembly Language Instructions Mnemonics represent Machine Instructions ± Each mnemonic used represents a single machine instruction ± The assembler performs the translation Some mnemonics require operands ± Operands provide additional information register. constant.
8086 Instruction . \n.$ Last character must be : Operator . etc. memory data.Extremely useful in assembler language These fields are separated by White Space (tab.) ._. memory address Comment .Comment Label .@.optional alphanumeric string 1st character must be a-z. register name.?.A-Z. blank.assembly language instruction mnemonic: an instruction format for humans Assembler translates mnemonic into hexadecimal opcode example: mov is f8h Operand[s] .0 to 3 pieces of data required by instruction Can be several different forms Delineated by commas immediate.Basic Structure Label Operator Operand[s] .
Example Label INIT: mov Operator ax.Comment . bx Operand[s] . Copy contents of bx into ax Label Operator Operands Comment - INIT: mov ax and bx alphanumeric string between . destination operand is first mov is the mnemonic that the assembler translates into an opcode . and \n Not case sensitive Unlike other assemblers.8086 Instruction .
Assembler Language Segment Types Stack ± For dynamic data storage ± Source file defines size ± Must have exactly 1 Data ± For static data Storage ± Source file defines size ± Source file defines content (optional) ± Can have 0 or more Code ± For machine Instructions ± Must have 1 or more .
Translated source file by assembler . Symbols.Assembler source file prepared by programmer . etc .LST]: Cross Reference [NUL.CRF]: hello .LST . Addresses.OBJ .ASM . documents ³Translation´ process » Errors.CRF ± Cross reference file .Listing file.Using MASM Assembler to get help: C:\> masm /h Can just invoke MASM with no arguments: C:\> masm Source Filename [.ASM]: Object Filename [HELLO.OBJ]: Source Listing [NUL.
Exchange .Load pointer to DS .Load EA to register .Load AH from Flags .Convert Byte to Word AL AX .Store AX into memory at DI .Convert Word to Double in AX .Push Flags .Input .AX .Pop Flags .Store AH into Flags .Push .Load memory at SI into AX .Move .Translate byte to AL DX.Pop .Load pointer to ES .Output .Move memory at SI to DI .x86 Instruction Set Summary (Data Transfer) CBW CWD IN LAHF LDS LEA LES LODS MOV MOVS OUT POP POPF PUSH PUSHF SAHF STOS XCHG XLAT .
DX) .Multiply (signed) in AX(.Logical AND .ASCII Adjust for Add in AX .Increment .x86 Instruction Set Summary (Arithmetic/Logical) AAA AAD AAM AAS ADC ADD AND CMC CMP CMPS DAA DAS DEC DIV IDIV MUL IMUL INC .Divide (unsigned) in AX(.ASCII Adjust for Divide in AX .ASCII Adjust for Multiply in AX .Decimal Adjust for Add in AX .ASCII Adjust for Subtract in AX .Decimal Adjust for Subtract in AX .Decrement .Add with Carry .Compare .DX) .Divide (signed) in AX(.Add .Complement Carry .Compare memory at SI and DI .DX) .DX) .Multiply (unsigned) in AX(.
AND function to flags .Scan memory at DI compared to AX .Subtract with Borrow .Shift logical Right .) NEG NOT OR RCL RCR ROL ROR SAR SBB SCAS SHL/SAL SHR SUB TEST XLAT XOR .Shift logical/Arithmetic Left .Logical inclusive OR .Negate .Rotate through Carry Right .Rotate through Carry Left .Translate byte to AL .Logical NOT .Logical Exclusive OR .Rotate Right .Shift Arithmetic Right .Subtract .Rotate Left .x86 Instruction Set Summary (Arithmetic/Logical Cont.
Jump on Not Below or Equal/Above .x86 Instruction Set Summary (Control/Branch Cont.Clear Carry .Jump on Equal/Zero .Clear Direction .Halt .Jump on Below or Equal/Not Above .Interrupt Return .Clear Interrupt .Jump on Not Equal/Not Zero .Call .Jump on Not Less/Greater or Equal .Interrupt on Overflow .Interrupt .Jump on CX Zero .Jump on Less or Equal/Not Greater .Jump on Less/Not Greater or Equal .) CALL CLC CLD CLI ESC HLT INT INTO IRET JB/JNAE JBE/JNA JCXZ JE/JZ JL/JNGE JLE/JNG JMP JNB/JAE JNBE/JA JNE/JNZ JNL/JGE .Jump on Not Below/Above or Equal .Escape (to external device) .Unconditional Jump .Jump on Below/Not Above or Equal .
Jump on Not Less or Equal/Greater .Loop while Not Zero/Not Equal .Jump on Not Sign .Bus Lock prefix .Return from call .Loop CX times .Jump on Sign .Jump on Not Overflow .AX) .Jump on Overflow .x86 Instruction Set Summary (Control/Branch) JNLE/JG JNO JNP/JPO JNS JO JP/JPE JS LOCK LOOP LOOPNZ/LOOPNE LOOPZ/LOOPE NOP REP/REPNE/REPNZ REPE/REPZ RET SEG STC STD STI TEST WAIT .Loop while Zero/Equal .Repeat Equal/Zero .Set Interrupt .Set Carry .Jump on Parity/Parity Even .Repeat/Repeat Not Equal/Not Zero .No Operation (= XCHG AX.Jump on Not Parity/Parity Odd .Set Direction .Segment register .AND function to flags .Wait .
stack .Assembler Directives end label proc far|near end of program.data . label is entry point begin a procedure. near keywords specify if procedure in different code segment (far). or same code segment (near) end of procedure set a page format for the listing file title of the listing file mark start of code segment mark start of data segment set size of stack segment endp page title .code . far.
32767 10 * 20 . with no initial values for bytes define 5 bytes. calculate a value (200) define byte define word (2 bytes) define double word (4 bytes) define quadword (8 bytes) define tenbytes equate. ASCII equivalent of ³Hello´. assign numeric expression to a name .Assembler Directives db dw dd dq dt equ Examples: db 100 dup (?) db ³Hello´ maxint equ count equ define 100 bytes.
.....13. hellostk SEGMENT BYTE STACK 'STACK' ....... . It prints the .data segment start address ......ah <-......Set maximum stack size to 256 bytes (100h) hellostk ENDS hellodat dos_print strng hellodat hellocod START: SEGMENT BYTE 'DATA' .... .....Define the character string ENDS SEGMENT BYTE 'CODE' ..Define mov ax.. SEG hellodat mov ds.........10.. . 4c00h int 21h ENDS END START the Code segment .dx <-... ... . ......4c DOS 21h program halt function ....... character string "Hello World" to the DOS standard output .. µEND label¶ defines program entry hellocod ........Program Example ......... function 9.......ds <-.... This is an example program.'$' .DOS service interrupt .. using the DOS service interrupt......... dos_print mov dx.........ax <-...OFFSET strng int 21h mov ax...........beginning of string . ..... ax mov ah..............ax <-.9 DOS 21h string function .DOS service interrupt ...Define the stack segment DB 100h DUP(?) ..Define the data segment EQU 9 ..define a constant via EQU DB 'Hello World'...... .initialize data segment register ....
..DOS service interrupt ENDS START hellocod END . ss: hellostk mov ax...ax <-........... ds:hellodat.Define a segment DB 100h DUP(?) hellostk ENDS hellodat dos_print strng hellodat hellocod START: SEGMENT . ....OFFSET strng .......DOS service interrupt mov ax.10......Define the character string ENDS SEGMENT ...ds <-....define a constant DB 'Hello World'... Use 'assume' directive to define segment types ...ax <-..initialize data segment register mov ah.....data segment start address mov ds.......Another Way to define Segments .....beginning of string int 21h ...ah <-...4c DOS 21h program halt function int 21h ..define a segment EQU 9 ........define a segment assume cs:hellocod.... hellostk SEGMENT . .9 DOS 21h string function mov dx............ ... ax .13..'$' ... dos_print .... 4c00h .. hellodat .................. ...............................dx <-...
reserve 256 bytes of stack space ........data segment start address ...Yet another way to define Segs .... ...dx <-...code START: mov mov mov mov int mov int ax........beginning of string .......... ...................OFFSET strng 21h ax..........code directives to define segment types ....4c DOS 21h program halt function ..data dos_print EQU 9 strng DB 'Hello World'......9 DOS 21h string function . ..stack 100h .. dos_print dx..Define the character string . .DOS service interrupt END START ... SEG strng ds....stack...............ds <-......DOS service interrupt ..... ....initialize data segment register .10..ah <-. 4c00h 21h ...............data...13... ax ah.define a constant .. Use ......ax <-.ax <-......'$' .......
pseudo-operation code Space or tab separates initial fields Comments begin with semicolon Most assemblers are not case sensitive .symbolic operation code ± directive .Program Statements name operation operand(s) comment Operation is a predefined or reserved word ± mnemonic .
word(s) DD .doubleword(s) DQ .byte(s) DW .Program Data and Storage Pseudo-ops to define data or reserve storage ± ± ± ± ± DB .quadword(s) DT .tenbyte(s) These directives require one or more operands ± define memory contents ± specify amount of storage to reserve for run-time data .
ASCII A list of values may be used .?.the following creates 4 consecutive words DW 40CH.binary 100H .-13.10B.hexadecimal '100' .0 Use the appropriate DEFINE directive (byte. etc.-128.Defining Data Numeric data values ± ± ± ± ± 100 .'X' .) A ? represents an uninitialized storage location DB 255.decimal 100B . word.ASCII "100" .
initialized to FCh The next word has no associated name ONE and UNO refer to the same word X is an unitialized doubleword .Naming Storage Locations Names can be associated with storage locations ANum DB -4 DW 17 ONE UNO DW 1 X DD ? These names are called variables ANum refers to a byte storage location.
-1. FFFFFFFFH.Arrays Any consecutive storage locations of the same size can be called an array X DW 40CH. Z+8. «. Y+1.-13. Z+12 .0 Y DB 'This is an array' Z DD -109236.10B. Z+4. X+2. Y+15 Components of Z are at Z. X+8 Components of Y are at Y. X+4. 100B Components of X are at X.
DUP Allows a sequence of storage locations to be defined or reserved Only used as an operand of a define directive DB 40 DUP (?) DW 10h DUP (0) DB 3 dup ("ABC") .
and quadword data are stored in reverse byte order (in memory) Directive DW 256 DD 1234567H DQ 10 X DW 35DAh Bytes in Storage 00 01 67 45 23 01 0A 00 00 00 00 00 00 00 DA 35 Low byte of X is at X. high byte of X is at X+1 . doubleword.Word Storage Word.
Named Constants Symbolic names associated with storage locations represent addresses Named constants are symbols created to represent specific values determined by an expression Named constants can be numeric or string Some named constants can be redefined No storage is allocated for these values .
Equal Sign Directive name = expression ± expression must be numeric ± these symbols may be redefined at any time maxint = 7FFFh count = 1 DW count count = count * 2 DW count .
EQU Directive name EQU expression ± expression can be string or numeric ± Use < and > to specify a string EQU ± these symbols cannot be redefined later in the program sample EQU 7Fh aString EQU <1.234> message EQU <This is a message> .
reg mem. reg reg. mem mem. immed reg.Data Transfer Instructions MOV target. source ± ± ± ± ± reg. immed Sizes of both operands must be the same reg can be any nonsegment register except IP cannot be the target register MOV's between a segment register and memory or a 16-bit register are possible .
it is assigned a default size attribute (byte.-100 b.Sample MOV Instructions b db 4Fh w dw 2048 mov mov mov mov mov mov bl.dh ax.w ch.255 w. word.0 When a variable is created with a define directive.b al. etc) You can assign a size attribute using LABEL LoByte LABEL BYTE aWord DW 97F2h .
b-1 will not subtract 1 from the value stored at b Type checking is still in effect . -100. b+5 dx. 20h. 3Ch w dw 2048. w-3 The assembler computes an address based on the expression NOTE: These are address computations done at assembly time MOV ax. ah ah.Addresses with Displacements b db 4Fh. w+2 b+1. 0 mov mov mov mov bx.
eXCHanGe XCHG target. source ± reg. mem ± mem. reg ± reg. reg This provides an efficient means to swap the operands ± No temporary storage is needed ± Sorting often requires this type of operation ± This works only with the general registers MOV and XCHG cannot perform memory to memory moves .
or constant dest can be a register or memory location ± except operands cannot both be memory .Arithmetic Instructions ADD dest. source SUB dest. memory location. source INC dest DEC dest NEG dest Operands must be of the same size source can be a general register.
Program Segment Structure Data Segments ± Storage for variables ± Variable addresses are computed as offsets from start of this segment Stack Segment ± used to set aside storage for the stack ± Stack addresses are computed as offsets into this segment Code Segment ± contains executable instructions Segment directives .code .data .stack size .
one code segment ± large: multiple code and data segments ± huge: allows individual arrays to exceed 64K ± flat: no segments.Memory Models .com program) ± small: code<=64K. protected mode only (80386 and higher) . one data segment ± compact: code<=64K. 32-bit addresses. data<=64K. one of each ± medium: data<=64K.Model memory_model ± tiny: code+data <= 64K (.
data . define the entry point .model small .stack 100H .code main proc .other procs end main Select a memory model Define the stack size Declare variables Write code ± organize into procedures Mark the end of the source file ± optionally.Program Skeleton .declarations .code main endp .
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