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Simple Processor!
signals
Control Points
PC
Instruction Add Sum Address Read
data 16 32
Sign
Instruction extend
Write Data
memory
data memory
ALU control
5 Read 3
register 1
Read
Register 5 data 1
Read
numbers register 2 Zero
Registers Data ALU ALU
5 Write result
register
Read
Write data 2
Data data
RegWrite
a. Registers b. ALU
Oct-16 Cpu control.8
Review: How Registers work
• Register Write Enable
– Similar to D Flip Flop
Data In Data Out
• N-bit input and output
N N
• Write Enable input
– Write Enable:
Clk
• negated (0): Data Out will not
change
• asserted (1): Data Out will become
Data In after clock edge
. . . .
. . . .
. . . .
• Instruction fetch 4
Add
– program counter points
to current instruction
– adder increments PC PC Read
to point to next inst. address
Rd Rs Rt
Write 5 ALU control
5 5
Read data 1
Rw R1 R2
Write data 32
ALU
32 32-bit Result
32 Registers 32
Clk Read data 2
32
4 ALU control
Add
Read read
register1 zero
data 1
AL U
PC Read Read
register2 result
address
register file
Instruction Write read
register data 2
Inst memory
write data
Write
Oct-16 Cpu control.15
Timing: One complete cycle
Clk
Clk-to-Q
PC Old Value New Value
Instruction Memory Access Time
Rs, Rt, Rd, Old Value New Value
Op, Func
Delay through Control Logic
ALUctr Old Value New Value
Rd Rs Rt
RegWr 5 5 ALUctr Register Write
5
Occurs Here
Read data 1
Rw Ra Rb
Write data 32
ALU
32 32-bit Result
32 Registers 32
Clk Read data 2
32
M
Ad d u
x
4 A d d A LU
result
S hift
left 2
R egiste rs
R ead
PC R ea d register 1
R ea d
ad dres s R e ad da ta 1
re gister 2 Z ero
Instru c tio n A LU A L U
W rite R ea d A ddre ss R e ad
M resu lt
register da ta 2 d ata M
Instruc tion u u
W rite x D ata x
m e m ory
d ata m em ory
W rite
da ta
16 S ig n 32
extend
M
Add u
x
4 Add ALU
result
Shift
left 2
Identify your
Registers controls
Read 3 ALU operation MemWrite
Read register 1 ALUSrc
PC Read
address Read data 1 MemtoReg
register 2 Zero
Instruction ALU ALU
Write Read Address Read
register M result data
data 2 u M
Instruction u
memory Write x Data x
data memory
Write
RegWrite data
16 32
Identify your Sign
extend MemRead
controls
• Control:
– input: 6-bit opcode Main
7 lines
control
– output: 9 control lines Control register 3-bit
• ALU control: memory
mux
– input: ALUop + 6-bit ALU
control
(function field)
inst[31-26]
– output: 3 lines ALUop 2-bit
6-bit
– I, J type, ALU control
inst[5-0]
depends on only ALUop
R-type
op func
16-bit
I-type
Instruction [5– 0]
Instruction [5– 0]
100 100
Instruction [31– 26]
MemRead
MemtoReg
Control ALUOp
MemWrite
ALUSrc
RegWrite
Setup time
Rformat timing= 400 +200+30 +120 +30 + 50 (IF WB)
OR = 400 + 100 (IF – cntl – Pcmux)
Oct-16 Cpu control.25
Control Unit -- Control Signal Definitions
Instruction [5– 0]
0
M
u
x
Add ALU 1
result
Add Shift
RegDst left 2
4 Branch
MemRead
Instruction [31– 26] MemtoReg
Control ALUOp
MemWrite
1. IF ALUSrc
RegWrite
3. EX, calc
2.D address
Read
Instruction [25– 21] Read
register 1
4.Mem rd
PC address Read
Instruction [20– 16] Read data 1
register 2 Zero
Instruction 0 Registers Read
[31– 0] ALU ALU
M Write data 2 0 Address Read
result 1
Instruction u register M data
u M
memory x u
Instruction [15– 11] Write x
1 Data x
data 1 memory 0
Write
data
OFF16 32
Instruction [15– 0] Sign
extend ALU
control
Instruction [5– 0]
Update PC with
target addr. If 0
successful M
u
x
Add ALU 1
result
Add Shift
RegDst left 2
4 Branch
MemRead
Instruction [31– 26] MemtoReg
Control ALUOp
MemWrite
1. IF ALUSrc
RegWrite
3. EX, compare
Instruction [25– 21] 2.D Read
s1:s0
Read register 1
PC address Read
Instruction [20– 16] Read data 1
register 2 Zero
Instruction 0 Registers Read
[31– 0] ALU ALU
M Write data 2 0 Address Read
result 1
Instruction u register M data
u M
memory x u
Instruction [15– 11] Write x
1 Data x
data 1 memory 0
Write
data
16 32
Instruction [15– 0] Sign
extend ALU
control
Instruction [5– 0]
address
Load
Inst Memory Reg File ALU Data Mem RegW
Critical Path
Store
Inst Memory Reg File ALU Data Mem
Branch
Inst Memory Reg File cmp
Cycle 1 Cycle 2
Clk
8051
Microcontroller
Block Diagram:
Used in Lab project