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# UNIT-4

## Synchronous Sequential Logic

Assistant Professor,
Deptt of ECE,
JETGI, Barabanki
STORAGE ELEMENTS
Do u know how many bits of information can be
stored in this pen drive?

## what we are going to study is capable of storing a

single bit of data?

## Is not that cool?

The changes in the size of these memory chips over the period of 5 decayed
content let me show you another
interesting thing

## The storage space is of 5MB The storage space is of 128GB

BEFORE STARTING LET’S RECALL NAND GATE

A B Y
0 0 1
0 1 1
1 0 1
1 1 0
BASIC STORAGE ELEMENT

0
1

LATCH

0
1
#For input S=0, R=1.

S =0 1 Q =1 1 0 1 1 0
1 1 1 0

Q’=0 0
R =1 1
#For input S=1, R=0.

S =1 1 Q=0 0 1 0 0 1
1 1 0 1
0 1 1 0
1 1 1 0

Q’=1 1
R =0 1
#Tabulating all the result.

S Q
0 0 Indeterminant

0 1 1 0
1 0 0 1
11 11 1 NO 0
Q’ 1 1 CHANGE
0 1
R
#SR Flip-flop.

S=0 1 Q

Clock
0 0 NO CHANGE
0 1 0 1
0
1 Q’ 1 0 1 0
R=1
=0 Indeterminant
1 1
#D Flip-flop.
D Q Q’
CHARACTERIS
D 0 0 1
TIC TABLE
Q
1 1 0

Q(n) D Q(n+!)
Clock 0 0 1 TRUTH TABLE
1 1 0

Q’ Q Q(n+1) D
0 0 1 EXCITATION
1 1 0 TABLE
#JK Flip-flop.

J=1
1 =0 Q =1 =0 =1

Clock

0 =1 Q’=0 =1 =0
K=1
WAVE FORM REPRESENTATION
NOW, changes at I/P
Any change at I/P will affect O/P
will not effect O/P
1

CLOCK 0 RACE
AROUND
T 2T
(t)

1 CONDITION
Q0
SOLUTION OF RACE AROUND CONDITION

1
T F
CLOCK 0
T 2T
(t)

PROPAGATION DELAY
1

Q0
FINAL SOLUTION……

CLOCK 0
T 2T
(t)

Q0
PROBLEMS
Q:- Determine the output of PGT
Q:- Determine the output of PGT clocked SR flip flop which Q
clocked SR flip flop which Q initially 1 for the given input
initially 0 for the given input waveforms.
waveforms

Q
Q’
Master Slave Flip Flop

J =1
=1 Q=1
1=0 =0
0 0 1 1

0 =1
=0 =1
K=1 Q’=0
Analysis of clocked sequential circuits

X’
BX’
B
Shift Registers

## • A register is a digital circuit with two basic functions:

Data Storage and Data Movement
• A shift register provides the data movement function
• A shift register “shifts” its output once every clock cycle

## • A shift register is a group of flip-flops set up in a linear

fashion with their inputs and outputs connected
together in such a way that the data is shifted from one
device to another when the circuit is active
Shift Register Applications
• converting between serial • some counter applications
data and parallel data • ring counter
• temporary storage in a • Johnson counter
processor • Linear Feedback Shift Register

## • some arithmetic • time delay devices

operations • more …
• multiply, divide
• communications
• UART
Shift Register Characteristics
• Types
• Serial-in, Serial-out
• Serial-in, Parallel-out
• Parallel-in, Serial-out
• Parallel-in, Parallel-out
• Universal n-bit shift
register

• Direction
• Left shift
• Right shift
• Rotate (right or left)
• Bidirectional
Data Movement
• The bits in a shift register can move in any of the following manners
Data Movement
• Block diagrams for shift registers with various input/output
options:

## n-bit shift n-bit shift

register register

## n-bit shift n-bit shift

register register
Serial-In Serial-Out
• Data bits come in one at a time and
leave one at a time n-bit shift
register
• One Flip-Flop for each bit to be
handled
• Movement can be left or right, but is
usually only in a single direction in
a given register
• Asynchronous preset and clear
inputs are used to set initial values
Serial-In Serial-Out

## • The logic circuit diagram below shows a generalized

serial-in serial-out shift register
• SR Flip-Flops are shown
• Connected to behave as D Flip-Flops
• Input values moved to outputs of each Flip-Flop with the clock (shift) pulse

N 1 0

## N-Bit Shift Register

Shift Registers
• The simplest shift register is one that uses only Flip-Flops
• The output of a given Flip-Flop is connected to the D input of the Flip-Flop at its
right.
• Each clock pulse shifts the contents of the register one bit position to the right.
• The Serial input (SI) determines what goes into the leftmost Flip-Flop during the
shift. The Serial output (SO) is taken from the output of the rightmost Flip-Flop.

Q Q Q Q
Serial-In Serial-Out
• A simple way of looking at
the serial shifting operation,
with a focus on the data bits, 1

is illustrated at right
• The 4-bit data word “1011” 2

shift register 3

## • One shift per clock pulse

4
• Data is shown entering at
left and shifting right
5
27
Serial-In Serial-Out
• The diagram at right
shows the 4-bit sequence
the 4-bit serial-in serial-
out shift register
• Each bit moves one
position to the right each
edge occurs
the register
28
Serial-In Serial-Out
• This diagram shows the 4-
bit sequence “1010” as it
bit serial-in serial-out
shift register
• Each bit moves one
position to the right each
edge occurs
the register
29
Serial-In Serial-Out
• Serial-in, serial-out
shift registers are often
used for data
communications
• such as RS-232
• modem transmission and
reception
• SONET
• etc.
Universal Shift Register
• Universal shift register
• Can do any combination of parallel
and serial input/output operations n-bit shift
register

## • Requires additional inputs to

specify desired function
• Uses a Mux-like input gating

L/S L/S
A 0 0
F A
B 1 B
1
Universal Shift Register
Introducing counters
• Counters are a specific type of sequential circuit
• The state serves as the “output” (Moore)
• A counter that follows the binary number sequence is called a binary
counter
• n-bit binary counter: n flip-flops, count in binary from 0 to 2ⁿ-1

## • Counters are available in two types:

• Synchronous Counters
• Ripple Counters

• Synchronous Counters:
• A common clock signal is connected to the C input of each flip-flop
Synchronous Binary Up Counter
• The output value increases by one on each clock cycle
• After the largest value, the output “wraps around” back to 0
• Using two bits, we’d get something like this:

## Present State Next State 00 01

A B A B
0 0 0 1
0 1 1 0
1 0 1 1
1 1 0 0 11 10
Synchronous Binary Up Counter
Present State Next State
A B A B D1= A’B + AB’
0 0 0 1
0 1 1 0 D0= B’
1 0 1 1
1 1 0 0

clock
What good are counters?
• Counters can act as simple clocks to keep track of “time”
• You may need to record how many times something has happened
• How many bits have been sent or received?
• How many steps have been performed in some computation?

## • All processors contain a program counter, or PC

• Programs consist of a list of instructions that are to be executed
one after another (for the most part)
• The PC keeps track of the instruction currently being executed
• The PC increments once on each clock cycle, and the next program
instruction is then executed.
Synch Binary Up/Down Counter
• 2-bit Up/Down counter
• Counter outputs will be 00, 01, 10 and 11
• There is a single input, X.
> X= 0, the counter counts up
> X= 1, the counter counts down
• We’ll need two flip-flops again. Here are the four possible states:

00 01

11 10
The complete state diagram and table
• Here’s the complete state diagram and state table for this circuit

## Present State Inputs Next State

0 Q1 Q0 X Q1 Q0
00 01 0 0 0 0 1
1 0 0 1 1 1
0 1 0 1 0
0 1 1 0
0 1 1 0 0
1 1 0 0 1 1
11 10 1 0 1 0 1
0 1 1 0 0 0
1 1 1 1 0
D flip-flop inputs
• If we use D flip-flops, then the D inputs will just be the same as the desired next
states
• Equations for the D flip-flop inputs are shown at the right
• Why does D0 = Q0’ make sense? Q0
0 1 0 1
Q1 1 0 1 0
Present State Inputs Next State X
Q1 Q0 X Q1 Q0
D1 = Q1  Q0  X
0 0 0 0 1
0 0 1 1 1
0 1 0 1 0 Q0
0 1 1 0 0 1 1 0 0
1 0 0 1 1
Q1 1 1 0 0
1 0 1 0 1
X
1 1 0 0 0
1 1 1 1 0 D0 = Q0’
Synchronous Binary Up/Down Counter

X Q1

Q0

clock
Unused states
• The examples shown so far have all had 2n states, and used n flip-flops. But
sometimes you may have unused, leftover states
• For example, here is a state table and diagram for a counter that repeatedly
counts from 0 (000) to 5 (101)
• What should we put in the table for the two unused states?
Present State Next State 000
Q2 Q1 Q0 Q2 Q1 Q0
0 0 0 0 0 1
101 001
0 0 1 0 1 0
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 1 0 1
1 0 1 0 0 0 100 010
1 1 0 ? ? ?
1 1 1 ? ? ? 011
Unused states can be don’t cares…
• To get the simplest possible circuit, you can fill in don’t cares for the
next states. This will also result in don’t cares for the flip-flop inputs,
which can simplify the hardware
• If the circuit somehow ends up in one of the unused states (110 or 111),
its behavior will depend on exactly what the don’t cares were filled in with

## Present State Next State 000

Q2 Q1 Q0 Q2 Q1 Q0
0 0 0 0 0 1 101 001
0 0 1 0 1 0
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 1 0 1
100 010
1 0 1 0 0 0
1 1 0 x x x
1 1 1 x x x 011
…or maybe you do care
• To get the safest possible circuit, you can explicitly fill in next states
for the unused states 110 and 111
• This guarantees that even if the circuit somehow enters an unused state,
it will eventually end up in a valid state
• This is called a self-starting counter 110 111

## Present State Next State

000
Q2 Q1 Q0 Q2 Q1 Q0
0 0 0 0 0 1
0 0 1 0 1 0 101 001
0 1 0 0 1 1
0 1 1 1 0 0
1 0 0 1 0 1
1 0 1 0 0 0 100 010
1 1 0 0 0 0
1 1 1 0 0 0
011
43
More complex counters
• It can increment or decrement, by setting the UP input to 1 or 0
• You can immediately (asynchronously) clear the counter to 0000
by setting CLR = 1
• You can specify the counter’s next output by setting D3-D0 to any
four-bit value and clearing LD
• The active-low EN input enables or disables the counter
• When the counter is disabled, it continues to output the same
• The “counter out” CO is normally 1, but becomes 0
when the counter reaches its maximum value, 1111
2-bit Complex Binary Counter
Q1
EN
R
LD CO
D1

Q0
UP
R

D0

CLK
CLR
An 8-bit counter
• As you might expect by now, we can use
these general counters to build other
counters
• Here is an 8-bit counter made from two 4-bit
counters
• The bottom device represents the least significant four
bits, while the top counter represents the most significant
four bits
• When the bottom counter reaches 1111 (i.e., when CO =
0), it enables the top counter for one cycle

## • Other implementation notes:

• The counters share clock and clear signals
• Hex displays are used here
A restricted 4-bit counter
• We can also make a counter that “starts” at some value besides 0000
• In the diagram below, when CO=0 the LD signal forces the next state
• The result is this counter wraps from 1111 to 0110 (instead of 0000)
Another restricted counter
• We can also make a circuit that counts up to only 1100, instead of 1111
• Here, when the counter value reaches 1100, the NAND gate forces
the counter to load, so the next state becomes 0000
Ripple Counter

## Simple, yet asynchronous circuits !!!

Summary
• Counters serve many purposes in sequential logic design
• There are lots of variations on the basic counter
• Some can increment or decrement
• An enable signal can be added
• The counter’s value may be explicitly set
• There are also several ways to make counters
• You can follow the sequential design principles to build counters
from scratch
• You could also modify or combine existing counter devices
THANK YOU!